JP2013258431A - Component built-in wiring board and manufacturing method of the same - Google Patents

Component built-in wiring board and manufacturing method of the same Download PDF

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JP2013258431A
JP2013258431A JP2013194118A JP2013194118A JP2013258431A JP 2013258431 A JP2013258431 A JP 2013258431A JP 2013194118 A JP2013194118 A JP 2013194118A JP 2013194118 A JP2013194118 A JP 2013194118A JP 2013258431 A JP2013258431 A JP 2013258431A
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electronic component
heat conductor
land
wiring pattern
heat
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JP5601413B2 (en
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Kenji Sasaoka
賢司 笹岡
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Dai Nippon Printing Co Ltd
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Dai Nippon Printing Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Abstract

PROBLEM TO BE SOLVED: To provide a component built-in wiring board capable of improving heat radiation performance of a built-in component without increasing the costs, and to provide a manufacturing method of the component built-in wiring board.SOLUTION: A component built-in wiring board includes: first and second insulation layers positioned in a laminated manner; an electronic component which is buried in the second insulation layer and has a semiconductor chip; a heat conductor buried in the second insulation layer and having a surface which faces an end surface of the semiconductor chip being spaced away from the end surface; a wiring pattern which is provided being sandwiched by the first insulation layer and the second insulation layer and includes a mounting land for the electronic component and a fixing land for the heat conductor; a conductive member which is provided being sandwiched between the electronic component and the mounting land; a heat conductive member which is provided being sandwiched between the heat conductor and the fixing land and thermally and mechanically connects the heat conductor with the fixing land; and another wiring pattern which is provided in the second insulation layer being spaced away from a surface of the heat conductor which is opposite to a surface of the heat conductor, on which the heat conductive member is disposed, and a surface of the electronic component which is opposite to a surface of the electronic component, on which the conductive member is disposed.

Description

本発明は、絶縁板中に部品が埋設、実装された部品内蔵配線板およびその製造方法に係り、特に、半導体チップを有する電子部品が埋設、実装された部品内蔵配線板およびその製造方法に関する。   The present invention relates to a component built-in wiring board in which components are embedded and mounted in an insulating plate and a method for manufacturing the same, and more particularly to a component built-in wiring board in which electronic components having semiconductor chips are embedded and mounted and a method for manufacturing the same.

半導体チップがフリップ接続により埋設、実装された部品内蔵配線板の例として、下記特開2003−197849号公報に記載のものがある。半導体チップ(ベアチップ)をフリップ接続すればその実装で生じる厚さは最小限近くに節約され、よってフリップ接続は、半導体チップを有する電子部品を配線板中に内蔵する場合の有力な方法になる。   An example of a component built-in wiring board in which a semiconductor chip is embedded and mounted by flip connection is disclosed in Japanese Unexamined Patent Application Publication No. 2003-197849. If a semiconductor chip (bare chip) is flip-connected, the thickness generated by the mounting is saved to a minimum. Therefore, the flip connection is an effective method for incorporating an electronic component having a semiconductor chip in a wiring board.

しかしながら、フリップチップ接続に限らず配線板中に電子部品を内蔵する場合、電子部品が配線板用の絶縁樹脂により封止される構造になるため、電子部品での放熱が問題になる可能性がある。配線板用の絶縁樹脂は、特に熱伝導性が考慮されているわけではなく、放熱は気中より相当に悪化する。半導体チップを有する電子部品は、その定格電圧や集積度により発熱が顕著に増加する。   However, not only flip-chip connection, but when electronic components are embedded in a wiring board, the electronic components are sealed with an insulating resin for the wiring board, so heat dissipation in the electronic components may become a problem. is there. The insulating resin for the wiring board is not particularly considered for thermal conductivity, and the heat radiation is considerably worse than in the air. An electronic component having a semiconductor chip significantly increases its heat generation depending on its rated voltage and integration degree.

よって、電子部品内蔵の配線板が高温になり、部品実装部分を破壊したり、配線板の接続部分にダメージを与えたりして、信頼性を低下させたり、過度の場合は、発煙、発火といった状態が引き起こされる可能性もある。対策として、配線板に用いる絶縁樹脂として熱伝導性のよいものに代替することが考えられる。しかし、一般的でなく特殊な材料となることから、入手性やコストの点で不利であり、さらには加工性も異なることから製造工程としてもコスト増になる。   Therefore, the wiring board with built-in electronic components becomes hot, destroying the component mounting part, damaging the connection part of the wiring board, reducing reliability, and if excessive, smoke, ignition, etc. A condition can also be triggered. As a countermeasure, it can be considered that the insulating resin used for the wiring board is replaced with one having good thermal conductivity. However, since it is not a general material but a special material, it is disadvantageous in terms of availability and cost, and further, the workability is also different, resulting in an increase in cost as a manufacturing process.

特開2003−197849号公報JP 2003-197849 A

本発明は、半導体チップを有する電子部品が埋設、実装された部品内蔵配線板およびその製造方法において、コスト増を招かず、内蔵される部品の放熱性を向上することができる部品内蔵配線板およびその製造方法を提供することを目的とする。   The present invention relates to a component built-in wiring board in which an electronic component having a semiconductor chip is embedded and mounted, and a method of manufacturing the same, and a component built-in wiring board capable of improving the heat dissipation of a built-in component without incurring an increase in cost. It aims at providing the manufacturing method.

上記の課題を解決するため、本発明の一態様である部品内蔵配線板は、第1の絶縁層と、前記第1の絶縁層に対して積層状に位置する第2の絶縁層と、前記第2の絶縁層に埋設された、半導体チップを有する電子部品と、前記第2の絶縁層にさらに埋設された、前記電子部品の前記半導体チップの端面から離間して対向する表面を有する熱伝導体と、前記第1の絶縁層と前記第2の絶縁層とに挟まれて設けられた、前記電子部品用の実装用ランドと前記熱伝導体の固定用ランドとを含む第1の配線パターンと、前記電子部品と前記第1の配線パターンの前記実装用ランドとの間に挟設された、該電子部品と該実装用ランドとを電気的、機械的に接続する導電部材と、前記熱伝導体と前記第1の配線パターンの前記固定用ランドとの間に挟設された、該熱伝導体と該固定用ランドとを熱的、機械的に接続する導熱部材と、前記導熱部材が配される側の前記熱伝導体の面とは反対の該熱伝導体の面および前記導電部材が配される側の前記電子部品の面とは反対の該電子部品の面から離間して前記第2の絶縁層中に設けられた第2の配線パターンとを具備することを特徴とする。   In order to solve the above-described problem, a component built-in wiring board according to an aspect of the present invention includes a first insulating layer, a second insulating layer positioned in a stacked manner with respect to the first insulating layer, Thermal conduction having an electronic component having a semiconductor chip embedded in a second insulating layer and a surface further spaced from the end face of the semiconductor chip of the electronic component further embedded in the second insulating layer And a first wiring pattern including a mounting land for the electronic component and a fixing land for the heat conductor, which are provided between the first insulating layer and the second insulating layer. A conductive member that is electrically and mechanically connected between the electronic component and the mounting land of the first wiring pattern, and electrically connects the electronic component and the mounting land. Sandwiched between a conductor and the fixing land of the first wiring pattern Further, a heat conducting member for thermally and mechanically connecting the heat conductor and the fixing land, and a surface of the heat conductor opposite to the surface of the heat conductor on the side where the heat conducting member is disposed And a second wiring pattern provided in the second insulating layer apart from the surface of the electronic component opposite to the surface of the electronic component on the side where the conductive member is disposed. Features.

すなわち、この部品内蔵配線板では、埋設の電子部品が有する半導体チップの端面から離間して対向するように、熱伝導体が埋設されている。したがって、電子部品が発する熱は、電子部品を埋設する絶縁層、ならびに導電部材、第1の配線パターン、および導熱部材を介するように熱伝導体に移動し、その分電子部品に熱が蓄積される状態が回避される。すなわち、電子部品のより効率的な放熱が達せられる。配線板の絶縁材料として特殊なものを使用するには及ばずコスト増を招くこともない。   That is, in this component built-in wiring board, the heat conductor is embedded so as to be opposed to the end face of the semiconductor chip included in the embedded electronic component. Therefore, the heat generated by the electronic component moves to the heat conductor through the insulating layer in which the electronic component is embedded, the conductive member, the first wiring pattern, and the heat conductive member, and heat is accumulated in the electronic component accordingly. State is avoided. That is, more efficient heat dissipation of the electronic component can be achieved. There is no need to use a special insulating material for the wiring board, and the cost is not increased.

また、本発明の別の態様である部品内臓配線板の製造方法は、第1の絶縁板上に積層された第1の金属箔をパターニングし、電子部品を実装するための第1のランドおよび熱伝導体を固定するための第2のランドを含む第1の配線パターンを、該第1のランドと該第2のランドとが隣り合うように形成する工程と、前記第1のランド上および前記第2のランド上にクリームはんだを適用する工程と、前記第1のランド上に前記クリームはんだを介して、半導体チップを有する電子部品を載置する工程と、前記第2のランド上に前記クリームはんだを介して、板状の熱伝導体を載置する工程と、前記クリームはんだをリフローして、前記電子部品を前記第1の絶縁板上に実装しかつ前記熱伝導体を前記第1の絶縁板上に固定する工程と、前記第1の絶縁板とは別の絶縁板である第2の絶縁板上に積層された、前記第1の金属箔とは別の金属箔である第2の金属箔をパターニングし、第2の配線パターンを形成する工程と、前記第1、第2の絶縁板とは別の絶縁板である第3の絶縁板を、前記第2の配線パターンのある側の前記第2の絶縁板上に積層する工程と、前記第1ないし第3の絶縁板とは別の絶縁層である第4の絶縁板中に前記電子部品および前記熱伝導体を埋め込むように、前記第1の絶縁板に積層状に前記第4、第3、第2の絶縁板を該積層位置順で一体化する工程とを具備することを特徴とする。   In addition, in the method for manufacturing a component-embedded wiring board according to another aspect of the present invention, the first metal foil laminated on the first insulating plate is patterned, and the first land for mounting the electronic component and Forming a first wiring pattern including a second land for fixing a heat conductor so that the first land and the second land are adjacent to each other; and on the first land and Applying cream solder on the second land, placing an electronic component having a semiconductor chip on the first land via the cream solder, and on the second land Placing a plate-like heat conductor through cream solder; reflowing the cream solder to mount the electronic component on the first insulating plate; and placing the heat conductor on the first Fixing on the insulating plate; and Patterning a second metal foil, which is a metal foil different from the first metal foil, laminated on a second insulating plate, which is an insulating plate different from the first insulating plate; And a third insulating plate, which is a different insulating plate from the first and second insulating plates, is laminated on the second insulating plate on the side having the second wiring pattern. And stacking the first insulating plate so as to embed the electronic component and the heat conductor in a fourth insulating plate which is an insulating layer different from the first to third insulating plates. And a step of integrating the fourth, third, and second insulating plates in the order of the stacking positions.

この製造方法は、上記の部品内層配線板を製造するためのひとつの工程例である。この構成によれば、放熱対策のための熱伝導体は、電子部品などの部品と同じように扱うことができる。すなわち、熱伝導体の(第1の)配線パターン上への固定のため、電子部品と同じように、クリームはんだが適用されたランド上に熱伝導体を載置して、このクリームはんだをリフローする。したがって、生産性をほとんど犠牲にすることなく上記構造の部品内蔵配線板を得ることができる。   This manufacturing method is an example of a process for manufacturing the component inner layer wiring board. According to this configuration, the heat conductor for heat dissipation can be handled in the same way as components such as electronic components. That is, in order to fix the heat conductor on the (first) wiring pattern, the heat conductor is placed on the land to which the cream solder is applied, and the cream solder is reflowed in the same manner as the electronic component. To do. Therefore, the component built-in wiring board having the above structure can be obtained without sacrificing productivity.

本発明によれば、半導体チップを有する電子部品が埋設、実装された部品内蔵配線板およびその製造方法において、コスト増を招かず、内蔵される部品の放熱性を向上することができる部品内蔵配線板およびその製造方法を提供することができる。   According to the present invention, in a component built-in wiring board in which an electronic component having a semiconductor chip is embedded and mounted, and a method for manufacturing the same, a component built-in wiring that can improve the heat dissipation of a built-in component without increasing costs. A board and a manufacturing method thereof can be provided.

本発明の一実施形態に係る部品内蔵配線板の構造を模式的に示す縦断面図。The longitudinal cross-sectional view which shows typically the structure of the component built-in wiring board which concerns on one Embodiment of this invention. 図1中に示したA−Aa位置における部品内蔵配線板の構造を模式的に示す横断面図。The cross-sectional view which shows typically the structure of the component built-in wiring board in the A-Aa position shown in FIG. 図1に示した部品内蔵配線板の製造過程の一部を模式的断面で示す工程図。Process drawing which shows a part of manufacturing process of the component built-in wiring board shown in FIG. 図1に示した部品内蔵配線板の製造過程の別の一部を模式的断面で示す工程図。Process drawing which shows another part of manufacturing process of the component built-in wiring board shown in FIG. 図1に示した部品内蔵配線板の製造過程のさらに別の一部を模式的断面で示す工程図。FIG. 9 is a process diagram schematically showing still another part of the manufacturing process of the component built-in wiring board shown in FIG. 1. 図3に示した製造過程の変形例を模式的断面で示す工程図。Process drawing which shows the modification of the manufacturing process shown in FIG. 3 in a typical cross section.

本発明の実施態様として、前記熱伝導体が、その材質として銅である、とすることができる。熱伝導体として銅製のものを用いることで、良好な熱伝導性が得られ、かつ、配線パターンとの接続も通常の電子部品と同様に行うことができる。   As an embodiment of the present invention, the heat conductor may be copper as its material. By using a copper conductor as the thermal conductor, good thermal conductivity can be obtained, and connection with the wiring pattern can be performed in the same manner as a normal electronic component.

ここで、前記熱伝導体が、粗化された表面を有する、とすることができる。表面を粗化することで熱伝導体を埋設する絶縁層との密着性を増強することができる。これにより、配線板としての信頼性を向上することができる。   Here, the thermal conductor may have a roughened surface. By roughening the surface, the adhesion with the insulating layer in which the heat conductor is embedded can be enhanced. Thereby, the reliability as a wiring board can be improved.

また、実施態様として、前記導熱部材が配される側の前記熱伝導体の面とは反対の該熱伝導体の面と前記第2の配線パターンとの間に挟設された第2の導熱部材をさらに具備する、とすることができる。これによれば、熱伝導体から第2の導熱部材を介して一層の放熱が進み好ましい。   Further, as an embodiment, a second heat conducting member sandwiched between the surface of the heat conductor opposite to the surface of the heat conductor on the side where the heat conducting member is disposed and the second wiring pattern. It may be further provided with a member. According to this, it is preferable to further dissipate heat from the heat conductor through the second heat conducting member.

ここで、前記第2の絶縁層中に前記第2の配線パターンと重層的に設けられた第3の配線パターンと、前記第2の絶縁層の積層方向一部を貫通して前記第2の配線パターンの面と前記第3の配線パターンの面との間に挟設され、かつ導電性組成物からなり、かつ積層方向に一致する軸を有し該軸の方向に径が変化している形状である層間接続体と、をさらに具備し、前記層間接続体と前記第2の導熱部材とが同じ材料の導電性組成物である、とすることができる。   Here, a third wiring pattern provided in a layer on the second insulating layer in a layered manner with the second wiring pattern and a part of the second insulating layer in the stacking direction pass through the second wiring pattern. It is sandwiched between the surface of the wiring pattern and the surface of the third wiring pattern, is made of a conductive composition, has an axis that coincides with the lamination direction, and the diameter changes in the direction of the axis. And an interlayer connection body having a shape, wherein the interlayer connection body and the second heat conducting member are conductive compositions made of the same material.

この態様では、製造途上において、第2の配線パターンの面と第3の配線パターンの面との間に挟設されるべき層間接続体(=縦方向の配線部)の形成と同時に第2の導熱部材を形成することができる。したがって、生産効率のよい製造が可能である。   In this aspect, during the course of manufacture, the second connection pattern is formed simultaneously with the formation of the interlayer connector (= vertical wiring portion) to be sandwiched between the second wiring pattern surface and the third wiring pattern surface. A heat conducting member can be formed. Therefore, production with high production efficiency is possible.

また、実施態様として、前記導電部材と前記導熱部材とが同じ材料である、とすることができる。これによれば、電子部品の実装と熱伝導体の固定とを同時に行うことが可能であり、効率のよい製造が可能になる。   As an embodiment, the conductive member and the heat conducting member can be made of the same material. According to this, mounting of an electronic component and fixing of a heat conductor can be performed at the same time, and efficient manufacturing becomes possible.

また、実施態様として、前記熱伝導体が、前記電子部品の全周を取り囲む形状である、とすることができる。これによれば、電子部品からの熱伝導体への熱の移動が効率的になり、一層の放熱に好ましい。   As an embodiment, the heat conductor may have a shape surrounding the entire circumference of the electronic component. According to this, the heat transfer from the electronic component to the heat conductor becomes efficient, which is preferable for further heat dissipation.

また、製造方法の実施態様として、第2の配線パターンを形成する前記工程のあと、該第2の配線パターン上に導電性組成物を有するバンプを形設する工程をさらに具備し、第3の絶縁板を、前記第2の配線パターンのある側の前記第2の絶縁板上に積層する前記工程が、前記バンプが前記第3の絶縁板を貫通するようになされ、前記第1の絶縁板に積層状に前記第4、第3、第2の絶縁板を該積層位置順で一体化する前記工程が、前記バンプが前記熱伝導体の前記第1の絶縁板の側とは反対の側の該熱伝導体の面に押し付けられて塑性変形するようになされる、とすることができる。   In addition, as an embodiment of the manufacturing method, after the step of forming the second wiring pattern, the method further includes a step of forming a bump having a conductive composition on the second wiring pattern, The step of laminating an insulating plate on the second insulating plate on the side having the second wiring pattern is such that the bump penetrates the third insulating plate, and the first insulating plate The step of integrating the fourth, third, and second insulating plates in a stacked manner in the order of the stacking position is such that the bumps are on the side of the thermal conductor opposite to the first insulating plate side. The heat conductor is pressed against the surface of the heat conductor so as to be plastically deformed.

この態様は、熱伝導体からの放熱がこれに押し付けられたバンプを介して一層進むようにすることを意図して構成するものである。このバンプは、絶縁層の積層方向一部を貫通して設けられるべき層間接続体(=縦方向の配線部)と同時に形成することもできる。同時に形成することで製造効率を犠牲にすることなく高機能化を図ることができる。   This aspect is intended to allow heat dissipation from the heat conductor to proceed further through bumps pressed against the heat conductor. This bump can also be formed simultaneously with the interlayer connector (= vertical wiring portion) to be provided through a part of the insulating layer in the stacking direction. By forming them simultaneously, higher functionality can be achieved without sacrificing manufacturing efficiency.

以上を踏まえ、以下では本発明の実施形態を図面を参照しながら説明する。図1は、本発明の一実施形態に係る部品内蔵配線板の構成を模式的に示す縦断面図である。   Based on the above, embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a longitudinal sectional view schematically showing a configuration of a component built-in wiring board according to an embodiment of the present invention.

図1に示すように、この部品内蔵配線板は、絶縁層11(第1の絶縁層)、同12、同13、同14、同15(12、13、14、15で第2の絶縁層)、配線層21、同22(配線パターン)、同23、同24(第3の配線パターン)、同25(第2の配線パターン)、同26(=合計6層)、層間接続体31、同32、同34、同35、スルーホール導電体33、表面実装型受動素子部品41、電子部品(ウエハレベル・チップスケールパッケージによる半導体素子)42、熱伝導体(銅板)43、接続部材(はんだ)51、導電部材(はんだ)52、導熱部材(はんだ)53、はんだレジスト61、62、導熱部材34a(第2の導熱部材)を有する。   As shown in FIG. 1, this component built-in wiring board includes an insulating layer 11 (first insulating layer), 12, 12, 13, 14, and 15 (12, 13, 14, 15 second insulating layer). ), Wiring layer 21, 22 (wiring pattern), 23, 24 (third wiring pattern), 25 (second wiring pattern), 26 (= 6 layers in total), interlayer connector 31, 32, 34, 35, through-hole conductor 33, surface-mounted passive element component 41, electronic component (semiconductor element by wafer level / chip scale package) 42, thermal conductor (copper plate) 43, connecting member (solder) ) 51, a conductive member (solder) 52, a heat conducting member (solder) 53, solder resists 61 and 62, and a heat conducting member 34a (second heat conducting member).

なお、図2は、図1中に示したA−Aa位置における、この部品内蔵配線板の構造を模式的に示す横断面図である。以下の説明においては、図2も適宜参照され得る。図2において、図1中に示した構成要素と同一のものには同一符号を付してある。図1との関係で補足すると、図1では、説明の便宜上、板の厚さ方向が現実より相当に大きく描画されている。また、図1、図2における表面実装型受動素子部品41と電子部品42との平面的な大きさの関係は、現実には、通常、電子部品42の方が相当に(例えば長さで1桁程度)大きい。   2 is a cross-sectional view schematically showing the structure of the component built-in wiring board at the position A-Aa shown in FIG. In the following description, FIG. 2 can also be referred to as appropriate. In FIG. 2, the same components as those shown in FIG. To supplement the relationship with FIG. 1, in FIG. 1, the thickness direction of the plate is drawn considerably larger than the actual for convenience of explanation. 1 and FIG. 2, the planar size relationship between the surface-mounted passive element component 41 and the electronic component 42 is actually considerably larger in the electronic component 42 (for example, 1 in length). About a digit) Large.

この配線板は、内蔵の電気/電子部品として、表面実装型受動素子部品41、電子部品42を有することができる。これらの内蔵部品のうち特に電子部品42については、その放熱性改善を意図して、その周りを取り囲むように熱伝導体43をも内蔵している。   This wiring board can have a surface-mounted passive element component 41 and an electronic component 42 as built-in electric / electronic components. Among these built-in components, in particular, the electronic component 42 has a built-in heat conductor 43 so as to surround it for the purpose of improving heat dissipation.

表面実装型受動素子部品41は、いわゆるチップ部品であり、ここでは例えばチップコンデンサ(あるいはチップ抵抗、チップインダクタ)である。その平面的な大きさは例えば0.6mm×0.3mmである。両端に端子41aを有し、その下側が配線層22による実装用ランドに対向位置している。表面実装型受動素子部品41の端子41aと実装用ランドとは接続部材(はんだ)51により電気的・機械的に接続されている。   The surface-mounted passive element component 41 is a so-called chip component, and here is, for example, a chip capacitor (or chip resistor, chip inductor). The planar size is, for example, 0.6 mm × 0.3 mm. Terminals 41 a are provided at both ends, and the lower side thereof is opposed to the mounting land formed by the wiring layer 22. The terminals 41 a of the surface mount type passive element component 41 and the mounting lands are electrically and mechanically connected by a connecting member (solder) 51.

電子部品42は、例えば、ウエハレベル・チップスケールパッケージによる半導体素子であり、半導体チップと、該半導体チップ上に形成されたグリッド状配列の表面実装用端子42aとを少なくとも備えている。表面実装用端子42aは、半導体チップがもともと有する端子パッドから再配線層を介して電気的に導通しつつその位置を再配置して設けられた端子である。このような再配置により、端子としての配置密度が半導体チップ上の端子パッドのそれより粗くなっている。電子部品42は、表面実装技術により、配線層22による実装用ランドに導電部材(はんだ)52を介して実装され、電子部品42と実装用ランドとは機械的、電気的に接続されている。   The electronic component 42 is, for example, a semiconductor element based on a wafer level / chip scale package, and includes at least a semiconductor chip and a grid-arranged surface mounting terminal 42a formed on the semiconductor chip. The surface mounting terminal 42a is a terminal provided by rearranging its position while being electrically conducted through a rewiring layer from a terminal pad that the semiconductor chip originally has. By such rearrangement, the arrangement density as a terminal is coarser than that of the terminal pad on the semiconductor chip. The electronic component 42 is mounted on a mounting land formed by the wiring layer 22 via a conductive member (solder) 52 by surface mounting technology, and the electronic component 42 and the mounting land are mechanically and electrically connected.

熱伝導体43は、この形態では、銅の板材を加工して用いているが、熱伝導性のよい他の材料の板も使用できる。平面的には、図2に示すように、電子部品42(の半導体チップ)の端面から離間して隣り合うように配置されている。離間で生じる薄い間隙には、配線板を構成する絶縁樹脂材料が充填され、熱伝導体43と電子部品42との電気的な接触を避けるようにしている。電子部品42が発する熱は、半導体チップの端面からこの薄い絶縁樹脂材料の層を貫通して熱伝導体43の対向する面に移動する。これが電子部品42の発する熱のひとつの放熱経路になる。   In this embodiment, the heat conductor 43 is formed by processing a copper plate, but a plate of another material having good heat conductivity can also be used. In plan view, as shown in FIG. 2, the electronic component 42 (semiconductor chip) is disposed so as to be adjacent to and spaced from the end surface. A thin gap generated by the separation is filled with an insulating resin material constituting the wiring board so as to avoid electrical contact between the heat conductor 43 and the electronic component 42. The heat generated by the electronic component 42 moves from the end face of the semiconductor chip to the opposing surface of the heat conductor 43 through the thin insulating resin material layer. This is one heat dissipation path for the heat generated by the electronic component 42.

また、熱伝導体43は、導熱部材(はんだ)53によって配線層22に固定され、これらの間は、機械的、熱的に接続されている。すなわち、熱伝導体43は、表面実装型受動素子部品41、電子部品42などの電気/電子部品と同様の扱いの部品として、導熱部材(はんだ)53により配線層22上の専用ランドに実装がなされたものである。   Further, the heat conductor 43 is fixed to the wiring layer 22 by a heat conducting member (solder) 53, and these are mechanically and thermally connected. That is, the heat conductor 43 is mounted on a dedicated land on the wiring layer 22 by a heat conducting member (solder) 53 as a component that is handled in the same manner as an electrical / electronic component such as the surface-mounted passive element component 41 and the electronic component 42. It was made.

このように熱伝導体43を取り扱うことで、この配線板の組み立て、製造において特に新規な工程が必要となることがなく、生産効率が低下しない。熱伝導体43は、内蔵の実装部品として扱われるため、その検品をあらかじめ行っておくことで、熱伝導体43の不良を原因とする配線板としての歩留まり低下を防止できる。電子部品43が発する熱は、電子部品42の端子42aを介して、導電部材(はんだ)52、配線パターン22、導熱部材(はんだ)53、熱伝導体43の経路でも移動することができる。   By handling the heat conductor 43 in this way, a new process is not particularly required in the assembly and manufacture of the wiring board, and the production efficiency is not lowered. Since the heat conductor 43 is handled as a built-in mounting component, it is possible to prevent a decrease in yield as a wiring board caused by a failure of the heat conductor 43 by inspecting the heat conductor 43 in advance. The heat generated by the electronic component 43 can also travel through the path of the conductive member (solder) 52, the wiring pattern 22, the heat conductive member (solder) 53, and the heat conductor 43 via the terminal 42 a of the electronic component 42.

なお、熱伝導体43は、図2に示すように、電子部品43の全周を取り囲むような形状にすることが熱伝導体として一応は好ましい。ただし、全周を取り囲まずに、電子部品43の特に発熱の大きな部位に近い周上に隣り合うように熱伝導体43を設けることでも好ましい放熱が可能である。また、熱伝導体43は配線層22に電気的にも接続されているので、熱伝導体43を電子部品42に対するシールド部材として機能させることも可能である。   As shown in FIG. 2, it is preferable that the heat conductor 43 has a shape surrounding the entire circumference of the electronic component 43 as a heat conductor. However, it is also possible to radiate heat preferably by providing the heat conductor 43 so as to be adjacent to the circumference of the electronic component 43 that is close to a portion where heat generation is particularly large without surrounding the entire circumference. Further, since the heat conductor 43 is also electrically connected to the wiring layer 22, the heat conductor 43 can function as a shield member for the electronic component 42.

また、熱伝導体43の平面的な形状は、配線パターン23、同24の配置されている領域を避けるようにできるだけ大きく設定すると放熱の目的に好ましい。配線パターン23、同24の領域を避けるのは、図示で分かるように、この配線板では、内蔵の部品が中央の(コアの)絶縁層13の開口内に設けられ、この開口によりその領域には配線パターン23、24が設けられることがないためである。配線パターン23、同24の領域を避ければ、しかしながら、配線パターン23、24の配置されない領域に広げて大きく熱伝導体43を配置することができる。これにより、放熱性をより向上できる。   Further, it is preferable for the purpose of heat dissipation that the planar shape of the heat conductor 43 is set as large as possible so as to avoid the area where the wiring patterns 23 and 24 are disposed. As shown in the figure, in the wiring board, the built-in components are provided in the opening of the central (core) insulating layer 13, and this opening allows the area of the wiring patterns 23 and 24 to be avoided. This is because the wiring patterns 23 and 24 are not provided. If the area of the wiring patterns 23 and 24 is avoided, however, the heat conductor 43 can be largely arranged in a wide area where the wiring patterns 23 and 24 are not arranged. Thereby, heat dissipation can be improved more.

また、熱伝導体43は、導熱部材53が配される側とは反対の側で導熱部材34aが接触しており、この導熱部材34aの反対側は配線層25に接触している。したがって、電子部品42から熱伝導体43に移動した熱は、この導熱部材34aを介してさらに別の各配線層にも移動することができる。よって、一層の放熱性の改善が図られている。なお、導熱部材34aは、層間接続体34と同様の材料からなり、層間接続体34と同様の工程により形成されたものである(後述する)。したがって、導熱部材34aを設けても、この配線板の組み立て、製造において特に新規な工程が必要となることがなく、生産効率が低下しない。   Further, the heat conductor 43 is in contact with the heat conducting member 34 a on the side opposite to the side on which the heat conducting member 53 is disposed, and the opposite side of the heat conducting member 34 a is in contact with the wiring layer 25. Therefore, the heat transferred from the electronic component 42 to the heat conductor 43 can also be transferred to other wiring layers via the heat conducting member 34a. Therefore, further improvement in heat dissipation is achieved. The heat conducting member 34a is made of the same material as the interlayer connector 34 and is formed by the same process as the interlayer connector 34 (described later). Therefore, even if the heat conducting member 34a is provided, a new process is not particularly required in assembling and manufacturing the wiring board, and the production efficiency is not lowered.

なお、導電部材52、導熱部材53は、はんだに代えて例えば導電性組成物を用いることもできる。電子部品42は、ウエハレベル・チップスケールパッケージによる半導体素子に限らず、例えば(配線層22に対してフリップ接続された)ベアの半導体チップとすることもできる。   For example, a conductive composition can be used for the conductive member 52 and the heat conducting member 53 instead of solder. The electronic component 42 is not limited to a semiconductor element based on a wafer level / chip scale package, but may be a bare semiconductor chip (flip-connected to the wiring layer 22), for example.

部品内蔵配線板としてのほかの構造について述べると、配線層21、26は、配線板としての両主面上の配線層であり、その上に各種の部品(不図示)が実装され得る。実装ではんだ(不図示)が載るべき配線層21、26のランド部分を除いて両主面上には、はんだ接続時に溶融したはんだをランド部分に留めかつその後は保護層として機能するはんだレジスト61、62が形成されている(厚さはそれぞれ例えば20μm程度)。ランド部分の表層には、耐腐食性の高いNi/Auのめっき層(不図示)を形成するようにしてもよい。   Describing another structure as a component built-in wiring board, the wiring layers 21 and 26 are wiring layers on both main surfaces as a wiring board, and various components (not shown) can be mounted thereon. Solder resist 61 is provided on both main surfaces except for the land portions of the wiring layers 21 and 26 on which solder (not shown) is to be mounted in mounting, so that the solder melted at the time of solder connection is held on the land portions and thereafter functions as a protective layer. , 62 (thickness is about 20 μm, for example). An Ni / Au plating layer (not shown) with high corrosion resistance may be formed on the surface layer of the land portion.

また、配線層22、23、24、25は、それぞれ、内層の配線層であり、順に、配線層21と配線層22の間に絶縁層11が、配線層22と配線層23の間に絶縁層12が、配線層23と配線層24との間に絶縁層13が、配線層24と配線層25との間に絶縁層14が、配線層25と配線層26との間に絶縁層15が、それぞれ位置しこれらの配線層21〜26を隔てている。各配線層21〜26は、例えばそれぞれ厚さ18μmの金属(銅)箔からなっている。   The wiring layers 22, 23, 24, and 25 are inner wiring layers, and the insulating layer 11 is insulated between the wiring layer 21 and the wiring layer 22, and the wiring layer 22 and the wiring layer 23 are insulated in this order. The insulating layer 13 is provided between the wiring layer 23 and the wiring layer 24, the insulating layer 14 is provided between the wiring layer 24 and the wiring layer 25, and the insulating layer 15 is provided between the wiring layer 25 and the wiring layer 26. However, the wiring layers 21 to 26 are separated from each other. Each of the wiring layers 21 to 26 is made of, for example, a metal (copper) foil having a thickness of 18 μm.

各絶縁層11〜15は、絶縁層13を除き例えばそれぞれ厚さ100μm、絶縁層13のみ例えば厚さ300μmで、それぞれ例えばガラスエポキシ樹脂からなるリジッドな素材である。特に絶縁層13は、内蔵された表面実装型受動素子部品41および電子部品42、熱伝導体43に相当する位置部分が開口部となっており、これらを埋設するための空間を提供する。絶縁層12、14は、この開口部および絶縁層13のスルーホール導電体33内部の空間を埋めるように変形進入しており内部に空隙となる空間は存在しない。   Each of the insulating layers 11 to 15 is a rigid material made of, for example, a glass epoxy resin, each having a thickness of 100 μm, for example, only the insulating layer 13 has a thickness of, for example, 300 μm, excluding the insulating layer 13. In particular, the insulating layer 13 has openings at positions corresponding to the built-in surface mount passive element component 41, electronic component 42, and heat conductor 43, and provides a space for embedding them. The insulating layers 12 and 14 are deformed so as to fill the space inside the opening and the through-hole conductor 33 of the insulating layer 13, and there is no space serving as a gap inside.

配線層21と配線層22とは、それらのパターンの面の間に挟設されかつ絶縁層11を貫通する層間接続体31により導通し得る。同様に、配線層22と配線層23とは、それらのパターンの面の間に挟設されかつ絶縁層12を貫通する層間接続体32により導通し得る。配線層23と配線層24とは、絶縁層13を貫通して設けられたスルーホール導電体33により導通し得る。配線層24と配線層25とは、それらのパターンの面の間に挟設されかつ絶縁層14を貫通する層間絶縁体34により導通し得る。配線層25と配線層26とは、それらのパターンの面の間に挟設されかつ絶縁層15を貫通する層間接続体35により導通し得る。   The wiring layer 21 and the wiring layer 22 can be conducted by an interlayer connector 31 that is sandwiched between the surfaces of the patterns and penetrates the insulating layer 11. Similarly, the wiring layer 22 and the wiring layer 23 can be conducted by an interlayer connector 32 that is sandwiched between the surfaces of the patterns and penetrates the insulating layer 12. The wiring layer 23 and the wiring layer 24 can be conducted by a through-hole conductor 33 provided through the insulating layer 13. The wiring layer 24 and the wiring layer 25 can be conducted by an interlayer insulator 34 that is sandwiched between the surfaces of these patterns and penetrates the insulating layer 14. The wiring layer 25 and the wiring layer 26 can be conducted by an interlayer connector 35 that is sandwiched between the surfaces of these patterns and penetrates the insulating layer 15.

層間接続体31、32、34、35(および導熱部材34a)は、それぞれ、導電性組成物のスクリーン印刷により形成される導電性バンプを由来とするものであり、その製造工程に依拠して軸方向(図1の図示で上下の積層方向)に径が変化している。その直径は、太い側で例えば200μmである。   The interlayer connectors 31, 32, 34, and 35 (and the heat conducting member 34a) are derived from conductive bumps formed by screen printing of a conductive composition, and depend on the manufacturing process. The diameter changes in the direction (up and down lamination direction in FIG. 1). The diameter is, for example, 200 μm on the thick side.

次に、図1、図2に示した部品内蔵配線板の製造工程を図3ないし図5を参照して説明する。図3ないし図5は、それぞれ、図1に示した部品内蔵配線板の製造過程の一部を模式的断面で示す工程図である。これらの図において図1中に示した構成要素と同一または同一相当のものには同一符号を付してある。   Next, a manufacturing process of the component built-in wiring board shown in FIGS. 1 and 2 will be described with reference to FIGS. 3 to 5 are process diagrams schematically showing a part of the manufacturing process of the component built-in wiring board shown in FIG. In these figures, the same or equivalent components as those shown in FIG.

図3から説明する。図3は、図1中に示した各構成のうち絶縁層11を中心とした部分の製造工程を示している。まず、図3(a)に示すように、厚さ例えば18μmの金属箔(電解銅箔)22A上に例えばスクリーン印刷により、層間接続体31となるペースト状の導電性組成物をほぼ円錐形のバンプ状(底面径例えば200μm、高さ例えば160μm)に形成する。この導電性組成物は、ペースト状の樹脂中に銀、金、銅などの金属微細粒または炭素微細粒を分散させたものである。説明の都合で金属箔22Aの下面に印刷しているが上面でもよい(以下の各図も同じである)。層間接続体31の印刷後これを乾燥させて硬化させる。   It demonstrates from FIG. FIG. 3 shows a manufacturing process of a portion centering on the insulating layer 11 in each configuration shown in FIG. First, as shown in FIG. 3 (a), a paste-like conductive composition to be an interlayer connection 31 is formed on a metal foil (electrolytic copper foil) 22A having a thickness of, for example, 18 μm by, for example, screen printing. It is formed in a bump shape (bottom diameter, for example, 200 μm, height, for example, 160 μm). This conductive composition is obtained by dispersing fine metal particles such as silver, gold and copper or fine carbon particles in a paste-like resin. For convenience of explanation, printing is performed on the lower surface of the metal foil 22A, but it may be printed on the upper surface (the following drawings are also the same). After the interlayer connector 31 is printed, it is dried and cured.

次に、図3(b)に示すように、金属箔22A上に厚さ例えば公称100μmのFR−4のプリプレグ11Aを積層して層間接続体31を貫通させ、その頭部が露出するようにする。露出に際してあるいはその後その先端を塑性変形でつぶしてもよい(いずれにしても層間接続体31の形状は、積層方向に一致する軸を有しその軸方向に径が変化している。)。続いて、図3(c)に示すように、プリプレグ11A上に金属箔(電解銅箔)21Aを積層配置して加圧・加熱し全体を一体化する。このとき、金属箔21Aは層間接続体31と電気的導通状態となり、プリプレグ11Aは完全に硬化して絶縁層11になる。   Next, as shown in FIG. 3B, an FR-4 prepreg 11A having a thickness of, for example, 100 μm is laminated on the metal foil 22A to penetrate the interlayer connector 31 so that the head is exposed. To do. At the time of exposure or thereafter, the tip thereof may be crushed by plastic deformation (in any case, the shape of the interlayer connection body 31 has an axis that coincides with the stacking direction, and the diameter changes in the axial direction). Subsequently, as shown in FIG. 3C, a metal foil (electrolytic copper foil) 21A is laminated on the prepreg 11A, and the whole is integrated by pressing and heating. At this time, the metal foil 21A is in electrical continuity with the interlayer connector 31, and the prepreg 11A is completely cured to become the insulating layer 11.

次に、図3(d)に示すように、片側の金属箔22Aに例えば周知のフォトリソグラフィによるパターニングを施し、これを、部品の実装用ランドおよびその一部に隣り合う熱伝導体43用の専用ランドを含む配線パターン22に加工する。そして、加工により得られた実装用ランド上および熱伝導体43用の専用ランド上に、図3(e)に示すように、クリームはんだ51A、52A、53Aを適用する。これらは、例えばスクリーン印刷を用いて適用することができる。スクリーン印刷によれば容易に効率的に所定パターンに印刷できる。なお、スクリーン印刷に代えてディスペンサで適用することもできる。   Next, as shown in FIG. 3D, the metal foil 22A on one side is subjected to patterning by, for example, well-known photolithography, and this is applied to the component mounting land and the heat conductor 43 adjacent to a part thereof. The wiring pattern 22 including the dedicated land is processed. Then, as shown in FIG. 3E, cream solder 51A, 52A, 53A is applied on the mounting land and the dedicated land for the heat conductor 43 obtained by processing. These can be applied using, for example, screen printing. Screen printing can be easily and efficiently printed in a predetermined pattern. In addition, it can replace with screen printing and can also apply with a dispenser.

次に、表面実装型受動素子部品41、電子部品42、および熱伝導体43を、それぞれ、クリームはんだ51A、52A、53Aを介した各ランド上にそれぞれ例えばマウンタで載置する。続いて、例えばリフロー炉で加熱してクリームはんだ51A、52A、53Aをリフローする。これにより、図3(f)に示すように、表面実装型受動素子部品41、電子部品42、および熱伝導体43が、それぞれ、接続部材51、導電部材52、導熱部材53を介して配線層22の各ランド上に接続された状態の配線板素材1を得ることができる。この配線板素材1を用いる後の工程については図5で述べる。   Next, the surface-mounted passive element component 41, the electronic component 42, and the heat conductor 43 are respectively mounted on the lands through the cream solders 51A, 52A, and 53A, for example, with a mounter. Subsequently, the cream solder 51A, 52A, 53A is reflowed by heating in a reflow furnace, for example. As a result, as shown in FIG. 3 (f), the surface-mounted passive element component 41, the electronic component 42, and the heat conductor 43 are connected to the wiring layer via the connection member 51, the conductive member 52, and the heat conductive member 53, respectively. The wiring board material 1 in a state of being connected on each of the 22 lands can be obtained. The subsequent process using the wiring board material 1 will be described with reference to FIG.

次に、図4を参照して説明する。図4は、図1中に示した各構成のうち絶縁層13および同12を中心とした部分の製造工程を示している。まず、図4(a)に示すように、両面に例えば厚さ18μmの金属箔(電解銅箔)23A、24Aが積層された例えば厚さ300μmのFR−4の絶縁層13を用意し、その所定位置にスルーホール導電体を形成するための貫通孔83をあけ、かつ内蔵する表面実装型受動素子部品41、および電子部品42、熱伝導体43に相当する部分に部品用開口部81、82を形成する。部品用開口部82は、放熱対応部品用開口部である。   Next, a description will be given with reference to FIG. FIG. 4 shows a manufacturing process of a part centering on the insulating layer 13 and the same 12 in each configuration shown in FIG. First, as shown in FIG. 4A, for example, an FR-4 insulating layer 13 having a thickness of, for example, 300 μm in which metal foils (electrolytic copper foils) 23A and 24A having a thickness of 18 μm are laminated on both surfaces is prepared. A through hole 83 for forming a through hole conductor is formed at a predetermined position, and the surface mount passive element component 41, the electronic component 42, and the component openings 81 and 82 are formed in portions corresponding to the heat conductor 43. Form. The component opening 82 is a heat dissipation compatible component opening.

次に、無電解めっきおよび電解めっきを行い、図4(b)に示すように、貫通孔83の内壁にスルーホール導電体33を形成する。このとき開口部81、82の内壁にも導電体が形成される。さらに、図4(c)に示すように、金属箔23A、24Aを周知のフォトリソグラフィを利用して所定にパターニングして配線層23、24を形成する。配線層23、24のパターニング形成により、開口部81、82の内壁に形成された導電体も除去される。   Next, electroless plating and electrolytic plating are performed to form a through-hole conductor 33 on the inner wall of the through-hole 83 as shown in FIG. At this time, a conductor is also formed on the inner walls of the openings 81 and 82. Further, as shown in FIG. 4C, the metal foils 23A and 24A are patterned in a predetermined manner using well-known photolithography to form wiring layers 23 and 24. By patterning the wiring layers 23 and 24, the conductor formed on the inner walls of the openings 81 and 82 is also removed.

次に、図4(d)に示すように、配線層23上の所定の位置に層間接続体32となる導電性バンプ(底面径例えば200μm、高さ例えば160μm)をペースト状導電性組成物のスクリーン印刷により形成する。続いて、図4(e)に示すように、絶縁層12とすべきFR−4のプリプレグ12A(公称厚さ例えば100μm)を配線層23側にプレス機を用い積層する。プリプレグ12Aには、絶縁層13と同様の、内蔵する表面実装型受動素子部品41、および電子部品42、熱伝導体43に相当する部分の開口部をあらかじめ設けておく。   Next, as shown in FIG. 4 (d), conductive bumps (bottom diameter: 200 μm, height: 160 μm, for example) that will become the interlayer connector 32 are formed at predetermined positions on the wiring layer 23 of the paste-like conductive composition. It is formed by screen printing. Subsequently, as shown in FIG. 4E, an FR-4 prepreg 12A (nominal thickness, for example, 100 μm) to be the insulating layer 12 is laminated on the wiring layer 23 side using a press. The prepreg 12 </ b> A is previously provided with openings corresponding to the built-in surface mount passive element component 41, electronic component 42, and thermal conductor 43, similar to the insulating layer 13.

図4(e)の積層工程では、層間接続体32の頭部をプリプレグ12Aに貫通させる。なお、図4(e)における層間接続体32の頭部の破線は、この段階でその頭部を塑性変形させてつぶしておく場合と塑性変形させない場合の両者あり得ることを示す。以上により得られた配線板素材を配線板素材2とする。   In the stacking step of FIG. 4 (e), the head of the interlayer connector 32 is made to penetrate the prepreg 12A. In addition, the broken line of the head part of the interlayer connection body 32 in FIG. 4E indicates that there are both cases where the head part is plastically deformed and crushed at this stage, and when it is not plastically deformed. The wiring board material obtained as described above is referred to as a wiring board material 2.

以上の図4に示した工程は、以下のような手順とすることも可能である。図4(a)の段階では、貫通孔83のみ形成し内蔵部品用の開口部81、82を形成せずに続く図4(b)から図4(d)までの工程を行う。次に、図4(e)に相当する工程として、プリプレグ12A(開口のないもの)の積層を行う。そして、絶縁層13およびプリプレグ12Aに部品内蔵用の開口部を同時に形成する、という工程である。   The steps shown in FIG. 4 can be performed as follows. In the stage of FIG. 4A, only the through hole 83 is formed, and the subsequent steps from FIG. 4B to FIG. 4D are performed without forming the openings 81 and 82 for the built-in components. Next, as a process corresponding to FIG. 4E, prepreg 12A (without opening) is stacked. And it is the process of forming simultaneously the opening part for components incorporation in the insulating layer 13 and the prepreg 12A.

次に、図5を参照して説明する。図5は、上記で得られた配線板素材1、2などを積層する配置関係を示す図である。ここで、図示上側の配線板素材3は、下側の配線板素材1と同様な工程を適用し、かつそのあと層間接続体34およびプリプレグ14Aを、図示中間の配線板素材2における層間接続体32およびプリプレグ12Aと同様にして形成し得られたものである。配線板素材3において、層間接続体34と導熱部材34aとは同一の工程により形成できる。   Next, a description will be given with reference to FIG. FIG. 5 is a diagram showing an arrangement relationship in which the wiring board materials 1 and 2 obtained as described above are stacked. Here, the upper wiring board material 3 shown in the figure applies the same process as that of the lower wiring board material 1, and thereafter, the interlayer connector 34 and the prepreg 14A are connected to the interlayer connector in the intermediate wiring board material 2 shown in the figure. 32 and the prepreg 12A. In the wiring board material 3, the interlayer connector 34 and the heat conducting member 34a can be formed by the same process.

ただし、配線板素材3は、部品(表面実装型受動素子部品41、および電子部品42、熱伝導体43)およびこれを接続するための部位(各ランド)のない構成であり、さらにプリプレグ14Aには、表面実装型受動素子部品41用の開口部、および電子部品42用で熱伝導体43用の開口部を設けない。そのほかは、金属箔(電解銅箔)26A、絶縁層15、層間接続体35、配線層25、プリプレグ14A、層間接続体34(導熱部材34a)とも、それぞれ配線板素材1の金属箔21A、絶縁層11、層間接続体31、配線層22、配線板素材2のプリプレグ12A、層間接続体32と同じである。   However, the wiring board material 3 is configured without any components (surface-mounted passive element components 41, electronic components 42, and heat conductors 43) and parts (each land) for connecting them, and the prepreg 14A includes Does not provide an opening for the surface-mounted passive element component 41 and an opening for the heat conductor 43 for the electronic component 42. In addition, the metal foil (electrolytic copper foil) 26A, the insulating layer 15, the interlayer connection body 35, the wiring layer 25, the prepreg 14A, and the interlayer connection body 34 (heat conducting member 34a) are respectively the metal foil 21A of the wiring board material 1 and the insulation. It is the same as the layer 11, the interlayer connector 31, the wiring layer 22, the prepreg 12 </ b> A of the wiring board material 2, and the interlayer connector 32.

図5に示すような配置で各配線板素材1、2、3を積層配置してプレス機で加圧・加熱する。これにより、プリプレグ12A、14Aが完全に硬化し全体が積層・一体化する。このとき、加熱により得られるプリプレグ12A、14Aの流動性により、表面実装型受動素子部品41、および電子部品42、熱伝導体43の周りの空間、ならびにスルーホール導電体33内部の空間にはプリプレグ12A、14Aが変形進入し空隙は発生しない。また、配線層22、24は、層間接続体32、34にそれぞれ電気的に接続され、熱伝導体43の背面には導熱部材34aが塑性変形して接触する。   The respective wiring board materials 1, 2, and 3 are laminated and arranged in the arrangement as shown in FIG. Thereby, the prepregs 12A and 14A are completely cured, and the whole is laminated and integrated. At this time, due to the fluidity of the prepregs 12 </ b> A and 14 </ b> A obtained by heating, the space around the surface-mounted passive element component 41, the electronic component 42, and the heat conductor 43, and the space inside the through-hole conductor 33 are prepreg 12A and 14A are deformed and no gap is generated. In addition, the wiring layers 22 and 24 are electrically connected to the interlayer connectors 32 and 34, respectively, and the heat conducting member 34a is plastically deformed and contacts the back surface of the heat conductor 43.

図5に示す積層工程の後、上下両面の金属箔26A、21Aを周知のフォトリソグラフィを利用して所定にパターニングし、さらにはんだレジスト61、62の層を形成することにより、図1に示したような部品内蔵配線板を得ることができる。図5において、絶縁層11は第1の絶縁板、プリプレグ12Aおよび絶縁層13は第4の絶縁板、プリプレグ14Aは第3の絶縁板、絶縁層15は第2の絶縁板に相当する。   After the laminating step shown in FIG. 5, the upper and lower metal foils 26A and 21A are patterned in a predetermined manner using well-known photolithography, and further, layers of solder resists 61 and 62 are formed, as shown in FIG. Such a component built-in wiring board can be obtained. In FIG. 5, the insulating layer 11 corresponds to a first insulating plate, the prepreg 12A and the insulating layer 13 correspond to a fourth insulating plate, the prepreg 14A corresponds to a third insulating plate, and the insulating layer 15 corresponds to a second insulating plate.

変形例として、中間の絶縁層13に設けられたスルーホール導電体33については、層間接続体31や同32と同様なものとする構成も当然ながらあり得る。また、層間接続体31、32、34、35について、説明した導電性組成物印刷による導電性バンプを由来とするもの以外に、例えば、金属板エッチングにより形成された金属バンプ、導電性組成物充填による接続体、めっきにより形成された導体バンプなどを由来とするものなどのうちから適宜選択、採用することもできる。また、外側の配線層21、26は、最後の積層工程のあとにパターニングして得る以外に、各配線板素材1、3の段階で(例えば図3(d)の段階で)形成するようにしてもよい。   As a modification, the through-hole conductor 33 provided in the intermediate insulating layer 13 can naturally have a configuration similar to the interlayer connector 31 or 32. Further, for the interlayer connectors 31, 32, 34, and 35, in addition to those derived from the conductive bumps printed by the conductive composition described above, for example, metal bumps formed by metal plate etching, conductive composition filling It is also possible to appropriately select and employ a connection body obtained from the above, a conductor bump formed by plating, or the like. In addition, the outer wiring layers 21 and 26 are formed at the stage of each wiring board material 1 and 3 (for example, at the stage of FIG. 3D) other than patterning after the last lamination step. May be.

次に、図6は、図3に示した製造過程の変形例を模式的断面で示す工程図である。図6において、すでに説明した構成部分と同一または同一相当の部分には同一符号を付してある。図6は、より具体的には、図3(f)に示した配線板素材1についてさらに処理を進めてこれを配線板素材1に代わる新たな配線板素材1Aに改変する工程を示している。   Next, FIG. 6 is a process diagram schematically showing a modification of the manufacturing process shown in FIG. In FIG. 6, parts that are the same as or equivalent to those already described are given the same reference numerals. More specifically, FIG. 6 shows a process of further processing the wiring board material 1 shown in FIG. 3 (f) and changing it to a new wiring board material 1 A that replaces the wiring board material 1. .

まず、図6(a)は、図4(f)とまったく同じ図示である。次に、図6(b)に示すように、配線層22のこの時点で露出されている表面および熱伝導体43のこの時点で露出されている表面を粗化処理して、それぞれ粗化表面22a、粗化表面43aに改質する。これには、具体的に、例えば、黒化還元処理やマイクロエッチング処理を採用することができる。マイクロエッチング処理としては、例えば、CZ処理(メック社商品名)やボンドフィルム処理(アトテック社商品名)がある。   First, FIG. 6A is exactly the same as FIG. 4F. Next, as shown in FIG. 6B, the surface exposed at this point of the wiring layer 22 and the surface exposed at this point of the thermal conductor 43 are roughened to obtain roughened surfaces. 22a, modified to a roughened surface 43a. Specifically, for example, a blackening reduction process or a microetching process can be employed. Examples of the micro-etching process include CZ processing (MEC product name) and bond film processing (Atotech product name).

図6(b)に示す形態の配線板素材1Aは、図5に示した積層工程における配線板素材1の代わりに用いられる。この積層工程では、配線層22の表面が粗化表面22aになっており、かつ熱伝導体43の表面も粗化表面43aになっているので、プリプレグ12A、プリプレグ14Aと、配線層22、熱伝導体43との機械的な接続信頼性(密着性)の向上がもたらされる。これにより部品内蔵配線板として信頼性を増すことができる。   The wiring board material 1A having the form shown in FIG. 6B is used instead of the wiring board material 1 in the laminating process shown in FIG. In this lamination step, the surface of the wiring layer 22 is a roughened surface 22a, and the surface of the heat conductor 43 is also a roughened surface 43a. Therefore, the prepreg 12A, the prepreg 14A, the wiring layer 22, The mechanical connection reliability (adhesion) with the conductor 43 is improved. Thereby, reliability as a component built-in wiring board can be increased.

1…配線板素材、1A…配線板素材、2…配線板素材、3…配線板素材、11…絶縁層、11A…プリプレグ、12…絶縁層、12A…プリプレグ、13…絶縁層、14…絶縁層、14A…プリプレグ、15…絶縁層、21…配線層(配線パターン)、21A…金属箔(銅箔)、22…配線層(配線パターン)、22A…金属箔(銅箔)、22a…粗化表面、23…配線層(配線パターン)、23A…金属箔(銅箔)、24…配線層(配線パターン)、24A…金属箔(銅箔)、25…配線層(配線パターン)、26…配線層(配線パターン)、26A…金属箔(銅箔)、31,32,34,35…層間接続体(導電性組成物印刷による導電性バンプ)、33…スルーホール導電体、34a…導熱部材(第2の導熱部材;導電性組成物印刷による導電性バンプ)、41…表面実装型受動素子部品、41a…端子、42…電子部品(ウエハレベル・チップスケールパッケージによる半導体素子)、42a…表面実装用端子、43…熱伝導体(銅板)、43a…粗化表面、51…接続部材(はんだ)、51A…クリームはんだ、52…導電部材(はんだまたは導電性組成物)、52A…クリームはんだ、53…導熱部材(はんだまたは導電性組成物)、53A…クリームはんだ、61,62…はんだレジスト、81…部品用開口部、82…放熱対応部品用開口部、83…貫通孔。   DESCRIPTION OF SYMBOLS 1 ... Wiring board material, 1A ... Wiring board material, 2 ... Wiring board material, 3 ... Wiring board material, 11 ... Insulating layer, 11A ... Prepreg, 12 ... Insulating layer, 12A ... Prepreg, 13 ... Insulating layer, 14 ... Insulation 14A ... Prepreg, 15 ... Insulating layer, 21 ... Wiring layer (wiring pattern), 21A ... Metal foil (copper foil), 22 ... Wiring layer (wiring pattern), 22A ... Metal foil (copper foil), 22a ... Coarse 23 ... Wiring layer (wiring pattern), 23A ... Metal foil (copper foil), 24 ... Wiring layer (wiring pattern), 24A ... Metal foil (copper foil), 25 ... Wiring layer (wiring pattern), 26 ... Wiring layer (wiring pattern), 26A ... metal foil (copper foil), 31, 32, 34, 35 ... interlayer connection (conductive bumps printed by conductive composition), 33 ... through-hole conductor, 34a ... heat conducting member (Second heat conduction member; for conductive composition printing Conductive bumps), 41... Surface mounted passive element components, 41 a... Terminals, 42... Electronic components (semiconductor elements by wafer level chip scale package), 42 a... Surface mounting terminals, 43. 43a ... roughened surface 51 ... connecting member (solder) 51A ... cream solder 52 ... conductive member (solder or conductive composition) 52A ... cream solder 53 ... heat conducting member (solder or conductive composition) 53A ... Cream solder, 61, 62 ... Solder resist, 81 ... Openings for components, 82 ... Openings for heat radiation-compatible components, 83 ... Through holes.

Claims (9)

第1の絶縁層と、
前記第1の絶縁層に対して積層状に位置する第2の絶縁層と、
前記第2の絶縁層に埋設された、半導体チップを有する電子部品と、
前記第2の絶縁層にさらに埋設された、前記電子部品の前記半導体チップの端面から離間して対向する表面を有する熱伝導体と、
前記第1の絶縁層と前記第2の絶縁層とに挟まれて設けられた、前記電子部品用の実装用ランドと前記熱伝導体の固定用ランドとを含む第1の配線パターンと、
前記電子部品と前記第1の配線パターンの前記実装用ランドとの間に挟設された、該電子部品と該実装用ランドとを電気的、機械的に接続する導電部材と、
前記熱伝導体と前記第1の配線パターンの前記固定用ランドとの間に挟設された、該熱伝導体と該固定用ランドとを熱的、機械的に接続する導熱部材と、
前記導熱部材が配される側の前記熱伝導体の面とは反対の該熱伝導体の面および前記導電部材が配される側の前記電子部品の面とは反対の該電子部品の面から離間して前記第2の絶縁層中に設けられた第2の配線パターンと
を具備することを特徴とする部品内蔵配線板。
A first insulating layer;
A second insulating layer positioned in a stack with respect to the first insulating layer;
An electronic component having a semiconductor chip embedded in the second insulating layer;
A thermal conductor further embedded in the second insulating layer and having a surface facing away from an end surface of the semiconductor chip of the electronic component;
A first wiring pattern including a mounting land for the electronic component and a fixing land for the heat conductor provided between the first insulating layer and the second insulating layer;
A conductive member electrically and mechanically connected between the electronic component and the mounting land, sandwiched between the electronic component and the mounting land of the first wiring pattern;
A heat-conducting member interposed between the heat conductor and the fixing land of the first wiring pattern to thermally and mechanically connect the heat conductor and the fixing land;
From the surface of the heat conductor opposite to the surface of the heat conductor on the side where the heat conducting member is disposed and the surface of the electronic component opposite to the surface of the electronic component on the side where the conductive member is disposed And a second wiring pattern provided in the second insulating layer so as to be spaced apart from each other.
前記熱伝導体が、その材質として銅であることを特徴とする請求項1記載の部品内蔵配線板。   The component built-in wiring board according to claim 1, wherein the heat conductor is copper as a material thereof. 前記熱伝導体が、粗化された表面を有することを特徴とする請求項2記載の部品内蔵配線板。   The component built-in wiring board according to claim 2, wherein the thermal conductor has a roughened surface. 前記導熱部材が配される側の前記熱伝導体の面とは反対の該熱伝導体の面と前記第2の配線パターンとの間に挟設された第2の導熱部材をさらに具備することを特徴とする請求項1記載の部品内蔵配線板。   A second heat conducting member sandwiched between the surface of the heat conductor opposite to the surface of the heat conductor on the side where the heat conducting member is disposed and the second wiring pattern; The component built-in wiring board according to claim 1. 前記第2の絶縁層中に前記第2の配線パターンと重層的に設けられた第3の配線パターンと、
前記第2の絶縁層の積層方向一部を貫通して前記第2の配線パターンの面と前記第3の配線パターンの面との間に挟設され、かつ導電性組成物からなり、かつ積層方向に一致する軸を有し該軸の方向に径が変化している形状である層間接続体と、をさらに具備し、
前記層間接続体と前記第2の導熱部材とが同じ材料の導電性組成物であること
を特徴とする請求項4記載の部品内蔵配線板。
A third wiring pattern provided in a layered manner with the second wiring pattern in the second insulating layer;
The second insulating layer passes through a part of the stacking direction and is sandwiched between the surface of the second wiring pattern and the surface of the third wiring pattern, and is made of a conductive composition and stacked. An interlayer connection body having an axis that coincides with the direction and having a shape in which the diameter changes in the direction of the axis, and
5. The component built-in wiring board according to claim 4, wherein the interlayer connector and the second heat conducting member are conductive compositions made of the same material.
前記導電部材と前記導熱部材とが同じ材料であることを特徴とする請求項1記載の部品内蔵配線板。   The component built-in wiring board according to claim 1, wherein the conductive member and the heat conducting member are made of the same material. 前記熱伝導体が、前記電子部品の全周を取り囲む形状であることを特徴とする請求項1記載の部品内蔵配線板。   The component built-in wiring board according to claim 1, wherein the heat conductor has a shape surrounding the entire circumference of the electronic component. 第1の絶縁板上に積層された第1の金属箔をパターニングし、電子部品を実装するための第1のランドおよび熱伝導体を固定するための第2のランドを含む第1の配線パターンを、該第1のランドと該第2のランドとが隣り合うように形成する工程と、
前記第1のランド上および前記第2のランド上にクリームはんだを適用する工程と、
前記第1のランド上に前記クリームはんだを介して、半導体チップを有する電子部品を載置する工程と、
前記第2のランド上に前記クリームはんだを介して、板状の熱伝導体を載置する工程と、
前記クリームはんだをリフローして、前記電子部品を前記第1の絶縁板上に実装しかつ前記熱伝導体を前記第1の絶縁板上に固定する工程と、
前記第1の絶縁板とは別の絶縁板である第2の絶縁板上に積層された、前記第1の金属箔とは別の金属箔である第2の金属箔をパターニングし、第2の配線パターンを形成する工程と、
前記第1、第2の絶縁板とは別の絶縁板である第3の絶縁板を、前記第2の配線パターンのある側の前記第2の絶縁板上に積層する工程と、
前記第1ないし第3の絶縁板とは別の絶縁層である第4の絶縁板中に前記電子部品および前記熱伝導体を埋め込むように、前記第1の絶縁板に積層状に前記第4、第3、第2の絶縁板を該積層位置順で一体化する工程と
を具備することを特徴とする部品内蔵配線板の製造方法。
A first wiring pattern including a first land for patterning a first metal foil laminated on a first insulating plate and mounting an electronic component and a second land for fixing a heat conductor Forming the first land and the second land adjacent to each other;
Applying cream solder on the first land and on the second land;
Placing an electronic component having a semiconductor chip on the first land via the cream solder;
Placing a plate-like heat conductor on the second land via the cream solder;
Reflowing the cream solder, mounting the electronic component on the first insulating plate and fixing the heat conductor on the first insulating plate;
Patterning a second metal foil laminated on a second insulating plate, which is a different insulating plate from the first insulating plate, and being a metal foil different from the first metal foil; Forming a wiring pattern of
Laminating a third insulating plate, which is an insulating plate different from the first and second insulating plates, on the second insulating plate on the side having the second wiring pattern;
The fourth insulating plate is laminated on the first insulating plate so that the electronic component and the heat conductor are embedded in a fourth insulating plate which is an insulating layer different from the first to third insulating plates. And a step of integrating the third and second insulating plates in the order of the stacking positions.
第2の配線パターンを形成する前記工程のあと、該第2の配線パターン上に導電性組成物を有するバンプを形設する工程をさらに具備し、
第3の絶縁板を、前記第2の配線パターンのある側の前記第2の絶縁板上に積層する前記工程が、前記バンプが前記第3の絶縁板を貫通するようになされ、
前記第1の絶縁板に積層状に前記第4、第3、第2の絶縁板を該積層位置順で一体化する前記工程が、前記バンプが前記熱伝導体の前記第1の絶縁板の側とは反対の側の該熱伝導体の面に押し付けられて塑性変形するようになされること
を特徴とする請求項8記載の部品内蔵配線板の製造方法。
After the step of forming the second wiring pattern, further comprising the step of forming a bump having a conductive composition on the second wiring pattern;
The step of laminating a third insulating plate on the second insulating plate on the side having the second wiring pattern is such that the bumps penetrate the third insulating plate;
The step of integrating the fourth, third, and second insulating plates in the stacking order on the first insulating plate in the order of the stacking position is such that the bumps are formed on the first insulating plate of the thermal conductor. 9. The method of manufacturing a component built-in wiring board according to claim 8, wherein the part is plastically deformed by being pressed against a surface of the heat conductor opposite to the side.
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