JP2013214541A - Method for manufacturing power module substrate and power module substrate - Google Patents

Method for manufacturing power module substrate and power module substrate Download PDF

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JP2013214541A
JP2013214541A JP2012082570A JP2012082570A JP2013214541A JP 2013214541 A JP2013214541 A JP 2013214541A JP 2012082570 A JP2012082570 A JP 2012082570A JP 2012082570 A JP2012082570 A JP 2012082570A JP 2013214541 A JP2013214541 A JP 2013214541A
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circuit layer
etching
power module
brazing
layer
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JP6152626B2 (en
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Hiroshi Tomoto
寛 登本
Shinsuke Aoki
慎介 青木
Toshiyuki Nagase
敏之 長瀬
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Mitsubishi Materials Corp
三菱マテリアル株式会社
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Abstract

A method of manufacturing a power module substrate and a power module substrate capable of preventing peeling of a nickel plating film to which a bonding wire is connected.
A brazing process for brazing a circuit layer to a ceramic substrate, a first etching process for etching the surface of the circuit layer after brazing, and a circuit layer after the first etching process. 6. A blasting process for blasting the surface, a second etching process for etching the surface of the circuit layer 6 after the blasting again, and a nickel plating film 9 formed on the circuit layer 6 after the second etching process. And in the second etching process, the surface of the circuit layer 6 is removed by 0.8 μm or more.
[Selection] Figure 1

Description

  The present invention relates to a method for manufacturing a power module substrate used in a semiconductor device that controls a large current and a large voltage, and a power module substrate.

  As a conventional power module, a metal layer such as aluminum serving as a circuit layer is laminated on one surface of a ceramic substrate, and an electronic component such as a semiconductor chip is soldered on the circuit layer, and the other side of the ceramic substrate. There is known a structure in which a metal layer serving as a heat dissipation layer is formed on this surface, and a heat sink is joined to the metal layer.

In power module substrates used in this type of power module, it is known that the surface of the circuit layer is nickel-plated in order to improve solder wettability and enhance the bondability with electronic components. Yes.
For example, in the power module substrate described in Patent Literature 1 to Patent Literature 3, electroless nickel plating or electrolytic nickel plating is applied to the surface of the metal layer. In addition, in the power module substrate described in Patent Document 4, electroless nickel plating having high adhesion to the aluminum metal layer is applied on the aluminum metal layer serving as the circuit layer, and then electrolytic nickel plating is further stacked thereon. Forming a layer.

JP-A-5-243421 Japanese Patent Laid-Open No. 2004-207445 JP 2004-250762 A JP 2010-50415 A

By the way, in the power module substrate in which the circuit layer is nickel-plated in this manner, the electronic component mounted on the upper surface is soldered, and then the wire bonding for electronically connecting the circuit layer and the electronic component is performed. It is carried out.
However, there has been a problem that the nickel plating film is peeled off from the base material at the bonding portion of the bonding wire to the circuit layer, and a countermeasure has been desired.

  This invention is made in view of such a situation, Comprising: The manufacturing method of the board | substrate for power modules which can prevent peeling of the nickel plating film to which a bonding wire is connected, and the board | substrate for power modules are provided. For the purpose.

  When a circuit layer or a heat dissipation layer metal layer is joined to a ceramic substrate in a laminated state, a laminate in which the metal layer is laminated on the ceramic substrate via a brazing material and a heat-resistant sheet are alternately stacked in the thickness direction. The ceramic substrate and the metal layer are brazed by heating while pressurizing. This heat-resistant sheet uses a carbon plate, but as a result of earnest research, the present inventor found that a brazing material that exudes from between the ceramic plate and the metal layer when brazing the metal layer to the ceramic plate. By contacting a part of the carbon plate superimposed on the surface of the metal layer, it was found that a part of the carbon dropped off and adhered to the surface of the metal layer together with the brazing material. If the carbon and brazing material adhering to the surface of the metal layer can be removed, the nickel plating film can be prevented from peeling off. Based on such knowledge, the present invention is set as the following solution.

  The present invention is a method for manufacturing a power module substrate in which a brazing material is interposed on a surface of a ceramic substrate to braze and join a circuit layer, and a nickel plating film is formed on the circuit layer after brazing joining, A brazing step of brazing and joining the circuit layer to the ceramic substrate, a first etching treatment step of etching the surface of the circuit layer after brazing joining, and a blasting on the surface of the metal layer after the first etching treatment step A blasting process for performing a process, a second etching process for re-etching the surface of the circuit layer after the blasting process, and a plating forming process for forming a nickel plating film on the circuit layer after the second etching process And the circuit layer surface is removed by 0.8 μm or more after the second etching treatment step.

When a nickel plating film is formed on the surface of the circuit layer, the surface of the circuit layer is subjected to a blasting process in order to improve the adhesion between the circuit layer and the nickel plating film. However, if the blasting process is performed with carbon and brazing material adhering to the surface of the circuit layer, the carbon and brazing material are pushed into the surface of the circuit layer by being struck, and the etching process is performed on the circuit layer surface by the subsequent etching process. Carbon may not be completely removed and may cause peeling of the nickel plating film.
Therefore, by providing a first etching process step for performing an etching process before the blasting process and removing the carbon from the surface of the circuit layer, the blasting process is performed to avoid the phenomenon that the carbon enters the surface of the circuit layer. Can do. The second etching process (second etching process) is aimed at removing the projection material used for the blasting process, and improves the adhesion between the circuit layer and the nickel plating film, leaving irregularities on the surface of the circuit layer. Can be made.
Further, according to this manufacturing method, a power module substrate can be manufactured in which the carbon amount on the surface of the circuit layer is 2.0 at% or less and the silicon amount is 0.5 at% or less. Thereby, the adhesiveness of a circuit layer and a nickel plating film can be improved, and peeling of the nickel plating film of the board | substrate for power modules can be prevented.

The power module substrate of the present invention has a circuit layer bonded to the surface of a ceramic substrate with a brazing material interposed therebetween. The carbon amount on the surface of the circuit layer is 2.0 at% or less, and the silicon amount is 0.5 at. % Or less.
According to this power module substrate, the adhesion between the circuit layer and the nickel plating film can be improved, and peeling of the nickel plating film on the power module substrate can be prevented.

  According to the present invention, by reducing the amount of carbon and the amount of silicon on the surface of the circuit layer, the carbon adhering to the surface of the circuit layer can be surely removed, so that the adhesion between the circuit layer and the nickel plating film is achieved. The nickel plating film can be prevented from peeling off.

It is a longitudinal cross-sectional view which shows the whole structure of the power module to which the manufacturing method of embodiment of this invention is applied. It is a schematic side view which shows the pressurization apparatus used for manufacture of the board | substrate for power modules of this invention.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 shows a power module 1 to which a power module substrate 3 manufactured according to the present invention is applied. The power module 1 in FIG. 1 is bonded to a power module substrate 3 having a ceramic substrate 2, an electronic component 4 such as a semiconductor chip mounted on the surface of the power module substrate 3, and the back surface of the power module substrate 3. The heat sink 5 is made up of.
In the power module substrate 3, the circuit layer 6 is bonded to one surface of the ceramic substrate 2, and the electronic component 4 is bonded to the surface thereof. Moreover, the heat radiation layer 7 is joined to the other surface, and the heat sink 5 is attached to the surface.

The ceramic substrate 2 is made of, for example, nitride ceramics such as AlN (aluminum nitride), Si 3 N 4 (silicon nitride), oxide ceramics such as Al 2 O 3 (alumina), SiC (silicon carbide), or the like. It is made of carbide ceramics.
Both the circuit layer 6 and the heat dissipation layer 7 are made of aluminum having a purity of 99.90% by mass or more. According to JIS standards, 1N90 (purity 99.90% by mass or more: so-called 3N aluminum) or 1N99 (purity 99.99% by mass). % Or more: so-called 4N aluminum) can be used. The circuit layer 6 and the heat dissipation layer 7 may be made of aluminum alloy, copper, or copper alloy in addition to aluminum.
Further, a nickel plating film 9 is formed on the surface of the circuit layer 6 by a nickel plating process in order to improve solder wettability.

The circuit layer 6 and the heat dissipation layer 7 and the ceramic substrate 2 are joined by brazing. As the brazing material, an alloy such as Al-Si, Al-Ge, Al-Cu, Al-Mg, or Al-Mn is used.
Note that a solder material such as Sn—Cu, Sn—Ag—Cu, Zn—Al, or Pb—Sn is used for joining the circuit layer 6 and the electronic component 4. Reference numeral 8 in the figure indicates the solder joint layer. The electronic component 4 and the terminal portion of the circuit layer 6 are connected by a wire made of aluminum or the like, ribbon bonding, or the like, but in the power module 1 of FIG.

Further, the heat sink 5 has an appropriate shape, such as a flat plate, one in which a large number of pin-shaped fins are integrally formed by hot forging or the like, and one in which strip-like fins are formed in parallel by extrusion. Can be adopted. Further, a heat radiating plate or a stress buffer layer made of a metal plate such as aluminum, aluminum alloy, copper, or copper alloy can be provided between the heat sink 5 and the heat radiating layer 7.
As a joining method between the heat dissipation layer 7 and the heat sink 5, a brazing method using a brazing material of an alloy such as Al-Si, Al-Ge, Al-Cu, Al-Mg, or Al-Mn Nocolok brazing method using flux for Al-Si brazing material, Ni plating is applied to heat dissipation layer 7 and heat sink 5, and soldering material such as Sn-Ag-Cu, Zn-Al or Pb-Sn is used. A soldering method is used, or it is mechanically fixed with screws in a state of being in close contact with silicon grease.

When the power module substrate 3 having such a configuration is manufactured, first, a laminate 30 in which the circuit layer 6 and the heat dissipation layer 7 are laminated on each surface of the ceramic substrate 2 via a brazing material is shown in FIG. Thus, it is set as the state piled up through the heat-resistant sheet | seat 40. FIG.
As the heat-resistant sheet 40, a heat-resistant carbon plate or graphite plate, or a laminate of these can be used. In the example shown in FIG. 2, a heat resistant sheet 40 having a structure in which a graphite plate is sandwiched between two carbon plates is used. And what laminated these laminated bodies 30 and the heat-resistant sheet | seat 40 is installed in the pressurizer 100. FIG.

The pressure device 100 includes a base plate 111, guide posts 112 vertically attached to the four corners of the upper surface of the base plate 111, a fixed plate 113 fixed to the upper end portions of the guide posts 112, and the base plate 111. A pressing plate 114 supported by a guide post 112 so as to freely move up and down between the fixing plate 113 and a spring provided between the fixing plate 113 and the pressing plate 114 to urge the pressing plate 114 downward. And urging means 115.
And what laminated | stacked the laminated body 30 and the heat resistant sheet 40 is arrange | positioned between the fixed plate 113 and the press board 114. FIG. In addition, in order to make pressurization uniform on both surfaces of the laminated body 30, the heat resistant sheet 40 is arrange | positioned.

With the pressurizing device 100, the laminated body 30 is pressurized and installed in a heating furnace (not shown) together with the pressurizing device 100, and heated to a brazing temperature of, for example, 630 ° C. in a vacuum atmosphere. By melting, the circuit layer 6 and the heat dissipation layer 7 and the ceramic substrate 2 are brazed and joined (brazing step).
And after brazing joining, the surface of the circuit layer 6 is etched by immersing it in a 2 mass% NaOH solution at 50 ° C., for example (first etching process step). In the first etching treatment step, carbon and brazing material are removed from the surface of the circuit layer 6 by etching deposits such as carbon and brazing material together with the aluminum material forming the circuit layer 6.
Next, blasting is performed by projecting a projection material (SiC fine particles) onto the surface of the circuit layer 6, and the surface of the circuit layer 6 is finished to have an arithmetic average roughness (Ra) of 0.1 μm to 0.7 μm. (Blasting process).

Then, the surface of the circuit layer 6 after the blast treatment is etched again by immersing it in a 50% HNO 3 solution, for example, at 20 ° C. (RT) (second etching treatment step). This second etching process is intended to remove the projection material used in the blasting process, and neutralizes and cleans the surface of the circuit layer 6 and forcibly forms an oxide film on the surface. is there. Then, in the second etching process, the surface of the circuit layer 6 is etched away by at least 0.8 μm or more so that the carbon amount on the surface of the circuit layer 6 is 2.0 at% or less and the silicon amount is 0.5 at% or less. Can be formed.
Finally, a nickel plating film 9 is formed on the surface of the circuit layer 6 by electroless plating (plating forming step) to obtain a power module substrate 3.
The electronic component 4 is soldered to the upper surface of the circuit layer 6 and the heat dissipation layer 7 is soldered to the heat sink 5 on the power module substrate 3 thus manufactured. And the electronic component 4 and the circuit layer 6 are connected by the bondy wire 15, and the power module 1 is completed.

  In the series of manufacturing processes described above, the first etching process step for performing the etching process is provided before the blasting process, and the carbon and the brazing material are removed from the surface of the circuit layer 6 to perform the blasting process. The phenomenon of entering the surface of the circuit layer 6 can be avoided. In this case, the circuit layer 6 and the nickel plating film 9 are treated by processing so that the carbon amount on the surface of the circuit layer 6 after the second etching process is 2.0 at% or less and the silicon amount is 0.5 at% or less. The adhesion of the nickel plating film 9 can be prevented.

  Next, in order to confirm the effect of the present invention, after the circuit layer and the heat dissipation layer are brazed to both surfaces of the ceramic substrate, the first etching process, the blasting process, and the second etching process are performed on the circuit layer. The test pieces of Examples 1 to 4 and comparative examples in which a nickel plating film having a thickness of 4 μm to 7 μm was formed by electroless plating were manufactured, and their “plating adhesion” was evaluated. In the conventional example, the circuit layer and the heat dissipation layer are brazed and bonded to both surfaces of the ceramic substrate, and then the first etching treatment step and the blast treatment step are performed on the circuit layer. A nickel plating film was formed and produced.

JIS standard 1N99 (purity 99.99 mass% or more: so-called 4N aluminum) was used for the circuit layer and the heat dissipation layer, and AlN was used for the ceramic substrate. Moreover, the 1st etching process process was performed by immersing in 50 degreeC and 2 mass% NaOH solution, and changing immersion time for every test piece.
The blasting process was performed under the same conditions for all test pieces after the first etching process, and was performed by projecting a SiC (silicon carbide) projecting material onto the surface of the circuit layer. The blasting conditions are shown below.
(Blast processing conditions)
Projection material: SiC, average particle size of 30 ± 2 μm (Densic C # 400J manufactured by Showa Denko KK)
Projection speed: 0.15 MPa to 0.20 MPa as processing pressure
Surface roughness of the circuit layer after blasting: ≦ 0.7 μm

Then, as shown in Table 1, the second etching treatment step was performed under the same conditions except that the etching depth was changed, and was performed by immersing in a 20 mass% (RT), 50 mass% HNO 3 solution for 20 seconds.
“Carbon amount” and “silicon amount” shown in Table 1 are obtained by dissolving the nickel plating film 9 on the surface of the circuit layer 6 of each test piece with nitric acid (HNO 3 ), so that the surface of the circuit layer 6 is X-ray photoelectron spectrometer. It is measured by (XPS).

For X-ray photoelectron spectroscopy, an X-ray photoelectron spectrometer manufactured by ULVAC-PHI was used, and the measurement conditions were as shown below.
(Measurement condition)
X-ray source: Standard AlKα 350W
Path energy: 187.85 eV (Survey), 23.5 eV (Depth)
Measurement interval: 0.8 eV / step, 0.05 eV (Depth)
Photoelectron extraction angle with respect to measurement surface: 45 deg
Spectroscopic area: about 800μmφ

Each test piece manufactured in this manner was subjected to an accelerated test in which it was exposed to a 98% hydrogen gas atmosphere at 360 ° C. for 1 minute, and then “plating adhesion” was evaluated.
“Plating adhesion” is a substrate adhesion test (a 10 mm square cut with a side of 1 mm is applied to the film with a cutter knife, and an 18 mm wide adhesive tape is applied and peeled off. (Expressed in numbers). “○” means that the number of remaining squares is 100 without peeling the squares with the adhesive tape, and “×” means that the number of remaining squares is 99 or less and even one of the squares is peeled off. As evaluated.

As can be seen from Table 1, in Examples 1 to 4 in which the carbon amount was 2.0 at% or less and the silicon amount was 0.5 at% or less, the plating adhesion was improved.
Further, in the comparative example in which the second etching amount was 0.5 μm, the carbon amount exceeded 2.0 at% and the silicon amount exceeded 0.5 at%, and the plating adhesion deteriorated. Furthermore, even in the conventional example in which the second etching process was not performed, the carbon amount exceeded 2.0 at% and the silicon amount exceeded 0.5 at%, and the plating adhesion deteriorated.
From this, it was found that when the carbon amount on the circuit layer surface was 2.0 at% or less and the silicon amount was 0.5 at% or less, peeling of the nickel plating film could be prevented.

  In addition, this invention is not limited to the said embodiment, A various change can be added in the range which does not deviate from the meaning of this invention.

DESCRIPTION OF SYMBOLS 1 Power module 2 Ceramic substrate 3 Power module substrate 4 Electronic component 5 Heat sink 6,7 Metal layer 8 Solder joint layer 9 Nickel plating film 15 Bonding wire 30 Laminate 40 Heat-resistant sheet 100 Pressurizing device 111 Base plate 112 Guide post 113 Fixing Plate 114 Press plate 115 Biasing means

Claims (2)

  1.   A method for manufacturing a power module substrate, wherein a brazing material is interposed on a surface of a ceramic substrate to braze and join a circuit layer, and a nickel plating film is formed on the circuit layer after brazing and joining. A brazing step for brazing and joining the circuit layers; a first etching treatment step for etching the surface of the circuit layer after brazing joining; and a blasting treatment for blasting the surface of the circuit layer after the first etching treatment step A process step, a second etching process step for re-etching the surface of the circuit layer after the blast treatment, and a plating formation step for forming a nickel plating film on the circuit layer after the second etching step treatment, In the second etching process step, the surface of the circuit layer is removed by 0.8 μm or more. The method of production.
  2.   A circuit layer is bonded to the surface of a ceramic substrate by interposing a brazing material, and the carbon amount on the surface of the circuit layer is 2.0 at% or less and the silicon amount is 0.5 at% or less. Power module substrate.
JP2012082570A 2012-03-30 2012-03-30 Power module substrate manufacturing method Active JP6152626B2 (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015193880A (en) * 2014-03-31 2015-11-05 三菱マテリアル株式会社 Method for manufacturing power module substrate having heat sink
JP2016176098A (en) * 2015-03-19 2016-10-06 三菱マテリアル株式会社 Method for manufacturing plated power module substrate
JP2017057486A (en) * 2015-09-18 2017-03-23 三菱マテリアル株式会社 Production of substrate for plated power module

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05160288A (en) * 1991-12-06 1993-06-25 Mitsubishi Materials Corp Manufacture of semiconductor device mounting substrate
JPH1065294A (en) * 1996-08-14 1998-03-06 Toshiba Corp Ceramic wiring board and manufacture thereof
JP2002359453A (en) * 2001-03-29 2002-12-13 Ngk Insulators Ltd Circuit board and manufacturing method therefor
JP2003060129A (en) * 2001-08-09 2003-02-28 Denki Kagaku Kogyo Kk Circuit board and method for partially plating circuit board
JP2008117833A (en) * 2006-11-01 2008-05-22 Mitsubishi Materials Corp Power module substrate, method for manufacturing power module substrate, and power module
JP2010238932A (en) * 2009-03-31 2010-10-21 Mitsubishi Materials Corp Power module substrate, power module substrate having heat sink, and method of manufacturing power module

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05160288A (en) * 1991-12-06 1993-06-25 Mitsubishi Materials Corp Manufacture of semiconductor device mounting substrate
JPH1065294A (en) * 1996-08-14 1998-03-06 Toshiba Corp Ceramic wiring board and manufacture thereof
JP2002359453A (en) * 2001-03-29 2002-12-13 Ngk Insulators Ltd Circuit board and manufacturing method therefor
JP2003060129A (en) * 2001-08-09 2003-02-28 Denki Kagaku Kogyo Kk Circuit board and method for partially plating circuit board
JP2008117833A (en) * 2006-11-01 2008-05-22 Mitsubishi Materials Corp Power module substrate, method for manufacturing power module substrate, and power module
JP2010238932A (en) * 2009-03-31 2010-10-21 Mitsubishi Materials Corp Power module substrate, power module substrate having heat sink, and method of manufacturing power module

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015193880A (en) * 2014-03-31 2015-11-05 三菱マテリアル株式会社 Method for manufacturing power module substrate having heat sink
JP2016176098A (en) * 2015-03-19 2016-10-06 三菱マテリアル株式会社 Method for manufacturing plated power module substrate
JP2017057486A (en) * 2015-09-18 2017-03-23 三菱マテリアル株式会社 Production of substrate for plated power module

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