JP2016176098A - Method for manufacturing plated power module substrate - Google Patents

Abstract

[Problem] To prevent plating formation on a laminate having an aluminum layer opposite to a circuit layer through a ceramic substrate and to allow partial plating on a copper circuit layer. A circuit layer having a copper circuit layer is bonded to one surface of a ceramic substrate directly or via an aluminum bonding layer, and a laminate of an aluminum metal layer and a copper metal layer is bonded to the other surface of the ceramic substrate. A method for producing a power module substrate with plating by plating a circuit layer of a power module substrate to be bonded, and applying a positive potential of 0.1 V or more and 6 V or less to a laminate of power module substrates. In this state, the power module substrate is immersed in a nickel plating solution to form an electroless nickel plating film on the circuit layer. [Selection] Figure 1

Description

  The present invention relates to a power module substrate for use in a semiconductor device that controls a large current and a high voltage, and relates to a method for manufacturing a plated power module substrate in which a circuit layer is subjected to electroless nickel plating.

  A conventional power module substrate is known in which a circuit layer made of aluminum or copper is laminated on one surface of a ceramic substrate, and a metal layer made of aluminum is laminated on the other surface. In addition, a heat sink is bonded to the metal layer of the power module substrate, and an electronic component such as a semiconductor chip is soldered on the circuit layer to manufacture a power module.

  In this type of power module substrate, the surface of the circuit layer is subjected to plating in order to improve solder wettability and enhance the bondability with electronic components. Thus, in order to perform plating only on one of the circuit layer and the metal layer arranged with the ceramic substrate interposed therebetween, the masking portion is partially masked on the portion where plating is not desired. It has been practiced to partially plate by preventing the formation of plating.

As such a masking technique, a method of forming a masking material such as a semiconductor resist in a portion for preventing the formation of plating is common, but as described in Patent Document 1 and Patent Document 2, There is known a method that uses energization without using a masking material.
In Patent Document 1, an electric current having a polarity opposite to that of the plating solution is passed through a plate-like metal in which another metal plate (II) is disposed via an insulating layer on at least one side of the main surface of the metal plate (I). It is described that the electroless plating is partially applied to the metal plate (II).
Further, in Patent Document 2, in order to perform partial plating only on the first aluminum electrode plate among the first and second aluminum electrode layers sandwiching the insulating layer, the second aluminum electrode layer is used for preventing zinc precipitation. It is described that a zinc-substituted film is formed only on the first aluminum electrode layer by performing a zincate process in a state where a potential is applied, and only the first aluminum electrode layer is formed by performing an electroless plating process thereafter. An electroless nickel coating is formed on the substrate.

Japanese Patent Laid-Open No. 2003-183842 JP 2012-237038 A

By the way, when nickel plating is formed on the circuit layer, the power module substrate is immersed in an electroless nickel plating solution. At this time, when copper is bonded to aluminum, the aluminum is eluted by formation of the local battery, and the emitted electrons move to the copper, so that nickel is deposited and the electroless plating reaction starts.
Therefore, when a laminate of an aluminum layer and a copper layer is used for the metal layer opposite to the circuit layer, even if it is not desired to apply plating to join the metal layer to the cooler, the metal layer Plating is also formed on the surface.

  The present invention has been made in view of such circumstances, and even when the metal layer opposite to the circuit layer is a laminate of an aluminum layer and a copper layer through a ceramic substrate, the plating on the laminate is also performed. It is an object of the present invention to provide a method for manufacturing a plated power module substrate that prevents formation and enables partial plating of a copper circuit layer.

  In the method for manufacturing a substrate for a power module with plating according to the present invention, a circuit layer having a copper circuit layer is bonded to one surface of a ceramic substrate directly or via an aluminum bonding layer, and the other surface of the ceramic substrate is bonded. A method of manufacturing a power module substrate with plating by plating the circuit layer of a power module substrate formed by bonding a laminate of an aluminum metal layer and a copper metal layer, wherein the power module substrate includes: A plating treatment step of forming an electroless nickel plating film on the circuit layer by immersing the power module substrate in a nickel plating solution in a state where a positive potential of 0.1 V or more and 6 V or less is applied to the laminate.

  The plating reaction to the laminate can be suppressed by immersing the power module substrate in a nickel plating solution such as NiP with a positive potential of 0.1 V or more and 6 V or less applied to the laminate. Therefore, it is possible to prevent the formation of plating on the laminate without requiring complicated work such as masking treatment to the laminate, and the electroless nickel plating film is applied only to the circuit layer by a simplified process. Can be formed. In addition, when the circuit layer is bonded through the aluminum bonding layer, an electroless plating reaction may occur on the side surface of the aluminum bonding layer, but it is very slight and does not cause a problem in use. .

In this case, when the applied potential to the laminate is less than 0.1 V, it is difficult to completely prevent the electroless nickel plating from being deposited on the laminate. On the other hand, when the voltage applied to the laminate exceeds 6 V, the aluminum metal layer is eluted into the plating solution.
Further, the method of applying a potential to the laminate may be a constant current or a constant voltage, but is preferably performed at a constant voltage. In the case of performing constant current, in order to make the current density constant, it is necessary to consider the surface area for each size of the laminate, and the work becomes complicated.

  According to the present invention, it is possible to prevent the formation of a plating on a laminate without requiring a complicated operation by a masking process, and it is possible to form a partial plating on a circuit layer by a simplified process. .

It is a schematic diagram explaining the plating process process in the manufacturing method of 1st Embodiment of this invention. It is sectional drawing of the board | substrate for power modules with plating manufactured by the manufacturing method of 1st Embodiment of this invention. It is sectional drawing of the board | substrate for power modules with plating manufactured by the manufacturing method of 2nd Embodiment of this invention. It is sectional drawing of the board | substrate for power modules with plating manufactured by the manufacturing method of 3rd Embodiment of this invention.

Hereinafter, embodiments of the present invention will be described.
FIG. 2 shows a power module substrate with plating manufactured by the manufacturing method according to the first embodiment of the present invention. This power module substrate with plating 1 has a copper circuit layer on one surface of a ceramic substrate 2. The laminated body 4 of a plurality of aluminum metal layers and copper metal layers is joined to the other surface, and an electroless nickel plating film 5 is formed on the surface of the circuit layer 3.

  In the power module substrate 1 with plating, the circuit layer 3 includes an aluminum bonding layer 11 bonded to the ceramic substrate 2 and a copper circuit layer 12 bonded on the aluminum bonding layer 11. The first aluminum metal layer 15 bonded to the ceramic substrate 2, the copper metal layer 16 bonded to the surface of the first aluminum metal layer 15 opposite to the ceramic substrate 2, and the first metal layer 16 of the copper metal layer 16. The second aluminum metal layer 17 is further joined to the surface opposite to the first aluminum metal layer 15.

The ceramic substrate 2 prevents electrical connection between the circuit layer 3 and the laminate 4, and includes AlN (aluminum nitride), Si ₃ N ₄ (silicon nitride), Al ₂ O ₃ (alumina), and the like. The ceramic material is formed in a rectangular shape and has a thickness of 0.2 mm to 1 mm, for example.
The aluminum bonding layer 11 of the circuit layer 3 and the first aluminum metal layer 15 of the laminate 4 are formed of pure aluminum or aluminum alloy having a purity of 99.00% by mass or more, and have a thickness of, for example, 0.1 mm to 5 mm. Is formed in a rectangular shape smaller than the ceramic substrate 11. The aluminum bonding layer 11 and the first aluminum metal layer 15 are formed on the ceramic substrate 2 with a brazing material of an alloy such as Al—Si, Al—Ge, Al—Cu, Al—Mg, or Al—Mn. , Brazed and joined.
In addition, the aluminum bonding layer 11 and the first aluminum metal layer 15 are bonded to the ceramic substrate 2 by punching to a desired outer shape by pressing, or after bonding a flat plate to the ceramic substrate 2, Either a desired outer shape can be formed by etching, or any method can be adopted.

The copper circuit layer 12 and the copper metal layer 16 are formed of pure copper or copper alloy such as oxygen-free copper or tough pitch copper, and are formed in a flat plate shape with a thickness of 0.1 mm to 5 mm, for example. The copper circuit layer 12 and the copper metal layer 16 are bonded to the aluminum bonding layer 11 or the first aluminum metal layer 15 by solid phase diffusion bonding, respectively.
Further, the second aluminum metal layer 17 bonded to the copper metal layer 16 functions as a heat sink and is formed of an aluminum alloy such as A3003. The second aluminum metal layer 17 and the copper metal layer 16 are bonded by solid phase diffusion bonding.
Note that the shape of the second aluminum metal layer 17 is not particularly limited, and includes a flat plate shape, a suitable shape such as a plate surface on which fins are formed, and the thickness of the flat plate portion. Is, for example, 0.4 mm to 6 mm.

  As a preferable combination example of each member, the ceramic substrate 2 is AlN having a thickness of 0.635 mm, the aluminum bonding layer 11 is a pure aluminum plate having a thickness of 0.4 mm (4N-Al having a purity of 99.99 mass% or more), One aluminum metal layer 15 is composed of a pure aluminum plate (4N-Al having a purity of 99.99% by mass or more) having a thickness of 0.4 mm. Further, the copper circuit layer 12 and the copper metal layer 16 are made of an oxygen-free copper plate having a thickness of 0.3 mm, and the second aluminum metal layer 17 is made of an A3003 aluminum alloy plate having a thickness of 3 mm.

  A desired circuit pattern is formed on the circuit layer 3 of the power module substrate 1 with plating, and an electroless nickel plating film 5 is formed on the surface thereof. The electroless nickel plating film 5 is formed to a thickness of 1 μm to 9 μm, for example, by NiP plating.

Next, the manufacturing method of the board | substrate 1 for power modules with plating of this embodiment is demonstrated.
(Power module substrate formation process)
First, an aluminum plate serving as the aluminum bonding layer 11 and the first aluminum metal layer 15 is laminated on each surface of the ceramic substrate 2 via a brazing material, and these laminated structures are heated while being pressed in the laminating direction, By melting the brazing material, an aluminum plate to be the aluminum bonding layer 11 and the first aluminum metal layer 15 is brazed to the ceramic substrate 2 to form the aluminum bonding layer 11 and the first aluminum metal layer 15. Specifically, an Al-7% Si brazing material is used as the brazing material and heated at a brazing temperature of 610 ° C. or higher and 650 ° C. or lower for 1 minute to 60 minutes in a vacuum atmosphere, whereby an aluminum bonding layer is formed on the ceramic substrate 2. 11 and the aluminum plate used as the 1st aluminum metal layer 15 are brazed and joined.

  And the copper plate used as the copper circuit layer 12 on the surface opposite to the ceramic substrate 2 of the aluminum bonding layer 11 of the joined body of the ceramic substrate 2 and the aluminum bonding layer 11 and the first aluminum metal layer 15, and the first aluminum metal A copper plate serving as a copper metal layer 16 is superimposed on the surface of the layer 15 opposite to the ceramic substrate 2, and an aluminum serving as a second aluminum metal layer 17 is further disposed on the surface of the copper metal layer 16 opposite to the first aluminum metal layer 15. By stacking the plates and heating these laminated structures under the eutectic temperature of copper and aluminum under pressure in the laminating direction, copper and aluminum are diffused to each other by solid phase diffusion bonding. Join. Specifically, solid phase diffusion bonding can be performed by holding at a heating temperature of 400 ° C. or higher and lower than 548 ° C. for 5 minutes to 240 minutes in a vacuum atmosphere.

(Soft etching process)
Next, before the plating process, in order to ensure the adhesion between the copper circuit layer 12 of the circuit layer 3 and the nickel plating, the circuit layer 3 is subjected to a soft etching process to remove the oxide film on the surface of the circuit layer 3. To do. Specifically, it consists of a persulfate aqueous solution (for example, 5 wt% to 30 wt% aqueous solution of sodium persulfate), hydrogen peroxide solution and sulfuric acid (for example, hydrogen peroxide concentration: 5 wt%, sulfuric acid: 10 wt%), and the like. A soft etching process is performed by immersing in an etching solution for 30 seconds to 2 minutes.

(Plating process)
Then, as shown in FIG. 1, the electroless nickel plating film 5 is formed on the circuit layer 3 by immersing the bonded body S after the soft etching treatment in the NiP plating solution M. In this plating process, a local battery is formed between the aluminum bonding layer 11 and the copper circuit layer 12 in the NiP plating solution M, the aluminum bonding layer 11 is eluted, and electrons emitted thereby are transferred to the copper circuit layer 12. By moving, nickel is deposited on the copper circuit layer 12 as well. The electroless nickel plating film 5 is formed on the copper circuit layer 12 by causing the plating reaction to proceed using this nickel as a catalyst. At this time, since the laminate 4 on the side opposite to the circuit layer 3 has a laminated structure of aluminum and copper, a plating reaction occurs in the same manner as the circuit layer 3 when plating is performed in that state.

  Therefore, in order to suppress the plating reaction to the laminate 4, the joined body S is immersed in the NiP plating solution M in a state where a positive potential of 0.1 V or more and 6 V or less is applied to the laminate 4. Specifically, as shown in FIG. 1, the laminate 4 of the joined body S is connected to the positive electrode of the power source 21, and the electrode 22 made of stainless steel or the like is connected to the negative electrode of the power source 21. S and the electrode 22 are immersed in a plating basket 23 in which the NiP plating solution M is stored, so that a positive potential is applied to the laminate 4. Thereby, while the plating reaction to the laminated body 4 to which a positive potential is applied can be suppressed, the electroless nickel plating film 5 can be formed on the circuit layer 3.

In this case, if the applied potential to the laminate 4 is less than 0.1 V, it is difficult to completely prevent plating deposition on the laminate 4. On the other hand, when the applied voltage to the laminated body 4 exceeds 6V, both the aluminum metal layers 15 and 17 are dissolved.
Note that the method of applying a potential to the laminate 4 may be either a constant current or a constant voltage, but is preferably performed at a constant voltage. In the case of performing constant current, it is necessary to consider the surface area for each size of the laminate 4 in order to make the current density constant, and the work becomes complicated.

  The plated power module substrate 1 having the electroless nickel plating film 5 formed on the circuit layer 3 is soldered with an electronic component 25 on the upper surface of the circuit layer 3, and the electronic component 25, the circuit layer 3, Are connected with bonding wires or the like to manufacture a power module.

  Thus, in the manufacturing method of the substrate 1 for a power module with plating of the present embodiment, the joined body S is placed in the NiP plating solution M in a state where a positive potential of 0.1 V or more and 6 V or less is applied to the laminate 4. By dipping, the plating reaction to the laminate 4 can be suppressed. Therefore, it is possible to prevent the formation of plating on the laminate 4 without requiring a complicated operation such as masking treatment on the laminate 4, and electroless nickel plating only on the circuit layer 3 through a simplified process. The film 5 can be formed. Therefore, the plated power module substrate 1 can be efficiently manufactured, and productivity can be improved.

  In the present invention, the copper circuit layer 12 may be directly bonded to the ceramic substrate 2 without using the aluminum bonding layer 11. In the second embodiment shown in FIG. 3, the present invention is applied to a so-called DBC substrate in which the copper circuit layer 12 is directly bonded to one surface of the ceramic substrate 2 and the copper metal layer 16 is directly bonded to the other surface. It is an embodiment. An aluminum metal layer 17 is bonded as a heat sink to the copper metal layer 16 of the power module substrate 31 with plating according to the second embodiment, and the copper circuit layer 12 (in this case, only the copper circuit layer 12 is a circuit layer). The electroless nickel plating film 5 is formed on the surface.

  When manufacturing the substrate 31 for power module with plating of this 2nd Embodiment, the paste containing the active metal which consists of Ag-Cu-Ti or Ag-Ti is printed on both surfaces of the ceramic substrate 2, and a copper circuit is on it. The copper plate which becomes the layer 12 and the copper metal layer 16 is laminated, the laminated structure is pressurized in the laminating direction, and heated to 800 ° C. or more and 930 ° C. or less for 1 minute or more and 60 minutes or less in a vacuum atmosphere to form the ceramic plate 2. The copper plate used as the copper circuit layer 12 and the copper metal layer 16 is joined by the active metal brazing method, and the copper circuit layer 12 and the copper metal layer 16 are formed.

Next, the aluminum metal layer 17 is placed on the surface of the copper metal layer 16 opposite to the ceramic substrate 2 and these are solid phase diffusion bonded. As a result, the opposite side of the ceramic substrate 2 from the copper circuit layer 12 is a laminate 32 of the copper metal layer 16 and the aluminum metal layer 17. Solid phase diffusion bonding can be performed by the method described in the first embodiment.
Then, similarly to the first embodiment, after performing the soft etching process on the copper circuit layer 12, a plating process is performed.

  In this plating process, the laminate 32 is used as an anode and immersed in a plating solution with a positive potential of 0.1 V or more and 6 V or less applied. However, since the circuit layer is composed only of the copper circuit layer 12, By contacting the copper circuit layer 12 with a dummy cathode that cannot be plated and has already undergone a plating reaction in a plating solution, or with a dummy cathode that is pre-plated on a metal that can be plated such as iron or copper, or A plating reaction is started in the copper circuit layer 12 by flowing a minute current from a minute power source such as a separately prepared dry battery.

  Also in the second embodiment, it is possible to prevent plating from being formed on the laminated body 32 without requiring a complicated operation such as performing a masking process on the laminated body 32, and electroless nickel is applied only to the copper circuit layer 12. The plating film 5 can be formed.

FIG. 4 shows a third embodiment, in which the copper circuit layer 12 is directly bonded to one surface of the ceramic substrate 2 and the copper metal layer 16 is bonded to the other surface via the first aluminum metal layer 15. A second aluminum metal layer 17 as a heat sink is joined to the copper metal layer 16. An electroless nickel plating film 5 is formed on the copper circuit layer 12.
When manufacturing the power module substrate 35 with plating, a copper plate to be the copper circuit layer 12 is first brazed to one surface of the ceramic substrate 2 using an active metal brazing material, and then the other side of the ceramic substrate 2 is bonded. An aluminum plate to be the first aluminum metal layer 15 is brazed to the surface using a brazing material such as Al-7% Si.

Next, an aluminum plate to be the second aluminum metal layer 17 is placed on the surface of the first aluminum metal layer 15 opposite to the ceramic substrate 2 via a copper plate to be the copper metal layer 16, and these are solid phase diffusion bonded. To be integrated.
And after performing the soft etching process with respect to the copper circuit layer 12, a plating process process is implemented.
Also in this plating process, the laminate 4 is used as an anode and immersed in a plating solution in a state where a positive potential of 0.1 V or more and 6 V or less is applied, and the copper circuit layer 12 is already subjected to a plating reaction in the plating solution. The copper circuit layer can be obtained by contacting a dummy cathode on which a plating has occurred in advance or a dummy cathode in which plating is previously deposited on a metal that can be plated such as iron or copper, or by passing a minute current from a micro power source such as a separately prepared dry battery. 12 starts the plating reaction.

  Also in the third embodiment, it is possible to prevent the formation of plating on the laminate 4 without requiring a complicated operation such as performing a masking process on the laminate 4, and the electroless nickel is applied only to the copper circuit layer 12. The plating film 5 can be formed.

In addition, this invention is not limited to the thing of the structure of the said embodiment, In a detailed structure, it is possible to add a various change in the range which does not deviate from the meaning of this invention.
For example, although the NiP plating solution is used in the above embodiment, the present invention is not limited to this, and a NiB plating solution or other electroless nickel plating solution can be used.
In addition, acid cleaning with sulfuric acid or the like may be performed after the soft etching treatment step. The acid cleaning can be performed, for example, by immersing in 100 g / L sulfuric acid for 30 seconds to 1 minute at room temperature.

In order to confirm the effect of the present invention, a power module substrate with plating was prepared and a plating test was performed.
First, on both surfaces of a ceramic substrate made of AlN (60 mm × 60 mm × 0.635 mmt), an aluminum bonding layer made of aluminum (4N-Al) having a purity of 99.99% by mass or more and a first aluminum metal layer (both 58 mm × 58 mm). × 0.4 mmt) was formed by brazing with an Al—Si brazing material. In addition, a copper circuit layer and a copper metal layer (both 58 mm × 58 mm × 0.4 mmt) made of oxygen-free copper are stacked on the aluminum metal layer and the first aluminum metal layer, respectively, and the copper metal layer is made of a JIS3003 aluminum alloy. Two aluminum metal layers (120 mm × 80 mm × 3 mmt) were stacked and bonded together by solid phase diffusion bonding to prepare a bonded body of each sample.

The electroless nickel plating film to each sample was produced in the procedure shown below.
First, in order to remove oil adhering to the surface of the copper circuit layer, degreasing was performed by dipping at 50 ° C. for 5 minutes using a copper cleaner ACL-007 (manufactured by Uemura Kogyo).
Next, a soft etching process was performed on the bonded body after the degreasing process. The soft etching treatment was performed by immersing the joined body in a solution of sodium persulfate 100 g / L at room temperature for 2 minutes.
And in order to ensure the adhesiveness of a plating film and a circuit layer to the conjugate | zygote which finished the soft etching process, the sulfuric acid 100g / L solution was used for 1 minute at room temperature, and acid cleaning was performed.

About the joined body after acid cleaning, a rack made of aluminum wire was brought into contact with the second aluminum metal layer and connected to the positive electrode of the constant voltage power source. Moreover, the negative electrode of the constant voltage power source was connected to a 5 mm diameter rod made of SUS304 as a cathode, and was previously immersed in a plating solution. And the electroless nickel plating film was formed by immersing the joined body connected to the constant voltage power supply in the plating solution in the state which supplied with electricity to the 2nd aluminum metal layer.
The plating solution is low phosphorus type (Meltex Enplate: NI-246, Ni 5.7 g / L, pH 6.7, 80 ° C.), medium phosphorus type (Nimden Uemura Kogyo: NPR-4, Ni 5.0 g / L). , PH 4.6, 80 ° C.), and NiB type (Uemura Kogyo Belnickel, Ni 6.7 g / L, pH 6.6, 60 ° C.) was used for plating. In addition, the plating film thickness was set to 5 μm in all cases, and was set to 16 minutes for the low phosphorus type, 26 minutes for the medium phosphorus type, and 60 minutes for the NiB type.

And about each sample produced in this way, "elution of an aluminum metal layer" and "plating precipitation to an aluminum metal layer" were evaluated.
Evaluation of “elution of the aluminum metal layer” was performed by measuring the Al concentration in the plating solution after the plating process on each sample by an inductively coupled plasma emission spectrometer (Optima 3000XL manufactured by Perkin Elmer). . And about what the Al density | concentration in a plating solution shall be 0.1 mg / L or less, it is "◎" as what does not elute from an aluminum metal layer (a 1st aluminum metal layer and a 2nd aluminum metal layer) Evaluation was made such that when the Al concentration was more than 0.1 mg / L and less than 0.3 mg / L, “◯” was evaluated, and for 0.3 mg / L or more, “X” was evaluated.

The evaluation of “plating deposition on the aluminum metal layer” is performed by scanning the surface of the second aluminum metal layer (the side opposite to the ceramic substrate side) with a scanning electron microscope (S-3400N, 10 kV, manufactured by Hitachi High-Technologies Corp.) at 25 times the field of view This was performed by observing EDS (Energy Dispersive X-Ray Spectrometry). And what was not confirmed the peak of Ni by EDS was evaluated as "(circle)" as a thing without plating deposition, and the thing in which the peak of Ni was confirmed was evaluated as "x".
Table 1 shows the results.

  As can be seen from Table 1, no plating deposition occurred on the second aluminum metal layer in the range where the applied voltage was 0.1 V or more. Moreover, when the plating solution was a low phosphorus type or a NiB type, it was confirmed that Al elution of the second aluminum metal layer did not occur in the range where the applied voltage was 6 V or less. When the plating solution is a medium phosphorous type, elution of the aluminum metal layer is slightly observed at an applied voltage of 6 V, but this is not a problem amount. When the medium phosphorus type is used as the plating solution, Al elution does not occur when the applied voltage is in the range of 5 V or less, so it is more preferable to use the applied voltage in the range of 5 V or less.

DESCRIPTION OF SYMBOLS 1 Substrate for power modules with plating 2 Ceramic substrate 3 Circuit layer 4 Laminate 5 Electroless nickel plating film 11 Aluminum bonding layer 12 Copper circuit layer 15 First aluminum metal layer 16 Copper metal layer 17 Second aluminum metal layer 21 Power supply 22 Electrode 23 Plating tank 25 Electronic component 31 Plating power module substrate 32 Laminate 35 Plating power module substrate S Junction M Plating solution

Claims (1)

1. A circuit layer having a copper circuit layer is bonded to one surface of the ceramic substrate directly or via an aluminum bonding layer, and a laminate of an aluminum metal layer and a copper metal layer is bonded to the other surface of the ceramic substrate. A method for producing a power module substrate with plating by applying plating to the circuit layer of the power module substrate, wherein a positive potential of 0.1 V or more and 6 V or less is applied to the laminate of the power module substrate. A method for producing a substrate for a power module with plating, comprising: a plating treatment step of immersing the power module substrate in a nickel plating solution in a state of being formed to form an electroless nickel plating film on the circuit layer.
   
   
   
   
   
   

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