JP2013201156A - Semiconductor light-emitting element and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-luminance semiconductor light-emitting element and to provide a method of manufacturing the same.SOLUTION: There is provided a semiconductor light-emitting element including a substrate, a stack, an electrode portion, a first metal pillar, and a second metal pillar. The substrate has a top surface and a recess provided on the top surface. The stack includes a first semiconductor layer of a first conductivity type, a light-emitting portion, and a second semiconductor layer of a second conductivity type. The first semiconductor layer is provided on a bottom surface of the recess. The light-emitting portion is provided on the first semiconductor layer. The second semiconductor layer is provided on the light-emitting portion. The interface between the light-emitting portion and the second semiconductor layer is located under the top surface. At least a part of the electrode portion is provided on the top surface, and the electrode portion is electrically connected to the second semiconductor layer. The first metal pillar penetrates through the substrate along the stacking direction of the stack and is electrically connected to the first semiconductor layer. The second metal pillar penetrates through the substrate along the stacking direction and is electrically connected to the electrode portion.

Description

  Embodiments described herein relate generally to a semiconductor light emitting device and a method for manufacturing the same.

  Semiconductor light emitting devices such as LEDs (Light Emitting Diodes) using nitride semiconductors have been developed. In addition, for example, a semiconductor light emitting element that emits white light by combining an LED that emits blue light and a phosphor that absorbs blue light and emits yellow light has been developed. In such a semiconductor light emitting device, improvement in light emission efficiency is desired.

Special table 2011-503898 gazette

  Embodiments of the present invention provide a highly efficient semiconductor light emitting device and a method for manufacturing the same.

  According to the embodiment of the present invention, a semiconductor light emitting device including a substrate, a stacked body, an electrode portion, a first metal pillar, and a second metal pillar is provided. The substrate has an upper surface and a recess provided on the upper surface. The stacked body includes a first semiconductor layer, a light emitting unit, and a second semiconductor layer. The first semiconductor layer is provided on the bottom surface of the recess in the recess. The first semiconductor layer is of a first conductivity type. The light emitting unit is provided on the first semiconductor layer. The second semiconductor layer is provided on the light emitting unit. The second semiconductor layer is of a second conductivity type. In the stacked body, an interface between the light emitting unit and the second semiconductor layer is located below the upper surface. At least a part of the electrode part is provided on the upper surface. The electrode part is electrically connected to the second semiconductor layer. The first metal pillar penetrates the substrate along the stacking direction of the stacked body. The first metal pillar is electrically connected to the first semiconductor layer. The second metal pillar penetrates the substrate along the stacking direction. The second metal pillar is electrically connected to the electrode part.

FIG. 1 is a schematic cross-sectional view illustrating the configuration of the semiconductor light emitting element according to the first embodiment. 1 is a schematic view illustrating the configuration of a semiconductor light emitting element according to a first embodiment. FIG. 3A to FIG. 3J are schematic cross-sectional views illustrating the method for manufacturing the semiconductor light emitting element according to the first embodiment. 3 is a flowchart illustrating a method for manufacturing the semiconductor light emitting element according to the first embodiment. FIG. 5A to FIG. 5D are schematic top views illustrating the configuration of another semiconductor light emitting element according to the first embodiment. FIG. 6A to FIG. 6C are schematic top views illustrating the configuration of another semiconductor light emitting element according to the first embodiment. FIG. 7A and FIG. 7B are schematic views illustrating the configuration of another semiconductor light emitting element according to the first embodiment. FIG. 8A and FIG. 8B are schematic views illustrating the configuration of another semiconductor light emitting element according to the first embodiment. FIG. 9A to FIG. 9C are schematic cross-sectional views illustrating another method for manufacturing a semiconductor light emitting element according to the first embodiment. FIG. 10A and FIG. 10B are schematic views illustrating the configuration of another semiconductor light emitting element according to the first embodiment. FIG. 11A and FIG. 11B are schematic views illustrating the configuration of the semiconductor light emitting element according to the second embodiment. FIG. 12A to FIG. 12C are schematic top views illustrating the configuration of another semiconductor light emitting element according to the second embodiment. FIG. 13A and FIG. 13B are schematic views illustrating the configuration of the semiconductor light emitting device according to the third embodiment. FIG. 14A to FIG. 14C are schematic top views illustrating the configuration of another semiconductor light emitting element according to the third embodiment. FIG. 15A to FIG. 15D are schematic cross-sectional views illustrating the configuration of a part of another semiconductor light emitting element according to the third embodiment.

(First embodiment)
Each embodiment will be described below with reference to the drawings.
The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between the parts, and the like are not necessarily the same as actual ones. Further, even when the same part is represented, the dimensions and ratios may be represented differently depending on the drawings.
Note that, in the present specification and each drawing, the same elements as those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description thereof is omitted as appropriate.

FIG. 1 is a schematic cross-sectional view illustrating the configuration of the semiconductor light emitting element according to the first embodiment. FIG. 2 is a schematic view illustrating the configuration of the semiconductor light emitting element according to the first embodiment.
FIG. 2A is a schematic plan view, and FIG. 2B is a schematic bottom view. FIG. 1 schematically shows a cross section taken along line A1-A2 of FIGS. 2 (a) and 2 (b).
As shown in FIG. 1, FIG. 2A, and FIG. 2B, the semiconductor light emitting device 110 according to this embodiment includes the substrate 5, the stacked body 15, the electrode unit 40, and the first metal pillar. 41 and a second metal pillar 42.

  The substrate 5 has, for example, a rectangular parallelepiped shape. The substrate 5 includes a first main surface (upper surface) 5a, a second main surface 5b opposite to the first main surface 5a, and a recess 44 provided on the first main surface 5a. The first major surface 5a surrounds the bottom surface 44a, for example. For example, the inner side surface 44s of the recess 44 is along a direction substantially perpendicular to the bottom surface 44a. The substrate 5 has insulating properties, for example. The conductivity of the substrate 5 is lower than the conductivity of the multilayer body 15, the electrode unit 40, the first metal pillar 41, and the second metal pillar 42. For example, a silicon substrate is used as the substrate 5. The substrate 5 includes, for example, single crystal silicon. The substrate 5 may be, for example, an SOI (Silicon on Insulator) substrate in which single crystal silicon is stacked on an insulating film.

  The substrate 5 includes a main body 5m containing silicon and an insulating film 6. For example, the conductivity of the insulating film 6 is lower than the conductivity of the main body 5m. The insulating film 6 is formed on the first main surface 5a and the second main surface 5b, for example. The insulating film 6 is formed on the bottom surface 44a and the side surface 44s, for example. The insulating film 6 is formed on the inner wall of the first through hole 71 (see FIG. 3) for forming the first metal pillar 41, for example. The insulating film 6 is formed, for example, on the inner wall of the second through hole 72 (see FIG. 3) for forming the second metal pillar 42. For the insulating film 6, for example, silicon oxide, silicon nitride, silicon oxynitride, TEOS, or the like is used. Thereby, for example, the insulating property of the substrate 5 is improved.

  The first major surface 5a includes, for example, a frame portion 5w that surrounds the bottom surface 44a. In this example, the first main surface 5a further includes a protruding portion 5t protruding toward the inner portion surrounded by the frame portion 5w. The frame portion 5w has, for example, a rectangular shape. The protruding portion 5t is located, for example, at a corner of the rectangular frame portion 5w. The protruding portion 5t has, for example, a rectangular shape. The position and shape of the protrusion 5t are arbitrary.

  The shape of the bottom surface 44a corresponds to the shape of the first main surface 5a. In this example, the shape of the bottom surface 44a is, for example, a shape obtained by cutting out a part of a rectangular corner.

The stacked body 15 includes a first semiconductor layer 10, a second semiconductor layer 20, and a light emitting unit 30.
The first semiconductor layer 10 is provided on the bottom surface 44 a in the recess 44. The light emitting unit 30 is provided on the first semiconductor layer 10. The second semiconductor layer 20 is provided on the light emitting unit 30. For example, the first semiconductor layer 10, the light emitting unit 30, and the second semiconductor layer 20 are grown on the bottom surface 44a in this order. Thereby, the stacked body 15 is formed on the bottom surface 44a.

  In the first semiconductor 10, the second semiconductor 20, and the light emitting unit 30, the shapes viewed from above are substantially the same. Thereby, formation of the laminated body 15 becomes easy. The shape of the stacked body 15 as viewed from above is substantially the same as the shape of the bottom surface 44a. That is, in this example, the shape of the stacked body 15 as viewed from above is, for example, a shape obtained by cutting out a part of a rectangular corner.

  The first semiconductor layer 10 has a first conductivity type. The second semiconductor layer 20 has the second conductivity type. The second conductivity type is a conductivity type different from the first conductivity type. For example, the first conductivity type is n-type and the second conductivity type is p-type. The embodiment is not limited to this, and the first conductivity type may be p-type and the second conductivity type may be n-type. In the following description, it is assumed that the first conductivity type is n-type and the second conductivity type is p-type.

  An interface 45 (corresponding to the upper surface 30a of the light emitting unit 30) between the light emitting unit 30 and the second semiconductor layer 20 is located below the first main surface 5a. The distance along the stacking direction between the interface 45 and the first major surface 5a is greater than zero. The distance along the stacking direction between the interface 45 and the first major surface 5a is, for example, 5 nm or more and 1 mm or less. More preferably, it is 5 nm or more and 200 μm or less, for example. Thereby, for example, wiring formation of the electrode part 40 etc. becomes easy. For example, disconnection of wiring can be suppressed. When the second semiconductor layer 20 is p-type, the distance along the stacking direction between the interface 45 and the first major surface 5a is, for example, 1 μm or less. When the second semiconductor layer 20 is n-type, the distance along the stacking direction between the interface 45 and the first major surface 5a is, for example, 10 μm or less.

  The position of the upper surface 20a of the second semiconductor layer 20 may be above the first major surface 5a, for example. When the position of the upper surface 20a of the second semiconductor layer 20 is lower than the first main surface 5a, the distance along the stacking direction between the upper surface 20a of the second semiconductor layer 20 and the first main surface 5a is For example, it is about 5 nm or more and about 1000 nm or less.

  The end portion 45e of the interface 45 faces the side surface 44s of the recess 44. The side surface 30 s of the light emitting unit 30 faces the side surface 44 s of the recess 44. In this example, the side surface 15 s of the stacked body 15 faces the side surface 44 s of the recess 44. At least a part of the side surface 15s is covered with the side surface 44s. The side surface 30s of the light emitting unit 30 is covered with at least the side surface 44s.

  A stacking direction of the stacked body 15 from the first semiconductor layer 10 toward the second semiconductor layer 20 is defined as a Z-axis direction. One direction perpendicular to the Z-axis direction is taken as an X-axis direction. A direction perpendicular to the Z-axis direction and the X-axis direction is taken as a Y-axis direction. In this example, for example, the Z-axis direction is substantially perpendicular to the upper surface 30 a of the light emitting unit 30.

  In this example, the side surface 15s of the stacked body 15 is parallel to the Z-axis direction, for example. The side surface 15s may be non-parallel to the Z-axis direction. For example, the side surface 15s may be a tapered surface inclined such that the area of the upper surface 20a is larger than the area of the upper surface 30a.

  The first semiconductor layer 10, the second semiconductor layer 20, and the light emitting unit 30 include, for example, a nitride semiconductor. The first semiconductor layer 10 includes, for example, an n-type cladding layer. The second semiconductor layer 20 includes, for example, a p-type cladding layer. The light emitting unit 30 has, for example, a single quantum well (SQW) configuration or a multi quantum well (MQW) configuration.

  The light emitting unit 30 having a single quantum well configuration includes, for example, two barrier layers and a well layer provided between the barrier layers. The light emitting unit 30 having the multiple quantum well configuration includes, for example, three or more barrier layers and a well layer provided between the barrier layers. For example, a GaN compound semiconductor is used for the barrier layer. For example, an InGaN compound semiconductor is used for the well layer. When the barrier layer contains In, the In composition ratio in the barrier layer is lower than the In composition ratio in the well layer.

  The thickness (length along the Z-axis direction) of the first semiconductor layer 10 is, for example, 1 μm or more and 10 μm or less. In this example, the thickness of the first semiconductor layer 10 is, for example, 5 μm. The thickness of the second semiconductor layer 20 is, for example, not less than 5 nm and not more than 1000 nm. In this example, the thickness of the second semiconductor layer 20 is, for example, 100 nm. The thickness of the light emitting unit 30 is, for example, not less than 5 nm and not more than 1000 nm. In this example, the thickness of the light emitting unit 30 is, for example, 200 nm.

  At least a part of the electrode unit 40 is provided on the first main surface 5a. In this example, the electrode part 40 is provided on the upper surface 20a of the second semiconductor layer 20 and on the first main surface 5a. The electrode unit 40 has at least a component extending along the XY plane. . The electrode portion 40 includes a first portion 40a extending on the second semiconductor layer 20 and a second portion 40b extending on the first major surface 5a. The second portion 40b extends, for example, on the protruding portion 5t of the first main surface 5a.

  The electrode unit 40 is in contact with the upper surface 20a of the second semiconductor layer 20, for example. Thereby, the electrode part 40 is electrically connected to the second semiconductor layer 20. A conductive layer may be provided between the second semiconductor layer 20 and the electrode part 40. The electrical connection between the second semiconductor layer 20 and the electrode unit 40 may be, for example, via a conductive layer provided therebetween. Hereinafter, “electrical connection” in this specification includes the case of direct contact and the case of via a conductive layer or the like provided therebetween.

  The electrode unit 40 includes a metal wiring 50. The metal wiring 50 includes an outer edge portion 50a along the outer edge 20b of the upper surface 20a of the second semiconductor layer 20, and an inner portion 50b connected to the outer edge portion 50a and extending into a region surrounded by the outer edge portion 50a. In this example, the outer edge portion 50a of the metal wiring is provided inside the outer edge 20b of the upper surface 20a. For this reason, the outer edge portion 50a overlaps the second semiconductor layer 20 except for the protruding portion 5t of the first main surface 5a. For example, at least one of Ni, Cu, Al, Au, Pd, Pb, Zn, Sn, Fe, Ti, and Ag is used for the metal wiring 50.

  The outer edge portion 50a is, for example, a rectangular ring along the outer edge 20b. The inner part 50b partitions, for example, the inner side of the outer edge part 50a into a mesh shape (or a lattice shape) along the X axis direction and the Y axis direction. The direction of the mesh of the inner portion 50b is not limited to the X-axis direction and the Y-axis direction, and may be any direction perpendicular to the Z-axis direction. Moreover, the shape of the inner side part 50b is not restricted to mesh shape (or lattice shape). The metal wiring 50 includes at least one of an outer edge part 50a and an inner part 50b.

  The first metal pillar 41 is embedded in the substrate 5 so as to face the first semiconductor layer 10. The first metal pillar 41 has a column shape extending in the Z-axis direction. The first metal pillar 41 penetrates the substrate 5. The first metal pillar 41 is electrically connected to the first semiconductor layer 10. The area projected on the XY plane of the first metal pillar 41 may be larger than the area projected on the XY plane of the stacked body 15. Thereby, for example, heat dissipation can be improved.

  The second metal pillar 42 is embedded in the substrate 5 so as to face the electrode portion 40. The second metal pillar 42 faces, for example, the second portion 40b of the electrode part 40. The second metal pillar 42 is provided at the protruding portion 5t of the first main surface 5a. The protruding portion 5t of the first main surface 5a is a portion for arranging the second metal pillar 42. Thereby, the stacked body 15 and the second metal pillar 42 are efficiently arranged in the semiconductor light emitting device 110. Thereby, the area of the upper surface 30a of the light emitting unit 30 can be increased.

  The second metal pillar 42 has a columnar shape extending in the Z-axis direction. The second metal pillar 42 penetrates the substrate 5. The second metal pillar 42 is in contact with the electrode portion 40 (in this example, the metal wiring 50). Thereby, the second metal pillar 42 is electrically connected to the electrode part 40. The second metal pillar 42 is electrically connected to the second semiconductor layer 20 through the electrode part 40.

  The first metal pillar 41 and the second metal pillar 42 are used for electrical connection between the semiconductor light emitting element 110 and an external device. In this example, the first metal pillar 41 is an n-side cathode, and the second metal pillar 42 is a p-side anode. For the first metal pillar 41 and the second metal pillar 42, for example, Cu is used. A plurality of first metal pillars 41 and second metal pillars 42 may be provided. The second metal pillar 42 may be cylindrical or prismatic. The first metal pillar 41 and the second metal pillar 42 may have any shape extending along the Z-axis direction.

A first terminal portion 61 and a second terminal portion 62 are provided on the second main surface 5b.
The first terminal portion 61 is disposed to face the first metal pillar 41. In this example, the first terminal portion 61 is in contact with the first metal pillar 41. Thereby, the first terminal portion 61 is electrically connected to the first metal pillar 41.

  The second terminal portion 62 is disposed to face the second metal pillar 42. In this example, the second terminal portion 62 is in contact with the second metal pillar 42. As a result, the second terminal portion 62 is electrically connected to the second metal pillar 42. The area projected on the XY plane of the second terminal portion 62 is larger than the area projected on the XY plane of the second metal pillar 42. Thereby, electrical connection to the second metal pillar 42 is facilitated. For example, at least one of Ti and NiAu is used for the first terminal portion 61 and the second terminal portion 62.

  A reflective layer 63 is provided between the first metal pillar 41 and the first semiconductor layer 10. The reflective layer 63 has, for example, light reflectivity with respect to light emitted from the light emitting unit 30 and conductivity. The reflectance of the reflective layer 63 with respect to the emitted light is higher than the reflectance of the substrate 5. For example, the first metal pillar 41 is electrically connected to the first semiconductor layer 10 via the reflective layer 63. The reflective layer 63 improves the light extraction efficiency by reflecting light emitted from the light emitting unit 30 toward the first semiconductor layer 10 side. The shape of the reflective layer 63 viewed in the Z-axis direction is substantially the same as the shape of the first metal pillar 41 viewed in the Z-axis direction. For example, at least one of silver, aluminum, and palladium is used for the reflective layer 63. The film thickness of the reflective layer 63 is, for example, not less than 50 nm and not more than 600 nm. In this example, the thickness of the reflective film 63 is, for example, 200 nm. Thereby, in the reflective layer 63, the light reflectivity with respect to the light discharge | released from the light emission part 30 is securable. A conductive base layer may be further provided between the reflective layer 63 and the first semiconductor layer 10. A conductive barrier layer may be further provided between the reflective layer 63 and the first metal pillar 41. For example, Ni or Ti can be used for the barrier layer.

  In this example, a buffer layer 64 is provided between the bottom surface 44 a and the first semiconductor layer 10. The buffer layer 64 improves the film quality of the first semiconductor layer 10, for example. When the first semiconductor layer 10 includes a nitride semiconductor, for example, GaN is used for the buffer layer 64. The electric resistance of the buffer layer 64 is set to be relatively low. The buffer layer 64 may be omitted.

  In this example, the insulating layer 65 is provided on the upper surface 20a of the second semiconductor layer 20, the electrode portion 40, and the first main surface 5a. The insulating layer 65 has, for example, insulation and light transmission. For example, the insulating layer 65 transmits light emitted from the light emitting unit 30. The insulating layer 65 protects the stacked body 15, for example. The insulating layer 65 covers and insulates the electrode unit 40, for example. For example, a silicon oxide film, a silicon oxynitride film, a silicon nitride film, phosphorus silicate glass (PSG), or boron phosphorus silicate glass (BPSG) is used for the insulating layer 65. For example, CVD, vapor deposition, or sputtering is used to form the insulating layer 65. The insulating layer 65 is provided as necessary. The insulating layer 65 can be omitted.

  A wavelength conversion layer 66 is provided on the insulating layer 65. The wavelength conversion layer 66 covers the stacked body 15 on the upper side of the second semiconductor layer 20. For example, the wavelength conversion layer 66 absorbs at least part of the light emitted from the light emitting unit 30 and emits light having a peak wavelength different from the peak wavelength of the emitted light. That is, the wavelength conversion layer 66 converts the peak wavelength of the light emitted from the light emitting unit 30. For example, the wavelength conversion layer 66 may emit light having a plurality of peak wavelengths different from the peak wavelength of the emitted light. For the wavelength conversion layer 66, for example, a phosphor layer is used. The wavelength conversion layer 66 may be a stacked body of a plurality of phosphor layers having different peak wavelengths of emitted light, for example.

  The light emitted from the light emitting unit 30 is, for example, ultraviolet light, violet light, or blue light, and the light emitted from the wavelength conversion layer 66 is, for example, yellow light, blue light, red light, or green light. The combined light of the light emitted from the wavelength conversion layer 66 and the emitted light is substantially white light, for example. The combined light may be, for example, yellow light, red light, green light, or blue light. In FIG. 1B, the insulating layer 65 and the wavelength conversion layer 66 are omitted for easy understanding of the drawing.

  When the semiconductor light emitting device 110 is used, a voltage is applied between the first terminal portion 61 (first metal pillar 41) and the second terminal portion 62 (second metal pillar 42). Thereby, a current is supplied to the light emitting unit 30 and light is emitted from the light emitting unit 30. This current flows through the stacked body 15 along the stacking direction. In other words, the semiconductor light emitting element 110 is a longitudinal conduction type semiconductor light emitting element. Thereby, it becomes easy to obtain high luminous efficiency.

  In the semiconductor light emitting device 110, the upper surface 20a of the second semiconductor layer 20 serves as a light extraction surface. That is, in this example, the light emitted from the light emitting unit 30 is emitted to the outside of the semiconductor light emitting device 110 from the upper surface 20a.

  In the semiconductor light emitting device 110, the first portion 40 a of the electrode unit 40 and the first metal pillar 41 face each other, and current can be supplied to the light emitting unit 30 in the vertical direction (Z-axis direction). Further, in the semiconductor light emitting device 110, the current can be spread in the upper surface 20 a of the second semiconductor layer 20 by the metal wiring 50 provided on the second semiconductor layer 20. Thereby, in the semiconductor light emitting device 110, for example, higher luminous efficiency can be obtained than in a lateral conduction type semiconductor light emitting device.

  For example, the structure which forms the laminated body 15 on the 1st main surface 5a, without forming the recessed part 44 in the board | substrate 5 is also considered. In this configuration, when the electrode part 40 extending on the second semiconductor layer 20 is formed, the first semiconductor layer 10 and the second semiconductor layer 20 become conductive on the side surface 15 s of the stacked body 15. For this reason, in the configuration in which the recess 44 is not formed, it is necessary to provide an insulating layer between the stacked body 15 and the electrode portion 40.

  In the semiconductor light emitting device 110, the interface 45 between the light emitting unit 30 and the second semiconductor layer 20 is located below the first major surface 5a. Then, the side surface 15s is covered with the insulating side surface 44s. Thereby, in the semiconductor light emitting device 110, even when the electrode part 40 extending on the second semiconductor layer 20 is formed, the first semiconductor layer 10 and the second semiconductor layer 20 are formed on the side surface 15 s of the stacked body 15. Can be suppressed. In the semiconductor light emitting device 110, high insulation can be obtained without providing an insulating layer between the stacked body 15 and the electrode portion 40. Thereby, the structure of the semiconductor light emitting device 110 is simple, and for example, the manufacturing cost can be suppressed.

Hereinafter, an example of a method for manufacturing the semiconductor light emitting device 110 will be described.
FIG. 3A to FIG. 3J are schematic cross-sectional views illustrating the method for manufacturing the semiconductor light emitting element according to the first embodiment.
As shown in FIG. 3A, the substrate 5 is formed by providing, for example, the recess 44 in the silicon substrate by lithography and etching, for example. The insulating film 6 is formed on the first main surface 5a, the second main surface 5b, the bottom surface 44a, and the side surface 44s of the main body 5m. For example, CVD, sputtering, and thermal oxidation treatment are used for forming the insulating film 6.

As shown in FIG. 3B, the protective film 68 is formed on the first main surface 5a by, for example, a film forming process, a lithography process, and an etching process. The protective film 68 is provided except for the bottom surface 44 a of the recess 44. The protective film 68 is a film for selectively crystal-growing the stacked body 15 on the bottom surface 44a, for example. For the protective film 68, for example, SiO ₂ is used.

  As shown in FIG. 3C, a buffer layer 64 (for example, a GaN layer) is formed on the bottom surface 44a. On the buffer layer 64, the first semiconductor layer 10 (for example, an n-type GaN layer), the light emitting unit 30 (for example, a laminated film of a GaN layer and an InGaN layer), and the second semiconductor layer 20 (for example, a p-type GaN layer). Are stacked in this order to form a stacked body 15. For forming the buffer layer 64, the first semiconductor layer 10, the second semiconductor layer 20, and the light emitting unit 30, for example, a metal organic chemical vapor deposition (MOCVD) method is used. Thereby, for example, a crystal layer including a nitride semiconductor is epitaxially grown on the substrate 5 including silicon.

  As shown in FIG. 3D, the protective film 68 is removed. The electrode part 40 is formed on the upper surface 20a of the second semiconductor layer 20 and on the first main surface 5a. For example, the metal wiring 50 is formed as the electrode part 40. The metal wiring 50 is formed by sputtering, for example.

  As illustrated in FIG. 3E, the insulating layer 65 is formed on the upper surface 20 a, the electrode unit 40, and the first main surface 5 a of the second semiconductor layer 20. The insulating layer 65 is formed by sputtering or CVD, for example. As described above, the insulating layer 65 can be omitted. Therefore, the process of forming the insulating layer 65 is performed as necessary and can be omitted.

  As shown in FIG. 3F, the first through hole 71 and the second through hole 72 are formed in the substrate 5. The first through hole 71 is formed in a portion of the substrate 5 that faces the first semiconductor layer 10. The first through hole 71 is formed, for example, by performing etching until reaching the first semiconductor layer 10 from the second main surface 5 b side of the substrate 5. Part of the buffer layer 64 is removed by the formation of the first through hole 71. The second through hole 72 is formed in a portion of the substrate 5 that faces the second portion 40 b of the electrode unit 40. The second through hole 72 is formed, for example, by performing etching from the second main surface 5b side of the substrate 5 until it reaches the first main surface 5a. The insulating film 6 is formed on the inner wall of the first through hole 71 and the inner wall of the second through hole 72. The first through hole 71 and the second through hole 72 may be formed simultaneously or separately.

  As shown in FIG. 3G, the reflective layer 63 is formed in a portion of the first semiconductor layer 10 exposed by the first through hole 71. The reflective layer 63 is formed by sputtering, for example. Thereby, the shape of the reflective layer 63 viewed in the Z-axis direction is substantially the same as the shape of the first metal pillar 41 viewed in the Z-axis direction.

  As illustrated in FIG. 3H, the first metal pillar 41 is formed by embedding, for example, copper in the first through hole 71. For example, the second metal pillar 42 is formed by embedding copper in the second through hole 72. The first metal pillar 41 and the second metal pillar 42 may be formed simultaneously or separately.

  As shown in FIG. 3I, the first terminal portion 61 and the second terminal portion 62 are formed on the second main surface 5b. As described above, in the semiconductor light emitting device 110, a connection terminal for an external device is provided on the second main surface 5b side opposite to the upper surface 20a of the second semiconductor layer 20 which is a light extraction surface.

As shown in FIG. 3J, the wavelength conversion layer 66 is formed on the insulating layer 65.
When the insulating layer 65 is omitted, the wavelength changing layer 66 is formed on the upper surface 20a of the second semiconductor layer 20, the electrode portion 40, and the first main surface 5a.
Thus, the semiconductor light emitting device 110 is completed.

FIG. 4 is a flowchart illustrating the method for manufacturing the semiconductor light emitting element according to the first embodiment.
As shown in FIG. 4, in the present manufacturing method, step S <b> 110 for preparing the substrate 5 and the laminated body 15, step S <b> 120 for forming the electrode unit 40, and the first metal pillar 41 and the second metal pillar 42 are formed. Step S130.

  Step S110 can further include, for example, a process of forming the substrate 5 and a process of forming the stacked body 15. Step S110 includes, for example, making the electrode unit 40 into a state where the substrate 5 and the laminate 15 manufactured in advance can be formed. The order of step S120 and step S130 can be changed within a technically possible range.

In step S110, for example, the processing described with reference to FIGS. 3A to 3C is performed. In step S120, for example, the processing described with reference to FIG. In step S130, for example, the processing described with reference to FIGS. 3F and 3H is performed.
Thereby, the highly efficient semiconductor light emitting device 110 is manufactured.

FIG. 5A to FIG. 5D are schematic top views illustrating the configuration of another semiconductor light emitting element according to the first embodiment.
As illustrated in FIG. 5A, the outer edge portion 50 a may have, for example, a shape in which an annular part is interrupted. At this time, the outer edge portion 50a is preferably interrupted at a position as far as possible from the contact portion with the second metal pillar 42. As shown in FIG. 5A, the inner portion 50b may have a shape in which a part is interrupted, for example. At this time, for example, the inner portion 50b is preferably interrupted at a position as far as possible from a contact portion with the outer edge portion 50a. As shown in FIG. 5B, the shape of the inner portion 50b may be a stripe shape. As shown in FIG. 5C, the inner portion 50c may have a spiral shape. As shown in FIG. 5D, the outer portion 50a and the inner portion 50b may be curved in a wave shape, for example. Further, the outer portion 50a and the inner portion 50b may be bent in a zigzag shape, for example.

FIG. 6A to FIG. 6C are schematic top views illustrating the configuration of another semiconductor light emitting element according to the first embodiment.
In FIG. 6A to FIG. 6C, the electrode part 40, the insulating layer 65, and the wavelength conversion layer 66 are not shown for easy viewing of the drawings.
As shown in FIG. 6A, in the semiconductor light emitting device 112, the shape of the stacked body 15 viewed in the Z-axis direction is a rectangular shape. In the semiconductor light emitting device 112, the first major surface 5a is formed by the frame portion 5w. In the semiconductor light emitting device 112, a rectangular bottom surface 44a is formed. By growing the crystal on the bottom surface 44a, it is possible to form the stacked body 15 having a rectangular shape as viewed in the Z-axis direction.

  As shown in FIG. 6B, the semiconductor light emitting device 114 is provided with a plurality of second metal pillars 42.

  As shown in FIG. 6C, in the semiconductor light emitting device 116, a plurality of protrusions 5t are provided on the first major surface 5a. And you may provide the 2nd metal pillar 42 in each of several protrusion part 5t. The second metal pillar 42 may be cylindrical or prismatic.

FIG. 7A and FIG. 7B are schematic views illustrating the configuration of another semiconductor light emitting element according to the first embodiment.
FIG. 7A is a schematic cross-sectional view, and FIG. 7B is a schematic bottom view. FIG. 7A schematically shows a cross section taken along line B1-B2 of FIG.
As shown in FIG. 7A and FIG. 7B, the semiconductor light emitting device 118 is provided between the substrate 5 and the first terminal portion 61 and between the substrate 5 and the second terminal portion 62. An insulating layer 75 is provided. The insulating layer 75 is provided on the second major surface 5b.

  The insulating layer 75 includes a first opening 75 a that exposes a part of the first metal pillar 41 and a second opening 75 b that exposes the second metal pillar 42. In this example, the first terminal portion 61 is electrically connected to the first metal pillar 41 through the first opening 75a. The second terminal portion 62 is electrically connected to the second metal pillar 42 through the second opening 75b. In this example, a part of the second terminal portion 62 overlaps a part of the first metal pillar 41 when projected onto the XY plane. The insulating layer 75 is provided at least between a part of the second terminal part 62 and a part of the first metal pillar 41 that overlap when projected onto the XY plane, and the second terminal part 62 and the first metal pillar are provided. 41 is electrically insulated.

  Thus, by providing the insulating layer 75, for example, the area of the second terminal portion 62 can be increased compared to the configuration of the semiconductor light emitting device 110. Thereby, for example, the soldering with respect to the 2nd terminal part 62 can be performed more appropriately. Thereby, for example, the convenience of the semiconductor light emitting device 118 is improved. For example, the reliability of the semiconductor light emitting element 118 can be improved.

FIG. 8A and FIG. 8B are schematic views illustrating the configuration of another semiconductor light emitting element according to the first embodiment.
FIG. 8A is a schematic cross-sectional view, and FIG. 8B is a schematic top view. FIG. 8A schematically shows a cross section taken along line C1-C2 of FIG.
As shown in FIG. 8A and FIG. 8B, another semiconductor light emitting device 120 of this embodiment includes a retracted portion (in this example, a first retracted portion 81 and a second retracted portion 82). including.
The first retracting portion 81 and the second retracting portion 82 are provided on a part of the side surface 5 s of the substrate 5. For example, one or a plurality of first retreating portions 81 are provided on one side surface 5s of the substrate 5. The first receding portion 81 is continuous with the second main surface 5b.

  For example, the second receding portion 82 is provided in a corner portion of the substrate 5 where the protruding portion 5t is formed. For example, the second receding portion 82 is continuously provided on two continuous side surfaces 5 s of the substrate 5. The second receding portion 82 is continuous with the second main surface 5 b of the substrate 5.

  In this example, the first terminal portion 61 includes a side surface portion 61 s exposed on the side surface 5 s of the substrate 5. The side surface portion 61s faces the first retracted portion 81, for example. The second terminal portion 62 includes a side surface portion 62 s exposed on the side surface 5 s of the substrate 5. The side surface portion 62s faces the second retracted portion 82, for example. In this example, the insulating film 6 is also provided on the first receding portion 81 and the second receding portion 82.

  A first conductive layer 83 serving as a base is provided between the first terminal portion 61 and the substrate 5. A second conductive layer 84 serving as a base is provided between the second terminal portion 62 and the substrate 5. For example, copper is used for the first conductive layer 83 and the second conductive layer 84.

  Thus, in the semiconductor light emitting device 120, the first terminal portion 61 and the second terminal portion 62 include the side surface portion 61s and the side surface portion 62s that are exposed at the side surface 5s, respectively. Thereby, in the semiconductor light emitting element 120, electrical connection with an external apparatus can be performed more appropriately. For example, when soldering the semiconductor light emitting device 120 and an external device, a part of the solder applied to the first terminal portion 61 and the second terminal portion 62 exposed on the second main surface 5b side is formed on the side surface portion 61s and Appears on the side surface 62s. Thereby, for example, it can be confirmed that the solder is appropriately joined to the first terminal portion 61 and the second terminal portion 62.

Hereinafter, an example of a method for manufacturing the semiconductor light emitting device 120 will be described.
FIG. 9A to FIG. 9C are schematic cross-sectional views illustrating another method for manufacturing a semiconductor light emitting element according to the first embodiment.
In the method for manufacturing the semiconductor light emitting device 120, the procedure for forming the first metal pillar 41 and the second metal pillar 42 can be made substantially the same as the method for manufacturing the semiconductor light emitting device 110 (FIG. 3 ( h)).

  As shown in FIG. 9A, the first receding portion 81 and the second receding portion 82 are formed on the substrate 5 on which the first metal pillar 41 and the second metal pillar 42 are formed. For example, etching is performed from the second main surface 5b side by lithography and etching. As a result, the first retracting portion 81 and the second retracting portion 82 are formed on the substrate 5. The 1st retreat part 81 and the 2nd retreat part 82 may be formed simultaneously, and may be formed individually. Thereafter, the insulating film 6 is formed on the first receding portion 81 and the second receding portion 82.

  As shown in FIG. 9B, the first conductive layer 83 and the second conductive layer 84 are formed on the second main surface 5b side. For example, a conductive film containing copper is deposited on the second main surface 5b side by sputtering. This conductive film is patterned by lithography and etching. Thereby, the first conductive layer 83 and the second conductive layer 84 are formed. The first conductive layer 83 and the second conductive layer 84 may be formed simultaneously or individually.

As shown in FIG. 9C, the first terminal portion 61 is formed on the first conductive layer 83. A second terminal portion 62 is formed on the second conductive layer 84. As described with reference to FIG. 3J, the wavelength conversion layer 66 is formed on the insulating layer 65.
Thus, the semiconductor light emitting device 120 is completed.

FIG. 10A and FIG. 10B are schematic views illustrating the configuration of another semiconductor light emitting element according to the first embodiment.
FIG. 10A is a schematic plan view, and FIG. 10B is a schematic bottom view.
As illustrated in FIGS. 10A and 10B, the semiconductor light emitting element 122 includes two second metal pillars 42. The semiconductor light emitting element 122 has two second receding portions 82 corresponding to the two second metal pillars 42. The semiconductor light emitting element 122 has two second terminal portions 62 corresponding to the two second receding portions 82. In this example, each side surface portion 62 s of the two second terminal portions 62 is exposed to one side surface 5 s of the substrate 5. In this example, the first terminal portion 61 includes three side surface portions 61s.

  In this way, for example, the p-side terminal and the n-side terminal can be easily distinguished. For example, the convenience of the semiconductor light emitting element 122 can be improved. The number of the side surface portions 61s and the side surface portions 62s is not limited to the above, and may be any number. In this example, the number of side surface parts 61s is larger than the number of side surface parts 62s, but the number of side surface parts 62s may be larger than the number of side surface parts 61s. In this example, the difference between the number of the side surface parts 61s and the number of the side surface parts 62s is one, but the difference between the number of the side surface parts 61s and the number of the side surface parts 62s may be two or more.

(Second Embodiment)
FIG. 11A and FIG. 11B are schematic views illustrating the configuration of the semiconductor light emitting element according to the second embodiment.
FIG. 11A is a schematic cross-sectional view, and FIG. 11B is a schematic top view. Fig.11 (a) shows typically the D1-D2 line cross section of FIG.11 (b).
As illustrated in FIG. 11A and FIG. 11B, the semiconductor light emitting element 210 includes a transparent conductive layer 52 in the electrode portion 40. The transparent conductive layer 52 has conductivity and light transmittance. The transmittance of the transparent conductive layer 52 with respect to the emitted light is higher than the transmittance of the substrate 5. Further, it may be higher than the transmittance of the laminate 15. For the transparent conductive layer 52, for example, ITO (Indium Tin Oxide) is used.

  The transparent conductive layer 52 is provided on the inner side of the outer edge 20b of the upper surface 20a of the second semiconductor layer 20, for example. In this example, the transparent conductive layer 52 has a rectangular ring shape along the outer edge 20b. A part of the transparent conductive layer 52 extends on the second semiconductor layer 20. The transparent conductive layer 52 is in contact with the second semiconductor layer 20. The transparent conductive layer 52 is electrically connected to the second semiconductor layer 20. A part of the transparent conductive layer 52 extends, for example, on the protruding portion 5t of the first main surface 5a. The transparent conductive layer 52 is in contact with the second metal pillar 42. The transparent conductive layer 52 is electrically connected to the second metal pillar 42.

  Even when the transparent conductive layer 52 is used for the electrode portion 40, a voltage can be applied in the vertical direction as in the semiconductor light emitting device 110. Further, the current can be spread within the upper surface 20 a of the second semiconductor layer 20 by the transparent conductive layer 52 provided on the second semiconductor layer 20. Also in the semiconductor light emitting device 210, high luminous efficiency can be obtained.

  When the semiconductor light emitting device 210 is manufactured, for example, the transparent conductive layer 52 is formed as the electrode portion 40 in the process described with reference to FIG. For example, an ITO film to be the transparent conductive layer 52 is formed by a sputtering method or the like, and processed into a predetermined shape, whereby the transparent conductive layer 52 is obtained. Thereafter, the semiconductor light emitting device 210 can be manufactured by substantially the same procedure as the semiconductor light emitting device 110.

FIG. 12A to FIG. 12C are schematic top views illustrating the configuration of another semiconductor light emitting element according to the second embodiment.
In FIG. 12A to FIG. 12C, the insulating layer 65 and the wavelength conversion layer 66 are not shown for easy understanding of the drawings.
As shown in FIG. 12A, in the semiconductor light emitting device 212, the transparent conductive layer 52 has a rectangular shape. Thus, the shape of the transparent conductive layer 52 is not limited to an annular shape. The width in the X-axis direction (the length along the X-axis direction) of the transparent conductive layer 52 in the semiconductor light emitting element 212 is substantially the same as the width of the outer edge 20b in the X-axis direction, for example. The width of the transparent conductive layer 52 in the semiconductor light emitting element 212 in the Y-axis direction (the length along the Y-axis direction) is substantially the same as the width of the outer edge 20b in the Y-axis direction, for example. The size of the transparent conductive layer 52 of the semiconductor light emitting element 212 is practically the same size as the size of the upper surface 20a, for example.

  As shown in FIG. 12B, in the semiconductor light emitting device 214, the width of the transparent conductive layer 52 in the X-axis direction is larger than the width of the outer edge 20b in the X-axis direction, and the first main surface 5a is in the X-axis direction. Less than the width of The width of the transparent conductive layer 52 in the Y-axis direction may be larger than the width of the outer edge 20b in the Y-axis direction and may be smaller than the width of the first main surface 5a in the Y-axis direction. The size of the transparent conductive layer 52 may be larger than the upper surface 20a and smaller than the first main surface 5a.

  As shown in FIG. 12C, in the semiconductor light emitting device 216, the width of the transparent conductive layer 52 in the X-axis direction is substantially the same as the width of the first main surface 5a in the X-axis direction. The width of the transparent conductive layer 52 in the Y-axis direction may be substantially the same as the width of the first major surface 5a in the Y-axis direction. The size of the transparent conductive layer 52 may be substantially the same as that of the first major surface 5a.

  The shape of the transparent conductive layer 52 is not limited to an annular shape and a rectangular shape, and may be any shape capable of spreading a current on the upper surface 20a of the second semiconductor layer 20.

(Third embodiment)
FIG. 13A and FIG. 13B are schematic views illustrating the configuration of the semiconductor light emitting device according to the third embodiment.
FIG. 13A is a schematic cross-sectional view, and FIG. 13B is a schematic top view. Fig.13 (a) shows typically the E1-E2 line cross section of FIG.13 (b).
As shown in FIGS. 13A and 13B, in the semiconductor light emitting device 310, the electrode unit 40 includes a metal wiring 50 and a transparent conductive layer 52. In the semiconductor light emitting device 310, the transparent conductive layer 52 is provided on the metal wiring 50, for example. A metal wiring 50 may be provided on the transparent conductive layer 52.

  In the semiconductor light emitting device 310, the metal wiring 50 and the transparent conductive layer 52 can improve the light extraction efficiency while spreading the current, for example. Thereby, high light emission efficiency can be obtained in the semiconductor light emitting device 310.

  When manufacturing the semiconductor light emitting device 310, for example, after forming the metal wiring 50 in the process described with reference to FIG. 3D, the transparent conductive layer 52 is formed on the metal wiring 50. Thereafter, the semiconductor light emitting device 310 can be manufactured by substantially the same procedure as the semiconductor light emitting device 110.

FIG. 14A to FIG. 14C are schematic top views illustrating the configuration of another semiconductor light emitting element according to the third embodiment.
In FIG. 14A to FIG. 14C, the insulating layer 65 and the wavelength conversion layer 66 are not shown for easy understanding of the drawing.
As shown in FIG. 14A, in the semiconductor light emitting element 312, the metal wiring 50 is provided with an outer edge portion 50 a.

  As shown in FIG. 14B, in the semiconductor light emitting element 314, in the metal wiring 50 including the outer edge portion 50a and the inner portion 50b, the outer edge portion 50a is provided outside the outer edge 20b of the upper surface 20a. That is, the outer edge portion 50a may be provided on the frame portion 5w of the first main surface 5a.

  As shown in FIG. 14C, in the semiconductor light emitting element 316, an outer edge portion 50 a provided outside the outer edge 20 b of the upper surface 20 a is used as the metal wiring 50. In this case, the transparent conductive layer 52 has a shape overlapping the metal wiring 50. The light emitted from the light emitting unit 30 can be prevented from being blocked by the metal wiring 50. On the other hand, when the outer edge portion 50a is provided on the inner side of the outer edge 20b of the upper surface 20a, for example, the luminance can be improved without unnecessarily increasing the package size of the semiconductor light emitting element.

  The shape of the metal wiring 50 is arbitrary. The transparent conductive layer 52 is, for example, annular. The shape of the transparent conductive layer 52 may be rectangular. The shape and size of the transparent conductive layer 52 are arbitrary. For example, the electrode is formed by combining the corrugated metal wiring 50 described with reference to FIG. 5D and the transparent conductive layer 52 having substantially the same size as the first main surface 5a described with reference to FIG. The portion 40 may be formed. Thus, the electrode part 40 can be formed by arbitrarily combining the metal wiring 50 described in each of the above embodiments and the transparent electrode layer 52 described in each of the above embodiments. For the metal wiring 50, for example, the shapes described in FIGS. 2A, 5A to 5D, and 14A to 14C can be arbitrarily used. . For the transparent conductive layer 52, for example, the shapes described in FIG. 11B, FIG. 12A to FIG. 12C, and FIG. 14A to FIG. it can.

FIG. 15A to FIG. 15D are schematic cross-sectional views illustrating the configuration of a part of another semiconductor light emitting element according to the third embodiment.
FIG. 15A to FIG. 15D correspond to a cross section taken along line E1-E2 of FIG. In FIG. 15A to FIG. 15D, the electrode portion 40, the first metal pillar 41, and the second metal pillar are omitted.
As shown in FIG. 15A, the insulating film 6 may be provided only between the main body 5m and the buffer layer 64, for example.

  As shown in FIG. 15B, the insulating film 6 may be provided on the bottom surface 44a and the side surface 44s. In this example, the side surface 15 s of the stacked body 15 is covered with the insulating film 6. In this way, the leakage of the stacked body 15 can be suppressed more appropriately.

  As shown in FIG. 15C, the substrate 5 may include a main body portion 5 m, an insulating film 6, and a silicon film 7. For example, the silicon film 7 is provided on the insulating film 6. For example, the silicon film 7 faces the bottom surface 44a. For example, the silicon film 7 is provided between the insulating film 6 and the buffer layer 64. The silicon film 7 includes, for example, single crystal silicon. The film thickness of the silicon film 7 is, for example, not less than 1 μm and not more than 200 μm.

  As shown in FIG. 15D, the silicon film 7 may be opposed to the bottom surface 44a and the side surface 44s, for example. In this example, the side surface 15 s of the stacked body 15 is covered with the silicon film 7. Thus, the substrate 5 may be, for example, bulk silicon or an SOI substrate. The substrate 5 only needs to be capable of crystal growth of the stacked body 15 in the recess 44, for example.

  According to the embodiment, a semiconductor light emitting device with high brightness and a method for manufacturing the same are provided.

In this specification, “nitride semiconductor” means B _x In _y Al _z Ga _1-xyz N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z ≦ 1) Semiconductors having all compositions in which the composition ratios x, y, and z are changed within the respective ranges are included. Furthermore, in the above chemical formula, those further containing a group V element other than N (nitrogen), those further containing various elements added for controlling various physical properties such as conductivity type, and unintentionally Those further including various elements included are also included in the “nitride semiconductor”.

  In the present specification, “vertical” and “parallel” include not only strictly vertical and strictly parallel, but also include, for example, variations in the manufacturing process, and may be substantially vertical and substantially parallel. is good.

The embodiments of the present invention have been described above with reference to specific examples. However, embodiments of the present invention are not limited to these specific examples. For example, each element included in a semiconductor light emitting device, such as a substrate, a laminate, a first semiconductor layer, a light emitting unit, a second semiconductor layer, an electrode unit, a first metal pillar, a second metal pillar, a metal wiring, and a transparent conductive layer With respect to the specific configuration, as long as a person skilled in the art can carry out the present invention in a similar manner and appropriately obtain the same effect by appropriately selecting from the well-known ranges, it is included in the scope of the present invention.
Moreover, what combined any two or more elements of each specific example in the technically possible range is also included in the scope of the present invention as long as the gist of the present invention is included.

  In addition, all semiconductor light-emitting devices and methods for manufacturing the same that can be implemented by those skilled in the art based on the semiconductor light-emitting devices and methods for manufacturing the same described above as embodiments of the present invention are also included in the gist of the present invention. As long as it is included, it belongs to the scope of the present invention.

  In addition, in the category of the idea of the present invention, those skilled in the art can conceive of various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. .

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  DESCRIPTION OF SYMBOLS 5 ... Board | substrate 5a ... 1st main surface (upper surface), 5b ... 2nd main surface, 5m ... Main part, 5s ... Side surface, 5t ... Projection part, 5w ... Frame part, 6 ... Insulating film, 7 ... Silicon film, DESCRIPTION OF SYMBOLS 10 ... 1st semiconductor layer, 15 ... Laminated body, 15s ... Side surface, 20 ... 2nd semiconductor layer, 20a ... Upper surface, 20b ... Outer edge, 30 ... Light-emitting part, 30a ... Upper surface, 30s ... Side surface, 40 ... Electrode part, 40a ... 1st part, 40b ... 2nd part, 41 ... 1st metal pillar, 42 ... 2nd metal pillar, 44 ... Recessed part, 44a ... Bottom face, 44s ... Side surface, 45 ... Interface, 50 ... Metal wiring, 50a ... Outer edge part 50b ... inner part 52 ... transparent conductive layer 61 ... first terminal part 61s ... side part 62 ... second terminal part 62s ... side part 63 ... reflective layer 64 ... buffer layer 65 ... insulating layer , 66 ... wavelength conversion layer, 6 DESCRIPTION OF SYMBOLS ... Protective film 71 ... 1st through-hole, 72 ... 2nd through-hole, 75 ... Insulating layer, 75a ... 1st opening, 75b ... 2nd opening, 81 ... 1st retreat part, 82 ... 2nd retreat part, 83 ... 1st conductive layer, 84 ... 2nd conductive layer, 110, 112, 114, 116, 118, 120, 122, 210, 212, 214, 216, 310, 312, 314, 316 ... Semiconductor light emitting element

Claims (5)

A substrate having an upper surface and a recess provided on the upper surface;
A first semiconductor layer of a first conductivity type provided on the bottom surface of the recess in the recess, a light emitting part provided on the first semiconductor layer, and a first semiconductor layer provided on the light emitting part. A stacked body in which an interface between the light emitting unit and the second semiconductor layer is located below the upper surface;
An electrode part provided on at least a part of the upper surface and electrically connected to the second semiconductor layer;
A first metal pillar penetrating the substrate along a stacking direction of the stacked body and electrically connected to the first semiconductor layer;
A second metal pillar that penetrates the substrate along the stacking direction and is electrically connected to the electrode portion;
A semiconductor light emitting device comprising:   The semiconductor light emitting element according to claim 1, wherein the electrode part includes at least a metal wiring along an outer edge of the second semiconductor layer.   The semiconductor light emitting element according to claim 1, wherein the electrode portion includes a transparent conductive layer.   The semiconductor light-emitting element according to claim 1, wherein the substrate includes silicon. A substrate having an upper surface and a recess provided on the upper surface;
A first semiconductor layer of a first conductivity type provided on the bottom surface of the recess in the recess, a light emitting part provided on the first semiconductor layer, and a first semiconductor layer provided on the light emitting part. A stacked body in which an interface between the light emitting unit and the second semiconductor layer is located below the upper surface;
The process of preparing
Forming an electrode portion on the upper surface and on the second semiconductor layer;
Forming a first metal pillar penetrating the substrate along the stacking direction of the stacked body and electrically connected to the first semiconductor layer; passing through the substrate along the stacking direction; Forming a second metal pillar to be connected electrically,
A method for manufacturing a semiconductor light emitting device comprising:

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