JP2010129870A - Semiconductor light-emitting device, and method of manufacturing same - Google Patents

Semiconductor light-emitting device, and method of manufacturing same Download PDF

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JP2010129870A
JP2010129870A JP2008304574A JP2008304574A JP2010129870A JP 2010129870 A JP2010129870 A JP 2010129870A JP 2008304574 A JP2008304574 A JP 2008304574A JP 2008304574 A JP2008304574 A JP 2008304574A JP 2010129870 A JP2010129870 A JP 2010129870A
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semiconductor light
emitting device
light emitting
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recess
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Tsutomu Okubo
努 大久保
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Stanley Electric Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting device capable of assuring a high solder joint strength in substrate mounting, and to provide a method of manufacturing the same, capable of manufacturing the semiconductor light-emitting device with high productivity. <P>SOLUTION: The semiconductor light-emitting device includes slopes crossing each of mutually opposite sides rising from a recess provided in a top surface side of a Si substrate 1 with a crystalline plane (100) and a backside, and an electrode pattern connected to electrodes of the semiconductor light-emitting device mounted in the recess extends to the slopes via the through-holes and the backside. When the semiconductor light-emitting device is mounted by solder on the semiconductor light-emitting device where wiring patterns 22a and 22b are already formed, solder fillets 24 are formed between the wiring pattern 22a and a slope 12a of a back electrode pattern 13a, and between the wiring pattern 22b and a slope 12b of a back electrode pattern 13b. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、半導体発光装置及びその製造方法に関するものであり、詳しくは、加工されたSi基板上に半導体発光素子が実装されてなる半導体発光装置及びその製造方法に関する。   The present invention relates to a semiconductor light emitting device and a manufacturing method thereof, and more particularly to a semiconductor light emitting device in which a semiconductor light emitting element is mounted on a processed Si substrate and a manufacturing method thereof.

従来、この種の半導体発光装置としては、図6に示す構成のものが提案されている。それは、平板状のSi基板50の一方の面側に凹部51が形成され、該凹部51の内周面を含む凹面側表面及びその反対面に絶縁膜52、53が形成されている。そして、凹部51側の絶縁膜52上には互いに分離独立した導電性の2つの反射膜54a、54bが形成され、凹部51の反対側の絶縁膜53上には互いに分離独立した導電性の2つの電極パターン55a、55bが形成されている。   Conventionally, a semiconductor light emitting device of this type has been proposed as shown in FIG. That is, a concave portion 51 is formed on one surface side of a flat Si substrate 50, and insulating films 52 and 53 are formed on the concave surface including the inner peripheral surface of the concave portion 51 and on the opposite surface. Then, two conductive reflective films 54 a and 54 b that are separated and independent from each other are formed on the insulating film 52 on the concave portion 51 side, and two conductive films that are separated and independent from each other are formed on the insulating film 53 on the opposite side of the concave portion 51. Two electrode patterns 55a and 55b are formed.

反射膜54aと電極パターン55a、反射膜54bと電極パターン55bは夫々Si基板50を貫通する導電性ビアホール56a、56bで電気的に接続され、凹部51の底部に位置する一方の反射膜54a上にLEDチップ57が載置されて前記反射膜54aとLEDチップ57の下部電極とが電気的に接続されると共に、凹部51の底部に位置する他方の反射膜54b上に、一方の端部をLEDチップ57の上部電極に接続されたボンディングワイヤ58の他方の端部が接続されて前記反射膜54bとLEDチップ57の上部電極とがボンディングワイヤ58を介して電気的に接続されている。   The reflective film 54a and the electrode pattern 55a, and the reflective film 54b and the electrode pattern 55b are electrically connected by conductive via holes 56a and 56b penetrating the Si substrate 50, respectively, on one reflective film 54a located at the bottom of the recess 51. The LED chip 57 is placed so that the reflective film 54a and the lower electrode of the LED chip 57 are electrically connected, and one end of the LED film 57 is placed on the other reflective film 54b located at the bottom of the recess 51. The other end of the bonding wire 58 connected to the upper electrode of the chip 57 is connected, and the reflection film 54 b and the upper electrode of the LED chip 57 are electrically connected via the bonding wire 58.

更に、凹部51内には封止樹脂59が充填され、LEDチップ57及びボンディングワイヤ58が樹脂封止されている(例えば、特許文献1参照。)。
米国特許第6,531,328号明細書
Further, the recess 51 is filled with a sealing resin 59, and the LED chip 57 and the bonding wire 58 are resin-sealed (see, for example, Patent Document 1).
US Pat. No. 6,531,328

上記構成の半導体発光装置60は、例えば半導体発光装置実装用基板61に実装する際には図7のように、半導体発光装置実装用基板61上の配線パターン61a、61bと半導体発光装置60のSi基板50に形成された電極パターン55a、55bとを半田62で接合することにより、両者間の電気的導通を図るものである。   When the semiconductor light emitting device 60 having the above configuration is mounted on the semiconductor light emitting device mounting substrate 61, for example, as shown in FIG. 7, the wiring patterns 61a and 61b on the semiconductor light emitting device mounting substrate 61 and the Si of the semiconductor light emitting device 60 are arranged. The electrode patterns 55a and 55b formed on the substrate 50 are joined with the solder 62 to achieve electrical conduction between them.

ところで、上記構成の半導体発光装置はその製造上、順次、Si基板の加工による複数の凹部形成、凹部形成されたSi基板に対する絶縁膜、反射膜及び電極パターン形成、各凹部内へのLEDチップの載置及びボンディングワイヤの架空配線、凹部内への封止樹脂の充填の各工程を経て多数個取り半導体発光装置が作製され、最後にダイシング工程で切断されて個々の半導体発光装置に個片化される。   By the way, the semiconductor light-emitting device having the above-described configuration sequentially forms a plurality of recesses by processing a Si substrate, forms an insulating film, a reflective film and an electrode pattern on the Si substrate formed with the recesses, and installs LED chips in each recess. A large number of semiconductor light-emitting devices are manufactured through the steps of mounting and aerial wiring of bonding wires, and filling of the sealing resin into the recesses, and finally cut into individual semiconductor light-emitting devices by cutting in a dicing process. Is done.

そのため、個片化された個々の半導体発光装置は各側面がダイシング工程での切断面となるため該側面に電極パターン(外部電極)を形成することは難しい。そのため、半導体発光装置実装用基板に半導体発光装置を半田実装する際に半田フィレットが形成しづらく、半導体発光装置実装用基板に対する半導体発光装置の半田接合強度が弱いものとなってしまう。   For this reason, each side surface of each individual semiconductor light emitting device becomes a cut surface in the dicing process, and it is difficult to form an electrode pattern (external electrode) on the side surface. Therefore, it is difficult to form a solder fillet when the semiconductor light emitting device is solder-mounted on the semiconductor light emitting device mounting substrate, and the solder joint strength of the semiconductor light emitting device to the semiconductor light emitting device mounting substrate is weak.

そこで、個片化された後の個々の半導体発光装置の側面に対して外部電極を設けることが考えられるが、そのためには側面電極パターンを形成のための新たな製造工程が必要となり、工数増加による生産性の低下が生じることになる。   Therefore, it is conceivable to provide external electrodes on the side surfaces of the individual semiconductor light emitting devices after being singulated, but this requires a new manufacturing process for forming the side electrode patterns, which increases man-hours. This will cause a decrease in productivity.

本発明は上記問題に鑑みて創案なされたもので、その目的とするところは、基板実装に際して高い半田接合強度の確保が可能な半導体発光装置、及び該半導体発光装置を高い生産性で製造することが可能な製造方法を提供することにある。   The present invention was devised in view of the above problems, and its object is to manufacture a semiconductor light emitting device capable of ensuring high solder joint strength when mounting on a substrate, and to manufacture the semiconductor light emitting device with high productivity. An object of the present invention is to provide a manufacturing method capable of achieving the above.

上記課題を解決するために、本発明の請求項1に記載された発明は、結晶面(100)のSi基板が、(100)面の表面側に形成された凹部と、前記凹部の(100)面の底面から(100)面の裏面に達する複数の貫通孔と、前記裏面から立ち上がって互いに対向する少なくとも一対の、前記表面に略垂直な側面の夫々に交差する傾斜面を有し、前記凹部内に半導体発光素子が実装されると共に該半導体発光素子の各電極に接続された、互いに分離独立した各電極パターンが前記貫通孔及び前記裏面を経て前記傾斜面上まで延長して形成されていることを特徴とするものである。   In order to solve the above-mentioned problem, the invention described in claim 1 of the present invention is characterized in that a Si substrate having a crystal plane (100) has a recess formed on the surface side of the (100) plane, and (100 A plurality of through-holes reaching from the bottom surface of the surface to the back surface of the (100) surface, and at least a pair of inclined surfaces rising from the back surface and facing each other and intersecting each of the side surfaces substantially perpendicular to the surface, A semiconductor light emitting element is mounted in the recess, and each electrode pattern connected to each electrode of the semiconductor light emitting element is separated and independent from each other, and extends to the inclined surface through the through hole and the back surface. It is characterized by being.

また、本発明の請求項2に記載された発明は、請求項1において、少なくとも前記Si基板と前記各電極パターンの間に絶縁膜が設けられていることを特徴とするものである。   According to a second aspect of the present invention, in the first aspect, an insulating film is provided at least between the Si substrate and each of the electrode patterns.

また、本発明の請求項3に記載された発明は、請求項1又は2の何れか1項において、前記凹部内に封止樹脂が充填されており、該封止樹脂は透光性樹脂又は1種以上の蛍光体が分散された透光性樹脂からなることを特徴とするものである。   Moreover, the invention described in claim 3 of the present invention is that, in any one of claims 1 and 2, the recess is filled with a sealing resin, and the sealing resin is a translucent resin or It consists of translucent resin in which 1 or more types of fluorescent substance were disperse | distributed.

また、本発明の請求項4に記載された発明は、結晶面(100)のSi基板に対して面方位に依存する異方性エッチングを施して(100)面の表面側に複数の凹部、前記凹部の(100)面の底面から(100)面の裏面に達する複数の貫通孔及び裏面側に該裏面側から前記表面側に向かって徐々に幅狭となる断面略台形形状の溝部を形成する工程と、
前記Si基板の両面に絶縁膜を形成する工程と、
前記絶縁膜上に、前記凹部の内面から前記貫通孔及び前記裏面を経て前記溝部の側面上まで延びる、互いに分離独立した複数の電極パターンを形成する工程と、
前記凹部内に半導体発光素子を実装して該凹部内に封止樹脂を充填する工程と、
前記溝部の(100)面の底面に沿って断面を(110)面とするダイシングにより切断して個片化する工程と
を有することを特徴とするものである。
In the invention described in claim 4 of the present invention, a plurality of recesses are formed on the surface side of the (100) plane by performing anisotropic etching depending on the plane orientation on the Si substrate of the crystal plane (100). A plurality of through-holes reaching the back surface of the (100) surface from the bottom surface of the (100) surface of the recess and a groove portion having a substantially trapezoidal cross section that gradually becomes narrower from the back surface side toward the front surface side. And a process of
Forming insulating films on both sides of the Si substrate;
Forming a plurality of electrode patterns separated and independent from each other on the insulating film, extending from the inner surface of the concave portion to the side surface of the groove portion through the through hole and the back surface;
Mounting a semiconductor light emitting element in the recess and filling a sealing resin in the recess;
And a step of cutting into individual pieces by dicing with the cross section taken as a (110) plane along the bottom surface of the (100) plane of the groove.

また、本発明の請求項5に記載された発明は、請求項4において、前記溝部の底面の幅は、前記ダイシング時に使用するブレードの幅よりも広く形成されることを特徴とするものである。   Further, the invention described in claim 5 of the present invention is characterized in that, in claim 4, the width of the bottom surface of the groove is formed wider than the width of the blade used during the dicing. .

また、本発明の請求項6に記載された発明は、請求項4又は5のいずれか1項において、前記異方性エッチングに用いる溶液はTMAH溶液又はKOH溶液であることを特徴とするものである。   The invention described in claim 6 of the present invention is characterized in that, in any one of claims 4 and 5, the solution used for the anisotropic etching is a TMAH solution or a KOH solution. is there.

結晶面(100)のSi基板に、表面側の凹部、該凹部の底面から裏面に達する複数の貫通孔、及び裏面から立ち上がって互いに対向する側面の夫々に交差する傾斜面の夫々を形成し、凹部内に半導体発光素子を実装する共に該半導体発光素子の各電極に接続された、互いに分離独立した各電極パターンを前記貫通孔及び前記裏面を経て前記傾斜面上まで延長して形成した。   On the Si substrate of the crystal plane (100), each of a concave portion on the front surface side, a plurality of through holes reaching from the bottom surface of the concave portion to the back surface, and an inclined surface that rises from the back surface and intersects each of the side surfaces facing each other, A semiconductor light emitting element was mounted in the recess and each electrode pattern separated from each other and connected to each electrode of the semiconductor light emitting element was extended to the inclined surface through the through hole and the back surface.

その結果、この半導体発光装置を半導体発光装置実装用基板に半田実装する際、半導体発光装置実装用基板に予め形成された配線パターンと半導体発光装置の傾斜面上に位置する電極パターンとの間で半田フィレットが形成されて両パターン間の半田接合強度が増し、半導体発光装置実装用基板に対する半導体発光装置の実装信頼性が高まった。   As a result, when this semiconductor light-emitting device is solder-mounted on the semiconductor light-emitting device mounting substrate, between the wiring pattern previously formed on the semiconductor light-emitting device mounting substrate and the electrode pattern located on the inclined surface of the semiconductor light-emitting device. A solder fillet is formed to increase the solder joint strength between the two patterns, and the mounting reliability of the semiconductor light emitting device with respect to the substrate for mounting the semiconductor light emitting device is increased.

また、この半導体発光装置の製造工程において、該半導体発光装置を半導体発光装置実装用基板に半田実装する際に半導体発光装置実装用基板の配線パターンとで半田フィレットを形成する電極パターンが位置する傾斜部を、結晶面(100)の前記Si基板に対して面方位に依存する異方性エッチングを施して形成される表面側の複数の凹部及び前記凹部の底面から裏面に達する複数の貫通孔と同時に、裏面側に該裏面側から前記表面側に向かって徐々に幅狭となる断面略台形形状の溝部として形成するようにした。   In addition, in the manufacturing process of the semiconductor light emitting device, when the semiconductor light emitting device is solder mounted on the semiconductor light emitting device mounting substrate, an inclination is formed where an electrode pattern for forming a solder fillet with the wiring pattern of the semiconductor light emitting device mounting substrate is located. A plurality of recesses on the surface side formed by subjecting the Si substrate of the crystal plane (100) to anisotropic etching depending on the plane orientation, and a plurality of through holes reaching the back surface from the bottom surface of the recesses At the same time, a groove having a substantially trapezoidal cross section that gradually narrows from the back side toward the front side is formed on the back side.

その結果、製造工程中に特別な工程を別途設けることなく形成することができ、工数増加による生産性の低下を生じることなく実装信頼性の高い半導体発光装置を製造することが可能となる。   As a result, it is possible to form the semiconductor light emitting device without providing a special process separately in the manufacturing process, and to manufacture a semiconductor light emitting device with high mounting reliability without causing a decrease in productivity due to an increase in man-hours.

以下、この発明の好適な実施形態を図1〜図5を参照しながら、詳細に説明する。尚、以下に述べる実施形態は、本発明の好適な具体例であるから、技術的に好ましい種々の限定が付されているが、本発明の範囲は、以下の説明において特に本発明を限定する旨の記載がない限り、これらの実施形態に限られるものではない。   Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS. The embodiments described below are preferable specific examples of the present invention, and thus various technically preferable limitations are given. However, the scope of the present invention particularly limits the present invention in the following description. Unless stated to the effect, the present invention is not limited to these embodiments.

図1〜図3は本発明の半導体発光装置に係る実施形態の概略説明図であり、そのうち図1は上面図、図2は図1のA−A断面図、図3は底面図である。   1 to 3 are schematic explanatory views of an embodiment of a semiconductor light emitting device according to the present invention, in which FIG. 1 is a top view, FIG. 2 is a cross-sectional view taken along the line AA in FIG.

結晶面(100)のSi基板1の一方の(100)面(表面)2側に凹部3が形成され、他方の(100)面(裏面)4から凹部3の(100)面の底面3aに達する2つの貫通溝5a、5bが設けられている。この貫通溝5a、5bは、Si基板1の裏面4側から凹部3の底面3a側に向かって徐々に幅狭となる断面略台形形状を呈している。   A concave portion 3 is formed on one (100) plane (front surface) 2 side of the Si substrate 1 of the crystal plane (100), and from the other (100) plane (back surface) 4 to the bottom surface 3a of the (100) plane of the concave portion 3. Two reaching grooves 5a and 5b are provided. The through-grooves 5a and 5b have a substantially trapezoidal cross section that gradually becomes narrower from the back surface 4 side of the Si substrate 1 toward the bottom surface 3a side of the recess 3.

更に、Si基板1の互いに対向する一対の(110)面の側面6a、6bの夫々と裏面4とで形成される稜線の側に、Si基板1の裏面4から立ち上がって互いに対向する側面6a、6bの夫々に交差する傾斜面7a、7bが形成されている。   Further, on the side of the ridge formed by each of a pair of (110) side surfaces 6a and 6b facing each other and the back surface 4 of the Si substrate 1, side surfaces 6a rising from the back surface 4 of the Si substrate 1 and facing each other. Inclined surfaces 7a and 7b intersecting 6b are formed.

Si基板1の凹部3内及び貫通溝5a、5b内を含めた、表面2側の面及び裏面4側の面に絶縁層8が設けられている。このとき、貫通溝5a、5bは該貫通溝5a、5b内に形成された絶縁層8で塞がれることはなく、貫通状態はそのまま維持されている。   An insulating layer 8 is provided on the surface 2 side surface and the back surface 4 side surface including the inside of the recess 3 and the through grooves 5 a and 5 b of the Si substrate 1. At this time, the through grooves 5a and 5b are not blocked by the insulating layer 8 formed in the through grooves 5a and 5b, and the through state is maintained as it is.

Si基板1の表面2側の絶縁膜8上には、夫々凹部3の内底部9a、9bから内側部10a、10bまで延びる互いに分離独立した表面電極パターン11a、11bが形成され、裏面4側の絶縁膜8上には、夫々傾斜部12a、12bから内側に延びる裏面電極パターン13a、13bが形成され、夫々の貫通溝5a、5b内の絶縁膜8上にはスルーホール電極パターン14a、14bが形成されている。   On the insulating film 8 on the surface 2 side of the Si substrate 1, surface electrode patterns 11a and 11b that are separated from each other and extend from the inner bottom portions 9a and 9b of the recess 3 to the inner portions 10a and 10b are formed. On the insulating film 8, back surface electrode patterns 13a and 13b extending inward from the inclined portions 12a and 12b are formed, respectively. Through hole electrode patterns 14a and 14b are formed on the insulating film 8 in the respective through grooves 5a and 5b. Is formed.

Si基板1の表面2側の表面電極パターン11aと裏面4側の裏面電極パターン13aは貫通溝5a内のスルーホール電極パターン14aがスルーホールとして機能して電気的に導通状態となっている。同様に、Si基板1の表面2側の表面電極パターン11bと裏面4側の裏面電極パターン13bは貫通溝5b内のスルーホール電極パターン14bがスルーホールとして機能して電気的に導通状態となっている。なお、表面電極パターン11a又はスルーホール電極パターン14aによって貫通溝5aが塞がれてもよい。同様に、表面電極パターン11b又はスルーホール電極パターン14bによって貫通溝5bが塞がれてもよい。   The surface electrode pattern 11a on the front surface 2 side of the Si substrate 1 and the back surface electrode pattern 13a on the back surface 4 side are electrically conductive because the through hole electrode pattern 14a in the through groove 5a functions as a through hole. Similarly, the surface electrode pattern 11b on the front surface 2 side of the Si substrate 1 and the back surface electrode pattern 13b on the back surface 4 side are electrically conductive because the through-hole electrode pattern 14b in the through groove 5b functions as a through-hole. Yes. The through groove 5a may be closed by the surface electrode pattern 11a or the through-hole electrode pattern 14a. Similarly, the through groove 5b may be blocked by the surface electrode pattern 11b or the through-hole electrode pattern 14b.

凹部3内の内底部9aに位置する表面電極パターン11a上には、上部に一対の電極を有する半導体発光素子15が接着剤(図示せず)を介して固定されており、半導体発光素子15の上部電極の一方と表面電極パターン11aがボンディングワイヤ16を介して電気的に接続されている。半導体発光素子15の上部電極の他方はボンディングワイヤ16を介して凹部3内の内底部9bに位置する表面電極パターン11bに接続されて電気的な導通が図られている。   On the surface electrode pattern 11a located on the inner bottom portion 9a in the recess 3, a semiconductor light emitting element 15 having a pair of electrodes on the top is fixed via an adhesive (not shown). One of the upper electrodes and the surface electrode pattern 11 a are electrically connected via bonding wires 16. The other of the upper electrodes of the semiconductor light emitting element 15 is connected to a surface electrode pattern 11b located on the inner bottom portion 9b in the recess 3 through a bonding wire 16 so as to be electrically connected.

凹部3内には封止樹脂17が充填され、半導体発光素子15とボンディングワイヤ16が樹脂封止されている。封止樹脂17はエポキシ樹脂、シリコーン樹脂等の透光性樹脂、又は1種以上の蛍光体を分散した透光性樹脂からなる。   The recess 3 is filled with a sealing resin 17, and the semiconductor light emitting element 15 and the bonding wire 16 are sealed with resin. The sealing resin 17 is made of a translucent resin such as an epoxy resin or a silicone resin, or a translucent resin in which one or more phosphors are dispersed.

以上が本発明の半導体発光装置の構成の説明である。この半導体発光装置を半導体発光装置実装用基板に実装すると図4のようになる。   The above is the description of the structure of the semiconductor light-emitting device of the present invention. When this semiconductor light emitting device is mounted on a substrate for mounting a semiconductor light emitting device, the result is as shown in FIG.

半導体発光装置実装用基板20の、半導体発光装置21の実装領域に予め分離独立して形成された配線パターン22a、22bの夫々に半導体発光装置21の裏面4側の裏面電極パターン13a、13bが対峙し、配線パターン22aと裏面電極パターン13a、及び配線パターン22bと裏面電極パターン13bが半田23によって接合されて電気的導通が図られると共に半導体発光装置実装用基板20上に半導体発光装置21が固定されている。   The back surface electrode patterns 13a and 13b on the back surface 4 side of the semiconductor light emitting device 21 are opposed to the wiring patterns 22a and 22b formed separately in advance in the mounting region of the semiconductor light emitting device 21 of the semiconductor light emitting device mounting substrate 20, respectively. Then, the wiring pattern 22a and the back electrode pattern 13a, and the wiring pattern 22b and the back electrode pattern 13b are joined by the solder 23 to achieve electrical conduction, and the semiconductor light emitting device 21 is fixed on the semiconductor light emitting device mounting substrate 20. ing.

このとき、半田23は配線パターン22aと裏面電極パターン13aの間及び配線パターン22bと裏面電極パターン13bの間に位置すると共に、特に、配線パターン22aと裏面電極パターン13aの傾斜部12aの間、及び配線パターン22bと裏面電極パターン13bの傾斜部12bの間で半田フィレット24が形成されている。   At this time, the solder 23 is located between the wiring pattern 22a and the back electrode pattern 13a and between the wiring pattern 22b and the back electrode pattern 13b, and in particular, between the wiring pattern 22a and the inclined portion 12a of the back electrode pattern 13a, and A solder fillet 24 is formed between the wiring pattern 22b and the inclined portion 12b of the back electrode pattern 13b.

そこで、この半田フィレット24が形成されることにより、従来例で示したような、ダイシング工程での切断面をそのまま側面としてその側面に配線パターンを有しない構成の半導体発光装置と比較して、配線パターン22aと裏面電極パターン13aの半田接合、及び配線パターン22bと裏面電極パターン13bの半田接合の強度が増し、半導体発光装置実装用基板20に対する半導体発光装置21の実装信頼性を高めることができる。   Therefore, by forming the solder fillet 24, as shown in the conventional example, the cut surface in the dicing process is used as it is as a side surface, and a wiring pattern is not provided on the side surface. The strength of solder bonding between the pattern 22a and the back electrode pattern 13a and the solder bonding between the wiring pattern 22b and the back electrode pattern 13b is increased, and the mounting reliability of the semiconductor light emitting device 21 with respect to the semiconductor light emitting device mounting substrate 20 can be increased.

また、半導体発光装置21の傾斜部12a、12bの上方に位置する側面に電極パターンが形成されていないため、半導体発光装置実装用基板20上に半田実装した際に半田の這い上がりによる側面の汚染がなく、見栄えのよい実装状態を確保することができる。   Further, since the electrode pattern is not formed on the side surface located above the inclined portions 12a and 12b of the semiconductor light emitting device 21, the contamination of the side surface due to the solder rising when the semiconductor light emitting device 21 is solder mounted on the semiconductor light emitting device mounting substrate 20. It is possible to secure a good-looking mounting state.

次に、上記構成の半導体発光装置の製造方法について、図5の製造工程図を参照して説明する。   Next, a method for manufacturing the semiconductor light emitting device having the above configuration will be described with reference to the manufacturing process diagram of FIG.

まず、(a)の工程において、結晶面(100)のSi基板30を準備し、表面を酸化処理して全面に酸化膜31を形成する。   First, in the step (a), an Si substrate 30 having a crystal plane (100) is prepared, and the surface is oxidized to form an oxide film 31 on the entire surface.

次に、(b)の工程において、Si基板30の両(100)面の酸化膜31上にフォトレジスト膜を形成した後、フォトリソグラフィプロセスにより、後工程において結晶面(100)のSi基板30に対して面方位に依存する異方性エッチングを行う領域を剥離してレジストマスク32を形成する。   Next, in the step (b), after a photoresist film is formed on the oxide films 31 on both (100) surfaces of the Si substrate 30, the Si substrate 30 on the crystal surface (100) is formed in a later step by a photolithography process. On the other hand, the resist mask 32 is formed by removing the region where the anisotropic etching depending on the plane orientation is performed.

次に、(c)の工程において、レジストマスク32で覆われた領域以外の領域の酸化膜31をフッ酸等のエッチング液によりエッチング除去し、その後有機溶剤等の溶剤によりレジストマスク32を全て除去する。   Next, in the step (c), the oxide film 31 in a region other than the region covered with the resist mask 32 is removed by etching with an etchant such as hydrofluoric acid, and then the resist mask 32 is completely removed with a solvent such as an organic solvent. To do.

次に、(d)の工程において、上記(c)の工程で残った酸化膜31をレジストマスクとして、レジストマスク33で覆われた領域以外の領域のSi基板30に対してTMAH(水酸化テトラメチルアンモニウム)溶液により異方性エッチングを行う。この工程により、完成品における凹部3、貫通溝5a、5b及び傾斜面7a、7bが形成される(図2参照)。なお、凹部3の底面3aは(100)面である。   Next, in step (d), TMAH (tetrahydroxide hydroxide) is applied to the Si substrate 30 in a region other than the region covered with the resist mask 33 using the oxide film 31 remaining in the step (c) as a resist mask. Anisotropic etching is performed with a methylammonium) solution. By this step, the recessed portion 3, the through grooves 5a and 5b, and the inclined surfaces 7a and 7b in the finished product are formed (see FIG. 2). The bottom surface 3a of the recess 3 is a (100) plane.

この工程において、傾斜面7a、7bを形成する溝部37の(100)面の底面37aは、後工程におけるダイシング時にブレードが傾斜面7a、7bに触れないように、ブレードの刃幅に対して十分余裕をもった幅に形成することが必要である。   In this step, the bottom surface 37a of the (100) surface of the groove portion 37 that forms the inclined surfaces 7a and 7b is sufficient with respect to the blade width of the blade so that the blade does not touch the inclined surfaces 7a and 7b during dicing in the subsequent process. It is necessary to form in a width with a margin.

次に、(e)の工程において、再度、Si基板30の表面を酸化処理して全面に酸化膜31を形成する。   Next, in step (e), the surface of the Si substrate 30 is again oxidized to form an oxide film 31 on the entire surface.

次に、(f)の工程において、Si基板30の両面の酸化膜31上にフォトレジスト膜を形成した後、フォトリソグラフィプロセスにより、後工程において電極パターンを形成する領域を剥離してレジストマスク34を形成する。   Next, in the step (f), after a photoresist film is formed on the oxide films 31 on both sides of the Si substrate 30, a region where an electrode pattern is to be formed in a later step is peeled off by a photolithography process to form a resist mask 34. Form.

次に、(g)の工程において、Si基板30の両面の酸化膜31上及びレジストマスク34上にスパッタ法や蒸着法により金属膜35を形成する。   Next, in the step (g), a metal film 35 is formed on the oxide film 31 and the resist mask 34 on both surfaces of the Si substrate 30 by sputtering or vapor deposition.

次に、(h)の工程において、レジストマスク34を全て除去する。このとき、レジストマスク34の除去に伴ってその上面に位置する金属膜35も除去され、絶縁膜31上に残った金属膜35が、完成品における表面電極パターン11a、11b、裏面電極13a、13b、スルーホール電極14a、14bとなる(図2参照)。   Next, in the step (h), the resist mask 34 is completely removed. At this time, the metal film 35 located on the upper surface of the resist mask 34 is also removed along with the removal of the resist mask 34, and the metal film 35 remaining on the insulating film 31 is replaced with the surface electrode patterns 11a and 11b and the back electrodes 13a and 13b in the finished product. Through-hole electrodes 14a and 14b (see FIG. 2).

次に、(i)の工程において、異方性エッチングにより形成された凹部3の内底部に位置する、金属膜35からなる表面電極パターン11a上に半導体発光素子15を接着剤(図示せず)を介して固定し、半導体発光素子15の上部電極の一方と表面電極パターン11aをボンディングワイヤ16を介して電気的に接続すると共に、半導体発光素子15の上部電極の他方と表面電極パターン11bをボンディングワイヤ16を介して電気的に接続する。   Next, in the step (i), the semiconductor light emitting element 15 is bonded to the surface electrode pattern 11a made of the metal film 35 located on the inner bottom portion of the recess 3 formed by anisotropic etching (not shown). The upper electrode of the semiconductor light emitting element 15 and the surface electrode pattern 11a are electrically connected via the bonding wire 16, and the other upper electrode of the semiconductor light emitting element 15 and the surface electrode pattern 11b are bonded. Electrical connection is made through the wire 16.

その後、凹部3内に封止樹脂17を充填し、半導体発光素子15及びボンディングワイヤ16を樹脂封止する。このとき、封止樹脂17はエポキシ樹脂、シリコーン樹脂等の透光性樹脂、又は1種以上の蛍光体を分散した透光性樹脂が用いられる。   Thereafter, the recess 3 is filled with a sealing resin 17, and the semiconductor light emitting element 15 and the bonding wire 16 are sealed with resin. At this time, the sealing resin 17 is made of a translucent resin such as an epoxy resin or a silicone resin, or a translucent resin in which one or more phosphors are dispersed.

上記(a)〜(i)の製造工程を経て多数個取り半導体発光装置36が完成する。   A multi-chip semiconductor light emitting device 36 is completed through the manufacturing steps (a) to (i).

最後に、(j)の工程において、多数個取り半導体発光装置36をSi基板30の溝部37の底面に沿って断面を(110)面とするダイシングにより切断して個々の半導体発光装置21に個片化し、半導体発光装置21(図2参照)が完成する。   Finally, in the step (j), the multi-cavity semiconductor light emitting device 36 is cut by dicing with the cross section taken as the (110) plane along the bottom surface of the groove portion 37 of the Si substrate 30, and the individual semiconductor light emitting devices 21 are separated. The semiconductor light emitting device 21 (see FIG. 2) is completed.

なお、上記製造工程は、異方性エッチングにTMAH溶液を用いた場合の1例であるが、KOH(水酸化カリウム)溶液等の他のエッチング溶液を用いた場合は、(a)〜(c)の工程と必ずしも同一となるとは限らない。   In addition, although the said manufacturing process is an example at the time of using a TMAH solution for anisotropic etching, when other etching solutions, such as a KOH (potassium hydroxide) solution, are used, (a)-(c ) Is not necessarily the same as the step.

また、半導体発光素子15の固定、ボンディングワイヤ16の配線及び封止樹脂17による樹脂封止の工程(i)は、エッチング加工及び金属膜形成がなされた多数個取りSi基板を個片化した後に個別に行ってもよい。   In addition, the step (i) of fixing the semiconductor light emitting element 15, wiring the bonding wires 16, and resin sealing with the sealing resin 17 is performed after the multi-piece Si substrate on which the etching process and the metal film are formed is separated into pieces. It may be done individually.

つまり上記(a)〜(h)の工程後にダイシングを行い、その後に半導体発光素子15の固定、ボンディングワイヤ16の配線及び封止樹脂17による樹脂封止を行うものである。   That is, dicing is performed after the steps (a) to (h), and then the semiconductor light emitting element 15 is fixed, the bonding wires 16 are wired, and the resin sealing is performed with the sealing resin 17.

なお、半導体発光装置を導体発光装置実装用基板に半田実装するときに該半導体発光装置実装用基板の回路パターンとで半田フィレットを形成する半導体発光装置の傾斜面は、Si基板の互いに対向する一対の側面側に限らず、互いに対向する二対の側面側に設けてもよい。つまり、Si基板の2面に限らず4面に設けてもよい。   Note that when the semiconductor light emitting device is solder mounted on the conductor light emitting device mounting substrate, the inclined surface of the semiconductor light emitting device that forms a solder fillet with the circuit pattern of the semiconductor light emitting device mounting substrate is a pair of Si substrates facing each other. It may be provided not only on the side surface side but also on two pairs of side surface surfaces facing each other. That is, you may provide not only in 2 surfaces of Si substrate but in 4 surfaces.

また、傾斜面はSi基板の各側面側の全面に設けられる必要はなく、各側面側の中央部あるいは各側面側の隅部に設けてもよい。また、傾斜面に形成する裏面電極パターンは必ずしも傾斜面全面に形成する必要はなく、その一部に形成することも可能である。   Further, the inclined surface does not need to be provided on the entire surface of each side surface of the Si substrate, and may be provided at the center portion on each side surface side or the corner portion on each side surface side. Further, the back electrode pattern formed on the inclined surface is not necessarily formed on the entire inclined surface, and can be formed on a part thereof.

以上説明したように、本発明の半導体発光装置はこのような製造工程によって作製することができる。そのため、半導体発光装置を導体発光装置実装用基板に半田実装するときに該半導体発光装置実装用基板の回路パターンとで半田フィレットを形成する半導体発光装置の裏面電極パターンが位置する傾斜面を、製造工程中に特別な工程を別途設けることなく形成することができる。   As described above, the semiconductor light emitting device of the present invention can be manufactured by such a manufacturing process. Therefore, when the semiconductor light-emitting device is solder-mounted on the conductor light-emitting device mounting substrate, an inclined surface on which the back surface electrode pattern of the semiconductor light-emitting device forms a solder fillet with the circuit pattern of the semiconductor light-emitting device mounting substrate is manufactured. It can be formed without providing a special process in the process.

そのため、工数増加による生産性の低下を生じることなく実装信頼性の高い半導体発光装置を製造することが可能となる。   Therefore, it is possible to manufacture a semiconductor light emitting device with high mounting reliability without causing a decrease in productivity due to an increase in man-hours.

本発明の光半導体装置に係る実施形態の概略上面図である。1 is a schematic top view of an embodiment of an optical semiconductor device of the present invention. 図1のA−A断面図である。It is AA sectional drawing of FIG. 本発明の光半導体装置に係る実施形態の概略底面図である。It is a schematic bottom view of the embodiment concerning the optical semiconductor device of the present invention. 本発明の光半導体装置に係る実施形態の実装説明図である。It is mounting explanatory drawing of embodiment which concerns on the optical semiconductor device of this invention. 本発明の光半導体装置に係る実施形態の製造方法を示す工程図である。It is process drawing which shows the manufacturing method of embodiment which concerns on the optical semiconductor device of this invention. 本発明の光半導体装置に係る実施形態の製造方法を示す工程図である。It is process drawing which shows the manufacturing method of embodiment which concerns on the optical semiconductor device of this invention. 従来例の半導体発光装置の説明図である。It is explanatory drawing of the semiconductor light-emitting device of a prior art example. 従来例の半導体発光装置の実装説明図である。It is mounting explanatory drawing of the semiconductor light-emitting device of a prior art example.

符号の説明Explanation of symbols

1 Si基板
2 表面
3 凹部
4 裏面
8 絶縁層
15 半導体発光素子
16 ボンディングワイヤ
17 封止樹脂
20 半導体発光装置実装用基板
21 半導体発光装置
23 半田
24 半田フィレット
30 Si基板
31 酸化膜
32 レジストマスク
33 レジストマスク
34 レジストマスク
35 金属膜
36 多数個取り半導体発光装置
37 溝部
DESCRIPTION OF SYMBOLS 1 Si substrate 2 Front surface 3 Concave part 4 Back surface 8 Insulating layer 15 Semiconductor light emitting element 16 Bonding wire 17 Sealing resin 20 Semiconductor light emitting device mounting substrate 21 Semiconductor light emitting device 23 Solder 24 Solder fillet 30 Si substrate 31 Oxide film 32 Resist mask 33 Resist Mask 34 Resist mask 35 Metal film 36 Multi-cavity semiconductor light emitting device 37 Groove

Claims (6)

結晶面(100)のSi基板が、(100)面の表面側に形成された凹部と、前記凹部の(100)面の底面から(100)面の裏面に達する複数の貫通孔と、前記裏面から立ち上がって互いに対向する少なくとも一対の、前記表面に略垂直な側面の夫々に交差する傾斜面を有し、前記凹部内に半導体発光素子が実装されると共に該半導体発光素子の各電極に接続された、互いに分離独立した各電極パターンが前記貫通孔及び前記裏面を経て前記傾斜面上まで延長して形成されていることを特徴とする半導体発光装置。   A Si substrate having a crystal plane (100), a recess formed on the surface side of the (100) plane, a plurality of through holes reaching the back surface of the (100) plane from the bottom surface of the (100) plane of the recess, and the back surface And at least a pair of inclined surfaces that face each other and intersect each of the side surfaces substantially perpendicular to the surface, and the semiconductor light emitting device is mounted in the recess and connected to each electrode of the semiconductor light emitting device In addition, the semiconductor light emitting device is characterized in that the electrode patterns separated and independent from each other are formed so as to extend to the inclined surface through the through hole and the back surface. 少なくとも前記Si基板と前記各電極パターンの間に絶縁膜が設けられていることを特徴とする請求項1に記載の半導体発光装置。   The semiconductor light emitting device according to claim 1, wherein an insulating film is provided at least between the Si substrate and each electrode pattern. 前記凹部内に封止樹脂が充填されており、該封止樹脂は透光性樹脂又は1種以上の蛍光体が分散された透光性樹脂からなることを特徴とする請求項1又は2のいずれか1項に記載の半導体発光装置。   The sealing resin is filled in the recess, and the sealing resin is made of a translucent resin or a translucent resin in which one or more kinds of phosphors are dispersed. The semiconductor light-emitting device of any one of Claims. 結晶面(100)のSi基板に対して面方位に依存する異方性エッチングを施して(100)面の表面側に複数の凹部、前記凹部の(100)面の底面から(100)面の裏面に達する複数の貫通孔及び裏面側に該裏面側から前記表面側に向かって徐々に幅狭となる断面略台形形状の溝部を形成する工程と、
前記Si基板の両面に絶縁膜を形成する工程と、
前記絶縁膜上に、前記凹部の内面から前記貫通孔及び前記裏面を経て前記溝部の側面上まで延びる、互いに分離独立した複数の電極パターンを形成する工程と、
前記凹部内に半導体発光素子を実装して該凹部内に封止樹脂を充填する工程と、
前記溝部の(100)面の底面に沿って断面を(110)面とするダイシングにより切断して個片化する工程と
を有することを特徴とする半導体発光装置の製造方法。
A silicon substrate having a crystal plane (100) is subjected to anisotropic etching depending on the plane orientation to form a plurality of recesses on the surface side of the (100) plane, and from the bottom surface of the (100) plane of the recess to the (100) plane Forming a plurality of through holes reaching the back surface and a groove portion having a substantially trapezoidal cross section gradually narrowing from the back surface side toward the front surface side on the back surface side;
Forming insulating films on both sides of the Si substrate;
Forming a plurality of electrode patterns separated and independent from each other on the insulating film, extending from the inner surface of the concave portion to the side surface of the groove portion through the through hole and the back surface;
Mounting a semiconductor light emitting element in the recess and filling a sealing resin in the recess;
A method of manufacturing the semiconductor light-emitting device, comprising: cutting a piece by dicing with a cross-section of the groove portion along the (100) plane as a (110) plane and dividing it into individual pieces.
前記溝部の底面の幅は、前記ダイシング時に使用するブレードの幅よりも広く形成されることを特徴とする請求項4に記載の半導体発光装置の製造方法。   5. The method of manufacturing a semiconductor light emitting device according to claim 4, wherein a width of a bottom surface of the groove is formed wider than a width of a blade used during the dicing. 前記異方性エッチングに用いる溶液はTMAH溶液又はKOH溶液であることを特徴とする請求項4又は5のいずれか1項に記載の半導体発光装置の製造方法。   6. The method for manufacturing a semiconductor light emitting device according to claim 4, wherein the solution used for the anisotropic etching is a TMAH solution or a KOH solution.
JP2008304574A 2008-11-28 2008-11-28 Semiconductor light-emitting device, and method of manufacturing same Pending JP2010129870A (en)

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