JP2013191657A - Photoelectric conversion element and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a photoelectric conversion element which can improve fill factor and open circuit voltage.SOLUTION: A photoelectric conversion element 100 comprises an n-type single crystalline silicon substrate 1, a passivation film 2, amorphous films 11 to 1m, amorphous films 21 to 2m-1, and electrodes 31 to 3m and 41 to 4m-1. The amorphous films 11 to 1m and the amorphous films 21 to 2m-1 are alternately disposed in the in-plane direction of the n-type single crystalline silicon substrate 1 contacting the reverse side of the n-type single crystalline silicon substrate 1. The amorphous films 11 to 1m include at least a p-type impurity layer, and the amorphous films 21 to 2m-1 include at least an n-type impurity layer. The electrodes 31 to 3m are each disposed contacting the p-type impurity layer of the amorphous films 11 to 1m, and the electrodes 41 to 4m-1 are each disposed contacting the n-type impurity layer of the amorphous films 21 to 2m-1. The film thickness in portions contacting the electrodes of the amorphous films 11 to 1m and 21 to 2m-1 is smaller than the film thickness in other portions not contacting the electrodes of the same.

Description

  The present invention relates to a photoelectric conversion element and a manufacturing method thereof.

  The back contact solar cell has a high efficiency by forming a pn junction and an electrode on the light receiving surface side on the back surface, thereby eliminating shadows from the electrode on the light receiving surface side and absorbing more sunlight. Solar cell to get.

  In this solar cell, the pn junction is formed by thermal diffusion (Patent Document 1).

  A solar cell in which a pn junction is formed on the back surface by a method other than thermal diffusion has also been proposed (Patent Document 2). In this solar cell, i-type amorphous silicon (a-Si) and n-type a-Si are sequentially laminated on the back surface of the semiconductor substrate, and a part of the laminated i-type a-Si and n-type a-Si is removed. The removed part has a structure in which i-type a-Si and p-type a-Si are sequentially laminated.

JP 2006-523025 A JP 2010-80887 A

  However, in the solar cell described in Patent Document 2, the total film thickness of p-type a-Si and i-type a-Si and the total film thickness of n-type a-Si and i-type a-Si are thick. In this case, there is a problem that the series resistance increases and the fill factor (FF) of the photoelectric conversion element decreases. On the other hand, when the total film thickness of p-type a-Si and i-type a-Si and the total film thickness of n-type a-Si and i-type a-Si are thin, the passivation effect on the semiconductor substrate is reduced, There exists a problem that the open circuit voltage of a conversion element falls.

  Therefore, according to the embodiment of the present invention, a photoelectric conversion element capable of improving the fill factor and the open circuit voltage is provided.

  In addition, according to the embodiment of the present invention, a method for manufacturing a photoelectric conversion element capable of improving a fill factor and an open circuit voltage is provided.

  According to the embodiment of the present invention, the photoelectric conversion element includes a semiconductor substrate, first and second amorphous films, and first and second electrodes. The semiconductor substrate is made of single crystal silicon having the first conductivity type. The first amorphous film is provided in contact with one surface of the semiconductor substrate and includes at least a first impurity layer having a second conductivity type opposite to the first conductivity type. The second amorphous film is provided in contact with one surface of the semiconductor substrate adjacent to the first amorphous film in the in-plane direction of the semiconductor substrate, and the second impurity having the first conductivity type Including at least a layer. The first electrode is provided in contact with the first impurity layer of the first amorphous film. The second electrode is provided in contact with the second impurity layer of the second amorphous film. In at least one of the first and second amorphous films, the thickness of the portion in contact with the electrode is smaller than the thickness of the portion not in contact with the electrode.

  According to the embodiment of the present invention, the method for manufacturing a photoelectric conversion element is in contact with one surface of a semiconductor substrate made of single crystal silicon having the first conductivity type and is opposite to the first conductivity type. A first step of forming a first amorphous film including at least a first impurity layer having a second conductivity type; and a semiconductor adjacent to the first amorphous film in an in-plane direction of the semiconductor substrate A second step of forming a second amorphous film including at least a second impurity layer having the first conductivity type in contact with one surface of the substrate; and at least one of the first and second impurity layers. A third step of removing a part of the one impurity layer in the in-plane direction of the semiconductor substrate; and a fourth step of forming an electrode in contact with at least one of the impurity layers from which the part has been removed.

  In the photoelectric conversion element according to the embodiment of the present invention, the first amorphous film including at least a first impurity layer having a conductivity type opposite to the conductivity type of the semiconductor substrate and the same conductivity as the conductivity type of the semiconductor substrate. In at least one of the second amorphous film including at least the second impurity layer having the mold, the thickness of the portion in contact with the electrode is smaller than the thickness of the portion in contact with the electrode. As a result, at least one of electrons and holes photoexcited in the semiconductor substrate has a low series resistance when reaching the electrode, and does not contact the electrode in at least one of the first and second amorphous films. The portion has a high passivation effect on the semiconductor substrate and suppresses recombination of carriers (electrons and holes).

  Therefore, the fill factor and open circuit voltage of the photoelectric conversion element can be improved.

  Moreover, the manufacturing method of the photoelectric conversion element by embodiment of this invention manufactures the photoelectric conversion element mentioned above.

  Therefore, the fill factor and open circuit voltage of the photoelectric conversion element can be improved by using the method for manufacturing the photoelectric conversion element according to the embodiment of the present invention.

It is sectional drawing which shows the structure of the photoelectric conversion element by Embodiment 1 of this invention. It is an enlarged view of the amorphous film shown in FIG. It is a 1st process drawing which shows the manufacturing method of the photoelectric conversion element shown in FIG. It is a 2nd process figure which shows the manufacturing method of the photoelectric conversion element shown in FIG. FIG. 4 is a third process diagram illustrating a method for manufacturing the photoelectric conversion element illustrated in FIG. 1. 6 is a cross-sectional view illustrating a configuration of a photoelectric conversion element according to Embodiment 2. FIG. FIG. 7 is an enlarged view of the amorphous film shown in FIG. 6. It is process drawing which shows a part of manufacturing process of the photoelectric conversion element shown in FIG. 7 is a cross-sectional view illustrating a configuration of a photoelectric conversion element according to Embodiment 3. FIG. FIG. 10 is an enlarged view of the amorphous film shown in FIG. 9. It is process drawing which shows a part of manufacturing process of the photoelectric conversion element shown in FIG.

  Embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated.

  In this specification, the “amorphous phase” refers to a state in which silicon (Si) atoms and the like are randomly arranged. Moreover, although amorphous silicon is described as “a-Si”, this notation actually means that hydrogen (H) atoms are included. Amorphous silicon carbide (a-SiC), amorphous silicon oxide (a-SiO), amorphous silicon nitride (a-SiN), amorphous silicon carbon nitride (a-SiCN), amorphous silicon germanium (a-SiGe) and amorphous germanium Similarly, (a-Ge) means that an H atom is contained.

[Embodiment 1]
1 is a cross-sectional view showing a configuration of a photoelectric conversion element according to Embodiment 1 of the present invention. Referring to FIG. 1, a photoelectric conversion element 100 according to Embodiment 1 of the present invention includes an n-type single crystal silicon substrate 1, a passivation film 2, and amorphous films 11 to 1m (m is an integer of 2 or more). And amorphous films 21-2m-1 and electrodes 31-3m, 41-4m-1.

  The n-type single crystal silicon substrate 1 has, for example, a (100) plane orientation and a specific resistance of 0.1 to 1.0 Ω · cm. The n-type single crystal silicon substrate 1 has a thickness of 100 to 300 μm, for example, and preferably has a thickness of 100 to 200 μm.

The passivation film 2 is made of, for example, silicon dioxide (SiO ₂ ), and is provided in contact with the light incident side surface of the n-type single crystal silicon substrate 1. And the passivation film 2 has a film thickness of 100 nm, for example.

  Each of the amorphous films 11 to 1m is made of an amorphous phase, and is provided in contact with the surface of the n-type single crystal silicon substrate 1 opposite to the light incident side. The amorphous films 11 to 1m are arranged at a desired interval in the in-plane direction of the n-type single crystal silicon substrate 1.

  The amorphous films 21 to 2m-1 are made of an amorphous phase. The amorphous film 21 is disposed in contact with the amorphous films 11 and 12 and the n-type single crystal silicon substrate 1, and the amorphous film 22 is formed of the amorphous films 12 and 13 and the n-type single crystal silicon. The amorphous film 2m-1 is arranged in contact with the substrate 1, and the amorphous film 2m-1 is arranged in contact with the amorphous films 1m-1, 1m and the n-type single crystal silicon substrate 1 in the same manner.

  The electrodes 31 to 3m are provided in contact with the amorphous films 11 to 1m, respectively. The electrodes 41 to 4m−1 are provided in contact with the amorphous films 21 to 2m−1, respectively. And each of the electrodes 31-3m and 41-4m-1 consists of silver (Ag), for example.

  FIG. 2 is an enlarged view of the amorphous films 11 and 21 shown in FIG. Referring to FIG. 2, amorphous film 11 is made of either amorphous film 11A or 11B, and amorphous film 21 is made of any of amorphous films 21A and 21B. Then, there are four combinations of the amorphous films 11A and 11B and the amorphous films 21A and 21B, as shown in FIGS.

  The amorphous film 11 </ b> A includes a non-doped layer 101 and a p-type impurity layer 102. Non-doped layer 101 is arranged in contact with the back surface of n-type single crystal silicon substrate 1 (= the surface opposite to the surface on which passivation film 2 is formed). The p-type impurity layer 102 is disposed in contact with the non-doped layer 101. The p-type impurity layer 102 has a recess 104 on the side opposite to the non-doped layer 101 side.

The non-doped layer 101 has an i-type conductivity, is made of, for example, i-type a-Si, and has a film thickness of, for example, 5 to 10 nm. The p-type impurity layer 102 has a p-type conductivity, is made of, for example, p-type a-Si, and includes, for example, boron (B) of 5 × 10 ¹⁹ cm ⁻³ . The electrode 31 is formed in the recess 104. The p-type impurity layer 102 has a thickness of, for example, 5 to 10 nm at a portion in contact with the electrode 31, and has a thickness of, for example, 30 to 35 nm at a portion that does not contact the electrode 31. Therefore, the amorphous film 11A as a whole has a film thickness of 10 to 20 nm in a portion in contact with the electrode 31 and a film thickness of 35 to 45 nm in a portion not in contact with the electrode 31. As described above, the amorphous film 11 </ b> A has a structure in which the thickness of the portion in contact with the electrode 31 is thinner than the thickness of the portion not in contact with the electrode 31.

  The amorphous film 21 </ b> A includes a non-doped layer 201 and an n-type impurity layer 202. Non-doped layer 201 is arranged in contact with the back surface of n-type single crystal silicon substrate 1 (= the surface opposite to the surface on which passivation film 2 is formed). N-type impurity layer 202 is disposed in contact with non-doped layer 201. The n-type impurity layer 202 has a recess 204 on the side opposite to the non-doped layer 201 side.

The non-doped layer 201 has an i-type conductivity, is made of, for example, i-type a-Si, and has a film thickness of, for example, 5 to 10 nm. The n-type impurity layer 202 has an n-type conductivity type, and is made of, for example, n-type a-Si and includes, for example, phosphorus (P) of 5 × 10 ¹⁹ cm ⁻³ . The electrode 41 is formed in the recess 204. The n-type impurity layer 202 has a thickness of, for example, 5 to 10 nm at a portion in contact with the electrode 41, and has a thickness of, for example, 30 to 35 nm at a portion that does not contact the electrode 41. Therefore, the amorphous film 21A as a whole has a thickness of 10 to 20 nm in a portion in contact with the electrode 41 and a thickness of 35 to 45 nm in a portion not in contact with the electrode 41. As described above, the amorphous film 21 </ b> A has a structure in which the thickness of the portion in contact with the electrode 41 is thinner than the thickness of the portion not in contact with the electrode 41.

The amorphous film 11B is made of a p-type impurity layer 103. The p-type impurity layer 103 is disposed in contact with the back surface of the n-type single crystal silicon substrate 1 (= the surface opposite to the surface on which the passivation film 2 is formed). The p-type impurity layer 103 has a recess 104 on the side opposite to the surface in contact with the back surface of the n-type single crystal silicon substrate 1. Further, the p-type impurity layer 103 is made of, for example, p-type a-Si, and includes B of, for example, 5 × 10 ¹⁹ cm ⁻³ . Further, the p-type impurity layer 103 has a thickness of 10 to 20 nm at a portion in contact with the electrode 31 and has a thickness of 35 to 45 nm at a portion not in contact with the electrode 31. As described above, the amorphous film 11B (= p-type amorphous film 103) has a structure in which the thickness of the portion in contact with the electrode 31 is smaller than the thickness of the portion not in contact with the electrode 31.

The amorphous film 21B is made of an n-type impurity layer 203. N-type impurity layer 203 is disposed in contact with the back surface of n-type single crystal silicon substrate 1 (= the surface opposite to the surface on which passivation film 2 is formed). The n-type impurity layer 203 has a recess 204 on the side opposite to the surface in contact with the back surface of the n-type single crystal silicon substrate 1. The n-type impurity layer 203 is made of, for example, n-type a-Si, and includes, for example, P of 5 × 10 ¹⁹ cm ⁻³ . Further, the n-type impurity layer 203 has a thickness of 10 to 20 nm at a portion in contact with the electrode 41 and has a thickness of 35 to 45 nm at a portion not in contact with the electrode 41. As described above, the amorphous film 21 </ b> B (= n-type impurity layer 203) has a structure in which the thickness of the portion in contact with the electrode 41 is thinner than the thickness of the portion not in contact with the electrode 41.

  Thus, the amorphous film 11A is made of i-type a-Si / p-type a-Si, and the amorphous film 11B is made of p-type a-Si. The amorphous film 21A is made of i-type a-Si / n-type a-Si, and the amorphous film 21B is made of n-type a-Si.

  Each of the amorphous films 12 to 1m shown in FIG. 1 is also composed of any of the amorphous films 11A and 11B shown in FIG. 2, and each of the amorphous films 22 to 2m-1 shown in FIG. These are made of either of the amorphous films 21A and 21B shown in FIG.

  Each of the amorphous films 11 to 1m is made of any of the amorphous films 11A and 11B shown in FIG. 2, and each of the amorphous films 21 to 2m-1 is made of the amorphous films 21A and 21B shown in FIG. Each of the electrodes 31 to 3m is provided in contact with the p-type impurity layer 102 (or the p-type impurity layer 103), and each of the electrodes 41 to 4m−1 includes the n-type impurity layer 202 ( Alternatively, it is provided in contact with the n-type impurity layer 203).

  As described above, each of the amorphous films 11 to 1m includes the amorphous film 11A (= non-doped layer 101 / p-type impurity layer 102) or the amorphous film 11B (= p-type impurity layer 103). . Each of the amorphous films 21 to 2m−1 includes the amorphous film 21A (= non-doped layer 201 / n-type impurity layer 202) or the amorphous film 21B (= n-type impurity layer 203). Accordingly, each of the amorphous films 11 to 1m is an amorphous film including at least a p-type impurity layer, and each of the amorphous films 21 to 2m−1 is an amorphous film including at least an n-type impurity layer. It is a membrane.

  Referring again to FIG. 1, the amorphous films 11 to 1m and the amorphous films 21 to 2m-1 have the same length in the direction perpendicular to the paper surface of FIG. The area occupancy ratio, which is the ratio of the total area of the amorphous films 11 to 1 m including at least the p-type impurity layer to the area of the n-type single crystal silicon substrate 1, is 60 to 93%, and is at least n-type. The area occupation ratio, which is the ratio of the total area of the amorphous films 21 to 2m−1 including the impurity layer to the area of the n-type single crystal silicon substrate 1, is 5 to 20%.

  As described above, the area occupation ratio of the amorphous films 11 to 1m including at least the p-type impurity layer is larger than the area occupation ratio of the amorphous films 21 to 2m−1 including at least the n-type impurity layer. Electrons and holes photoexcited in the n-type single crystal silicon substrate 1 are easily separated by a pn junction (amorphous films 11 to 1 m / n type single crystal silicon substrate 1 including at least a p-type impurity layer) and photoexcited. This is to increase the contribution rate of generated electrons and holes to power generation.

  In the following description, an example in which each of the amorphous films 11 to 1m is made of an amorphous film 11A and each of the amorphous films 21 to 2m-1 is made of an amorphous film 21A will be described. .

  3 to 5 are first to third process diagrams showing a method for manufacturing the photoelectric conversion element 100 shown in FIG. 1, respectively.

  A method for manufacturing the photoelectric conversion element 100 will be described. The photoelectric conversion element 100 is manufactured by a plasma CVD method mainly using a plasma apparatus.

  The plasma apparatus includes a preparation chamber, reaction chambers CB1 to CB3, an extraction chamber, a matching unit, and an RF power source. The charging chamber, the reaction chambers CB1 to CB3, and the take-out chamber are arranged in series. A partition valve is used to partition between the charging chamber and the reaction chamber CB1, between the reaction chamber CB1 and the reaction chamber CB2, between the reaction chamber CB2 and the reaction chamber CB3, and between the reaction chamber CB3 and the take-out chamber. It has been. Further, the plasma apparatus is provided with a transport mechanism for sequentially transporting the single crystal silicon substrate from the preparation chamber to the reaction chamber CB1, the reaction chamber CB2, the reaction chamber CB3, and the take-out chamber.

The charging chamber includes a heating mechanism and an exhaust mechanism. The heating mechanism raises the temperature of the single crystal silicon substrate to a predetermined temperature. The exhaust mechanism exhausts the gas in the preparation chamber, and sets the ultimate pressure in the preparation chamber to, for example, 1 × 10 ⁻⁵ Pa or less.

Each of the reaction chambers CB1 to CB3 includes a parallel plate electrode, a heating mechanism, and an exhaust mechanism. The heating mechanism raises the temperature of the single crystal silicon substrate to a predetermined temperature. The exhaust mechanism exhausts the gases in the reaction chambers CB1 to CB3, and sets the ultimate pressure in the reaction chambers CB1 to CB3 to, for example, 1 × 10 ⁻⁵ Pa or less. The parallel plate electrodes are connected to an RF power source through a matching unit. The reaction chamber CB1 is a reaction chamber for depositing i-type a-Si, the reaction chamber CB2 is a reaction chamber for depositing p-type a-Si, and the reaction chamber CB3 is an n-type a-a. A reaction chamber for depositing Si.

The take-out chamber includes an exhaust mechanism. The exhaust mechanism exhausts the gas in the extraction chamber and sets the ultimate pressure in the extraction chamber to, for example, 1 × 10 ⁻⁵ Pa or less.

  Each exhaust mechanism of the charging chamber, the reaction chambers CB1 to CB3, and the take-out chamber includes a turbo molecular pump, a mechanical booster pump, and a rotary pump. The turbo molecular pump, the mechanical booster pump and the rotary pump are serially connected to the charging chamber, the reaction chambers CB1 to CB3 and the extraction chamber, respectively, so that the turbo molecular pump is closest to the charging chamber, the reaction chambers CB1 to CB3 and the extraction chamber. It is connected to. Each exhaust mechanism exhausts the gas in the charging chamber, reaction chambers CB1 to CB3, and the extraction chamber with a turbo molecular pump, a mechanical booster pump, and a rotary pump, respectively, or is charged with a mechanical booster pump and a rotary pump, respectively. The gases in the chamber, reaction chambers CB1 to CB3 and the extraction chamber are exhausted.

  The RF power source applies, for example, RF power of 13.56 MHz to the parallel plate electrodes of the reaction chambers CB1 to CB3 via the matching unit.

  When the manufacture of the photoelectric conversion element 100 is started, the n-type single crystal silicon substrate 1 is ultrasonically cleaned with ethanol or the like and degreased, and then the n-type single crystal silicon substrate 1 is immersed in hydrofluoric acid to be n-type. The natural oxide film formed on the surface of the single crystal silicon substrate 1 is removed, and the surface of the n-type single crystal silicon substrate 1 is terminated with hydrogen (see step (a) in FIG. 3).

When the cleaning of the n-type single crystal silicon substrate 1 is completed, the n-type single crystal silicon substrate 1 is put in an oxidation furnace, and the n-type single crystal silicon substrate 1 is thermally oxidized at a temperature of 1000 ° C. in an oxygen atmosphere. In this case, the oxidation time is, for example, 30 minutes. Then, the SiO ₂ formed on one surface and the end surface of the n-type single-crystalline silicon substrate 1 is removed by hydrofluoric acid to form a passivation film 2 made of SiO ₂ on one surface of the n-type single-crystalline silicon substrate 1 (See step (b) in FIG. 3).

  Then, the n-type single crystal silicon substrate 1 / passivation film 2 is disposed on the substrate holder in the preparation chamber of the plasma apparatus.

After that, the evacuation mechanism in the preparation chamber exhausts the gas in the preparation chamber to 1 × 10 ⁻⁵ Pa or less, and the heating mechanism in the preparation chamber sets the temperature of the n-type single crystal silicon substrate 1 / passivation film 2 to 200 ° C. Heat the substrate holder so that it does. Further, the heating mechanism of the reaction chambers CB1 to CB3 also heats the substrate holder so that the temperature of the n-type single crystal silicon substrate 1 / passivation film 2 is set to 200.degree.

  When the temperature of the n-type single crystal silicon substrate 1 / passivation film 2 reaches 200 ° C., the partition valve between the charging chamber and the reaction chamber CB1 is opened, and the n-type single crystal silicon substrate 1 / passivation film 2 is charged It is conveyed from the chamber to the reaction chamber CB1.

  Table 1 shows the flow rates of the material gases when forming the non-doped layers 101 and 201, the p-type impurity layers 102 and 103, and the n-type impurity layers 202 and 203.

When the n-type single crystal silicon substrate 1 / passivation film 2 is transferred to the reaction chamber CB1, 10 sccm of silane (SiH ₄ ) gas and 100 sccm of hydrogen (H ₂ ) gas are allowed to flow into the reaction chamber CB1, and the reaction chamber CB1. Is set to a range of 13.3 Pa to 665 Pa. The RF power source applies RF power in the range of 16 to 80 mW / cm ² to the parallel plate electrodes through the matching unit. As a result, plasma is generated in the reaction chamber CB1, and a non-doped layer made of i-type a-Si is deposited on the surface of the n-type single crystal silicon substrate 1 (= the surface opposite to the surface on which the passivation film 2 is formed). Is done.

When the film thickness of the non-doped layer becomes 5 to 10 nm, the application of RF power to the parallel plate electrode of the reaction chamber CB1 is stopped, and the supply of SiH ₄ gas and H ₂ gas to the reaction chamber CB1 is stopped, and the exhaust mechanism To evacuate the reaction chamber CB1 to 1 × 10 ⁻⁵ Pa or less. Then, the partition valve is opened, and the non-doped layer / n-type single crystal silicon substrate 1 / passivation film 2 is transferred from the reaction chamber CB1 to the reaction chamber CB2.

Thereafter, 2 sccm of SiH ₄ gas, 42 sccm of H ₂ gas, and 12 sccm of diborane (B ₂ H ₆ ) gas diluted with hydrogen are flowed into the reaction chamber CB2, and the pressure in the reaction chamber CB2 is set to 13.3 Pa to 665 Pa. Set to range. The RF power source applies RF power in the range of 16 to 80 mW / cm ² to the parallel plate electrodes through the matching unit. The concentration of B ₂ H ₆ gas diluted with hydrogen is 0.1%.

  As a result, plasma is generated in the reaction chamber CB2, and a p-type impurity layer made of p-type a-Si is deposited on the non-doped layer. As a result, an amorphous film 20 for the amorphous films 11 to 1m is formed on the back surface of the n-type single crystal silicon substrate 1 (= the surface opposite to the surface on which the passivation film 2 is formed) (FIG. 3). Step (c)).

When the thickness of the p-type impurity layer reaches 30 to 35 nm, the application of RF power to the parallel plate electrodes in the reaction chamber CB2 is stopped and the reaction chamber CB2 for SiH ₄ gas, H ₂ gas, and B ₂ H ₆ gas enters the reaction chamber CB2. And the reaction chamber CB2 is evacuated to 1 × 10 ⁻⁵ Pa or less by an exhaust mechanism. Then, the gate valve is opened, and the amorphous film 20 / n-type single crystal silicon substrate 1 / passivation film 2 is transferred from the reaction chamber CB2 to the take-out chamber, and the amorphous film 20 / n-type single crystal silicon substrate 1 / passivation is carried out. The membrane 2 is cooled to room temperature and then removed.

  Then, a resist is applied to the entire surface of the amorphous film 20 of the extracted amorphous film 20 / n-type single crystal silicon substrate 1 / passivation film 2, and the applied resist is patterned by photolithography to form a resist pattern 30. (See step (d) in FIG. 3).

  Thereafter, the amorphous film 20 is etched by dry etching or wet etching using the resist pattern 30 as a mask to form amorphous films 51 to 5m (see step (e) in FIG. 3).

  Thereafter, the amorphous film 51 to 5 m / n type single crystal silicon substrate 1 / the amorphous film 51 to 5 m side of the passivation film 2 is washed with hydrofluoric acid to obtain an amorphous film 51 to 5 m / n type single crystal silicon. The substrate 1 / passivation film 2 is placed on the substrate holder in the preparation chamber of the plasma apparatus.

And the exhaust mechanism of the preparation chamber exhausts the gas in the preparation chamber to 1 × 10 ⁻⁵ Pa or less, and the heating mechanism of the preparation chamber is the amorphous film 51-5 m / n type single crystal silicon substrate 1 / passivation film. The substrate holder is heated so that the temperature of 2 is set to 200 ° C.

  When the temperature of the amorphous film 51 to 5 m / n type single crystal silicon substrate 1 / passivation film 2 reaches 200 ° C., the amorphous film 51 to 5 m / n type single crystal silicon substrate 1 / passivation film 2 is loaded. To the reaction chamber CB1.

When the amorphous film 51 to 5 m / n type single crystal silicon substrate 1 / passivation film 2 is transferred to the reaction chamber CB1, 10 sccm of SiH ₄ gas and 100 sccm of H ₂ gas are flowed into the reaction chamber CB1 (Table 1), the pressure in the reaction chamber CB1 is set in the range of 13.3 Pa to 665 Pa. The RF power source applies RF power in the range of 16 to 80 mW / cm ² to the parallel plate electrodes through the matching unit. Thereby, plasma is generated in the reaction chamber CB1, and a non-doped layer made of i-type a-Si is deposited on the surfaces of the amorphous films 51 to 5m and the n-type single crystal silicon substrate 1.

When the film thickness of the non-doped layer becomes 5 to 10 nm, the application of RF power to the parallel plate electrode of the reaction chamber CB1 is stopped, and the supply of SiH ₄ gas and H ₂ gas to the reaction chamber CB1 is stopped, and the exhaust mechanism To evacuate the reaction chamber CB1 to 1 × 10 ⁻⁵ Pa or less. Then, the gate valve is opened, and the non-doped layer / amorphous film 51 to 5 m / n type single crystal silicon substrate 1 / passivation film 2 is transferred from the reaction chamber CB1 to the reaction chamber CB3.

When the non-doped layer / amorphous film 51 to 5 m / n type single crystal silicon substrate 1 / passivation film 2 was transferred to reaction chamber CB3, it was diluted with 20 sccm of SiH ₄ gas, 150 sccm of H ₂ gas, and hydrogen. 50 sccm of phosphine (PH ₃ ) gas is allowed to flow into the reaction chamber CB3 (see Table 1), and the pressure in the reaction chamber CB3 is set in the range of 13.3 Pa to 665 Pa. The RF power source applies RF power in the range of 16 to 80 mW / cm ² to the parallel plate electrodes through the matching unit. The concentration of PH ₃ gas diluted with hydrogen is 0.2%.

  As a result, plasma is generated in the reaction chamber CB3, and an n-type impurity layer made of n-type a-Si is deposited on the non-doped layer. As a result, an amorphous film 40 for the amorphous films 21-2m-1 is formed on the amorphous films 51-5m and the n-type single crystal silicon substrate 1 (see step (f) in FIG. 4). .

When the thickness of the n-type impurity layer reaches 30 to 35 nm, the application of RF power to the parallel plate electrodes in the reaction chamber CB3 is stopped and the supply of SiH ₄ gas, H ₂ gas, and PH ₃ gas to the reaction chamber CB3 is stopped. And the reaction chamber CB3 is evacuated to 1 × 10 ⁻⁵ Pa or less by an exhaust mechanism. Then, the partition valve is opened, and the amorphous film 40 / amorphous film 51 to 5 m / n type single crystal silicon substrate 1 / passivation film 2 is transferred from the reaction chamber CB3 to the take-out chamber. Then, the amorphous film 40 / amorphous film 51 to 5m / n type single crystal silicon substrate 1 / passivation film 2 is cooled to room temperature and taken out from the take-out chamber.

  Thereafter, a resist is applied on the amorphous film 40 / amorphous film 51 to 5m / n type single crystal silicon substrate 1 / amorphous film 40 of the passivation film 2, and the applied resist is patterned by photolithography. Thus, a resist pattern 50 is formed (see step (g) in FIG. 4).

  Then, the amorphous film 40 is etched by dry etching or wet etching using the resist pattern 50 as a mask to form amorphous films 61 to 6m−1 (see step (h) in FIG. 4).

  Thereafter, a resist is applied on the amorphous films 51-5m and 61-6m-1 of the amorphous films 61-6m-1 / amorphous films 51-5m / n type single crystal silicon substrate 1 / passivation film 2. Then, the applied resist is patterned by photolithography to form a resist pattern 60 (see step (i) in FIG. 4).

  Then, using the resist pattern 60 as a mask, the amorphous films 51 to 5m and 61 to 6m-1 are etched by dry etching or wet etching to form amorphous films 11 to 1m and 21 to 2m-1 (FIG. 5). Step (j)).

  Subsequently, Ag is vapor-deposited on the amorphous films 11 to 1m and 21 to 2m-1, and the deposited Ag is patterned by photolithography and etching to form electrodes 31 to 3m and 41 to 4m-1. . Thereby, the photoelectric conversion element 100 is completed (see step (k) in FIG. 5).

  In the photoelectric conversion element 100, when sunlight is irradiated onto the photoelectric conversion element 100 from the passivation film 2 side, electrons and holes are photoexcited in the n-type single crystal silicon substrate 1.

  Even if the photoexcited electrons and holes diffuse to the passivation film 2 side, they are not easily recombined due to the passivation effect of the n-type single crystal silicon substrate 1 by the passivation film 2, and the amorphous films 11-1m, 21-2m Diffuses to -1 side.

  The electrons and holes diffused toward the amorphous films 11 to 1m and 21 to 2m-1 are (amorphous films 11 to 1m including the non-doped layer 101 and the p-type impurity layer 102) / n-type single crystal. The holes are separated by an internal electric field by the silicon substrate 1 (= pin junction), and the holes reach the electrodes 31 to 3m via the amorphous films 11 to 1m (= non-doped layer 101 / p-type impurity layer 102), and electrons Reaches the electrodes 41-4m-1 through the amorphous films 21-2m-1 (= non-doped layer 201 / n-type impurity layer 202).

  The electrons that have reached the electrodes 41 to 4m-1 reach the electrodes 31 to 3m via a load connected between the electrodes 31 to 3m and the electrodes 41 to 4m-1, and recombine with the holes.

  As described above, the photoelectric conversion element 100 converts the electrons and holes photoexcited in the n-type single crystal silicon substrate 1 into the back surface of the n-type single crystal silicon substrate 1 (= n-type single crystal silicon on which the passivation film 2 is formed). This is a back contact type photoelectric conversion element taken out from the surface opposite to the surface of the substrate 1.

  In the photoelectric conversion element 100, in the amorphous films 11 to 1m including the p-type impurity layer 102, the thickness of the portion in contact with the electrodes 31 to 3m is larger than the thickness of the portion not in contact with the electrodes 31 to 3m, respectively. Is also thin. Further, in the amorphous films 21 to 2m-1 including the n-type impurity layer 202, the thickness of the portion in contact with the electrodes 41 to 4m-1 is larger than the thickness of the portion not in contact with the electrodes 41 to 4m-1. thin. As a result, the series resistance when holes reach the electrodes 31 to 3 m from the n-type single crystal silicon substrate 1 through the amorphous films 11 to 1 m is reduced, and electrons are transferred from the n-type single crystal silicon substrate 1. The series resistance when reaching the electrodes 41 to 4m-1 through the amorphous films 21 to 2m-1 is lowered. The portions of the amorphous films 11 to 1m where the electrodes 31 to 3m are not formed and the portions of the amorphous films 21 to 2m-1 where the electrodes 41 to 4m-1 are not formed are about 40 nm. Because of the thickness, the passivation effect on the back surface of the n-type single crystal silicon substrate 1 is high, and the recombination of carriers (electrons and holes) on the back surface of the n-type single crystal silicon substrate 1 is suppressed.

  Therefore, the fill factor FF and the open circuit voltage Voc of the photoelectric conversion element 100 can be improved.

  In the above description, the case where the amorphous films 11 to 1m are made of the amorphous film 11A and the amorphous films 21 to 2m-1 are made of the amorphous film 21A (see FIG. 2A) has been described. However, the amorphous films 11 to 1m may be made of the amorphous film 11B, and the amorphous films 21 to 2m-1 may be made of the amorphous film 21A (see FIG. 2B). In this case, in step (c) of FIG. 3, the p-type a-Si for the p-type impurity layer 103 is formed on the back surface (passivation layer 2 is formed using the gas flow rate shown in Table 1 of the n-type single crystal silicon substrate 1. On the opposite side of the surface).

  As a result, even when the amorphous films 11 to 1m are made of the amorphous film 11B, the film thickness of the portion in contact with the electrodes 31 to 3m in the amorphous film 11 to 1m is not in contact with the electrodes 31 to 3m. Thinner than film thickness. Therefore, even when the amorphous films 11 to 1m are made of the amorphous film 11B and the amorphous films 21 to 2m-1 are made of the amorphous film 21A, as described above, the photoelectric conversion element 100 is opened. The voltage Voc and the fill factor FF can be improved.

  Further, the amorphous films 11 to 1m may be made of an amorphous film 11A, and the amorphous films 21 to 2m-1 may be made of an amorphous film 21B (see FIG. 2C). In this case, in the step (f) of FIG. 4, the n-type a-Si for the n-type impurity layer 203 is formed on the n-type single crystal silicon substrate 1 and the amorphous films 51 to 5m using the gas flow rate shown in Table 1. It is deposited on.

  As a result, even when the amorphous films 21 to 2m-1 are made of the amorphous film 21B, the film thickness of the portion in contact with the electrodes 41 to 4m-1 in the amorphous films 21 to 2m-1 It is thinner than the thickness of the part that does not contact 4m-1. Therefore, even when the amorphous films 11 to 1m are made of the amorphous film 11A and the amorphous films 21 to 2m-1 are made of the amorphous film 21B, the photoelectric conversion element 100 is open as described above. The voltage Voc and the fill factor FF can be improved.

  Furthermore, the amorphous films 11 to 1m may be made of the amorphous film 11B, and the amorphous films 21 to 2m-1 may be made of the amorphous film 21B (see FIG. 2D). In this case, in step (c) of FIG. 3, the p-type a-Si for the p-type impurity layer 103 is formed on the back surface (passivation layer 2 is formed using the gas flow rate shown in Table 1 of the n-type single crystal silicon substrate 1. On the opposite side of the surface). 4, n-type a-Si for the n-type impurity layer 203 is formed on the n-type single crystal silicon substrate 1 and the amorphous films 51 to 5 m using the gas flow rates shown in Table 1. Is deposited.

  As a result, even when the amorphous films 11 to 1m are made of the amorphous film 11B and the amorphous films 21 to 2m-1 are made of the amorphous film 21B, the electrodes 31 in the amorphous films 11 to 1m The film thickness of the part in contact with 3m is thinner than the film thickness of the part not in contact with the electrodes 31 to 3m, and the film thickness of the part in contact with the electrodes 41 to 4m-1 in the amorphous films 21 to 2m-1 is the electrode 41. It is thinner than the film thickness of the part which does not contact -4m-1. Therefore, even when the amorphous films 11 to 1m are made of the amorphous film 11B and the amorphous films 21 to 2m-1 are made of the amorphous film 21B, the photoelectric conversion element 100 is opened as described above. The voltage Voc and the fill factor FF can be improved.

  In the above description, it has been described that the non-doped layer 101 constituting the amorphous films 11 to 1m is made of i-type a-Si. However, in Embodiment 1, the non-doped layer 101 is not limited to this. It may consist of any one of type a-SiC, i-type a-SiO, i-type a-SiN, i-type a-SiCN, and i-type a-SiGe.

  Further, it has been described that each of the p-type impurity layers 102 and 103 constituting the amorphous films 11 to 1m is made of p-type a-Si. However, in the first embodiment, the p-type impurity layer is not limited thereto. Each of 102 and 103 may be composed of any one of p-type a-SiC, p-type a-SiO, p-type a-SiN, p-type a-SiCN, p-type a-SiGe, and p-type a-Ge. Good.

  Furthermore, although it has been described that the non-doped layer 201 constituting the amorphous films 21 to 2m-1 is made of i-type a-Si, in Embodiment 1, the present invention is not limited to this, and the non-doped layer 201 is made of i-type a-a. -SiC, i-type a-SiO, i-type a-SiN, i-type a-SiCN, and i-type a-SiGe may be included.

  Further, it has been described that each of the n-type impurity layers 202 and 203 constituting the amorphous films 21 to 2m-1 is made of n-type a-Si. However, the first embodiment is not limited to this, and the n-type impurity layers 202 and 203 are not limited to this. Each of the impurity layers 202 and 203 is made of any of n-type a-SiC, n-type a-SiO, n-type a-SiN, n-type a-SiCN, n-type a-SiGe, and n-type a-Ge. May be.

  That is, in the photoelectric conversion element 100, the p-type impurity layers 102 and 103, the n-type impurity layers 202 and 203, and the non-doped layers 101 and 201 may each be made of any of the materials shown in Table 2.

In this case, the p-type a-SiC is formed by the above-described plasma CVD method using SiH ₄ gas, methane (CH ₄ ) gas, B ₂ H ₆ gas, and H ₂ gas as material gases. The p-type a-SiO is formed by the above-described plasma CVD method using SiH ₄ gas, oxygen (O ₂ ) gas, B ₂ H ₆ gas and H ₂ gas as material gases. The p-type a-SiN is formed by the above-described plasma CVD method using SiH ₄ gas, ammonia (NH ₃ ) gas, B ₂ H ₆ gas and H ₂ gas as material gases. The p-type a-SiCN is formed by the above-described plasma CVD method using SiH ₄ gas, CH ₄ gas, NH ₃ gas, B ₂ H ₆ gas and H ₂ gas as material gases. The p-type a-SiGe is formed by the above-described plasma CVD method using SiH ₄ gas, germane (GeH ₄ ) gas, B ₂ H ₆ gas and H ₂ gas as material gases. The p-type a-Ge is formed by the above-described plasma CVD method using GeH ₄ gas, B ₂ H ₆ gas, and H ₂ gas as material gases.

The n-type a-SiC is formed by the above-described plasma CVD method using SiH ₄ gas, CH ₄ gas, PH ₃ gas, and H ₂ gas as material gases. The n-type a-SiO is formed by the above-described plasma CVD method using SiH ₄ gas, O ₂ gas, PH ₃ gas, and H ₂ gas as material gases. The n-type a-SiN is formed by the above-described plasma CVD method using SiH ₄ gas, NH ₃ gas, PH ₃ gas, and H ₂ gas as material gases. The n-type a-SiCN is formed by the above-described plasma CVD method using SiH ₄ gas, CH ₄ gas, NH ₃ gas, PH ₃ gas, and H ₂ gas as material gases. The n-type a-SiGe is formed by the above-described plasma CVD method using SiH ₄ gas, GeH ₄ gas, PH ₃ gas, and H ₂ gas as material gases. The n-type a-Ge is formed by the above-described plasma CVD method using GeH ₄ gas, PH ₃ gas, and H ₂ gas as material gases.

Furthermore, i-type a-SiC is formed by the above-described plasma CVD method using SiH ₄ gas, CH ₄ gas, and H ₂ gas as material gases. i-type a-SiO is formed by the above-described plasma CVD method using SiH ₄ gas, O ₂ gas, and H ₂ gas as material gases. i-type a-SiN is formed by the above-described plasma CVD method using SiH ₄ gas, NH ₃ gas, and H ₂ gas as material gases. The i-type a-SiCN is formed by the above-described plasma CVD method using SiH ₄ gas, CH ₄ gas, NH ₃ gas, and H ₂ gas as material gases. i-type a-SiGe is formed by the above-described plasma CVD method using SiH ₄ gas, GeH ₄ gas, and H ₂ gas as material gases.

  Note that i-type a-Ge is also assumed as the non-doped layers 101 and 201. However, since i-type a-Ge has a smaller optical band gap than the n-type single crystal silicon substrate 1, i-type a-Ge is used. When used as the non-doped layers 101 and 201, it is difficult to improve the open circuit voltage Voc. This is because, in the photoelectric conversion element 100, the optical band gaps of the non-doped layers 101 and 201 in the amorphous films 11 to 1m and 21 to 2m−1 dominately determine the open circuit voltage Voc.

  Therefore, in the first embodiment, i-type a-SiC, i-type a-SiO, i-type a-SiN, and i-type a- having an optical band gap larger than the optical band gap of the n-type single crystal silicon substrate 1. SiCN, i-type a-Si, and i-type a-SiGe are used as the non-doped layers 101 and 201.

  Moreover, in the photoelectric conversion element 100, the film thickness of the part of the amorphous films 11 to 1m in contact with the electrodes 31 to 3m is the film of the part of the amorphous films 21 to 2m-1 in contact with the electrodes 41 to 4m-1. It may be the same as the thickness or different.

  Furthermore, in the photoelectric conversion element 100, the film thickness of the non-doped layer 101 may be the same as or different from the film thickness of the non-doped layer 201.

  Further, in the photoelectric conversion element 100, the B concentration in the p-type impurity layers 102 and 103 may be the same as or different from the P concentration in the n-type impurity layers 202 and 203.

  Furthermore, in the photoelectric conversion element 100, the surface on the passivation film 2 side of the n-type single crystal silicon substrate 1 may be textured.

[Embodiment 2]
FIG. 6 is a cross-sectional view showing the configuration of the photoelectric conversion element according to the second embodiment. Referring to FIG. 6, in photoelectric conversion element 200 according to Embodiment 2, amorphous films 21 to 2m−1 of photoelectric conversion element 100 shown in FIG. 1 are replaced with amorphous films 121 to 12m−1, respectively. The others are the same as the photoelectric conversion element 100.

  The amorphous films 121 to 12m-1 are made of an amorphous phase. The amorphous film 121 is disposed in contact with the amorphous films 11 and 12 and the n-type single crystal silicon substrate 1, and the amorphous film 122 is formed of the amorphous films 12 and 13 and the n-type single crystal silicon. In the same manner, the amorphous film 12m-1 is disposed in contact with the amorphous films 1m-1, 1m and the n-type single crystal silicon substrate 1 in the following manner.

  In the photoelectric conversion element 200, the electrodes 41 to 4m−1 are disposed in contact with the amorphous films 121 to 12m−1, respectively.

  FIG. 7 is an enlarged view of the amorphous films 11 and 121 shown in FIG. Referring to FIG. 7, amorphous film 121 is made of either amorphous film 121A or 121B. Then, there are four combinations of the amorphous films 11A and 11B and the amorphous films 121A and 121B, as shown in FIGS.

  The amorphous film 121A includes a non-doped layer 1201 and an n-type impurity layer 1202. Non-doped layer 1201 is arranged in contact with the back surface of n-type single crystal silicon substrate 1 (= the surface opposite to the surface on which passivation film 2 is formed). N-type impurity layer 1202 is disposed in contact with non-doped layer 1201. The n-type impurity layer 1202 does not have the concave portion 204 on the side opposite to the surface in contact with the non-doped layer 1201.

The non-doped layer 1201 has an i-type conductivity, and is made of, for example, i-type a-Si, and has a film thickness of, for example, 5 to 10 nm. The n-type impurity layer 1202 has an n-type conductivity, is made of, for example, n-type a-Si, and includes, for example, P of 5 × 10 ¹⁹ cm ⁻³ . The electrode 41 is formed in contact with the surface of the n-type impurity layer 1202 opposite to the surface in contact with the non-doped layer 1201. And the n-type impurity layer 1202 has the same film thickness in the part which contacts the electrode 41, and the part which does not contact the electrode 41, The film thickness is 30-35 nm, for example. Therefore, the amorphous film 121A as a whole has the same film thickness in a portion in contact with the electrode 41 and a portion not in contact with the electrode 41, and the film thickness is 35 to 45 nm. Thus, the amorphous film 121 </ b> A has a structure in which the film thickness in the part in contact with the electrode 41 is the same as the film thickness in the part not in contact with the electrode 41.

The amorphous film 121B is made of an n-type impurity layer 1203. N-type impurity layer 1203 is disposed in contact with the back surface of n-type single crystal silicon substrate 1 (= the surface opposite to the surface on which passivation film 2 is formed). The n-type impurity layer 1203 does not have the recess 204 on the side opposite to the surface in contact with the back surface of the n-type single crystal silicon substrate 1. The n-type impurity layer 1203 is made of, for example, n-type a-Si, and includes, for example, P of 5 × 10 ¹⁹ cm ⁻³ . Further, the n-type impurity layer 1203 has a film thickness of 35 to 45 nm at a portion in contact with the electrode 41 and a portion not in contact with the electrode 41. Therefore, the amorphous film 121 </ b> B (= n-type impurity layer 1203) has a structure in which the thickness of the portion in contact with the electrode 41 is the same as the thickness of the portion not in contact with the electrode 41.

  Thus, the amorphous film 121A is made of i-type a-Si / n-type a-Si, and the amorphous film 121B is made of n-type a-Si.

  Each of the amorphous films 122 to 12m−1 shown in FIG. 6 is also made of any of the amorphous films 121A and 121B shown in FIG.

  Each of the amorphous films 11 to 1m is made of any of the amorphous films 11A and 11B shown in FIG. 7, and each of the amorphous films 121 to 12m-1 is made of the amorphous films 121A and 121B shown in FIG. Each of the electrodes 31 to 3m is provided in contact with the p-type impurity layer 102 (or the p-type impurity layer 103), and each of the electrodes 41 to 4m-1 includes an n-type impurity layer 1202 ( Alternatively, it is provided in contact with the n-type impurity layer 1203).

  As described above, each of the amorphous films 121 to 12m−1 includes the amorphous film 121A (= non-doped layer 1201 / n-type impurity layer 1202) or the amorphous film 121B (= n-type impurity layer 1203). Consists of. Accordingly, each of the amorphous films 121 to 12m−1 is an amorphous film including at least an n-type impurity layer.

  Referring to FIG. 6 again, amorphous films 11-1m and amorphous films 121-12m-1 have the same length in the direction perpendicular to the paper surface of FIG. The area occupancy ratio, which is the ratio of the total area of the amorphous films 11 to 1 m including at least the p-type impurity layer to the area of the n-type single crystal silicon substrate 1, is 60 to 93%, and is at least n-type. The area occupation ratio, which is the ratio of the entire area of the amorphous films 121 to 12m−1 including the impurity layer to the area of the n-type single crystal silicon substrate 1, is 5 to 20%.

  As described above, the area occupation ratio of the amorphous films 11 to 1m including at least the p-type impurity layer is larger than the area occupation ratio of the amorphous films 121 to 12m−1 including at least the n-type impurity layer. Electrons and holes photoexcited in the n-type single crystal silicon substrate 1 are easily separated by a pn junction (amorphous films 11 to 1 m / n type single crystal silicon substrate 1 including at least a p-type impurity layer) and photoexcited. This is to increase the contribution rate of generated electrons and holes to power generation.

  Hereinafter, the case where the amorphous films 11 to 1m are made of the amorphous film 11A and the amorphous films 121 to 12m-1 are made of the amorphous film 121A will be described.

  FIG. 8 is a process diagram showing a part of the manufacturing process of the photoelectric conversion element 200 shown in FIG. The photoelectric conversion element 200 includes steps (i), (j), and (k) in steps (a) to (k) shown in FIGS. ) And (k ′).

  When the manufacture of the photoelectric conversion element 200 is started, the above-described steps (a) to (h) are sequentially performed. Then, after the step (h), a resist is applied onto the amorphous films 51 to 5m−1 and 121 to 12m−1, and the applied resist is patterned by photolithography to form a resist pattern 70 ( Step (i ′) in FIG. 8).

  Thereafter, the amorphous films 51 to 5m are etched by dry etching or wet etching using the resist pattern 70 as a mask to form amorphous films 11 to 1m (see step (j ') in FIG. 8).

  Subsequently, Ag is deposited on the amorphous films 11 to 1m and 121 to 12m-1, and the deposited Ag is patterned by photolithography and etching to form electrodes 31 to 3m and 41 to 4m-1. . Thus, the photoelectric conversion element 200 is completed (see step (k ′) in FIG. 8).

  In the photoelectric conversion element 200, when sunlight is irradiated to the photoelectric conversion element 200 from the passivation film 2 side, electrons and holes are photoexcited in the n-type single crystal silicon substrate 1.

  Even if the photoexcited electrons and holes diffuse to the passivation film 2 side, they are not easily recombined due to the passivation effect of the n-type single crystal silicon substrate 1 by the passivation film 2, and the amorphous films 11-1m, 121-12m. Diffuses to -1 side.

  The electrons and holes diffused toward the amorphous films 11 to 1m and 121 to 12m-1 are (amorphous films 11 to 1m including the non-doped layer 101 and the p-type impurity layer 102) / n-type single crystal. The holes are separated by an internal electric field by the silicon substrate 1 (= pin junction), and the holes reach the electrodes 31 to 3m via the amorphous films 11 to 1m (= non-doped layer 101 / p-type impurity layer 102), and electrons Reaches the electrodes 41-4m-1 through the amorphous films 121-12m-1 (= non-doped layer 1201 / n-type impurity layer 1202).

  The electrons that have reached the electrodes 41 to 4m-1 reach the electrodes 31 to 3m via a load connected between the electrodes 31 to 3m and the electrodes 41 to 4m-1, and recombine with the holes.

  As described above, the photoelectric conversion element 200 converts the electrons and holes photoexcited in the n-type single crystal silicon substrate 1 into the back surface of the n-type single crystal silicon substrate 1 (= n-type single crystal silicon on which the passivation film 2 is formed). This is a back contact type photoelectric conversion element taken out from the surface opposite to the surface of the substrate 1.

  In the photoelectric conversion element 200, the amorphous films 121 to 12m-1 including the n-type impurity layer 1202 are the same in a portion in contact with the electrodes 41 to 4m-1 and a portion not in contact with the electrodes 41 to 4m-1. In the amorphous films 11 to 1m including the p-type impurity layer 102, the thickness of the portion in contact with the electrodes 31 to 3m is smaller than the thickness of the portion not in contact with the electrodes 31 to 3m. As a result, the series resistance when holes reach the electrodes 31 to 3m from the n-type single crystal silicon substrate 1 through the amorphous films 11 to 1m is lowered. Further, the portions of the amorphous films 11 to 1m that are not in contact with the electrodes 31 to 3m and the amorphous films 121 to 12m-1 have a film thickness of about 40 nm, and therefore the back surface of the n-type single crystal silicon substrate 1 The passivation effect is high, and recombination of carriers (electrons and holes) on the back surface of the n-type single crystal silicon substrate 1 is suppressed.

  Therefore, the fill factor FF and the open circuit voltage Voc of the photoelectric conversion element 200 can be improved.

  In the above description, the case where the amorphous films 11 to 1m are made of the amorphous film 11A and the amorphous films 121 to 12m-1 are made of the amorphous film 121A (see FIG. 7A) has been described. However, the amorphous films 11 to 1m may be made of the amorphous film 11B, and the amorphous films 121 to 12m-1 may be made of the amorphous film 121A (see FIG. 7B). In this case, in step (c) of FIG. 3, the p-type a-Si for the p-type impurity layer 103 is formed on the back surface (passivation layer 2 is formed using the gas flow rate shown in Table 1 of the n-type single crystal silicon substrate 1. On the opposite side of the surface).

  As a result, even when the amorphous films 11 to 1m are made of the amorphous film 11B, the film thickness of the portion in contact with the electrodes 31 to 3m in the amorphous film 11 to 1m is not in contact with the electrodes 31 to 3m. Thinner than film thickness. Therefore, even when the amorphous films 11 to 1m are made of the amorphous film 11B and the amorphous films 121 to 12m-1 are made of the amorphous film 121A, as described above, the open-circuit voltage of the photoelectric conversion element 200 is reduced. Voc and fill factor FF can be improved.

  Further, the amorphous films 11 to 1m may be made of an amorphous film 11A, and the amorphous films 121 to 12m-1 may be made of an amorphous film 121B (see FIG. 7C). In this case, in the step (f) of FIG. 4, the n-type single crystal silicon substrate uses the same gas flow rate as that of the n-type impurity layer 203 shown in Table 1 for the n-type a-Si for the n-type impurity layer 1203. 1 and deposited on the amorphous films 51-5m.

  As a result, even when the amorphous films 121 to 12m-1 are made of the amorphous film 121B, the film thickness of the portion in contact with the electrodes 31 to 3m-1 in the amorphous films 11 to 1m is 31 to 3m- It is thinner than the thickness of the part not in contact with 1. Therefore, even when the amorphous films 11 to 1m are made of the amorphous film 11A and the amorphous films 121 to 12m-1 are made of the amorphous film 121B, as described above, the open-circuit voltage of the photoelectric conversion element 200 is reduced. Voc and fill factor FF can be improved.

  Further, the amorphous films 11 to 1m may be made of the amorphous film 11B, and the amorphous films 121 to 12m-1 may be made of the amorphous film 121B (see FIG. 7D). In this case, in step (c) of FIG. 3, the p-type a-Si for the p-type impurity layer 103 is formed on the back surface (passivation layer 2 is formed using the gas flow rate shown in Table 1 of the n-type single crystal silicon substrate 1. On the opposite side of the surface). Further, in the step (f) of FIG. 4, the n-type single crystal silicon substrate 1 is formed using the same gas flow rate as that of the n-type impurity layer 203 shown in Table 1 for the n-type a-Si for the n-type impurity layer 1203. And deposited on the amorphous films 51-5m.

  As a result, even when the amorphous films 11 to 1m are made of the amorphous film 11B and the amorphous films 121 to 12m-1 are made of the amorphous film 121B, the electrodes 31 are formed in the amorphous films 11 to 1m. The thickness of the portion in contact with ˜3 m is thinner than the thickness of the portion not in contact with electrodes 31 to 3 m. Therefore, even when the amorphous films 11 to 1m are made of the amorphous film 11B and the amorphous films 121 to 12m-1 are made of the amorphous film 121B, as described above, the open-circuit voltage of the photoelectric conversion element 200 is reduced. Voc and fill factor FF can be improved.

  In the above description, it has been described that the non-doped layer 1201 constituting the amorphous films 121 to 12m-1 is made of i-type a-Si. However, in Embodiment 2, the non-doped layer 1201 is not limited to this. , I-type a-SiC, i-type a-SiO, i-type a-SiN, i-type a-SiCN, and i-type a-SiGe.

  Further, it has been described that each of the n-type impurity layers 1202 and 1203 constituting the amorphous films 121 to 12m-1 is made of n-type a-Si. Each of the impurity layers 1202 and 1203 is made of any of n-type a-SiC, n-type a-SiO, n-type a-SiN, n-type a-SiCN, n-type a-SiGe, and n-type a-Ge. May be.

  That is, in the photoelectric conversion element 200, the n-type impurity layers 1202 and 1203 and the non-doped layer 1201 are made of any of the materials constituting the n-type impurity layers 202 and 203 and the non-doped layers 101 and 201 shown in Table 2, respectively. It may be.

  Furthermore, in the photoelectric conversion element 200, the film thickness of the non-doped layer 101 may be the same as or different from the film thickness of the non-doped layer 1201.

  Further, in the photoelectric conversion element 200, the B concentration in the p-type impurity layers 102 and 103 may be the same as or different from the P concentration in the n-type impurity layers 1202 and 1203.

  Other explanations in the second embodiment are the same as those in the first embodiment.

[Embodiment 3]
FIG. 9 is a cross-sectional view illustrating a configuration of the photoelectric conversion element according to the third embodiment. Referring to FIG. 9, the photoelectric conversion element 300 according to Embodiment 3 is obtained by replacing the amorphous films 11 to 1m of the photoelectric conversion element 100 shown in FIG. 1 with amorphous films 111 to 11m, respectively. Others are the same as the photoelectric conversion element 100.

  The amorphous films 111 to 11m are made of an amorphous phase. The amorphous film 111 is disposed in contact with the amorphous film 21 and the n-type single crystal silicon substrate 1, and the amorphous film 112 is formed of the amorphous films 21 and 22 and the n-type single crystal silicon substrate 1. The amorphous film 113 is disposed in contact with the amorphous films 22 and 23 and the n-type single crystal silicon substrate 1. Crystalline films 2m-2, 2m-1 and n-type single crystal silicon substrate 1 are disposed in contact with each other, and amorphous film 11m is disposed in contact with amorphous film 2m-1 and n-type single crystal silicon substrate 1. Is done.

  In the photoelectric conversion element 300, the electrodes 31 to 3m are disposed in contact with the amorphous films 111 to 11m, respectively.

  FIG. 10 is an enlarged view of the amorphous films 111 and 21 shown in FIG. Referring to FIG. 10, amorphous film 111 is made of either amorphous film 111A or 111B. Then, there are four combinations of the amorphous films 111A and 111B and the amorphous films 21A and 21B as shown in FIGS.

  The amorphous film 111A includes a non-doped layer 1101 and a p-type impurity layer 1102. Non-doped layer 1101 is disposed in contact with the back surface of n-type single crystal silicon substrate 1 (= the surface opposite to the surface on which passivation film 2 is formed). The p-type impurity layer 1102 is disposed in contact with the non-doped layer 1101. The p-type impurity layer 1102 does not have the recess 104 on the side opposite to the surface in contact with the non-doped layer 1101.

The non-doped layer 1101 has an i-type conductivity type, and is made of, for example, i-type a-Si, and has a film thickness of, for example, 5 to 10 nm. The p-type impurity layer 1102 has a p-type conductivity, is made of, for example, p-type a-Si, and contains B of, for example, 5 × 10 ¹⁹ cm ⁻³ . The electrode 31 is formed in contact with the surface of the p-type impurity layer 1102 opposite to the surface in contact with the non-doped layer 1101. And the p-type impurity layer 1102 has the same film thickness in the part which contacts the electrode 31, and the part which does not contact the electrode 31, The film thickness is 30-35 nm, for example. Therefore, as a whole, the amorphous film 111A has the same film thickness in a portion in contact with the electrode 31 and in a portion not in contact with the electrode 31, and the film thickness is 35 to 45 nm. As described above, the amorphous film 111 </ b> A has a structure in which the film thickness in the part in contact with the electrode 31 is the same as the film thickness in the part not in contact with the electrode 31.

The amorphous film 111B is made of a p-type impurity layer 1103. The p-type impurity layer 1103 is disposed in contact with the back surface of the n-type single crystal silicon substrate 1 (= the surface opposite to the surface on which the passivation film 2 is formed). The p-type impurity layer 1103 does not have the concave portion 104 on the side opposite to the surface in contact with the back surface of the n-type single crystal silicon substrate 1. Further, the p-type impurity layer 1103 is made of, for example, p-type a-Si, and includes B of, for example, 5 × 10 ¹⁹ cm ⁻³ . Further, the p-type impurity layer 1103 has a film thickness of 35 to 45 nm in a portion in contact with the electrode 31 and a portion not in contact with the electrode 31. Therefore, the amorphous film 111 </ b> B (= p-type impurity layer 1103) has a structure in which the thickness of the portion in contact with the electrode 31 is the same as the thickness of the portion not in contact with the electrode 31.

  Thus, the amorphous film 111A is made of i-type a-Si / p-type a-Si, and the amorphous film 111B is made of p-type a-Si.

  Each of the amorphous films 112 to 11m shown in FIG. 9 is also made of any of the amorphous films 111A and 111B shown in FIG.

  Each of the amorphous films 21-2m-1 is made of any of the amorphous films 21A, 21B shown in FIG. 10, and each of the amorphous films 111-11m is made of the amorphous films 111A, 111B shown in FIG. Each of the electrodes 31 to 3m is provided in contact with the p-type impurity layer 1102 (or the p-type impurity layer 1103), and each of the electrodes 41 to 4m-1 includes the n-type impurity layer 202 ( Alternatively, it is provided in contact with the n-type impurity layer 203).

  As described above, each of the amorphous films 111 to 11m includes the amorphous film 111A (= non-doped layer 1101 / p-type impurity layer 1102) or the amorphous film 111B (= p-type impurity layer 1103). . Accordingly, each of the amorphous films 111 to 11m is an amorphous film including at least a p-type impurity layer.

  Referring again to FIG. 9, amorphous films 111-11m and amorphous films 21-2m-1 have the same length in the direction perpendicular to the paper surface of FIG. The area occupancy ratio, which is the ratio of the total area of the amorphous films 111 to 11m including at least the p-type impurity layer to the area of the n-type single crystal silicon substrate 1, is 60 to 93%. The area occupation ratio, which is the ratio of the total area of the amorphous films 21 to 2m−1 including the impurity layer to the area of the n-type single crystal silicon substrate 1, is 5 to 20%.

  As described above, the area occupation ratio of the amorphous films 111 to 11m including at least the p-type impurity layer is larger than the area occupation ratio of the amorphous films 21 to 2m−1 including at least the n-type impurity layer. Electrons and holes photoexcited in the n-type single crystal silicon substrate 1 are easily separated by a pn junction (amorphous films 111 to 11 m / n type single crystal silicon substrate 1 including at least a p-type impurity layer) and photoexcited. This is to increase the contribution rate of generated electrons and holes to power generation.

  Hereinafter, a case where the amorphous films 111 to 11m are made of the amorphous film 111A and the amorphous films 21 to 2m-1 are made of the amorphous film 21A will be described.

  FIG. 11 is a process diagram illustrating a part of the manufacturing process of the photoelectric conversion element 300 illustrated in FIG. 9. The photoelectric conversion element 300 includes steps (i), (j), and (k) of steps (a) to (k) shown in FIGS. 3 to 5 as steps (i ″) and (j ″ shown in FIG. 11, respectively. ) And (k ″).

  When the manufacture of the photoelectric conversion element 300 is started, the above-described steps (a) to (h) are sequentially performed. In this case, amorphous films 111 to 11m are formed in steps (c) to (e). Then, after the step (h), a resist is applied onto the amorphous films 111 to 11m and 61 to 6m-1, and the applied resist is patterned by photolithography to form a resist pattern 80 (FIG. 11). Step (i ″) of FIG.

  Thereafter, the amorphous films 61 to 6m-1 are etched by dry etching or wet etching using the resist pattern 80 as a mask to form amorphous films 21 to 2m-1 (see step (j ") in FIG. 11). .

  Subsequently, Ag is vapor-deposited on the amorphous films 111 to 11m and 21 to 2m-1, and the deposited Ag is patterned by photolithography and etching to form electrodes 31 to 3m and 41 to 4m-1. . Thus, the photoelectric conversion element 300 is completed (see step (k ″) in FIG. 11).

  In the photoelectric conversion element 300, when sunlight is irradiated to the photoelectric conversion element 300 from the passivation film 2 side, electrons and holes are photoexcited in the n-type single crystal silicon substrate 1.

  Even if the photoexcited electrons and holes are diffused to the passivation film 2 side, they are not easily recombined due to the passivation effect of the n-type single crystal silicon substrate 1 by the passivation film 2, and the amorphous films 111 to 11 m and 21 to 2 m. Diffuses to -1 side.

  The electrons and holes diffused toward the amorphous films 111 to 11m and 21 to 2m-1 are (amorphous films 111 to 11m including the non-doped layer 1101 and the p-type impurity layer 1102) / n-type single crystal. The holes are separated by the internal electric field by the silicon substrate 1 (= pin junction), and the holes reach the electrodes 31 to 3m via the amorphous films 111 to 11m (= non-doped layer 1101 / p-type impurity layer 1102). Reaches the electrodes 41-4m-1 through the amorphous films 21-2m-1 (= non-doped layer 201 / n-type impurity layer 202).

  The electrons that have reached the electrodes 41 to 4m-1 reach the electrodes 31 to 3m via a load connected between the electrodes 31 to 3m and the electrodes 41 to 4m-1, and recombine with the holes.

  As described above, the photoelectric conversion element 300 converts the electrons and holes photoexcited in the n-type single crystal silicon substrate 1 into the back surface of the n-type single crystal silicon substrate 1 (= n-type single crystal silicon on which the passivation film 2 is formed). This is a back contact type photoelectric conversion element taken out from the surface opposite to the surface of the substrate 1.

  In the photoelectric conversion element 300, the amorphous films 111 to 11m including the p-type impurity layer 1102 have the same film thickness in a portion in contact with the electrodes 31 to 3m and a portion not in contact with the electrodes 31 to 3m. In the amorphous films 21 to 21m-1 including the n-type impurity layer 202, the thickness of the portion in contact with the electrodes 41 to 4m-1 is smaller than the thickness of the portion not in contact with the electrodes 41 to 4m-1. As a result, the series resistance when electrons reach the electrodes 41 to 4m-1 from the n-type single crystal silicon substrate 1 through the amorphous films 21 to 2m-1 is reduced. The portions of the amorphous films 111 to 11m and the amorphous films 21 to 2m-1 not in contact with the electrodes 41 to 4m-1 have a thickness of about 40 nm. The passivation effect on the back surface is high, and recombination of carriers (electrons and holes) on the back surface of the n-type single crystal silicon substrate 1 is suppressed.

  Therefore, the fill factor FF and the open circuit voltage Voc of the photoelectric conversion element 300 can be improved.

  In the above description, the case where the amorphous films 111 to 11m are made of the amorphous film 111A and the amorphous films 21 to 2m-1 are made of the amorphous film 21A (see FIG. 10A) has been described. However, the amorphous films 111 to 11m may be made of the amorphous film 111B, and the amorphous films 21 to 2m-1 may be made of the amorphous film 21A (see FIG. 10B). In this case, in the step (c) of FIG. 3, the p-type a-Si for the p-type impurity layer 1103 uses the same gas flow rate as that of the p-type impurity layer 103 shown in Table 1 to use the n-type single crystal silicon substrate. 1 is deposited on the back surface (the surface opposite to the surface on which the passivation layer 2 is formed).

  As a result, even when the amorphous films 111 to 11m are made of the amorphous film 111B, the film thickness of the portions in contact with the electrodes 41 to 4m-1 in the amorphous films 21 to 2m-1 is the electrodes 41 to 4m-. It is thinner than the thickness of the part not in contact with 1. Therefore, even when the amorphous films 111 to 11m are made of the amorphous film 111B and the amorphous films 21 to 2m-1 are made of the amorphous film 21A, as described above, the open circuit voltage of the photoelectric conversion element 300 is also increased. Voc and fill factor FF can be improved.

  Further, the amorphous films 111 to 11m may be made of an amorphous film 111A, and the amorphous films 21 to 2m-1 may be made of an amorphous film 21B (see FIG. 10C). In this case, in step (f) of FIG. 4, the n-type a-Si for the n-type impurity layer 203 is formed on the n-type single crystal silicon substrate 1 and the amorphous films 111 to 11m using the gas flow rate shown in Table 1. It is deposited on.

  As a result, even when the amorphous films 111 to 11m are made of the amorphous film 111A and the amorphous films 21 to 2m-1 are made of the amorphous film 21B, the amorphous films 21 to 2m-1 The thickness of the portion in contact with the electrodes 41 to 4m-1 is smaller than the thickness of the portion not in contact with the electrodes 41 to 4m-1. Therefore, even when the amorphous films 111 to 11m are made of the amorphous film 111A and the amorphous films 21 to 2m-1 are made of the amorphous film 21B, as described above, the open circuit voltage of the photoelectric conversion element 300 is also increased. Voc and fill factor FF can be improved.

  Further, the amorphous films 111 to 11m may be made of an amorphous film 11B, and the amorphous films 21 to 2m-1 may be made of an amorphous film 21B (see FIG. 10D). In this case, in the step (c) of FIG. 3, the p-type a-Si for the p-type impurity layer 1103 uses the same gas flow rate as that of the p-type impurity layer 103 shown in Table 1 to use the n-type single crystal silicon substrate. 1 is deposited on the back surface (the surface opposite to the surface on which the passivation layer 2 is formed). 4, n-type a-Si for the n-type impurity layer 203 is formed on the n-type single crystal silicon substrate 1 and the amorphous films 111 to 11m using the gas flow rate shown in Table 1. Is deposited.

  As a result, even when the amorphous films 111 to 11m are made of the amorphous film 111B and the amorphous films 21 to 2m-1 are made of the amorphous film 21B, the amorphous films 21 to 2m-1 The film thickness of the part in contact with the electrodes 41 to 4m-1 is thinner than the film thickness of the part not in contact with the electrodes 41 to 4m-1. Accordingly, even when the amorphous films 111 to 11m are made of the amorphous film 111B and the amorphous films 21 to 2m-1 are made of the amorphous film 21B, as described above, the open-circuit voltage of the photoelectric conversion element 300 is also increased. Voc and fill factor FF can be improved.

  In the above description, the non-doped layer 1101 constituting the amorphous films 111 to 11m has been described as being made of i-type a-Si. However, in Embodiment 3, the non-doped layer 1101 is not limited to this, It may consist of any one of type a-SiC, i-type a-SiO, i-type a-SiN, i-type a-SiCN, and i-type a-SiGe.

  Further, it has been described that each of the p-type impurity layers 1102 and 1103 constituting the amorphous films 111 to 11m is made of p-type a-Si. However, the third embodiment is not limited to this, and the p-type impurity layer is not limited thereto. Each of 1102 and 1103 may be composed of any of p-type a-SiC, p-type a-SiO, p-type a-SiN, p-type a-SiCN, p-type a-SiGe, and p-type a-Ge. Good.

  That is, in the photoelectric conversion element 300, the p-type impurity layers 1102 and 1103 and the non-doped layer 1101 are made of any of the materials constituting the p-type impurity layers 102 and 103 and the non-doped layers 101 and 201 shown in Table 2, respectively. It may be.

  Further, in the photoelectric conversion element 300, the film thickness of the non-doped layer 1101 may be the same as or different from the film thickness of the non-doped layer 201.

  Further, in the photoelectric conversion element 300, the B concentration in the p-type impurity layers 1102 and 1103 may be the same as or different from the P concentration in the n-type impurity layers 202 and 203.

  Other explanations in the third embodiment are the same as those in the first embodiment.

  In the above, the photoelectric conversion elements 100, 200, and 300 including the n-type single crystal silicon substrate 1 as the single crystal silicon substrate have been described. However, the photoelectric conversion element according to the embodiment of the present invention is a p-type as the single crystal silicon substrate. A photoelectric conversion element including a single crystal silicon substrate may be used.

  In this case, the amorphous films 11 to 1m and 111 to 11m are formed as non-doped layers (= i-type a-Si or the like) / n-type impurity layers (= n-type a-Si or the like) The amorphous films 21-2m-1, 121-12m-1 are made of non-doped layers (= i-type a-Si, etc.) / P-type impurity layers (= p-type a-Si, etc.). Or a p-type impurity layer (= p-type a-Si or the like). That is, the amorphous films 11-1m and 111-11m are made of an amorphous film including at least an n-type impurity layer, and the amorphous films 21-2m-1, 121-12m-1 are at least p-type impurities. It consists of an amorphous film including a layer.

  The combinations of the amorphous films 11-1m, 111-11m and the amorphous films 21-2m-1, 121-12m-1 are the same as the combinations shown in FIGS.

  In addition, the photoelectric conversion element including the p-type single crystal silicon substrate includes the steps (a) to (k), the steps (a) to (h), (i ′), (j ′), (k ′), and It is produced according to any of steps (a) to (h), (i ″), (j ″), (k ″).

  In the first embodiment, both amorphous films 11 to 1m including p-type impurity layers 102 and 103 and amorphous films 21 to 2m−1 including n-type impurity layers 202 and 203 are in contact with electrodes. The case where the film thickness of the part is thinner than the film thickness of the part not in contact with the electrode has been described.

  In the second embodiment, the case where the amorphous film 11 to 1m including the p-type impurity layers 102 and 103 is thinner than the part not in contact with the electrode is described. .

  Further, in the third embodiment, in the amorphous films 21 to 2m−1 including the n-type impurity layers 202 and 203, the thickness of the portion in contact with the electrode is smaller than the thickness of the portion not in contact with the electrode. explained.

  Therefore, the photoelectric conversion element according to the embodiment of the present invention is provided in contact with one surface of the semiconductor substrate made of single crystal silicon having the first conductivity type, and opposite to the first conductivity type. A first amorphous film including at least a first impurity layer having a second conductivity type, and is in contact with one surface of the semiconductor substrate adjacent to the first amorphous film in an in-plane direction of the semiconductor substrate; A second amorphous film including at least a second impurity layer having the first conductivity type, and a first amorphous film provided in contact with the first impurity layer of the first amorphous film. An electrode and a second electrode provided in contact with the second impurity layer of the second amorphous film, wherein at least one of the first and second amorphous films is in a portion in contact with the electrode It suffices that the film thickness is thinner than the film thickness of the portion not in contact with the electrode.

  When the n-type single crystal silicon substrate 1 is used, the first conductivity type is n-type, and the second conductivity type is p-type. When a p-type single crystal silicon substrate is used, the first conductivity type is p-type, and the second conductivity type is n-type.

  Moreover, the manufacturing method of the photoelectric conversion element by this Embodiment has the back surface structure similar to the photoelectric conversion element 100,200,300 mentioned above, and the photoelectric conversion element 100,200,300, and is a p-type single crystal. Any manufacturing method for manufacturing a photoelectric conversion element using a silicon substrate may be used. Therefore, in the method of manufacturing a photoelectric conversion element according to the embodiment of the present invention, the second conductivity opposite to the first conductivity type is in contact with one surface of the semiconductor substrate made of single crystal silicon having the first conductivity type. A first step of forming a first amorphous film including at least a first impurity layer having a conductivity type; and one of the semiconductor substrates adjacent to the first amorphous film in an in-plane direction of the semiconductor substrate A second step of forming a second amorphous film including at least a second impurity layer having the first conductivity type in contact with the surface of the first impurity layer, and at least one impurity of the first and second impurity layers A third step of removing a portion of the layer in the in-plane direction of the semiconductor substrate and a fourth step of forming an electrode in contact with at least one impurity layer from which a portion has been removed may be provided.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and is intended to include meanings equivalent to the scope of claims for patent and all modifications within the scope.

  The present invention is applied to a photoelectric conversion element and a manufacturing method thereof.

  1 n-type single crystal silicon substrate, 2 passivation film, 11 to 1m, 11A, 11B, 20, 21 to 2m-1, 21, 1B, 40, 51 to 5m, 61 to 6m-1, 111 to 11m, 111A, 111B, 121-12m-1, 121A, 121B amorphous film, 30, 50, 60, 70, 80 resist pattern, 31-3m, 41-4m-1 electrode, 100, 200, 300 photoelectric conversion element, 101, 201, 1101, 1201 Non-doped layer, 102, 103, 1102, 1103 p-type impurity layer, 104, 204 recess, 202, 203, 1202, 1203 n-type impurity layer.

Claims (17)

A semiconductor substrate made of single crystal silicon having a first conductivity type;
A first amorphous film provided in contact with one surface of the semiconductor substrate and including at least a first impurity layer having a second conductivity type opposite to the first conductivity type;
A first impurity layer provided at least in contact with one surface of the semiconductor substrate adjacent to the first amorphous film in an in-plane direction of the semiconductor substrate and including at least a second impurity layer having the first conductivity type; Two amorphous films;
A first electrode provided in contact with the first impurity layer of the first amorphous film;
A second electrode provided in contact with the second impurity layer of the second amorphous film,
In at least one of the first and second amorphous films, a photoelectric conversion element in which a film thickness of a part in contact with the electrode is thinner than a film thickness of a part not in contact with the electrode. The first amorphous film has a first film thickness at a portion in contact with the first electrode, and a second film thicker than the first film thickness at a portion not in contact with the first electrode. Has a film thickness,
The second amorphous film has a third film thickness at a portion in contact with the second electrode, and is thicker than the third film thickness at a portion not in contact with the second electrode. The photoelectric conversion element of Claim 1 which has a film thickness. The first amorphous film has a first film thickness at a portion in contact with the first electrode, and a second film thicker than the first film thickness at a portion not in contact with the first electrode. Has a film thickness,
2. The photoelectric conversion element according to claim 1, wherein the second amorphous film has the same film thickness in a portion in contact with the second electrode and a portion not in contact with the second electrode. The first amorphous film has the same film thickness in a portion in contact with the first electrode and a portion not in contact with the first electrode,
The second amorphous film has a first film thickness at a portion in contact with the second electrode, and a second film thicker than the first film thickness at a portion not in contact with the second electrode. The photoelectric conversion element of Claim 1 which has a film thickness. The first amorphous film includes:
A first non-doped layer provided in contact with one surface of the semiconductor substrate and having an i-type conductivity;
Including the first impurity layer provided in contact with the first non-doped layer,
The second amorphous film is
A second non-doped layer provided in contact with one surface of the semiconductor substrate and having an i-type conductivity;
The photoelectric conversion device according to claim 1, further comprising: the second impurity layer provided in contact with the second non-doped layer.   Each of the first and second non-doped layers includes i-type amorphous silicon carbide, i-type amorphous silicon nitride, i-type amorphous silicon carbon nitride, i-type amorphous silicon oxide, i-type amorphous silicon, and i-type amorphous silicon germanium. The photoelectric conversion element according to claim 5, comprising any of the following. The first amorphous film includes the first impurity layer over the entire thickness direction,
The second amorphous film is
A non-doped layer provided in contact with one surface of the semiconductor substrate and having an i-type conductivity;
The photoelectric conversion element of any one of Claims 1-4 containing the said 2nd impurity layer provided in contact with the said non-doped layer. The first amorphous film includes:
A non-doped layer provided in contact with one surface of the semiconductor substrate and having an i-type conductivity;
Including the first impurity layer provided in contact with the non-doped layer,
5. The photoelectric conversion element according to claim 1, wherein the second amorphous film includes the second impurity layer over the entire thickness direction. 6.   The non-doped layer is made of any one of i-type amorphous silicon carbide, i-type amorphous silicon nitride, i-type amorphous silicon carbon nitride, i-type amorphous silicon oxide, i-type amorphous silicon, and i-type amorphous silicon germanium. The photoelectric conversion element of Claim 7 or Claim 8. The semiconductor substrate is made of n-type single crystal silicon,
The first impurity layer has p-type conductivity.
The photoelectric conversion element according to claim 1, wherein the second impurity layer has an n-type conductivity type. The first impurity layer includes p-type amorphous silicon carbide, p-type amorphous silicon nitride, p-type amorphous silicon carbon nitride, p-type amorphous silicon oxide, p-type amorphous silicon, p-type amorphous silicon germanium, and p-type amorphous germanium. Consisting of either
The second impurity layer includes n-type amorphous silicon carbide, n-type amorphous silicon nitride, n-type amorphous silicon carbon nitride, n-type amorphous silicon oxide, n-type amorphous silicon, n-type amorphous silicon germanium, and n-type amorphous germanium. The photoelectric conversion element according to claim 10, comprising any of the following. The semiconductor substrate is made of p-type single crystal silicon,
The first impurity layer has n-type conductivity.
The photoelectric conversion element according to claim 1, wherein the second impurity layer has a p-type conductivity type. The first impurity layer includes n-type amorphous silicon carbide, n-type amorphous silicon nitride, n-type amorphous silicon carbon nitride, n-type amorphous silicon oxide, n-type amorphous silicon, n-type amorphous silicon germanium, and n-type amorphous. Made of either germanium,
The second impurity layer includes p-type amorphous silicon carbide, p-type amorphous silicon nitride, p-type amorphous silicon carbon nitride, p-type amorphous silicon oxide, p-type amorphous silicon, p-type amorphous silicon germanium, and p-type amorphous. The photoelectric conversion element according to claim 12, comprising any one of germanium. A first non-layer including at least a first impurity layer having a second conductivity type opposite to the first conductivity type in contact with one surface of the semiconductor substrate made of single crystal silicon having the first conductivity type. A first step of forming a crystalline film;
A second impurity layer including at least a second impurity layer having the first conductivity type in contact with one surface of the semiconductor substrate adjacent to the first amorphous film in an in-plane direction of the semiconductor substrate; A second step of forming an amorphous film;
A third step of removing a portion of at least one of the first and second impurity layers in the in-plane direction of the semiconductor substrate;
And a fourth step of forming an electrode in contact with the at least one impurity layer from which the part has been removed. In the third step, the first impurity layer is partially removed in the in-plane direction of the semiconductor substrate, and the second impurity layer is not removed in the in-plane direction of the semiconductor substrate;
15. In the fourth step, the first electrode is formed in contact with the first impurity layer from which the part has been removed, and the second electrode is formed in contact with the second impurity layer. The manufacturing method of the photoelectric conversion element of description. In the third step, a part of the first impurity layer in the in-plane direction of the semiconductor substrate is not removed, and a part of the second impurity layer in the in-plane direction of the semiconductor substrate is removed;
The said 4th process WHEREIN: A 1st electrode is formed in contact with a 1st impurity layer, and a 2nd electrode is formed in contact with the 2nd impurity layer from which the said part was removed. Manufacturing method of the photoelectric conversion element. In the third step, removing a part of the first and second impurity layers in the in-plane direction of the semiconductor substrate;
In the fourth step, a first electrode is formed in contact with the first impurity layer from which the part has been removed, and a second electrode is formed in contact with the second impurity layer from which the part has been removed. The manufacturing method of the photoelectric conversion element of Claim 14.

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