JP2013155111A - SiC SUBSTRATE, CARBON SUPPLY FEED SUBSTRATE, AND SiC SUBSTRATE WITH CARBON NANOMATERIAL - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a single crystal SiC substrate flattened on a molecular level.SOLUTION: The manufacturing method includes a groove forming step, a masking step, and a liquid phase epitaxial growth step. At the groove forming step, an SiC polycrystal substrate is formed with a groove so as to divide a surface of the SiC polycrystal substrate into a plurality of regions each having a size of a single semiconductor device chip. At the masking step, each of the plurality of regions formed at the groove forming step is masked by a masking member and a fine opening is formed in a portion corresponding to the center of the masked region. At the liquid phase epitaxial growth step, hetero crystal polymorph 4H-SiC single crystal is epitaxially grown in a vertical and horizontal directions in the opening of the SiC polycrystal substrate formed with the groove to be a seed substrate using the metastable solvent epitaxy method.

Description

  The present invention relates to a technique for epitaxially growing single crystal SiC on a polycrystalline SiC substrate that has been grooved.

  As semiconductor materials for high-frequency devices, silicon (Si), gallium arsenide (GaAs), and the like are conventionally known. The field of application of high-frequency devices has been rapidly expanding in recent years, and along with this, opportunities for use in severe areas such as high-temperature environments have increased. Therefore, the realization of a high-frequency device that can withstand a high temperature environment is one of the important issues for improving operation reliability and a large amount of information processing / controllability in a wide range of application environments.

  Thus, silicon carbide (SiC) has attracted attention as one of semiconductor materials having excellent heat resistance. SiC is excellent in mechanical strength and resistant to radiation. SiC can easily control valence electrons of electrons and holes by adding impurities, and has a wide forbidden band width (about 3.0 eV for 6H type single crystal SiC and 3.3 eV for 4H type single crystal SiC. ). For these reasons, SiC is expected as a material for next-generation power devices that can realize high temperatures, high frequencies, withstand voltages, and environmental resistance that cannot be realized with the above-described existing semiconductor materials.

  In addition, it is considered that combining SiC having excellent heat resistance with graphene, which is a substance expected to realize an ultrahigh frequency device, is important from the superiority of each material property and the simplicity of the manufacturing method. Graphene is a two-dimensional hexagonal lattice in which one C atom is connected in a honeycomb shape with a thickness of one, and is a basic structure of all graphite structures including graphite, carbon nanotubes, and fullerenes. This hexagonal lattice has a high-quality crystal structure with extremely few defects, and has a physical and chemical stability and a high electron mobility that surpasses other substances at room temperature.

  Graphene formation on the SiC surface is obtained by high-temperature annealing (thermal decomposition) of the SiC single crystal in a vacuum. In this method, thermal desorption of Si atoms from the SiC substrate is promoted by high-temperature vacuum heating, and graphene is easily formed by surplus C atoms generated on the substrate surface. For example, Patent Document 1 discloses a method of forming a graphene sheet of about several hundred μm by the thermal decomposition method.

  In addition, when graphene devices are considered, it is desired to form a large-area single graphene sheet on the SiC substrate surface. Such a large-area single graphene sheet is considered to be advantageous in principle when formed on a SiC substrate having an inclination angle (hereinafter referred to as an off-angle) of 4 degrees or less that can provide a flat surface with a wide terrace width. (Refer nonpatent literature 1). Furthermore, it is preferable that most of the surface of the SiC substrate having an off angle of 4 degrees or less has uniform flatness. However, the planarization technique of the SiC substrate surface is a technique associated with the epitaxial film formation technique on the SiC substrate, and due to that factor, a substrate inclined by 4 to 8 degrees from the (0001) plane (hereinafter referred to as off-substrate). The technology has advanced for surface flattening.

Currently reported SiC surface planarization techniques mainly include mechanochemical polishing (CMP), which is a chemical mechanical polishing technique, and high-temperature hydrogen etching, which is a vapor planarization technique. The CMP method is a technique for obtaining a high-speed and smooth polished surface by using the surface chemical action of the polishing agent itself and the mechanical polishing action by rotational motion for surface polishing. On the other hand, the high temperature hydrogen etching method is a method in which damage caused by polishing existing on the surface of the SiC substrate is mainly removed by etching using H ₂ gas or HCl / H ₂ mixed gas in a high temperature environment of about 1500 ° C. Non-Patent Document 2 and Non-Patent Document 3 disclose the flattening process of an SiC substrate using this type of high-temperature hydrogen etching method.

  In order to achieve further planarization of the surface of the SiC substrate, it is also necessary to improve the crystal quality of the SiC substrate itself before the planarization process. This is because the surface flattening process performed to obtain uniform large-area graphene has etching as a basic principle. That is, the inside of the bulk crystal including the epitaxially grown layer is exposed to the surface by the planarization process, and etch pits derived from dislocation defects appear, leading to surface shape non-uniformity. Therefore, the SiC crystal itself before the planarization process is performed. Quality improvement is required.

  In a method for producing a SiC single crystal, a sublimation recrystallization method is generally used for producing a bulk crystal. The sublimation recrystallization method is disclosed in Patent Document 2, for example. In the method of Patent Document 2, first, a single crystal SiC substrate and a plate material composed of Si atoms and C atoms are opposed to each other with a slight gap therebetween. And it heat-processes so that the said single crystal SiC board | substrate side may be kept at a low temperature rather than the said board | plate material in the inert gas atmosphere below atmospheric pressure, and SiC saturated vapor | steam atmosphere. Thereby, Si atoms and C atoms are sublimated and recrystallized within the minute gap to precipitate a single crystal on the single crystal SiC substrate, and the plate material is transformed into a single crystal using the deposited single crystal as a seed crystal. The single crystal oriented in the same direction as the crystal axis of the single crystal SiC substrate is grown integrally.

  However, in the sublimation recrystallization method as in Patent Document 2, crystal defects (for example, micropipe defects, spiral dislocations, basal plane dislocations, c-axis orientation defects, etc.) of the single crystal SiC substrate as a seed crystal are precipitated. It is easy to propagate to the epitaxial structure of the single crystal, and this is a big obstacle when the manufactured SiC single crystal is used as the above-mentioned power device or the like.

  The problem of reducing micropipe defects is also pointed out in Patent Document 3, and as a method for solving this problem, the following SiC epitaxial layer forming method has been proposed. That is, the method for forming the SiC epitaxial layer of Patent Document 3 includes a step of growing a SiC bulk crystal using a seed crystal addition sublimation technique and a step of liquid phase epitaxial growth on the surface of the bulk crystal. In the liquid phase epitaxial growth step, by performing melt growth, micropipe defects propagated from the seed crystal to the bulk crystal substrate can be blocked, and an SiC epitaxial layer with few micropipe defects can be formed. Become.

  In addition, as a liquid crystal epitaxial growth method of single crystal SiC that can obtain a high crystal growth rate without adding other elements into the silicon melt, the thickness of the solvent sandwiching the carbon supply feed substrate and the seed substrate is extremely small, There is a metastable solvent epitaxy (MSE) method that makes this possible by accelerating the diffusion of carbon. For example, Patent Document 4 discloses a technique using this type of MSE method.

  This is because a carbon supply feed substrate having a higher free energy than the seed substrate is disposed opposite to a seed substrate made of single crystal SiC, and an ultrathin silicon melt is interposed between the seed substrate and the carbon supply feed substrate. In this method, single-crystal SiC is grown in a liquid phase epitaxial manner on the surface of the seed substrate by heat treatment in a vacuum high temperature environment with a layer interposed as a solvent. Further, in this MSE method, since the growth kinetics is controlled only by the concentration gradient without a temperature gradient, the epitaxial growth can be automatically stabilized, and a high-quality epitaxial growth layer can be obtained. In addition, since free energy based on the difference in various chemical potentials can be used as the driving force for crystal growth, it is easy to epitaxially grow SiC over a large area.

  Furthermore, as a fundamental solution for reducing crystal defects in the SiC single crystal, it is necessary to produce a SiC single crystal seed substrate with a small number of crystal defects.

  As a method for producing a 4H-SiC seed crystal, a method for producing a 4H-SiC single crystal piece on the surface of a seed polycrystalline substrate is known. The manufacturing method includes a carbonization treatment step and a liquid phase epitaxial growth step on the surface of the SiC polycrystalline substrate. In the carbonization process, the SiC polycrystalline substrate is heated at a high temperature in a vacuum environment to form a carbonized layer on the surface of the SiC polycrystalline substrate. Thereafter, the SiC polycrystalline substrate with the carbide layer is placed near the SiC polycrystalline substrate with the carbide layer, and liquid phase epitaxial growth is performed by interposing a metal silicon melt in the gap between the two substrates, whereby the SiC polycrystal with the carbide layer is grown. A SiC seed crystal is self-grown on the surface of the crystal substrate.

JP 2009-62247 A JP 11-315000 A JP 10-509943 A JP 2008-230946 A

J. et al. Hass et al, APPLIED PHYSICS LETTERS 89, 143106 (2006) H. Nakagawa et al, PHYSICAL REVIEW LETTERS 91,226107 (2003) J. et al. Hassan et al, Journal of Crystal Growth H 310 (2008) 4430 1969 Journal of the Ceramic Industry Association “3” 77

  When graphene devices are considered, it is necessary to form a graphene sheet on the entire surface of the substrate. In order to obtain a large area graphene by the pyrolysis method as described above, it is necessary that the entire surface of the SiC surface, which is the base substrate, be uniformly planarized at the molecular level. It was difficult to achieve molecular level planarization with this method. In addition, in the planarization technology of the SiC substrate surface, the surface stability of the surface planarization technology that has been widely used in the Si process is the same because of the high chemical stability and mechanical toughness of SiC crystals with hardness comparable to diamond. Application is considered difficult. Therefore, establishing a surface flattening technology unique to SiC is an indispensable issue not only for the field of graphene formation on SiC, but also for device fabrication of SiC semiconductors.

  Further, even when the means as described in Non-Patent Document 1 is adopted, since the surface of the SiC substrate having a low off-angle has not been uniformly planarized at the molecular level, further planarization is required. There was room for improvement.

  Further, it has been reported that the surface of the SiC substrate can be flattened by using the above-described CMP method as compared with mechanical polishing using diamond abrasive grains, but the molecular layer level (SiC monomolecular layer: 0. The uniformity of the shape of the SiC surface at 25 nm, bimolecular layer: 0.5 nm, etc.) has not been obtained. Furthermore, although it can be said that damage to the SiC surface layer is reduced in comparison with mechanical polishing using diamond abrasive grains, a completely damage-free surface has not been formed.

  In a high-temperature heat treatment (high-temperature hydrogen etching method) in a hydrogen atmosphere as disclosed in Non-Patent Document 2, a substrate having an off angle (3.5 degrees to 8 degrees) from (0001) is periodic. A step structure consisting of nanofacets is formed. However, non-uniformity in the surface shape occurs, for example, a macro step with a height of 15 nm to 20 nm appears on the surface of a SiC substrate (on substrate) with an off angle of 0 ° to 1 ° (Non-patent Document 3). . Therefore, even in the high-temperature hydrogen etching method, there is room for improvement from the viewpoint of planarization at the molecular level.

  Further, in the method of Patent Document 3, an element for increasing the solubility of a melt obtained by melting SiC is mixed in the silicon melt in the liquid phase epitaxial growth step. Therefore, unintentional mixing of the element into the epitaxial crystal is performed. Moreover, there is concern about the mixing of different polymorphs due to the high solvent (carbon) concentration in the silicon melt (see Non-Patent Document 4). Therefore, in the liquid phase growth of SiC, an effective liquid phase capable of obtaining a fast crystal growth rate (improving the transport rate of carbon in the silicon melt) while maintaining a low carbon penetration state in the silicon melt. Development of growth methods is required.

  As described above, the conventional SiC planarization technique is specialized in a method for forcibly scraping the surface of the SiC substrate, and does not consider surface reconstruction at the molecular level. Therefore, in order to uniformly planarize the on-substrate surface where the step direction of the surface is not defined at the molecular level, not only the method of scraping the substrate surface, but also self-organization in which the surface is reconstructed (repaired) spontaneously. Development of a new surface flattening technique with a special element is necessary. Thus, there is a need for a technique that enables surface flattening on an on-substrate having a small off angle (0 degree to 1 degree) and that can form uniform graphene over a large area on the substrate surface. It is.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a single crystal SiC substrate flattened at a molecular level.

Means and effects for solving the problems

  The problems to be solved by the present invention are as described above. Next, means for solving the problems and the effects thereof will be described.

  According to the first aspect of the present invention, SiC is obtained by epitaxially growing a heterocrystalline polymorphic single crystal SiC on a local region on a grooved polycrystalline SiC substrate manufactured by the following manufacturing method. A substrate is provided. That is, the manufacturing method includes a groove forming process, a mask process, and a liquid phase epitaxial growth process. In the groove forming step, the SiC polycrystalline substrate is subjected to groove processing so as to divide the surface of the SiC polycrystalline substrate into a plurality of regions of a semiconductor device 1 chip size. In the masking process, a mask member is used to mask each of the plurality of regions formed in the groove forming step, and a minute opening is formed in a portion corresponding to the central portion of the region of the mask. In the liquid phase epitaxial growth step, heterocrystalline polymorphic 4H-SiC single crystal is epitaxially grown in the vertical and horizontal directions by metastable solvent epitaxy in the openings of the SiC polycrystalline substrate that has been grooved to serve as a seed substrate. Let

  Thereby, the heterocrystalline polymorphic single crystal SiC can be grown for each of a plurality of regions of one chip size of the semiconductor device. Further, by dividing the semiconductor device for each chip size, the dislocation defects are released from the side surface of the single crystal epitaxial growth layer, and a defect-free region is formed above the single crystal epitaxial growth layer. Therefore, defects appearing on the surface of the single crystal epitaxial growth layer can be satisfactorily suppressed, and the yield can be improved.

  In the SiC substrate, the mask member is preferably pyrolytic graphite or aluminum nitride.

  Thereby, according to the use for which a board | substrate is used, the pyrolytic graphite which is a electrically conductive material, and the aluminum nitride which is an insulating material can be used properly. For example, the process can be simplified by using aluminum nitride as an insulating film.

  The SiC substrate is preferably manufactured by the following manufacturing method. That is, the impurity concentration of the carbon supply feed substrate for supplying carbon atoms is controlled in the liquid phase epitaxial growth step.

  Thereby, it is possible to control the impurity concentration in the epitaxial layer using the concentration gradient generated by the difference in free energy between the substrates. Therefore, it is possible to efficiently manufacture a SiC substrate with a high concentration epitaxial layer or a high purity active layer epitaxial layer.

  The SiC substrate is preferably manufactured by the following manufacturing method. That is, in the liquid phase epitaxial growth process of the heterocrystalline polymorphic single crystal SiC, the heating temperature is maintained at a constant temperature at the initial heating stage of the metastable solvent epitaxy method, and the supersaturation degree of the epitaxial growth environment of the fine SiC single crystal varies. Limit. Thereby, the nucleation frequency of the fine SiC single crystal is suppressed, and control is performed so that only the single 4H—SiC single crystal of the heterocrystalline polymorph is epitaxially grown. Then, after the single 4H—SiC single crystal is epitaxially grown, a single minute 4H—SiC single crystal is grown in the horizontal direction by repeating the temperature fluctuation process consisting of a cooling process and a temperature raising process a plurality of times. Prompt.

  Thereby, a single minute 4H—SiC single crystal formed on the SiC polycrystalline substrate can be grown in the horizontal direction.

  The SiC substrate is preferably manufactured by the following manufacturing method. That is, in the liquid phase epitaxial growth step of the heterocrystalline polymorphic single crystal SiC, the surface of the SiC single crystal grain constituting the SiC polycrystalline substrate is metastable by heating at a temperature of 1600 ° C. or higher and 2200 ° C. or lower. A 4H—SiC single crystal is epitaxially grown by a solvent epitaxy method.

  Thereby, in the liquid phase epitaxial growth step, the 4H—SiC single crystal can be heteroepitaxially grown on the surface of the SiC polycrystalline substrate more satisfactorily and efficiently.

  In the SiC substrate, the seed substrate is preferably configured by coating a polycrystalline SiC film on a carbon base material in which grooves are formed.

  Thereby, manufacturing cost can be reduced.

  In the SiC substrate, the seed substrate is preferably configured by coating a polycrystalline SiC film on a metal body in which a groove is formed.

  Thereby, manufacturing cost can be reduced.

  The SiC substrate is preferably manufactured by the following manufacturing method. That is, a concave portion is formed on one surface of the carbon supply feed substrate disposed opposite to the SiC substrate. The non-carbon supply auxiliary substrate disposed on the back surface of the carbon supply feed substrate has a convex portion corresponding to the concave portion. In the liquid phase epitaxial growth step, epitaxial growth is enabled by interposing a silicon melt in a gap between the SiC substrate as a seed substrate and the carbon supply feed substrate in a state where the convex portion and the concave portion are fitted. Since the epitaxial growth stops when the carbon supply feed substrate disappears and is depleted, the thickness of the epitaxial growth layer is controlled. Moreover, the process of removing excess silicon melt and the process of planarizing the surface of the single crystal SiC epitaxial layer are automatically started.

  Thereby, the epitaxial growth layer can be controlled to a predetermined thickness. In addition, when the liquid phase epitaxial layer growth function is stopped, a gap is formed between the seed substrate and the carbon supply feed substrate, so that the excess silicon melt is automatically vaporized by touching the outside air without being cooled and solidified. . Accordingly, it is possible to omit work such as dissolving and removing the cooled surplus silicon film, and the surface flattening process of the single crystal SiC epitaxial layer is automatically started. Thus, rationalization by omission of work can be achieved, so that productivity can be effectively improved. Furthermore, since the surplus silicon melt is not solidified on the SiC epitaxial layer, it is possible to prevent the occurrence of distortion and dislocation defects in the SiC epitaxial layer caused by silicon solidification (aggregation).

  The SiC substrate is preferably manufactured by the following manufacturing method. That is, the manufacturing method includes a stacking step and a housing step. In the laminating step, the SiC substrate and the carbon supply feed substrate are arranged to face each other, and a silicon substrate is interposed therebetween to form a laminated body. In the housing step, the laminated body is housed in a fitting container having a carbon getter effect. In the liquid phase epitaxial growth process, by keeping the silicon vapor pressure amount in the fitting container large, the retention time of the silicon melt layer of the laminated body is lengthened and the liquid phase epitaxial growth process operation time is lengthened.

  Thereby, since the operation time of the liquid phase epitaxial growth process can be lengthened, a single crystal epitaxial growth layer having a large area and a thick film can be easily formed on the SiC substrate.

  The SiC substrate is preferably manufactured by a manufacturing method including the following steps. That is, in the liquid phase epitaxial growth step, by increasing the sealing degree of the fitting container, or by making the inner volume of the fitting container as close as possible to the volume of the stack of the SiC substrate and the carbon supply feed substrate, It becomes possible to keep the amount of vapor pressure of silicon in the fitting container large.

  Thereby, the amount of silicon vapor pressure can be increased by reducing the capacity of the fitting container. Further, by adjusting the capacity of the fitting container, the length of the gap between the fitting portions, and the like, the sealing degree can be adjusted, and the amount of silicon vapor pressure can be increased. For example, after the liquid phase epitaxial process is completed, the excess silicon fusion can be efficiently performed in a short time without damaging the surface of the epitaxial growth layer by relaxing the sealing degree and reducing the amount of silicon vapor pressure in the fitting container. It is also possible to remove the liquid.

The SiC substrate is preferably manufactured by a manufacturing method including the following steps. That is, in the liquid phase epitaxial growth step, the SiC substrate is in a state where the pressure in the furnace is 10 ⁻² Pa or less and the oxygen partial pressure is 10 ⁻⁵ Pa or less. The atmosphere is under a silicon vapor pressure, and the heat treatment is performed in an internal pressure of 1 Pa or less.

  Thereby, other impurities can be prevented from entering the SiC substrate in the liquid phase epitaxial growth step, and a high-quality SiC substrate can be obtained.

  According to the 2nd viewpoint of this invention, the following structures of the carbon supply feed board | substrate used in order to supply carbon at the said liquid phase epitaxial growth process are provided. That is, the carbon supply feed substrate is composed of at least one material of a 3C-SiC polycrystalline substrate, a 3C-SiC single crystal substrate, or a substrate on which carbon nanomaterials such as graphene sheets and carbon nanotubes are formed. The

  Thereby, carbon atoms can be satisfactorily supplied by the carbon supply feed substrate having high free energy.

  The SiC substrate with carbon nanomaterial is preferably manufactured by the following manufacturing method. That is, the manufacturing method includes a carbonization process. In the carbonization process, the surface of the 4H—SiC single crystal epitaxial growth layer grown in each region of the SiC substrate is heated at 1500 ° C. or more and 2200 ° C. or less in a high-temperature vacuum environment. Thereby, silicon on the surface of the single crystal epitaxial growth layer is sublimated, and a thin film graphene sheet or carbon nanotube at a molecular layer level is generated on the surface of the SiC substrate by the remaining carbon.

  Thereby, the thin film of the molecular layer level comprised with a carbon nanomaterial on a SiC substrate can be produced | generated efficiently and favorably.

The SiC substrate with carbon nanomaterial is preferably manufactured by the following manufacturing method. That is, in the carbonization step, the substrate is heat-treated in a state where the furnace pressure is 10 ⁻³ Pa or less and the oxygen partial pressure is 10 ⁻⁵ Pa or less.

  Thereby, it can prevent that another impurity penetrate | invades a SiC crystal layer in a carbonization process, and can obtain a SiC substrate with a high quality carbon nanomaterial.

In this specification, “full unit height” refers to the height in the stacking direction for one cycle in which SiC monomolecular layers composed of Si and C are stacked in the stacking direction, as shown in FIGS. Say. FIG. 1 shows an explanation of the molecular arrangement and period of the 4H—SiC single crystal, and FIG. 2 shows an explanation of the molecular arrangement and period of the 6H—SiC single crystal. Therefore, the full unit height step means a 1.0 nm step for 4H-SiC and a 1.5 nm step for 6H-SiC. On the other hand, the “half unit height” refers to the height in the stacking direction at a half point of the one cycle. Therefore, the step of half unit height means a step of 0.5 nm in the case of 4H-SiC and a step of 0.75 nm in the case of 6H-SiC. The “high vacuum environment” means a vacuum environment of 10 ⁻² Pa or less.

The schematic diagram for demonstrating the molecular arrangement | sequence and period of a 4H-SiC single crystal. The schematic diagram for demonstrating the molecular arrangement | sequence and period of a 6H-SiC single crystal. The schematic diagram which showed a mode that the surface of a single crystal SiC substrate was planarized by heat processing. The schematic diagram which shows the high temperature vacuum furnace used for the heat processing for manufacturing a SiC substrate. Sectional drawing which shows the main heating chamber and preheating chamber of a high temperature vacuum furnace in detail. The external appearance photograph and cross-sectional photograph of the crucible which has a carbon getter effect. The schematic diagram explaining a carbon getter effect. The schematic diagram which shows the fluctuation | variation of the silicon vapor pressure by the difference in heating temperature. The graph which showed the relationship between heat processing temperature and the surface roughness of a single-crystal SiC substrate. The graph which showed distribution of the step height with respect to the terrace width of the surface of a single crystal SiC substrate. The microscope picture which showed the mode of the surface of the (0001) Si surface and (000-1) C surface in 4H-SiC. The graph which shows the change of the step height with respect to heat processing (annealing) temperature. FIG. 13 is a photomicrograph showing the state of the surface of a single crystal SiC substrate at an annealing temperature corresponding to FIG. 12. The graph which shows the change of the step height with respect to heat processing (annealing) temperature. The micrograph which shows the mode of the surface of the single crystal SiC substrate in the annealing temperature corresponding to FIG. The graph which shows the change of the etching rate of 4H-SiC board | substrate with respect to the heat processing (annealing) temperature depending on a silicon vapor pressure amount. The graph which shows the change of the average step height with respect to the heat processing (annealing) temperature depending on the amount of silicon vapor pressure. The schematic diagram explaining the concept which produces | generates a carbon-type nanomaterial on the surface of a single crystal SiC substrate. The microscope picture which shows the mode of the graphene layer produced | generated on each of the (0001) Si surface and (000-1) C surface of 4H-SiC. The process figure which showed a mode that the single crystal SiC substrate with an epitaxial growth layer was manufactured by performing a liquid phase epitaxial growth process with respect to a single crystal SiC substrate. The cross-sectional photograph of the laminated body after a liquid phase epitaxial process. The graph which showed the change of the nitrogen doping concentration with respect to the film thickness of a SiC substrate. The process figure which showed a mode that the formation of a SiC single crystal epitaxial growth layer, and a graphene sheet film were formed. The process figure which showed a mode that the formation of the 4H-SiC single-crystal epitaxial growth layer on the seed substrate surface which gave the groove process to the SiC polycrystalline substrate, and the graphene sheet film were formed. The schematic diagram explaining the concept of a division | segmentation system large diameter semiconductor wafer. The microscope picture which shows a mode that the 4H-SiC single crystal was heteroepitaxially grown on the 3C-SiC polycrystal substrate. The graph which showed the relationship between the thickness of a SiC micro single crystal, and growth temperature. The graph which shows the change of the growth rate of the 4H-SiC epitaxial layer with respect to temperature. The graph which shows the temperature history in a liquid phase epitaxial process. The microscope picture which showed the nucleation frequency of the fine SiC single crystal on the surface of 3C-SiC polycrystal. The microscope picture which showed the mode of the growth to the horizontal direction of the fine SiC single crystal on polycrystalline SiC. The microscope picture which showed the fine SiC single crystal on the polycrystalline SiC formed by the said epitaxial process which introduce | transduced the supercooling process. The schematic diagram which shows a mode that the micro SiC single crystal of the two-step structure on the surface of 3C-SiC polycrystal was formed. The schematic diagram which showed the mode of the carbon supply feeder board | substrate for mass production roughly. The process figure which showed a mode that the epitaxial layer was grown on a SiC substrate using the carbon supply feeder board | substrate for mass production. Process drawing which showed the manufacturing method of the Example of the MSE liquid phase growth method corresponding to a mass production process. Process drawing which showed the process of the manufacturing method of the SiC substrate for graphene FET devices. The external appearance perspective view which showed typically the field effect semiconductor wafer which formed the graphene film in the insulating film on a single-crystal SiC substrate.

  Next, embodiments of the invention will be described. First, with reference to FIGS. 3 to 19, a method for producing a surface flattened SiC single crystal and graphene will be described with reference to examples. Next, with reference to FIGS. 20 to 38, a method of manufacturing a SiC substrate with an epitaxial layer (epitaxial film) will be described with reference to the examples.

  First, with reference to FIG. 3, the concept of the planarization process of the SiC substrate by this invention is demonstrated. FIG. 3 is a schematic diagram showing how the surface of the single crystal SiC substrate is flattened by heat treatment.

  First, as shown in FIG. 3A, a single crystal SiC substrate 5 made of 4H—SiC single crystal or 6H—SiC single crystal and having a predetermined thickness is prepared. This single crystal SiC substrate 5 is preferably formed in a circular plate shape with a diameter of 2 inches or more and a high roundness, and has no notches. Further, in this single crystal SiC substrate 5, the surface to be surface flattened is preferably a (0001) Si surface or a (000-1) C surface. Further, the surface to be surface flattened is preferably a surface whose off angles in the [1-100] direction and the [11-20] direction are 4 degrees or less, and in this embodiment, 1 degrees or less. More preferably, it is a surface (including a so-called just surface).

  As shown in FIGS. 3A and 3B, the surface of the single crystal SiC substrate 5 has unstable sites including crystal defects and damage caused by polishing scratches on the surface of the substrate or stress generated during polishing. There is a layer. As shown in FIGS. 3A and 3B, this SiC substrate 5 is subjected to a high-temperature heat treatment at 1800 ° C. under a silicon vapor pressure (under an Si atmosphere) and under a high vacuum. Thereby, the single crystal SiC substrate 5 can remove the surface portion including the damaged layer without carbonizing the surface thereof.

  In addition, this flattening process is modified so that the surface of the single crystal SiC substrate 5 terminates in a step shape. The height of this step is determined by the crystal polymorph of the single crystal SiC substrate 5.

  Specifically, when the crystal polymorph of the single crystal SiC substrate 5 is 4H, the height of the step is constant at 0.5 nm, constant at 1.0 nm, 0.5 nm and 1. The height of 0 nm is mixed. On the other hand, when the crystal polymorph is 6H, the height of the step is constant at 0.75 nm, constant at 1.5 nm, or a mixture of heights of 0.75 nm and 1.5 nm It becomes. Thereby, since the surface of the single crystal SiC substrate 5 is planarized at the molecular level, it is possible to precisely produce a fine structure on the substrate surface.

  Next, the crucible (fitting container) 2 and the high-temperature vacuum furnace 11 that realize the contents described in FIG. 3 will be described with reference to FIGS. FIG. 4 is a schematic diagram showing a high-temperature vacuum furnace used for heat treatment for producing a SiC substrate (single crystal SiC substrate 5 or the like). FIG. 5 is a sectional view showing in detail the main heating chamber and the preheating chamber of the high-temperature vacuum furnace. FIG. 6A is an external view photograph of the crucible 2 taken from above, and FIG. 6B is a cross-sectional micrograph of the crucible 2. FIG. 7 is a schematic diagram for explaining the carbon getter effect.

  The heat treatment described in FIG. 3 can be performed using, for example, a high-temperature vacuum furnace as a heat treatment apparatus illustrated in FIGS. Hereinafter, this high temperature heating furnace will be described. As shown in FIGS. 4 and 5, the high-temperature vacuum furnace 11 includes a main heating chamber 21 capable of heating the object to be processed to a temperature of 1000 ° C. or more and 2200 ° C. or less, and the object to be processed having a temperature of 500 ° C. or more. And a preheating chamber 22 that can be preheated to a temperature. The preheating chamber 22 is disposed below the main heating chamber 21 and is adjacent to the main heating chamber 21 in the vertical direction. The high-temperature vacuum furnace 11 includes a heat insulating chamber 23 disposed below the preheating chamber 22. The heat insulation chamber 23 is adjacent to the preheating chamber 22 in the vertical direction.

The high-temperature vacuum furnace 11 includes a vacuum chamber 19, and the main heating chamber 21 and the preheating chamber 22 are provided inside the vacuum chamber 19. A turbo molecular pump 34 as a vacuum forming device is connected to the vacuum chamber 19 so that a vacuum of, for example, 10 ⁻² Pa or less, preferably 10 ⁻⁷ Pa or less can be obtained in the vacuum chamber 19. Yes. A gate valve 25 is interposed between the turbo molecular pump 34 and the vacuum chamber 19. Further, an auxiliary rotary pump 26 is connected to the turbo molecular pump 34.

  The high-temperature vacuum furnace 11 includes a moving mechanism 27 that can move an object to be processed between the preheating chamber 22 and the main heating chamber 21 in the vertical direction. The moving mechanism 27 includes a support body 28 that can support an object to be processed, and a cylinder portion 29 that can move the support body 28 up and down. The cylinder portion 29 includes a cylinder rod 30, and one end of the cylinder rod 30 is connected to the support body 28. The high-temperature vacuum furnace 11 is provided with a vacuum gauge 31 for measuring the degree of vacuum and a mass analyzer 32 for performing mass spectrometry.

  The vacuum chamber 19 is connected to a stock chamber (not shown) for storing an object to be processed through a conveyance path 65. The transport path 65 can be opened and closed by a gate valve 66.

  The main heating chamber 21 is formed in a regular hexagonal shape in a plan sectional view and is disposed in the upper part of the internal space of the vacuum chamber 19. As shown in FIG. 5, a mesh heater 33 as a heater is provided inside the main heating chamber 21. A first multilayer heat reflecting metal plate 41 is fixed to the side wall and ceiling of the main heating chamber 21, and the heat of the mesh heater 33 is directed toward the center of the main heating chamber 21 by the first multilayer heat reflecting metal plate 41. It is configured to reflect.

  As a result, a layout is realized in which the mesh heater 33 is arranged so as to surround the object to be processed as a heat treatment target in the main heating chamber 21 and the multilayer heat reflecting metal plate 41 is arranged on the outer side. Therefore, the workpiece can be heated strongly and evenly, and the temperature can be raised to a temperature of 1000 ° C. or higher and 2200 ° C. or lower.

  The ceiling side of the main heating chamber 21 is closed by a first multilayer heat reflecting metal plate 41, while a through hole 55 is formed in the first multilayer heat reflecting metal plate 41 at the bottom. The object to be processed can move between the main heating chamber 21 and the preheating chamber 22 adjacent to the lower side of the main heating chamber 21 through the through hole 55.

  A part of the support 28 of the moving mechanism 27 is inserted into the through hole 55. The support 28 has a configuration in which a second multilayer heat-reflecting metal plate 42, a third multilayer heat-reflecting metal plate 43, and a fourth multilayer heat-reflecting metal plate 44 are arranged at intervals from each other in order from the top. .

  The three multilayer heat-reflecting metal plates 42 to 44 are all arranged horizontally and are connected to each other by a column portion 35 provided in the vertical direction. A cradle 36 is disposed in a space sandwiched between the second multilayer heat-reflecting metal plate 42 and the third multilayer heat-reflecting metal plate 43, and an object to be processed (for example, the single crystal SiC substrate) is placed on the cradle 36. 5) can be placed. In the present embodiment, the cradle 36 is made of tantalum carbide.

  A flange is formed at the end of the cylinder rod 30 of the cylinder portion 29, and this flange is fixed to the lower surface of the fourth multilayer heat reflecting metal plate 44. With this configuration, the object to be processed (single crystal SiC substrate 5) on the cradle 36 can be moved up and down together with the three multilayer heat reflecting metal plates 42 to 44 by expanding and contracting the cylinder portion 29.

  The preheating chamber 22 is configured by surrounding the space below the main heating chamber 21 with a multilayer heat reflecting metal plate 46. The preheating chamber 22 is configured to be circular in a plan sectional view. In the preheating chamber 22, no heating means such as the mesh heater 33 is provided.

  As shown in FIG. 5, a through-hole 56 is formed in the multilayer heat reflecting metal plate 46 at the bottom surface of the preheating chamber 22. Further, in the multilayer heat reflecting metal plate 46 that forms the side wall of the preheating chamber 22, a passage hole 50 is formed in a portion facing the transport path 65. Further, the high temperature vacuum furnace 11 includes an opening / closing member 51 capable of closing the passage hole 50.

  The heat insulating chamber 23 adjacent to the lower side of the preheating chamber 22 is partitioned on the upper side by the multilayer heat reflecting metal plate 46, and on the lower side and the side portion by the multilayer heat reflecting metal plate 47. A through-hole 57 is formed in the multilayer heat reflecting metal plate 47 covering the lower side of the heat insulating chamber 23 so that the cylinder rod 30 can be inserted.

  A housing recess 58 is formed in the multilayer heat reflecting metal plate 47 at a position corresponding to the upper end of the through hole 57. The storage recess 58 can store the fourth multilayer heat-reflecting metal plate 44 provided in the support 28.

  Each of the multilayer heat reflecting metal plates 41 to 44, 46, and 47 has a structure in which metal plates (made of tungsten) are laminated at a predetermined interval. Also in the opening / closing member 51, a multilayer heat reflecting metal plate having the same configuration is used for a portion that closes the passage hole 50.

  Any material can be used as the material of the multilayer heat-reflecting metal plates 41 to 44, 46, 47 as long as the material has sufficient heating characteristics with respect to the heat radiation of the mesh heater 33 and has a melting point higher than the ambient temperature. Can be used. For example, in addition to tungsten, high melting point metal materials such as tantalum, niobium, molybdenum, and carbides such as tungsten carbide, zirconium carbide, tantalum carbide, hafnium carbide, molybdenum carbide, etc. are used. 46, 47. Further, an infrared reflection film made of gold, tungsten carbide or the like may be further formed on the reflection surface.

  And the multilayer heat | fever reflective metal plates 42-44 with which the support body 28 is equipped are the structures which laminated | stacked the punch metal structure tungsten plate which has many small through-holes at predetermined intervals, varying the position of the said through-hole. It has become.

  Further, the number of stacked second multilayer heat reflecting metal plates 42 provided in the uppermost layer of the support 28 is smaller than the number of stacked first multilayer heat reflecting metal plates 41 in the main heating chamber 21.

With this configuration, the single crystal SiC substrate 5 as an object to be processed is stored in an appropriate container in order to prevent contamination in the vacuum chamber 19. The container may be a crucible 2 described later, or may be another container. In this state, the single crystal SiC substrate 5 is introduced into the vacuum chamber 19 from the transfer path 65 and placed on the cradle 36 in the preheating chamber 22. When the mesh heater 33 is driven in this state, the main heating chamber 21 is heated to a predetermined temperature of about 1,000 ° C. to 2200 ° C. (this time about 1800 ° C.). At this time, the pressure in the vacuum chamber 19 is adjusted to 10 ⁻³ or less, preferably 10 ⁻⁵ or less by driving the turbo molecular pump 34.

  Here, as described above, the number of laminated second multilayer heat reflecting metal plates 42 of the support 28 is smaller than the number of laminated first multilayer heat reflecting metal plates 41. Accordingly, a part of the heat generated by the mesh heater 33 is appropriately supplied (distributed) to the preheating chamber 22 via the second multilayer heat reflecting metal plate 42, and the single crystal SiC substrate in the preheating chamber 22 is heated to 500 ° C. Preheating can be performed so that the predetermined temperature (for example, 800 ° C.) is reached. That is, preheating can be realized without installing a heater in the preheating chamber 22, and a simple structure of the preheating chamber 22 can be realized.

  After performing the above-mentioned preheating process for a predetermined time, the cylinder part 29 is driven and the support body 28 is raised. As a result, the single crystal SiC substrate passes through the through hole 55 from the lower side and moves into the main heating chamber 21. Thereby, the main heat treatment is immediately started, and the single crystal SiC substrate in the main heating chamber 21 can be rapidly heated to a predetermined temperature (about 1800 ° C.).

In this process, the single crystal SiC substrate 5 is held at the above temperature for about 5 minutes or more. Thereby, the surface of the single crystal SiC substrate reacts with silicon atoms, and the surface of the single crystal SiC substrate is flattened. More specifically, as shown in FIG. 3 (b), the damaged layer on the surface of the single-crystal SiC substrate, the carbon of unstable sites, and a part of SiC react with silicon atoms, so that Si ₂ which is a gas molecule. C and SiC ₂ are generated, and the damaged layer and the unstable site are removed. Thereby, the surface of the SiC substrate is not carbonized, and a single crystal SiC substrate flat at the molecular level is formed.

  As shown in FIG. 6A, the crucible 2 includes an upper container 2a and a lower container 2b that can be fitted to each other. The crucible 2 is configured to exhibit a carbon getter effect described later when high temperature processing is performed under vacuum. Specifically, the crucible 2 is made of tantalum metal and exposes the tantalum carbide layer to the internal space. It is prepared to let you. Thereby, the crucible (fitting container) 2 can be made to exhibit the carbon getter function well, and the internal space can be maintained in a high purity silicon atmosphere.

More specifically, as shown in FIG. 6B, the crucible 2 has a TaC layer formed on the outermost layer, a Ta ₂ C layer formed on the inner side of the TaC layer, and a base layer on the inner side. The tantalum metal as the material is arranged. In addition, since the bonding state of tantalum and carbon shows temperature dependence, the crucible 2 has TaC having a high carbon concentration arranged in the surface layer portion, and Ta ₂ C having a slightly low carbon concentration arranged inside, Furthermore, it is the structure which has arrange | positioned the tantalum metal of the base material whose carbon concentration is zero inside.

  When processing as shown in FIG. 3 is performed, an unillustrated silicon pellet as a silicon supply source is placed inside the crucible 2 together with the single crystal SiC substrate 5. By heating the crucible 2 with the high-temperature vacuum furnace 11, the flattening process of the single crystal SiC substrate 5 is performed. Note that the heating temperature at this time is preferably 1500 ° C. or higher and 2200 ° C. or lower, and more preferably 1900 ° C. or higher and 2200 ° C. or lower.

  The crucible 2 is placed in the preheating chamber 22 of the high temperature vacuum furnace 11 as shown by the chain line in FIG. Next, the crucible 2 in the preheating chamber 22 is moved to the main heating chamber 21 that has been heated to about 1800 ° C. in advance by driving the cylinder portion 29, and the temperature is rapidly increased.

  In addition, it is preferable that the atmosphere in the crucible 2 is maintained at about 1 Pa or less during heating in the main heating chamber 21. Moreover, it is preferable that the play of a fitting part when the upper container 2a and the lower container 2b are fitted together is about 3 mm or less. As a result, a substantially sealed state is realized, and in the heat treatment in the main heating chamber 21, the silicon pressure in the crucible 2 is increased to a pressure higher than the external pressure (pressure in the main heating chamber 21), and impurities are removed. Intrusion into the crucible 2 through this fitting portion can be prevented.

  By this temperature rise, the internal space of the crucible 2 is maintained at the saturated vapor pressure of silicon. Further, as described above, the surface of the crucible 2 is covered with a tantalum carbide layer, and the tantalum carbide layer (TaC layer) is exposed to the internal space of the crucible 2. Therefore, as long as the high temperature treatment is continued under vacuum as described above, the crucible 2 has a function of continuously adsorbing and taking in carbon atoms from the surface of the tantalum carbide layer as shown in FIG. In this sense, it can be said that the crucible 2 of this embodiment has a carbon atom adsorption ion pump function (ion getter function). Thereby, only the carbon vapor is selectively occluded in the crucible 2 out of the silicon vapor and the carbon vapor contained in the atmosphere in the crucible 2 during the heat treatment, so that the inside of the crucible 2 is kept in a high purity silicon atmosphere. be able to.

  As described above, the planarization method (manufacturing method) of the single crystal SiC substrate includes the following steps. That is, the heat treatment includes a preheating step and a main heating step. In the preheating step, the crucible (fitting container) 2 containing the single crystal SiC substrate 5 is heated at a temperature of 800 ° C. or higher in the preheating chamber. In the main heating step, the single crystal SiC substrate 5 is moved from 1500 ° C. to 2200 ° C. by moving the crucible 2 from the preheating chamber to a main heating chamber heated in advance at a temperature of 1500 ° C. to 2200 ° C. Heat at a temperature of. In this way, the single crystal SiC substrate 5 is accommodated in the crucible 2 and preheated in advance, and is moved from the preheating chamber to the main heating chamber, whereby the single crystal SiC substrate 5 is rapidly heated and heated. Processing can be performed. Therefore, the planarization process can be performed efficiently in a short time, and the control thereof is facilitated. Further, the high-temperature vacuum furnace 11 (high-temperature high-vacuum heat treatment apparatus) of the present embodiment ensures a uniform heating region in a range of φ165 mm in the horizontal direction and 80 mm in the vertical direction. As a result, the entire surface of about 10 single crystal SiC substrates 5 can be flattened collectively.

Next, the influence of temperature in the heating process of the single crystal SiC substrate under a saturated vapor pressure of silicon and in a high vacuum environment (specifically, an environment where the pressure is 10 ⁻² Pa or less) will be described. The heating temperature in this heating step is preferably 1500 ° C. or higher and 2200 ° C. or lower, more preferably 1900 ° C. or higher and 2200 ° C. or lower. Further, it is preferable that the oxygen partial pressure is 10 ⁻⁵ Pa or less, the internal atmosphere of the fitting container is under silicon vapor pressure, and the internal pressure is 1 Pa or less.

  First, with reference to FIG. 8 to FIG. 15, the principle of variation in the silicon vapor pressure environment with respect to the heat treatment temperature and the relationship between the surface roughness with respect to the gas phase treatment temperature of the 4H—SiC single crystal will be described.

  FIG. 8 is a schematic diagram showing the variation of the silicon vapor pressure due to the difference in heating temperature. As shown in FIG. 8, when the heating temperature is high, the silicon vapor pressure in the atmosphere and the amount of silicon desorbed from both single-crystal SiC substrates are increased as compared with the case where the heating temperature is low. This means that when heat treatment is performed in a high temperature environment, a damage layer, an unstable site, or the like on the surface of the single crystal SiC substrate is easily removed. Hereinafter, the concept shown in FIG. 8 will be specifically described with reference to a demonstration example.

  FIG. 9 is a graph showing the relationship between the heat treatment temperature and the surface roughness of the single crystal SiC substrate. The horizontal axis in FIG. 9 indicates the temperature of the heat treatment (annealing temperature), and the vertical axis indicates the surface roughness (Ra). In this example, the Si surface and C surface of single crystal 4H—SiC were subjected to heat treatment for 15 minutes while changing the temperature, and the average surface roughness was examined. From the graph of FIG. 9, the surface flattened in the case where the heat treatment is performed in a high temperature environment of 1500 ° C. or higher in any of the (0001) Si surface and the (000-1) C surface of 4H—SiC. It was found that was progressing. Thus, it can be seen from the demonstration example shown in FIG. 9 that the surface is more easily flattened as the heat treatment is performed in a high temperature environment.

  Next, the uniformity of the planarized surface will be described with reference to FIGS. FIG. 10 is a graph showing the distribution of the step height with respect to the terrace width on the surface of the single crystal SiC substrate. FIG. 11 is a photomicrograph showing the states of the (0001) Si surface and (000-1) C surface of 4H—SiC.

  FIG. 10 shows the step height with respect to the terrace width of the step structure. The heat treatment (annealing) was performed at 1900 ° C. for 60 minutes. From the results shown in FIG. 10, it can be seen that a flat step structure at the molecular level is uniformly formed on the surface of the single crystal SiC substrate. From this result, by performing the heat treatment of the present invention, the 4H-SiC (0001) Si face and the (000-1) C face are both step heights (full unit or half) reflecting the crystal polymorphism. It can be seen that the surface can be terminated only by the unit.

  Next, with reference to FIG. 12 to FIG. 15, the tendency of the heat treatment (annealing) temperature and the step height formed on the surface will be described. 12 and 14 are graphs showing changes in the step height with respect to the heat treatment (annealing) temperature. The heat treatment (annealing) time was 60 minutes. 13 and 15 are photomicrographs showing the state of the surface of the single crystal SiC substrate at each annealing temperature.

  As a result, by performing the heat treatment, the surfaces of both the 4H—SiC single crystal and the 6H—SiC single crystal were terminated only at the step height (full unit or half unit) reflecting the crystal polymorphism. Further, as the heat treatment temperature increases, the step structure of full unit height (1.0 nm for 4H-SiC, 1.5 nm for 6H-SiC) is obtained in both cases of 4H-SiC and 6H-SiC. It was decomposed into steps of half unit height (0.5 nm for 4H-SiC, 0.75 nm for 6H-SiC). This result suggests that the heat treatment under a high temperature environment promotes the decomposition of the SiC substrate surface.

  As described above, the single crystal SiC substrate 5 of the present embodiment is manufactured by the following manufacturing method. The single crystal SiC substrate 5 is housed in a crucible 2 having a carbon getter effect, the inside of the crucible 2 is under a silicon vapor pressure and a high temperature vacuum, and the internal pressure of the crucible 2 is kept higher than the external pressure. However, the heating is controlled in the range of 1500 ° C. or higher and 2200 ° C. or lower. Thereby, the surface of the single crystal SiC substrate 5 is composed of a full unit height corresponding to one cycle in the stacking direction of SiC molecules constituting the single crystal SiC substrate 5 or a half unit height corresponding to a half cycle. Terminate in steps and flatten at the molecular level.

  Thereby, planarization at a molecular level, which is difficult by mechanical polishing or etching, can be performed. Further, since the steps are formed on the surface of single-crystal SiC substrate 5 in such a manner as to be self-organized, it is possible to suppress damage to the surface that has occurred in the planarization process by polishing or etching.

  Next, with reference to FIGS. 16 and 17, in the above-described method for planarizing single crystal SiC substrate 5, the amount of silicon vapor pressure in the fitting container (which is the same member as crucible 2) is kept large. A configuration for controlling in this way will be described. 16 and 17 are graphs showing the results of controlling the silicon vapor pressure amount (Si vapor pressure amount) in the fitting container by changing the volume and sealing degree of the fitting container. FIG. 16 shows a tendency of the etching rate of the 4H—SiC substrate with respect to the heat treatment (annealing) temperature. In FIG. 17, the tendency of the average step height formed in the 4H-SiC surface with respect to heat processing temperature is shown. The heat treatment time was 60 minutes.

  As described above, the amount of silicon vapor pressure in the fitting container is controlled by changing the volume and sealing degree of the fitting container. Specifically, experiments were conducted using containers having different volumes as fitting containers, such as a large container (which can accommodate a 6-inch size substrate) and a small container (which can accommodate a 3-inch size substrate). Here, the amount of silicon put in the container is constant. As shown in FIGS. 16 and 17, when a small fitting container is used, the silicon vapor pressure amount in the fitting container is increased. In other words, when the amount of silicon put into the container is constant, the amount of silicon vapor pressure inside the fitting container per unit volume is reduced when a container with a large volume is used than when a container with a small volume is used. It is shown that. This is considered because the rate of increase of the volume of the fitting container becomes larger than the rate of increase of the surface area inside the fitting container to which silicon adheres as the capacity of the fitting container increases.

  Moreover, when the fitting container with high sealing degree is used, the result is that the amount of silicon vapor pressure inside the fitting container increases. In addition, the change of a sealing degree can employ | adopt an appropriate method according to circumstances, such as changing the opening degree of a lid | cover or forming a hole in a fitting container.

  Further, when the amount of silicon vapor pressure in the fitting container increases, the etching rate with respect to the heating temperature (annealing temperature) and the tendency of the average step height formed on the 4H-SiC surface (the temperature at which the substrate surface is etched and The temperature at which the flattening process is performed) is shifted to the low temperature side. This result shows that etching and molecular level planarization of the surface of the single crystal SiC can be performed at a heating temperature lower than usual by keeping the vapor pressure amount of silicon large.

  As described above, the single crystal SiC substrate 5 is subjected to a process of maintaining a large amount of silicon vapor pressure in the fitting container, thereby etching the single crystal SiC substrate at a lower heating temperature, and the single crystal It is possible to planarize the surface level of the SiC substrate at the molecular level of the step height.

  As a result, the heating temperature required for etching the single crystal SiC substrate 5 and performing the planarization at the molecular level of the step height can be lowered, and the production of the single crystal SiC substrate 5 can be made efficient. .

  Further, in the single crystal SiC substrate 5 of the present embodiment, the amount of silicon vapor pressure in the fitting container is kept large by increasing the sealing degree of the fitting container.

  Thereby, the amount of silicon vapor pressure can be increased by adjusting the capacity of the fitting container and adjusting the sealing degree by adjusting the fitting part (adjustment of the position of the lid with respect to the fitting container).

  Next, a method for generating a carbon-based nanomaterial on the surface of a single crystal SiC substrate that has been subjected to the planarization process of the present invention will be described with reference to FIG. A single crystal SiC substrate that has been subjected to planarization is used as a base substrate. FIG. 18 is a schematic diagram for explaining the concept of generating a carbon-based nanomaterial on the surface of a single crystal SiC substrate.

In the carbon-based nanomaterial generation step, the flattened single crystal SiC substrate 5 shown in FIG. 18A is subjected to heat treatment again using the high-temperature vacuum furnace 11 described above. It is preferable that the flattened single crystal SiC substrate 5 is accommodated in a crucible (fitting container) 2 during this heating. Moreover, it is preferable that the fitting container used for the production | generation process of a carbon-type nano raw material is comprised with the tantalum carbide compound which does not form a silicon vapor pressure environment. Specifically, the crucible 2 is made of tantalum metal and is provided with a tantalum carbide layer exposed to the internal space. In the carbonization treatment step, it is preferable that the single crystal SiC substrate 5 is heat-treated in a state where the pressure in the furnace is 10 ⁻³ Pa or less and the oxygen partial pressure is 10 ⁻⁵ Pa or less.

Next, the flattened single crystal SiC substrate 5 is subjected to a high vacuum environment (specifically, the pressure is preferably 10 ⁻² Pa or less, more preferably 10 ⁻³ Pa or less). Heat in. The heating temperature at this time is preferably 1500 ° C. or higher and 2200 ° C. or lower, more preferably 1700 ° C. or higher and 2200 ° C. or lower. The high temperature vacuum furnace described above can be used for this heat treatment. For example, by performing heat treatment at 1800 ° C., the graphene sheet that is the carbon-based nanomaterial can be formed on the surface of the flattened single crystal SiC substrate 5. Moreover, it is preferable to heat-process in the state whose oxygen partial pressure is 10 < ^-5 > Pa or less. FIG. 18B is an external perspective view of the graphene sheet semiconductor wafer.

  Also in the surface carbonization treatment step in the method for producing the carbon-based nanomaterial, it is preferable to include a preheating step and a main heating step. In the preheating step, the fitting container containing the single crystal SiC substrate is heated at a temperature of 800 ° C. or higher in the preheating chamber. In the main heating step, the single-crystal SiC substrate is moved to 1500 ° C. or higher and 2200 ° C. by moving the fitting container from the preheating chamber to a main heating chamber heated in advance at a temperature of 1500 ° C. or higher and 2200 ° C. or lower. Heat at the following temperature. Thereby, the single crystal SiC substrate is accommodated in the fitting container and preheated in advance, and the heat treatment is performed by rapidly raising the temperature by moving from the preheating chamber to the main heating chamber. The process can be efficiently performed in a short time, and the control becomes easy. As in the flattening process, the high-temperature vacuum furnace 11 of this embodiment has a uniform heating area in a range of φ165 mm in the horizontal direction and 80 mm in the vertical direction, so that about 10 surfaces are flat. It is possible to carbonize the entire surface of the single crystal SiC substrate 5 that has been subjected to the chemical conversion treatment.

  FIG. 19 shows a demonstration example of the carbon nanomaterial formed on the single crystal SiC substrate by the process of FIG. FIG. 19 is an electron micrograph of the graphene sheet layer formed on the 4H—SiC (0001) Si surface and the (000-1) C surface by the heat treatment performed at 2100 ° C. for 60 minutes under high vacuum. . As a result, carbon nanomaterials including graphene sheets and carbon nanotubes were formed on both the (0001) Si face and the (000-1) C face of 4H—SiC. In principle, it is possible to control the thickness of the carbon nanomaterial to a molecular layer-level thin film by shortening the heating time. The heating time is preferably 1 minute or more and 60 minutes or less.

  As described above, the single crystal SiC substrate with a carbon nanomaterial of the present embodiment is configured by forming a graphene sheet or a carbon nanotube on the surface of the single crystal SiC substrate 5 flattened at the molecular level.

  As a result, a thin film or carbon nanotube of a molecular layer of a graphene sheet formed of a carbon nanomaterial can be formed uniformly and large (in a large area) on the surface of the single crystal SiC substrate 5 flattened at the molecular level. it can.

  Moreover, the single crystal SiC substrate with a carbon nanomaterial of this embodiment is manufactured by a manufacturing method including the following carbonization process. That is, in the carbonization treatment step, the single crystal SiC substrate 5 is heated in a temperature range of 1500 ° C. to 2200 ° C. in a crucible 2 having a carbon getter effect in a high-temperature vacuum environment. Silicon is sublimated, and a carbon film graphene sheet molecular layer level thin film or carbon nanotube is formed on the surface of the single crystal SiC substrate by the remaining carbon.

  Thereby, the thin film or carbon nanotube of the graphene sheet molecular layer level of a carbon material can be efficiently produced | generated on the surface of the said single crystal SiC substrate 5 by carbonization process.

Moreover, the SiC substrate with a carbon nanomaterial of this embodiment is manufactured by the following manufacturing method. That is, in the carbonization step, the single crystal SiC substrate 5 is heat-treated in a state where the pressure in the furnace is 10 ⁻³ Pa or less and the oxygen partial pressure is 10 ⁻⁵ Pa or less.

  Thereby, it can prevent that another impurity penetrate | invades a SiC crystal layer in a carbonization process, and can obtain a SiC substrate with a high quality carbon nanomaterial.

  Next, with reference to FIG. 20, the manufacturing process of the SiC substrate wafer used as a board | substrate for carbon nano semiconductor devices and a high voltage | pressure-resistant device is demonstrated.

  In the manufacturing method of the present embodiment, first, as shown in FIG. 20A, a carbon supply feed substrate 7 is laminated on a 4H or 6H-single crystal SiC substrate 6p to form a laminate 8. The carbon supply feed substrate 7 is formed in a circular shape with no notches and a high roundness, and the diameter thereof is the same as the diameter of the single crystal SiC substrate 5. Further, the carbon supply feed substrate 7 is disposed so as to face the single crystal SiC substrate, and is positioned accurately so that they coincide with each other without deviation.

  The carbon supply feed substrate 7 is a substrate for supplying carbon atoms necessary for the liquid phase epitaxial growth of the SiC single crystal, and one having higher free energy than the 4H or 6H—SiC single crystal is used. Specifically, for example, a 3C—SiC single crystal, 3C—SiC polycrystal, or a carbon nanomaterial can be used as a substrate on the surface. In this embodiment, a 3C—SiC polycrystalline substrate is used as the carbon supply feed substrate 7.

  And this laminated body 8 is accommodated in the said crucible 2 with the unillustrated silicon pellet as a silicon supply source. In addition, as a supply form of silicon, instead of using the silicon pellets, for example, the supply may be performed using plate-like silicon attached to the inner wall of the crucible 2.

  Then, the crucible 2 in this state is heated by the high-temperature vacuum furnace 11 described above. The heating temperature at this time is preferably 1500 ° C. or higher and 2200 ° C. or lower, more preferably 1700 ° C. or higher and 1900 ° C. or lower.

  Specifically, the crucible 2 is placed in the preheating chamber 22 of the high temperature vacuum furnace 11 as shown by the chain line in FIG. 5 and preheated to about 800 ° C. Next, the crucible 2 in the preheating chamber 22 is moved to the main heating chamber 21 that has been heated to about 1800 ° C. in advance by driving the cylinder portion 29, and the temperature is rapidly increased. As a result, silicon evaporates from the silicon pellet, and the inside of the crucible 2 is maintained at the saturated vapor pressure of silicon.

  In addition, it is preferable that the atmosphere in the crucible 2 is maintained at about 1 Pa or less during heating in the main heating chamber 21. Moreover, it is preferable that the silicon pressure in the crucible 2 during heating is increased to a pressure higher than the external pressure (pressure in the main heating chamber 21). Thereby, it is possible to prevent impurities from entering the crucible 2.

  As described above, as shown in FIG. 20A, the ultrathin silicon melt layer 4 is interposed between the single crystal SiC substrate 5 and the carbon supply feed substrate 7, and the liquid by the metastable solvent epitaxy method (MSE) is used. Phase epitaxial growth can be performed. In order to use as a raw material for the silicon ultrathin melt layer 4, it is preferable to previously arrange a silicon plate, for example, between the single crystal SiC substrate 5 and the carbon supply feed substrate 7 in the laminate 8. . In the liquid phase epitaxial growth step, the laminate is preferably heated at a temperature of 1800 ° C. or higher and 2000 ° C. or lower. Thereby, an epitaxial growth process can be performed more favorably and efficiently.

  Here, the single crystal SiC substrate 5 and the carbon supply feed substrate 7 have the same diameter and are formed to have a large diameter of 2 inches or more, and are positioned so as to align with each other. Accordingly, it is possible to satisfactorily hold the silicon ultra-thin melt layer 4 between them, and long-term liquid phase epitaxial growth becomes possible.

  Furthermore, as described above, the tantalum carbide layer on the surface of the crucible 2 used in the liquid phase epitaxial growth step of FIG. 20A functions as a carbon getter. Accordingly, of the silicon vapor and carbon vapor in the internal space of the crucible 2, only carbon is selectively occluded in the crucible 2. As a result, the inside of the crucible 2 can be maintained in a high-purity silicon atmosphere, and good liquid phase epitaxial growth becomes possible.

  By the above heat treatment, as shown in FIG. 20B, a flat 4H—SiC single crystal epitaxial growth layer 5d having no micropipe defects is formed on the surface of the 4H—SiC single crystal layer 5c, and epitaxial growth is performed. A single crystal SiC substrate 6q with a layer can be obtained.

  The heat treatment performed in the liquid phase epitaxial growth step described above preferably includes a preheating step and a main heating step. In the preheating step, the fitting container containing the single crystal SiC substrate is heated at a temperature of 800 ° C. or higher in the preheating chamber. In the main heating step, the single crystal SiC substrate is moved to 1500 ° C. or higher and 2200 ° C. or lower by moving the fitting container from the preheating chamber to a main heating chamber heated in advance at a temperature of 1500 ° C. or higher and 2200 ° C. or lower. It is preferable to heat at the temperature. Thereby, an epitaxial growth process can be performed more favorably and efficiently. Further, since the laminated body 8 that has been preheated in advance is moved from the preheating chamber to the main heating chamber, the temperature is rapidly raised and the heat treatment is performed, so that the liquid phase epitaxial growth process is efficiently performed in a short time. This is because the control can be facilitated. Further, the high-temperature vacuum furnace 11 has a uniform heating area in a range of φ165 mm in the horizontal direction and 80 mm in the vertical direction. Therefore, by using the high-temperature vacuum furnace 11, the epitaxial layer up to 6 inches can be grown in principle. Further, since it is possible to perform an epitaxial process on a plurality of sets of about 10 sets at once, a single-crystal SiC substrate with an epitaxial layer can be obtained efficiently in a short time.

  In this embodiment, by using the MSE method in which the growth kinetics is controlled only by the concentration gradient without the temperature gradient, the epitaxial growth can be automatically stabilized, and the high-quality SiC single crystal epitaxial growth layer 5d can be formed. Can be obtained. Furthermore, since it is not necessary to form a temperature gradient in the system, the apparatus configuration for performing the process can be simplified, and the process control is also simplified. In addition, since the thickness of the silicon ultrathin melt layer 4 is extremely small, the diffusion of carbon from the carbon supply feed substrate 7 is good, and the solubility of carbon in the silicon ultrathin melt layer 4 (solvent) is increased by increasing the temperature. Since it is not necessary to raise the temperature, it is easy to lower the process temperature. The crystallization driving force in the MSE method is generated by a difference in free energy between the SiC seed substrate (seed substrate) and the carbon supply feed substrate facing each other through the ultrathin silicon melt in a solution environment having no temperature gradient. It is. That is, since a substrate having higher free energy is more easily dissolved in the silicon solvent, if there is a difference in free energy between the substrates, a concentration gradient of carbon (solute) occurs in the ultrathin silicon melt. Therefore, in the MSE method, the growth kinetics is controlled only by this concentration gradient.

  As described above, the single crystal SiC substrate with an epitaxial growth layer of this embodiment is manufactured by the following manufacturing method. That is, the manufacturing method includes a stacking step, a containing step, and a liquid phase epitaxial growth step. In the laminating step, the single crystal SiC substrate 5 and the carbon supply feed substrate 7 are arranged to face each other, and a silicon pellet or a silicon substrate is interposed therebetween to constitute the laminate 8. In the housing step, the laminate 8 is housed in the crucible 2 having a carbon getter effect. In the epitaxial growth step, the inside of the crucible 2 is under a silicon vapor pressure and a high temperature vacuum, and the internal pressure of the crucible 2 is maintained higher than the external pressure, while the single crystal SiC substrate 5 and the carbon supply feed substrate 7 are Is heated while interposing the ultrathin silicon melt layer 4 between them, the single crystal 4H-SiC is grown on the surface of the single crystal SiC substrate 5 by liquid phase epitaxial growth by the metastable solvent epitaxy method. An epitaxial growth layer is formed.

  As a result, a high-concentration epitaxial layer or a high-purity active layer epitaxial layer can be grown in a liquid phase by the metastable solvent epitaxy method on the surface of the single-crystal SiC substrate 5 flattened at the molecular level. An epitaxially grown crystal can be obtained.

  As described above, the single crystal SiC substrate with an epitaxial growth layer of this embodiment is manufactured by the following manufacturing method. That is, in the liquid phase epitaxial growth step, the inside of the fitting container is placed under a vapor pressure of silicon and under a high temperature vacuum, and the heating is controlled at 1500 ° C. or higher and 2200 ° C. or lower.

  Thereby, an epitaxial growth process can be performed more favorably and efficiently.

  In addition, by controlling the amount of silicon vapor pressure in the liquid phase epitaxial growth step, the liquid phase epitaxial growth step can be controlled as follows. For example, by keeping the amount of silicon vapor pressure in the crucible 2 large, the silicon melt layer during the heat treatment can be held for a long time. Further, by keeping the amount of silicon vapor pressure in the crucible 2 small, the surplus silicon melt present in the final stage of the liquid phase epitaxial growth process (the stage where the epitaxial growth layer of the desired film thickness is formed) can be cleaned and It can be removed quickly (without roughening the epitaxial growth surface).

  In addition, after the manufacturing process of the single crystal SiC substrate with an epitaxial growth layer, the planarization treatment of the present invention is performed to form a single crystal SiC substrate with an epitaxial growth layer that is flat at the molecular level of sub-nano order from which surface defects have been removed. You can also.

  Next, an example of SiC epitaxial growth by the MSE method will be described with reference to FIG. FIG. 21 is a cross-sectional photograph of the laminate after the liquid phase epitaxial step. In the example of FIG. 21, a 4H—SiC (0001) substrate was used as the seed substrate, and a 3C—SiC polycrystalline substrate was used as the carbon supply feed substrate (feeder). In the liquid phase epitaxial step, the laminated body in which a silicon melt was interposed between the 4H—SiC (0001) substrate and the 3C—SiC polycrystalline substrate was heat-treated at 1900 ° C. for 1 hour. As a result, a 4H—SiC epitaxial layer having a thickness of about 20 μm was formed on the 4H—SiC (0001) Si surface.

  In the manufacturing method of the SiC single crystal epitaxial growth, the impurity concentration in the SiC epitaxial layer can be controlled by controlling the impurity concentration of the carbon supply feed substrate serving as a feeder. Thereby, a SiC substrate wafer with a 4H-SiC or 6H-SiC epitaxial film of a high-concentration epitaxial layer (10 to the 17th to 19th power of nitrogen concentration conversion) or a high purity active layer epitaxial layer (10 to the 13th to 15th power of nitrogen concentration conversion). Can be manufactured.

  Next, referring to FIG. 22, a demonstration example will be described in which the impurity concentration in the SiC epitaxial layer is controlled by controlling the impurity concentration of the carbon supply feed substrate serving as a feeder. FIG. 22 is a graph showing a change in the nitrogen doping concentration with respect to the film thickness of the SiC substrate.

  In this demonstration example, an epitaxial layer was formed using substrates having different nitrogen content rates in the 3C-SiC polycrystalline layer serving as a feeder. In the liquid phase epitaxial process, a 4H—SiC (0001) substrate was used as a seed substrate. The heat treatment temperature was 1900 ° C. and the heat treatment time was 60 minutes. In FIG. 22, the portion of the SiC substrate having a film thickness of 5 μm or less indicates a SiC epitaxial layer, and the portion of 5 μm or more indicates a single crystal 4H—SiC substrate. As a result, the concentration of nitrogen contained in the epitaxial layer was higher when 3C-SiC polycrystal having a high nitrogen concentration was used as the feed. This result suggests that the impurity concentration in the SiC epitaxial layer can be controlled by controlling the impurity concentration of the carbon supply feed substrate serving as a feeder.

  As described above, the single crystal SiC substrate with an epitaxial growth layer of the present embodiment is manufactured by the following manufacturing method. That is, the impurity concentration of the carbon supply feed substrate 7 is controlled in the liquid phase epitaxial growth step.

  Thereby, it is possible to control the impurity concentration in the epitaxial layer using the concentration gradient generated by the difference in free energy between the substrates. Therefore, it is possible to efficiently manufacture a single crystal SiC substrate with a high concentration epitaxial layer or a high purity active layer epitaxial layer.

  Next, with reference to FIGS. 23 to 38, the formation of the SiC single crystal epitaxial growth layer on the surface of the seed substrate obtained by grooving the SiC substrate and the graphene sheet film forming step will be described. In this embodiment, the manufacturing process of the single crystal SiC substrate wafer includes a substrate preparation process, a liquid phase epitaxial process, and a surface carbonization process. The groove processing is performed by a UV laser or a dicing saw. When using a UV laser, it is preferable that a laser wavelength of 266 nm or less is used for the concave processing of the SiC polycrystalline substrate. This enables groove processing by a photoreaction that does not cause thermal damage to the SiC polycrystalline substrate.

  FIG. 23 shows a first example for forming a SiC single crystal epitaxial growth layer and a graphene sheet film. In this example, first, as shown in FIG. 23A, a 4H or 6H-single crystal SiC substrate that has been grooved is prepared as a seed substrate (substrate preparation step). This groove processing is performed so as to divide the surface of the single crystal SiC substrate into a plurality of regions (segments) as shown in FIG. Note that one area defined by the grooves is equivalent to one chip size of the semiconductor device.

  Next, as the liquid phase epitaxial step, an SiC single crystal is epitaxially grown on the surface of each segment by MSE. In the example of FIG. 23, the MSE liquid phase growth method is a laminate in which a silicon ultrathin melt layer 4 is interposed between a seed substrate and a carbon supply feed substrate 7 that have been grooved as shown in FIG. And this is done by heating. In the liquid phase epitaxial process, a 3C-SiC polycrystalline substrate was used as the carbon supply feed substrate serving as a feeder.

  As shown in FIG. 23C, SiC epitaxial layer 12 is formed on the surface of each segment. The heating temperature for this heat treatment is preferably 1500 ° C. or higher and 2200 ° C. or lower, and more preferably 1800 ° C. or higher and 2000 ° C. or lower. Thereby, in the said epitaxial growth process, a SiC single crystal can be epitaxially grown more satisfactorily and efficiently on the surface of the single crystal SiC substrate 5.

  In addition, by using the seed substrate divided into a plurality of segments as described above, it propagated from the seed substrate in the process of growing a SiC epitaxial layer in the thickness direction (hereinafter, vertical direction) of the substrate in the epitaxial growth step. Crystal defects (for example, screw dislocations, basal plane dislocations, and c-axis orientation defects) are released from the side surfaces of the SiC epitaxial layer. By opening the side surfaces of the dislocation defects, a substantially defect-free SiC single crystal epitaxial growth layer can be obtained above the SiC epitaxial layer.

  Furthermore, in the liquid phase epitaxial process, it is possible to control the impurity concentration in the SiC epitaxial layer by controlling the impurity concentration of the carbon supply feed substrate serving as a feeder. As a result, a 4H—SiC high-concentration epitaxial layer (nitrogen concentration conversion 10 to the 17th to the 19th power) or high-purity active layer epitaxial layer (nitrogen concentration conversion 10 to 13 to 15) is formed on the SiC single crystal divided into semiconductor chip sizes. Formation).

Then, in the surface carbonization step (carbonization treatment step) which is the final stage, as shown in FIG. 23 (d), the SiC substrate is subjected to heat treatment at a temperature of 1500 ° C. or higher and 2200 ° C. or lower under high temperature vacuum. A graphene sheet (graphene molecular thin film) 9 is formed on the SiC epitaxial layer formed on the surface. Specifically, the heat treatment is performed at the above temperature in a reduced pressure environment where the furnace pressure is 10 ⁻³ Pa or less and the oxygen partial pressure is maintained at 10 ⁻⁵ Pa or less. In each 4H-SiC epitaxial layer divided into two, the graphene sheet 9 is formed on the entire surface.

  As described above, the single crystal SiC substrate with an epitaxial growth layer of this embodiment is manufactured by the following manufacturing method. That is, the manufacturing method includes a groove forming step of performing groove processing on the single crystal SiC substrate so as to divide the surface of the single crystal SiC substrate into a plurality of regions of a semiconductor device 1 chip size. Also, in the liquid phase epitaxial growth step, a single crystal epitaxial growth layer is formed for each region of the single crystal SiC substrate that has been subjected to groove processing, so that the semiconductor device is divided on the surface of the single crystal SiC substrate for each chip size. 4H-SiC single crystal is produced.

  Thereby, fine single crystal SiC divided | segmented for every semiconductor device 1 chip size can be obtained. Further, by dividing the semiconductor device for each chip size, the dislocation defects are released from the side surface of the single crystal epitaxial growth layer, and a defect-free region is formed above the single crystal epitaxial growth layer. Since defects appearing on the surface of the single crystal epitaxial growth layer can be satisfactorily suppressed, yield can be improved.

  Moreover, the single crystal SiC substrate with an epitaxial growth layer of this embodiment is manufactured by the following manufacturing method. That is, the impurity concentration of the carbon supply feed substrate 7 is controlled in the liquid phase epitaxial growth step.

  Thereby, it is possible to control the impurity concentration in the epitaxial layer using the concentration gradient generated by the difference in free energy between the substrates. Therefore, it is possible to efficiently manufacture a single crystal SiC substrate with a high concentration epitaxial layer or a high purity active layer epitaxial layer.

  Moreover, the SiC substrate with a carbon nanomaterial of this embodiment is manufactured by a method including the following carbonization treatment process. That is, in the carbonization treatment step, the single crystal SiC substrate with an epitaxial growth layer is heated in a range of 1500 ° C. or higher and 2200 ° C. or lower in a high-temperature vacuum environment. As a result, silicon on the surface of the single crystal epitaxial growth layer is sublimated, and a thin film graphene sheet or carbon nanotube at a molecular layer level is generated on the surface of the single crystal SiC substrate with the epitaxial growth layer by the remaining carbon.

  Thereby, the molecular layer level thin film comprised with a carbon nanomaterial can be efficiently and satisfactorily produced | generated on the single crystal SiC substrate with an epitaxial growth layer.

Furthermore, the SiC substrate with a carbon nanomaterial of this embodiment is manufactured by the following manufacturing method. That is, in the carbonization treatment step, the single crystal SiC substrate with an epitaxial growth layer is heat-treated in a state where the furnace pressure is 10 ⁻³ Pa or less and the oxygen partial pressure is 10 ⁻⁵ Pa or less.

  Thereby, it can prevent that another impurity penetrate | invades a SiC crystal layer in a carbonization process, and can obtain a SiC substrate with a high quality carbon nanomaterial.

  FIG. 24 shows a second example for forming a SiC single crystal epitaxial growth layer and a graphene sheet film. In this example, first, as shown in FIG. 24A, a seed substrate 81 subjected to groove processing is prepared. In this example, the seed substrate 81 is a polycrystalline SiC substrate formed by forming a 3C-SiC polycrystalline film on the graphite substrate 82 that has been grooved by a CVD method. The groove processing is performed in the same manner as in the example shown in FIG.

  Instead of the seed substrate 81 based on the graphite substrate 82, a substrate obtained by coating the surface of a grooved metal substrate (metal body) with a SiC polycrystalline film by a CVD method may be used. Also in this case, the manufacturing cost of the SiC polycrystalline substrate can be suppressed.

  Next, as shown in FIG. 24B, masking using pyrolytic graphite is performed on the surface of the seed substrate 81 subjected to the groove processing. Specifically, the 3C-SiC substrate surface is coated with the mask material (the pyrolytic graphite). Then, an opening 83 of 1 μm to 100 μmΦ is formed in the mask material at the central portion of each segment.

  Next, 4H—SiC single crystal is heteroepitaxially grown in each opening 83 by the above-described MSE method. In this example, the MSE liquid phase growth method uses a laminate in which an ultrathin silicon melt layer 4 is interposed between a seed substrate 81 and a carbon supply feed substrate 7 as shown in FIG. It is preferable to carry out. In the example of FIG. 24, a 3C—SiC polycrystalline substrate was used as the carbon supply feed substrate 7 as a feeder in the MSE liquid phase growth process.

  At the end of the MSE liquid phase growth, as shown in FIG. 24D, a 4H—SiC single crystal heteroepitaxial layer is formed around each opening 83 in each segment.

  In the MSE liquid phase growth step described above, the 4H—SiC epitaxial layer 12 grows in the thickness direction of the substrate (hereinafter referred to as the vertical direction) and in the direction perpendicular thereto (hereinafter referred to as the horizontal direction). In addition, about the part in which the 4H-SiC single-crystal epitaxial growth layer is growing in the direction perpendicular to the thickness of the substrate, crystal defects (for example, screw dislocations, basal plane dislocations, and c-axes) existing inside the 3C-SiC substrate. (Such as orientation defects) does not propagate, so that a substantially defect-free single crystal 4H—SiC epitaxial growth layer can be obtained.

  Thus, the formation density and growth position of the 4H—SiC single crystal can be accurately controlled by using the method of masking the surface of the SiC polycrystal. Therefore, generation of new dislocations due to the coalescence of adjacent 4H—SiC single crystals can be suppressed, and crystal growth using carbon in the silicon melt efficiently becomes possible. In the liquid phase epitaxial growth step, it is preferable to maintain an environment in which the solubility of carbon in the silicon melt layer (solvent) is low. In the liquid phase epitaxial growth step, it is preferable to heat at a temperature of 1600 ° C. or higher and 2200 ° C. or lower.

  Further, in the MSE liquid phase growth step, the impurity concentration in the SiC epitaxial layer can be controlled by controlling the impurity concentration of the carbon supply feed substrate serving as a feeder. As a result, a 4H—SiC high-concentration epitaxial layer (nitrogen concentration conversion 10 to the 17th to 19th power) or a high-purity active layer epitaxial layer (nitrogen concentration conversion 10−13−13) is formed on the 3C—SiC polycrystal divided into the semiconductor chip size. 15th power) can be formed.

FIG. 24E shows a process of forming the graphene sheet 9 on the 4H—SiC epitaxial layer 12 as the final stage. Specifically, in each 4H-SiC epitaxial layer 12 divided into a plurality of segments, heat treatment is performed at a temperature of 1500 ° C. or more and 2200 ° C. or less in a reduced pressure environment where the furnace pressure is 10 ⁻³ Pa or less. The graphene sheet 9 is formed on the entire surface. The oxygen partial pressure is preferably 10 ⁻⁵ Pa or less.

  As described above, two examples of the growth process of the SiC single crystal epitaxial layer on the SiC substrate that has been grooved so as to be divided into the semiconductor chip size and the carbon nano thin film forming process on the epitaxial layer are described. did. FIG. 25 is a conceptual diagram of a multiple (semiconductor chip size) division type large-diameter semiconductor wafer, and shows a state in which the surface of the semiconductor wafer is divided into one chip size of a semiconductor device by linear grooves. It can be understood that the SiC substrate divided into these segments is obtained by connecting a large number of small-area conductive regions in parallel. When considered in this way, each SiC single crystal epitaxial growth layer has a defect-free region, which is suitable for use as, for example, a high-voltage semiconductor wafer, and an improvement in yield can be realized.

  Next, an example of heteroepitaxial growth of 4H—SiC single crystal on a 3C—SiC polycrystalline substrate and an example of an efficient growth method in the horizontal direction will be described with reference to FIGS. .

  The micrograph of FIG. 26 shows an example of heteroepitaxial growth of 4H—SiC single crystal on a 3C—SiC polycrystalline substrate. As shown in FIG. 26, the columnar crystals are 3C—SiC micro single crystal grains (3C—SiC polycrystal grains), and a cage-shaped 4H—SiC single crystal is formed on the crystal grains. The crystal polymorphs of these microcrystals can be specified by the Raman scattering method. In this example, the heat treatment temperature was 1800 ° C. and the heating time was 2 hours.

  Next, with reference to FIG. 27, changes in crystal polymorphism in the process of forming SiC fine single crystal grains will be described. FIG. 27 is a graph showing the relationship between the thickness of the SiC micro single crystal and the growth temperature. The horizontal axis in FIG. 27 is the thickness of the SiC micro single crystal formed by the MSE method, and the vertical axis is the heating temperature (1800 ° C. to 2000 ° C.). In addition, the heating time in a present Example is 30 minutes. As a result, when the thickness of the fine single crystal grains was 10 μm or more, the crystal polymorph was 4H—SiC. Moreover, as a result of confirming the change of the crystal polymorphism with respect to the thickness of the fine single crystal grains using Raman scattering, the crystal polymorphism was changed from 3C to 4H from the inside of the crystal to the surface. That is, in this MSE liquid phase growth environment, it is suggested that the 4H—SiC crystal polymorph is a system in which stable crystal growth is easy.

  As described above, the SiC substrate on which the heterocrystalline polymorphic single crystal SiC of this embodiment is epitaxially grown is manufactured by the following manufacturing method. That is, the manufacturing method includes a groove forming process, a mask process, and a liquid phase epitaxial growth process. In the groove forming step, the SiC polycrystalline substrate is subjected to groove processing so as to divide the surface of the SiC polycrystalline substrate into a plurality of regions of a semiconductor device 1 chip size. In the masking process, a mask is applied to each of the plurality of regions formed by the groove forming step, and a minute opening 83 is formed in a portion corresponding to the central portion of the mask region. In the liquid phase epitaxial growth step, a heterocrystalline polymorphic 4H—SiC single crystal is epitaxially grown in the vertical direction and the horizontal direction by metastable solvent epitaxy in the opening 83 of the SiC polycrystalline substrate that has been grooved to serve as a seed substrate. .

  As a result, the heterocrystalline polymorphic single crystal SiC can be grown for each of a plurality of regions of one chip size of the semiconductor device on the local region on the polycrystalline SiC substrate. Further, by dividing the semiconductor device for each chip size, the dislocation defects are released from the side surface of the single crystal epitaxial growth layer, and a defect-free region is formed above the single crystal epitaxial growth layer. In this manner, defects appearing on the surface of the single crystal epitaxial growth layer can be satisfactorily suppressed, and the yield can be improved.

  Moreover, the SiC substrate of this embodiment is manufactured by the following manufacturing method. That is, the impurity concentration of the carbon supply feed substrate 7 is controlled in the liquid phase epitaxial growth step.

  Thereby, it is possible to control the impurity concentration in the epitaxial layer using the concentration gradient generated by the difference in free energy between the substrates. Therefore, a polycrystalline SiC substrate with a high concentration epitaxial layer or a high purity active layer epitaxial layer can be efficiently produced.

  Moreover, the SiC substrate of this embodiment is manufactured by the following manufacturing method. That is, in the liquid phase epitaxial growth step, 4H-SiC is formed on the surface of fine SiC single crystal grains constituting the SiC polycrystalline substrate by heating at a temperature of 1600 ° C. or higher and 2200 ° C. or lower by a metastable solvent epitaxy method. A single crystal is epitaxially grown.

  Thereby, in the liquid phase epitaxial growth step, the 4H—SiC single crystal can be heteroepitaxially grown on the surface of the SiC polycrystalline substrate more satisfactorily and efficiently.

  In the SiC substrate of the present embodiment, the seed substrate 81 is configured by coating a polycrystalline SiC film on a carbon base material having grooves formed by a CVD method.

  Thereby, manufacturing cost can be reduced.

  Moreover, the SiC substrate with a carbon nanomaterial of this embodiment is manufactured by the manufacturing method shown below. In the manufacturing method, the surface of the 4H—SiC single crystal epitaxial growth layer grown in each region of the SiC substrate is heated at 1500 ° C. or more and 2200 ° C. or less in a high-temperature vacuum environment. This includes a carbonization treatment step in which silicon on the surface of the single crystal epitaxial growth layer is sublimated and a thin film graphene sheet or carbon nanotube at a molecular layer level is generated on the surface of the SiC substrate by the remaining carbon.

  Thereby, the thin film of the molecular layer level comprised with a carbon nanomaterial on a SiC substrate can be produced | generated efficiently and favorably.

Moreover, in the SiC substrate with a carbon nanomaterial of this embodiment, it is manufactured by a manufacturing method including the following steps. In the carbonization step, the substrate is heat-treated in a state where the pressure inside the furnace is 10 ⁻³ Pa or less and the oxygen partial pressure is 10 ⁻⁵ Pa or less.

  Thereby, it can prevent that another impurity penetrate | invades a SiC crystal layer in a carbonization process, and can obtain a SiC substrate with a high quality carbon nanomaterial.

  Next, with reference to FIGS. 28 and 29, a suitable method for efficiently growing the heteroepitaxial growth of the 4H—SiC single crystal on the 3C—SiC polycrystal surface in the horizontal direction will be described.

  FIG. 28 is a graph showing changes in the growth rate of the 4H—SiC epitaxial layer depending on the heat treatment (growth) temperature in the epitaxial growth step. Note that the vertical axis in FIG. 28 (a) is the growth rate in the horizontal direction, while the vertical axis in FIG. 28 (b) is the growth rate in the vertical direction.

  As shown in these graphs, when the heating temperature was increased from 1800 ° C. to 2000 ° C., the growth rate in the horizontal direction was faster than that in the vertical direction. When the heating temperature was 2000 ° C., the growth aspect ratio in the horizontal direction with respect to the vertical direction was about 1:10. From these results, it can be seen that 4H—SiC single crystal can be heteroepitaxially grown on the surface of the SiC polycrystalline substrate more satisfactorily and efficiently by using the heat treatment temperature condition in the epitaxial growth step.

  FIG. 29 shows an example of suitable temperature control in the liquid phase epitaxial process. In the temperature control example of FIG. 29, the supersaturation degree in the silicon melt is kept constant by maintaining the initial stage at a constant temperature. Thereafter, the supercooling process (temperature fluctuation process) including the cooling process and the temperature raising process is repeated a plurality of times to change the supersaturation degree of the epitaxial growth environment. Thus, by changing the supersaturation degree of the epitaxial growth environment in the fine SiC single crystal on the surface of the 3C-SiC polycrystal, the nucleation frequency of the fine SiC single crystal can be suppressed, and the horizontal direction (with respect to the growth film thickness) In the vertical direction). In addition, it is preferable to repeat heating and cooling several times in the range of 20-100 degreeC in supercooling.

  FIG. 30 is a photomicrograph showing the appearance of a fine SiC single crystal on the 3C-SiC polycrystal surface. FIG. 30A shows a state in which the supercooling process is repeated about 10 times after the temperature is kept constant in the initial stage of the temperature history. FIG. 30B shows the temperature history. This is a state in which the supercooling process is repeated about 10 times without initially maintaining a constant temperature. When the temperature is kept constant (FIG. 30 (a)), the temperature is 1900 ° C., and during the supercooling process, the heating temperature is raised and lowered at a rate of 12 ° C./min between 1850 ° C. and 1900 ° C. I let you. From these two photomicrographs, it can be seen that the nucleation frequency of the fine SiC single crystal on the surface of the 3C-SiC polycrystal can be suppressed by keeping the temperature constant in the initial stage of the liquid phase epitaxial process.

  Similarly to FIG. 30, FIG. 31 shows the micro SiC single crystal on the surface of the 3C—SiC polycrystal with a micrograph. FIG. 31A shows a state where the supercooling process is not performed, and FIG. 31B shows a state where the supercooling process is performed. In addition, in FIG.31 (b), the supercooling process which raised / lowered heating temperature from 1850 degreeC to 1900 degreeC at the speed | rate of 12 degrees C / min was repeated about 30 times. From these two micrographs, it can be seen that when a supercooling process is introduced in the epitaxial process, the fine SiC single crystal on the surface of the 3C-SiC polycrystal expands in the horizontal direction. This result shows that it is possible to promote the growth of a small SiC single crystal in the horizontal direction by introducing a supercooling process into the epitaxial process.

  As described above, the SiC substrate of the present embodiment is manufactured by the following manufacturing method. That is, in the liquid phase epitaxial growth process of the heterocrystalline polymorphic single crystal SiC, the heating temperature is maintained at a constant temperature at the initial heating stage of the metastable solvent epitaxy method, and the supersaturation degree of the epitaxial growth environment of the fine SiC single crystal varies. Limit. Thereby, the nucleation frequency of the fine SiC single crystal is suppressed, and control is performed so that only the single 4H—SiC single crystal of the heterocrystalline polymorph is epitaxially grown. Then, after the single 4H—SiC single crystal is epitaxially grown, a single minute 4H—SiC single crystal is grown in the horizontal direction by repeating the temperature fluctuation process consisting of a cooling process and a temperature raising process a plurality of times. Prompt.

  Thereby, a single minute 4H—SiC single crystal formed on the SiC polycrystalline substrate can be grown in the horizontal direction.

  Depending on the temperature profile in the supercooling process introduced into the temperature history, it is possible to encourage the minute SiC single crystal to grow in the vertical direction in the liquid phase epitaxial process. FIG. 32A is a photomicrograph showing a state when the supercooling process is not performed, and FIG. 32B is a photomicrograph showing a state when the supercooling process is introduced. FIG. 33 is a schematic diagram showing a state of a fine SiC single crystal, and FIGS. 33 (a) and (b) correspond to FIGS. 32 (a) and (b). In the subcooling process performed in the example of FIG. 32B, raising and lowering the heating temperature at a rate of 33 ° C./min in the range from 1700 ° C. to 1800 ° C. was repeated about 10 times. As shown in FIG. 32B, as a result of the above-described supercooling process in the epitaxial process, a two-stage fine SiC single crystal was formed on the surface of the 3C-SiC polycrystal. This result shows that it is possible to promote the growth of a small SiC single crystal in the vertical direction by introducing a supercooling process into the epitaxial process.

  Next, the MSE liquid phase growth process corresponding to the mass production process will be described with reference to FIGS. In order to make the MSE liquid phase growth method compatible with a mass production process, it is preferable to satisfy the following three conditions. First, it is possible to omit a step of removing excess silicon existing in the stacked body after the epitaxial step. Second, it is possible to control the epitaxial film thickness (the thickness of the epitaxial layer) (to obtain reproducibility). Third, it is possible to perform surface planarization in situ after liquid phase epitaxial growth. In this regard, in the present invention, these functions can be realized by the carbon supply feeder substrate.

  First, an MSE liquid phase growth carbon supply feeder substrate (hereinafter referred to as a mass production carbon supply feeder substrate) corresponding to a mass production process will be described with reference to FIG. FIG. 34 conceptually shows the carbon supply feeder substrate 95 for mass production. More specifically, the carbon supply feeder substrate 95 for mass production as a carbon supply feeder in the MSE method has a carbon supply feed layer 93 controlled to a predetermined thickness and a plurality (at least three) of one side surface. And a non-carbon supply auxiliary substrate 90 provided with protrusions (convex portions) 91. In the non-carbon supply auxiliary substrate 90 of the example shown in FIG. 34, four protrusions 91 are arranged at equal intervals on the same circumference on one surface thereof. In addition, there is no protrusion structure on the surface of the carbon supply feed layer 93, and an insertion part (concave part) 92 corresponding to the protrusion 91 is formed. As described above, by not providing protrusions on the surface of the carbon supply feed layer 93, stable holding of the silicon melt in the MSE growth process is realized.

  Next, with reference to FIG. 35, the process of the MSE method using the carbon supply feeder substrate for mass production will be described. The MSE method is roughly divided into a substrate lamination step, a liquid phase epitaxial growth step, and a surplus silicon removal step by evaporation.

  In the substrate stacking step, as shown in FIG. 35A, the substrate including the carbon supply feed layer 93 and the non-carbon supply auxiliary substrate 90 is used as a feeder, and the SiC substrate serving as the seed substrate 81 is opposed to the feeder. Further, a laminate is formed by interposing a silicon ultra-thin melt layer 4 between both substrates.

  In the liquid phase epitaxial growth process, the SiC epitaxial layer 12 is crystal-grown on the surface of the SiC seed substrate by heating the stacked body. Note that in the liquid phase epitaxial growth step, the temperature of the heat treatment is preferably 1800 ° C. to 2200 ° C. By performing the heat treatment in this temperature range, it is possible to efficiently perform the excess silicon removal step accompanied by epitaxial growth and silicon evaporation.

  Since the carbon supply feed layer 93 is controlled to have a predetermined thickness, the carbon supply feed layer 93 is consumed and depleted as shown in FIG. 35 in the intermediate stage of the liquid phase epitaxial growth process. Thereby, the epitaxial growth is automatically stopped, and a gap is formed between the SiC seed substrate and the non-carbon supply auxiliary substrate. In this case, if the heat treatment temperature is accompanied by silicon evaporation, the excess silicon melt existing between the gaps automatically starts to vaporize, so the liquid phase epitaxial growth step without leaving any excess silicon melt between the gaps. Can be terminated. Furthermore, since the excess silicon melt is removed by heating sublimation, the surface flattening process of the SiC epitaxial layer is automatically started after the silicon melt removing process.

  Also in the MSE method corresponding to this mass production process, it is preferable that the heat treatment includes a preheating process and a main heating process in the liquid phase epitaxial growth process. In the preheating step, the fitting container (the crucible 2) containing the laminate is heated in a preheating chamber at a temperature of 800 ° C. or higher, for example. In the heating step, for example, by moving the fitting container from the preliminary heating chamber to a main heating chamber heated in advance at a temperature of 1500 ° C. or higher and 2200 ° C. or lower, the laminated body is 1500 ° C. or higher and 2200 ° C. or higher. It is also possible to heat at a temperature below ℃. As a result, the laminated body that has been pre-heated in advance is moved from the pre-heating chamber to the main heating chamber so that the temperature is rapidly raised and the heat treatment is performed, so that the liquid phase epitaxial growth process is efficiently performed in a short time. Can be controlled easily.

  Next, with reference to FIG. 36, the process of the Example of the MSE liquid phase growth method corresponding to a mass production process is demonstrated. The MSE liquid phase growth method corresponding to the mass production process includes an MSE preparation process, a stacking process, a liquid phase epitaxial process, and a silicon removal process.

  First, in the MSE preparation step, a mass production carbon supply feeder substrate as shown in FIG. 36A is formed. In this embodiment, a graphite substrate having three or more protruding structures is used as the non-carbon supply auxiliary substrate, and pyrolytic graphite 72 is used as the protective film for the graphite substrate 73. On the other hand, in the carbon supply feeder layer, 3C-SiC polycrystal 71 was formed on the non-carbon supply auxiliary substrate by the CVD method.

  In the stacking step, as shown in FIG. 36B, the SiC substrate is used as a seed substrate, the carbon supply feed substrate serving as a feeder is opposed to the seed substrate, and a silicon plate 74 is interposed between both substrates. Construct a laminate. And in a liquid phase epitaxial process, the said laminated body is accommodated in the fitting container which consists of TaC, and is heated at the temperature of 1800 degreeC or more and 2200 degrees C or less. In the initial stage of the heating, as shown in FIG. 36C, the silicon plate 74 is melted, and an ultrathin silicon melt layer 84 is formed between the carbon supply feed substrate and the SiC substrate. Thereafter, in the intermediate heating stage, the liquid phase growth proceeds through the ultrathin silicon melt layer 84, whereby the SiC epitaxial layer 76 is formed on the surface of the SiC substrate. In the final stage of the liquid phase epitaxial process, as shown in FIG. 36E, the 3C-SiC polycrystal 71, which is a carbon supply feeder layer controlled to a predetermined film thickness, is depleted and the silicon melt is evaporated. Therefore, a gap is formed between the SiC substrate 75 and the graphite substrate 73. Due to the formation of this gap, the heat treatment under silicon vapor pressure is automatically started, and the surface of the epitaxial layer formed on the SiC substrate is flattened.

In the liquid phase epitaxial step, the laminate is heated under a reduced pressure in which the furnace pressure is maintained at 10 ⁻² Pa or less, and the oxygen partial pressure at this time is under a reduced pressure of 10 ⁻⁵ Pa or less. Is maintained. Moreover, it is preferable that the internal atmosphere of the said fitting container at the time of a heating is under silicon vapor pressure, and the internal pressure is maintained at 1 Pa or less.

  As the masking material, an insulating material aluminum nitride (AlN) can be used instead of pyrolytic graphite. In this case, a mask having sufficient heat resistance can be realized, and the mask can have a function as an insulating film for an FET device using SiC as a substrate, so that the process can be simplified. . FIG. 38 conceptually shows an FET device with a graphite film using AlN as an insulating film.

  By the way, in order to correspond to the mass production process in the MSE method, after the epitaxial process, the removal process of the excess silicon film existing in the stacked body is omitted, the control of the epitaxial film thickness (to obtain reproducibility), after the liquid phase epitaxial growth. It is necessary to perform a surface planarization process on the spot. However, the MSE liquid phase growth method corresponding to the mass production process of this embodiment solves this problem by the following advantages. As a first advantage, since the film thickness of the carbon supply feed layer is controlled, the epitaxial film thickness may be reproducible. A second advantage is that the step of dissolving and removing the excess silicon film is omitted. As a third advantage, since the surplus silicon melt (surplus silicon film) is not solidified on the SiC epitaxial layer, it is possible to prevent the occurrence of strain and dislocation defects in the SiC epitaxial layer caused by silicon solidification (aggregation). As a fourth advantage, since the surplus silicon melt (surplus silicon film) is removed by heating sublimation, the surface flattening process of the SiC epitaxial layer may be automatically started after the silicon melt removing process. These advantages solve the above problems.

  As described above, the SiC substrate on which the heterocrystalline polymorphic single crystal SiC of this embodiment is epitaxially grown is manufactured by the following manufacturing method. That is, the insertion part 92 is formed in the surface of the one side of the carbon supply feed board 7 arrange | positioned facing a SiC substrate. On the non-carbon supply auxiliary substrate 90 arranged on the back surface of the carbon supply feed substrate 7, a protrusion 91 corresponding to the insertion portion 92 is formed. In the liquid phase epitaxial growth step, the ultrathin silicon melt layer 4 is interposed in the gap between the SiC substrate as the seed substrate and the carbon supply feed substrate 7 with the protrusion 91 and the insertion portion 92 fitted. Enables epitaxial growth. Since epitaxial growth stops when the carbon supply feed substrate 7 disappears and is depleted, the thickness of the epitaxial growth layer (epitaxial growth film) is controlled. Moreover, the process of removing excess silicon melt and the process of planarizing the surface of the single crystal SiC epitaxial layer are automatically started.

  Thereby, the epitaxial growth layer can be controlled to a predetermined thickness. In addition, when the liquid phase epitaxial layer growth function is stopped, a gap is formed between the seed substrate and the carbon supply feed substrate, so that the excess silicon melt is automatically vaporized by touching the outside air without being cooled and solidified. . Accordingly, it is possible to omit work such as dissolving and removing the cooled surplus silicon film, and the surface flattening process of the single crystal SiC epitaxial layer is automatically started. Thus, rationalization can be achieved by omitting the work, so that productivity can be effectively improved. Furthermore, since the surplus silicon melt is not solidified on the SiC epitaxial layer, it is possible to prevent the occurrence of distortion and dislocation defects in the SiC epitaxial layer caused by silicon solidification (aggregation). Further, by not providing protrusions on the surface of the carbon supply feed layer 93, the silicon melt is stably maintained in the MSE growth process.

  Further, the mask member used for manufacturing the SiC substrate on which the heterocrystalline polymorphic single crystal SiC of this embodiment is epitaxially grown is pyrolytic graphite or aluminum nitride.

  Thereby, according to the use for which a board | substrate is used, the pyrolytic graphite which is a electrically conductive material, and the aluminum nitride which is an insulating material can be used properly. Further, the process can be simplified by using aluminum nitride as an insulating film.

  Further, as described above, the carbon supply feed substrate 7 used in the present embodiment is a 3C-SiC polycrystalline substrate, a 3C-SiC single crystal substrate, or a graphene sheet or carbon nanotube on the surface of an appropriate base material. It is comprised with at least any one of the board | substrates in which carbon nanomaterials, such as, are formed.

  Thereby, carbon atoms can be satisfactorily supplied by the carbon supply feed substrate having high free energy.

  FIG. 37 shows an example of a method for producing a SiC substrate for graphene FET devices. The manufacturing method includes an AlN (aluminum nitride) insulating film vapor deposition step, a graphite film formation step, and a graphite thinning step. In the AlN insulating film deposition step (FIG. 37A), the AlN film 102 is formed on the entire surface of the SiC substrate 101 by a chemical vapor deposition method such as MOCVD or CVD. Next, in the graphite film forming step (FIG. 37B), the graphite film 103 is formed on the surface of the AlN film 102. In the graphite thinning step (FIG. 37C) which is the final step, the graphene film at the molecular layer level is formed on the surface of the AlN insulating film by thinning the graphite film 103 using ozone gas. Thereby, a field effect semiconductor wafer in which the graphene film 104 is formed on the insulating film formed on the surface of the SiC substrate as shown in FIGS. 37 (d) and 38 is formed.

  Although the embodiment of the present invention has been described above, the above configuration can be further modified as follows.

  In the method of manufacturing a SiC substrate in which single crystal SiC having an epitaxial growth layer and single crystal SiC of a heterocrystalline polymorph is epitaxially grown, in the liquid phase epitaxial step, the sealing degree of the crucible 2 is increased, or the internal volume of the crucible 2 is increased. The volume of the silicon vapor pressure in the crucible 2 can be kept large by approaching the volume of the laminate of the substrate and the carbon supply feed substrate 7.

  In addition, as long as the present invention is applied, a part of the manufacturing method described above is modified, and a single crystal SiC substrate, a single crystal SiC substrate with an epitaxial growth layer, and SiC obtained by epitaxial growth of a heterocrystalline polymorph single crystal SiC. It is possible to manufacture a substrate or a SiC substrate with a carbon nanomaterial. For example, the substrate can be manufactured by appropriately combining various processes described in this specification. Moreover, the temperature condition, pressure condition, etc. of the said embodiment are examples, and can be suitably changed according to a situation.

2 Crucible (fitting container)
4 Ultra-thin melt layer 5 Single crystal SiC substrate 7 Carbon feed substrate 91 Projection (convex part)
92 Insertion (recess)

Claims (14)

In a SiC substrate obtained by epitaxially growing a heterocrystalline polymorphic single crystal SiC on a local region on a polycrystalline SiC substrate subjected to groove processing,
A groove forming step of performing groove processing on the SiC polycrystalline substrate so as to divide the surface of the SiC polycrystalline substrate into a plurality of regions of the semiconductor device 1 chip size;
A mask step of applying a mask with a mask member for each of the plurality of regions formed by the groove forming step, and forming a minute opening in a portion corresponding to a central portion of the region of the mask;
A liquid phase epitaxial growth step of epitaxially growing a heterocrystalline polymorphic 4H-SiC single crystal vertically and horizontally in a metastable solvent epitaxy method in the opening of the SiC polycrystalline substrate subjected to groove processing to be a seed substrate;
A SiC substrate manufactured by a manufacturing method including: The SiC substrate according to claim 1,
The SiC substrate, wherein the mask member is pyrolytic graphite or aluminum nitride. The SiC substrate according to claim 1 or 2,
A SiC substrate characterized in that, in the liquid phase epitaxial growth step, an impurity concentration of a carbon supply feed substrate for supplying carbon atoms is controlled. The SiC substrate according to any one of claims 1 to 3,
In the liquid phase epitaxial growth process of the heterocrystalline polymorphic single crystal SiC,
In the initial heating stage of the metastable solvent epitaxy method, the heating temperature is maintained at a constant temperature, and the fluctuation of the supersaturation degree in the epitaxial growth environment of the fine SiC single crystal is limited, thereby suppressing the nucleation frequency of the fine SiC single crystal, Control so that only a single 4H-SiC single crystal of the heterocrystalline polymorph is epitaxially grown;
After a single 4H-SiC single crystal is epitaxially grown, a single minute 4H-SiC single crystal is promoted to grow in the horizontal direction by repeating a temperature variation process consisting of a cooling process and a temperature raising process a plurality of times. SiC substrate characterized by the above. The SiC substrate according to any one of claims 1 to 4, wherein
In the liquid phase epitaxial growth step of the heterocrystalline polymorphic single crystal SiC, metastable solvent epitaxy is formed on the surface of the fine SiC single crystal grains constituting the SiC polycrystalline substrate by heating at a temperature of 1600 ° C. or higher and 2200 ° C. or lower. A SiC substrate characterized by epitaxially growing a 4H-SiC single crystal by a method. The SiC substrate according to any one of claims 1 to 5,
The seed substrate is configured by coating a polycrystalline SiC film on a carbon base material having grooves formed thereon. The SiC substrate according to any one of claims 1 to 5,
The seed substrate is formed by coating a polycrystalline SiC film on a metal body having grooves. The SiC substrate according to any one of claims 1 to 6, wherein
A concave portion is formed on one surface of the carbon supply feed substrate disposed to face the SiC substrate,
The non-carbon supply auxiliary substrate disposed on the back surface of the carbon supply feed substrate has a convex portion corresponding to the concave portion,
In the liquid phase epitaxial growth step, in a state where the convex portion and the concave portion are fitted, it is possible to perform epitaxial growth by interposing a silicon melt in a gap between the SiC substrate as a seed substrate and the carbon supply feed substrate, Since the epitaxial growth stops when the carbon supply feed substrate disappears and is depleted, the thickness of the epitaxial growth layer is controlled, and the process of removing excess silicon melt and the surface flattening process of the single crystal SiC epitaxial layer are automatically started. SiC substrate characterized by the above-mentioned. The SiC substrate according to any one of claims 1 to 8,
The manufacturing method of the SiC substrate is as follows:
A laminating step in which a SiC substrate and a carbon supply feed substrate are arranged to face each other, and a silicon substrate is interposed therebetween to form a laminate,
An accommodating step of accommodating the laminate in a fitting container having a carbon getter effect;
Including
In the liquid phase epitaxial growth step, by maintaining a large amount of silicon vapor pressure in the fitting container, the retention time of the silicon melt layer of the laminate is lengthened, and the liquid phase epitaxial growth step operation time is lengthened. The SiC substrate characterized. The SiC substrate according to claim 9, wherein
In the liquid phase epitaxial growth step, the fitting is performed by increasing the sealing degree of the fitting container, or by bringing the inner volume of the fitting container as close as possible to the volume of the laminated body of the SiC substrate and the carbon supply feed substrate. A SiC substrate characterized in that a large amount of silicon vapor pressure in the container can be maintained. The SiC substrate according to any one of claims 1 to 10,
In the liquid phase epitaxial growth step, the SiC substrate is fitted under the reduced pressure of the furnace pressure of 10 ⁻² Pa or less, the oxygen partial pressure of 10 ⁻⁵ Pa or less, and accommodating the SiC substrate. A SiC substrate characterized in that the internal atmosphere of the container is under a silicon vapor pressure and the internal pressure is 1 Pa or less. A carbon supply feed substrate used for supplying carbon in the liquid phase epitaxial growth process according to any one of claims 1 to 11,
Carbon supply comprising at least one of a 3C-SiC polycrystalline substrate, a 3C-SiC single crystal substrate, or a substrate having a carbon nanomaterial such as graphene sheet or carbon nanotube formed on a surface thereof Feed board. By heating the surface of the 4H-SiC single crystal epitaxial growth layer grown in each region of the SiC substrate according to any one of claims 1 to 11 at a temperature of 1500 ° C or higher and 2200 ° C or lower in a high-temperature vacuum environment,
It is manufactured by a manufacturing method including a carbonization treatment step in which silicon on the surface of an SiC single crystal epitaxial growth layer is sublimated and a thin film graphene sheet or carbon nanotube of a molecular layer level is generated on the surface of the SiC substrate by the remaining carbon. SiC substrate with carbon nanomaterial. The SiC substrate with carbon nanomaterial according to claim 13,
In the carbonization step, the substrate is subjected to heat treatment in a state where the pressure in the furnace is 10 ⁻³ Pa or less and the oxygen partial pressure is 10 ⁻⁵ Pa or less. substrate.