JP2013074351A - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP2013074351A
JP2013074351A JP2011210078A JP2011210078A JP2013074351A JP 2013074351 A JP2013074351 A JP 2013074351A JP 2011210078 A JP2011210078 A JP 2011210078A JP 2011210078 A JP2011210078 A JP 2011210078A JP 2013074351 A JP2013074351 A JP 2013074351A
Authority
JP
Japan
Prior art keywords
clock signal
internal clock
phase
transistors
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP2011210078A
Other languages
English (en)
Japanese (ja)
Other versions
JP2013074351A5 (https=
Inventor
Yutaka Uemura
裕 上村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Memory Japan Ltd
Original Assignee
Elpida Memory Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elpida Memory Inc filed Critical Elpida Memory Inc
Priority to JP2011210078A priority Critical patent/JP2013074351A/ja
Priority to US13/612,654 priority patent/US8525563B2/en
Publication of JP2013074351A publication Critical patent/JP2013074351A/ja
Publication of JP2013074351A5 publication Critical patent/JP2013074351A5/ja
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0818—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter comprising coarse and fine delay or phase-shifting means

Landscapes

  • Dram (AREA)
  • Pulse Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP2011210078A 2011-09-27 2011-09-27 半導体装置 Abandoned JP2013074351A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2011210078A JP2013074351A (ja) 2011-09-27 2011-09-27 半導体装置
US13/612,654 US8525563B2 (en) 2011-09-27 2012-09-12 Semiconductor device including DLL circuit having coarse adjustment unit and fine adjustment unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011210078A JP2013074351A (ja) 2011-09-27 2011-09-27 半導体装置

Publications (2)

Publication Number Publication Date
JP2013074351A true JP2013074351A (ja) 2013-04-22
JP2013074351A5 JP2013074351A5 (https=) 2014-11-13

Family

ID=47910628

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011210078A Abandoned JP2013074351A (ja) 2011-09-27 2011-09-27 半導体装置

Country Status (2)

Country Link
US (1) US8525563B2 (https=)
JP (1) JP2013074351A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022191014A1 (ja) * 2021-03-12 2022-09-15 ソニーセミコンダクタソリューションズ株式会社 光源駆動回路および測距装置

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180031859A (ko) * 2016-09-19 2018-03-29 삼성전자주식회사 복수의 딜레이 라인을 포함하는 딜레이 고정 루프
US11043941B2 (en) * 2018-03-16 2021-06-22 Micron Technology, Inc. Apparatuses and methods for adjusting a phase mixer circuit
US11211936B1 (en) * 2021-01-05 2021-12-28 Taiwan Semiconductor Manufacturing Company, Ltd. Delay lock loop circuits and methods for operating same

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100408727B1 (ko) * 2001-12-28 2003-12-11 주식회사 하이닉스반도체 클럭 동기 장치
KR100515071B1 (ko) * 2003-04-29 2005-09-16 주식회사 하이닉스반도체 디엘엘 장치
KR100605577B1 (ko) * 2004-06-30 2006-07-31 주식회사 하이닉스반도체 레지스터 제어형 지연 고정 루프 및 그의 제어 방법
KR100776906B1 (ko) * 2006-02-16 2007-11-19 주식회사 하이닉스반도체 파워다운 모드 동안 주기적으로 락킹 동작을 실행하는기능을 가지는 ｄｌｌ 및 그 락킹 동작 방법
US7671648B2 (en) * 2006-10-27 2010-03-02 Micron Technology, Inc. System and method for an accuracy-enhanced DLL during a measure initialization mode
JP2009021706A (ja) 2007-07-10 2009-01-29 Elpida Memory Inc Ｄｌｌ回路及びこれを用いた半導体記憶装置、並びに、データ処理システム
JP5579373B2 (ja) 2008-05-22 2014-08-27 ピーエスフォー ルクスコ エスエイアールエル Ｄｌｌ回路
US8653869B2 (en) * 2011-10-20 2014-02-18 Media Tek Singapore Pte. Ltd. Segmented fractional-N PLL

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022191014A1 (ja) * 2021-03-12 2022-09-15 ソニーセミコンダクタソリューションズ株式会社 光源駆動回路および測距装置

Also Published As

Publication number Publication date
US20130076413A1 (en) 2013-03-28
US8525563B2 (en) 2013-09-03

Similar Documents

Publication Publication Date Title
US8803576B2 (en) Semiconductor device having duty-cycle correction circuit
US10727826B2 (en) Delay-locked loop circuit, semiconductor memory device, and methods of operating delay-locked loop circuit
US11329654B2 (en) Delay circuit of delay-locked loop circuit and delay-locked loop circuit
US9324410B2 (en) Semiconductor memory device having an output buffer controller
US11699472B2 (en) Semiconductor memory device and memory system including the same
US6424592B1 (en) Semiconductor integrated circuit having circuit for correcting data output timing
US11869574B2 (en) Semiconductor memory device and memory system including the same
US10795401B2 (en) Semiconductor device
JP2013183415A (ja) 半導体装置及びクロック信号の位相調整方法
JP2010088108A (ja) Ｄｌｌ回路及びその制御方法
JP2011180713A (ja) 半導体メモリモジュール
CN117877545A (zh) 用于突发发射中的数据发射偏移值的设备和方法
US11658668B2 (en) Semiconductor device
US20130043919A1 (en) Semiconductor device having delay line
US6438067B2 (en) Clock generating circuit ensuring a wide lock-allowing frequency range and allowing reduction in layout area as well as a semiconductor device provided with the same
US8525563B2 (en) Semiconductor device including DLL circuit having coarse adjustment unit and fine adjustment unit
US8797074B2 (en) Semiconductor device having DLL circuit and control method thereof
US9054713B2 (en) Semiconductor device generating internal clock signal having higher frequency than that of input clock signal
US8653874B2 (en) Semiconductor device generates complementary output signals
US10614870B2 (en) Low power method and system for signal slew rate control
KR100753100B1 (ko) 반도체 메모리 장치의 지연고정루프
JP2015002452A (ja) 半導体装置
US9053779B2 (en) Semiconductor device
JP2011234157A (ja) 半導体装置
US20250182812A1 (en) Command timing control circuit and memory

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20130730

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130822

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140925

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20140925

A762 Written abandonment of application

Free format text: JAPANESE INTERMEDIATE CODE: A762

Effective date: 20141222