JP2012239171A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2012239171A5 JP2012239171A5 JP2012107478A JP2012107478A JP2012239171A5 JP 2012239171 A5 JP2012239171 A5 JP 2012239171A5 JP 2012107478 A JP2012107478 A JP 2012107478A JP 2012107478 A JP2012107478 A JP 2012107478A JP 2012239171 A5 JP2012239171 A5 JP 2012239171A5
- Authority
- JP
- Japan
- Prior art keywords
- modulus
- modular
- values
- processor
- operands
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP11305568.5 | 2011-05-11 | ||
| EP11305568 | 2011-05-11 | ||
| EP11176404A EP2523096A1 (en) | 2011-05-11 | 2011-08-03 | Modular exponentiation and device resistant against side-channel attacks |
| EP11176404.9 | 2011-08-03 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2012239171A JP2012239171A (ja) | 2012-12-06 |
| JP2012239171A5 true JP2012239171A5 (enExample) | 2015-06-25 |
| JP5977996B2 JP5977996B2 (ja) | 2016-08-24 |
Family
ID=44546155
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012107478A Expired - Fee Related JP5977996B2 (ja) | 2011-05-11 | 2012-05-09 | サイドチャンネル攻撃に対する抵抗力のあるモジュラー累乗法及び装置 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8984040B2 (enExample) |
| EP (2) | EP2523096A1 (enExample) |
| JP (1) | JP5977996B2 (enExample) |
| CN (1) | CN102779022B (enExample) |
| BR (1) | BR102012010971A2 (enExample) |
| CA (1) | CA2775325A1 (enExample) |
| MX (1) | MX2012005408A (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9645794B2 (en) * | 2014-09-23 | 2017-05-09 | Texas Instruments Incorporated | Homogeneous atomic pattern for double, add, and subtract operations for digital authentication using elliptic curve cryptography |
| CN104811297B (zh) * | 2015-04-23 | 2018-06-12 | 成都信息工程学院 | 针对RSA之M-ary实现模乘余数输入侧信道攻击 |
| CN106571916B (zh) * | 2015-10-12 | 2020-06-30 | 瑞昱半导体股份有限公司 | 解密装置、方法及电路 |
| CN109791517B (zh) | 2016-12-21 | 2023-09-08 | 密码研究公司 | 保护并行乘法运算免受外部监测攻击 |
| EP3447509B1 (en) * | 2017-08-21 | 2021-05-26 | Eshard | Method of testing the resistance of a circuit to a side channel analysis |
| US11895230B2 (en) * | 2019-01-24 | 2024-02-06 | Nec Corporation | Information processing apparatus, secure computation method, and program |
| CN112260818B (zh) * | 2020-10-19 | 2022-09-20 | 中国人民解放军战略支援部队信息工程大学 | 侧信道曲线的增强方法、侧信道攻击方法及装置 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2228493C (en) * | 1997-02-03 | 2005-05-03 | Nippon Telegraph And Telephone Corporation | Scheme for carrying out modular calculations based on redundant binary calculation |
| WO2007104706A1 (fr) * | 2006-03-16 | 2007-09-20 | Gemplus | Procede de securisation d'un calcul d'une exponentiation ou d'une multiplication par un scalaire dans un dispositif electronique |
| EP1840732A1 (en) * | 2006-03-31 | 2007-10-03 | Axalto SA | Protection against side channel attacks |
| FR2949925A1 (fr) * | 2009-09-09 | 2011-03-11 | Proton World Int Nv | Protection d'une generation de nombres premiers contre des attaques par canaux caches |
-
2011
- 2011-08-03 EP EP11176404A patent/EP2523096A1/en not_active Withdrawn
-
2012
- 2012-04-24 CA CA2775325A patent/CA2775325A1/en not_active Abandoned
- 2012-05-04 EP EP12166750.5A patent/EP2523097B1/en not_active Not-in-force
- 2012-05-09 MX MX2012005408A patent/MX2012005408A/es active IP Right Grant
- 2012-05-09 BR BRBR102012010971-9A patent/BR102012010971A2/pt not_active IP Right Cessation
- 2012-05-09 JP JP2012107478A patent/JP5977996B2/ja not_active Expired - Fee Related
- 2012-05-11 CN CN201210145594.6A patent/CN102779022B/zh not_active Expired - Fee Related
- 2012-05-11 US US13/469,139 patent/US8984040B2/en not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2012239171A5 (enExample) | ||
| Hossain et al. | High‐performance elliptic curve cryptography processor over NIST prime fields | |
| WO2007137034A9 (en) | Managing computing resources in graph-based computations | |
| WO2012068542A3 (en) | Orthogonal dragging on scroll bars | |
| WO2014047361A3 (en) | Determining a dominant hand of a user of a computing device | |
| WO2013066756A3 (en) | SOFTWARE DIGITAL FRONT END (SoftDFE) SIGNAL PROCESSING | |
| WO2011094046A3 (en) | Cross-reference gestures | |
| WO2011094044A3 (en) | Edge gestures | |
| JP2012528391A5 (enExample) | ||
| JP2012185517A5 (enExample) | ||
| Pan et al. | Nearly optimal refinement of real roots of a univariate polynomial | |
| Loi et al. | FPGA implementation of low latency scalable Elliptic Curve Cryptosystem processor in GF (2 m) | |
| CN107408011A8 (zh) | 将多个屏幕动态地合并到一个视口 | |
| JP2016512005A5 (enExample) | ||
| ATE527778T1 (de) | Ganzzahlige division gegen einen leistungsanalyseangriff | |
| Chamizo et al. | Multifractal behavior of polynomial Fourier series | |
| JP5977996B2 (ja) | サイドチャンネル攻撃に対する抵抗力のあるモジュラー累乗法及び装置 | |
| RU2017126055A (ru) | Электронное вычислительное устройство | |
| JP2017117124A5 (enExample) | ||
| CN104660399A (zh) | 一种rsa模幂运算方法和装置 | |
| WO2013060466A3 (de) | Bestimmen eines divisionsrests durch mindestens eine montgomery-operation und ermitteln von primzahlkandidaten für eine kryptographische anwendung | |
| JP2018032384A5 (enExample) | ||
| WO2010143892A3 (ko) | 나머지 연산 방법 및 이를 위한 장치 | |
| JP2018045520A5 (enExample) | ||
| CN104750457B (zh) | 一种基于模幂运算的数据处理方法和装置 |