JP2012160575A - Method of dicing semiconductor wafer and semiconductor wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of dicing a semiconductor wafer capable of smoothly dicing a semiconductor wafer with high hardness.SOLUTION: A method of dicing a semiconductor wafer with high hardness, which has a curved-shaped chamfered portion on its periphery and in which a plurality of semiconductor chips are divided by scribe lines, along the scribe lines comprises in sequence: a semiconductor wafer preparation step of preparing a semiconductor wafer 100A in which the chamfered portion is processed so that corners C1 and C2 are formed at least at a portion of the periphery, with which a dicing plate 300 comes into contact; and a dicing step of performing dicing using the corner C2 of the corners C1 and C2 as a dicing start position.

Description

  The present invention relates to a semiconductor wafer dicing method suitable for dicing a semiconductor wafer having high hardness, and a semiconductor wafer.

  A semiconductor wafer with high hardness using silicon carbide (SiC), gallium nitride (GaN), or the like as a semiconductor material is known (hereinafter also referred to as a high hardness semiconductor wafer). Such a high-hardness semiconductor wafer is attracting attention as a wide band gap semiconductor wafer, but because of its high hardness, when dicing with a dicing machine, the dicing blade does not easily bite and fragments are scattered. Therefore, there is a risk that the dicing blade may be damaged by the scattered pieces. For this reason, when dicing these high-hardness semiconductor wafers, various devices have been conventionally made in order to facilitate dicing (see, for example, Patent Document 1).

  The semiconductor wafer dicing method described in Patent Document 1 is such that dicing is performed with a dicing tape applied to both sides of the semiconductor wafer, and according to this, when the dicing is performed, scattering of fragments is prevented. I can do it.

  By the way, such a high-hardness semiconductor wafer and other general semiconductor wafers are often processed so that the peripheral edge portion is a curved chamfered portion.

  FIG. 8 is an essential part enlarged cross-sectional view for explaining a dicing method of the semiconductor wafer 900 processed so that the peripheral edge portion becomes a curved chamfered portion. FIG. 8 shows the relationship between the cross section of the peripheral edge of the semiconductor wafer 900 and the dicing blade 920. The semiconductor wafer dicing method shown in FIG. 8 involves dicing along a scribe line (not shown) by bringing a dicing blade 920 into contact with a curved chamfered portion 910 formed on the peripheral edge of the semiconductor wafer 900. is there.

  As shown in FIG. 8, the chamfered portion 910 has a curved surface shape, and the dicing blade 920 starts dicing in a state where the dicing blade 920 is in contact with the curved surface-shaped chamfered portion 910. The dicing blade 920 performs dicing by rotating in the arrow R direction.

  With such a dicing method, if the semiconductor wafer has a low hardness such as a silicon semiconductor wafer, the dicing blade can easily bite into the chamfered portion, and therefore, good dicing can be performed.

JP 2009-130315 A

  The semiconductor wafer dicing method as shown in FIG. 8 is a silicon carbide semiconductor when dicing a high-hardness semiconductor wafer (hereinafter, silicon carbide semiconductor wafer using silicon carbide as a semiconductor material). If the wafer is diced with the dicing blade 920 as it is, when the dicing blade 920 comes into contact with the curved chamfered portion 910, the dicing blade 920 slides left and right on the chamfered portion, and the dicing blade 920 becomes silicon carbide. The semiconductor wafer is not easily bited into. As a result, there may be a problem that the silicon carbide semiconductor wafer fragments are scattered and the dicing blade is damaged by the scattered fragments.

  In order to cope with this, for example, a method of dicing a semiconductor wafer described in Patent Document 1, that is, a method of performing dicing with the dicing tape attached to both surfaces of the semiconductor wafer is adopted, and the dicing tape is curved. It is conceivable to apply it to the chamfered portion.

  However, even if the dicing tape is affixed to the curved chamfered portion, as long as the chamfered portion is curved when the dicing blade 920 comes into contact with the chamfered portion 910 to which the dicing tape is attached, Therefore, there is a high possibility that the dicing blade 920 slides in the left-right direction. For this reason, dicing blade 920 does not easily bite into the silicon carbide semiconductor wafer, and as a result, there is a possibility that fragments of the silicon carbide wafer are scattered and the dicing blade is damaged by the scattered pieces.

  Thus, there exists a subject that smooth dicing cannot be performed if the peripheral part of the semiconductor wafer of hardness is processed so that it may become a curved chamfered part.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor wafer dicing method and a semiconductor wafer that can smoothly dice a semiconductor wafer having high hardness.

  [1] A method for dicing a semiconductor wafer according to the present invention includes dicing a semiconductor wafer having a high hardness, having a curved chamfered portion at a peripheral portion and having a plurality of semiconductor chips separated by a scribe line along the scribe line. A semiconductor wafer dicing method for preparing a semiconductor wafer in which the chamfered portion is processed so that a corner portion is formed in at least a portion of the peripheral portion where the dicing blade contacts, And a dicing step of performing dicing with the corner portion as a dicing start position.

  [2] In the method for dicing a semiconductor wafer according to the present invention, it is preferable that the corner portion is formed by processing the chamfered portion so that the peripheral edge portion is a smooth inclined surface.

  [3] In the semiconductor wafer dicing method of the present invention, the corner portion may be formed by processing the chamfered portion so that a cross-sectional shape of the peripheral edge portion is L-shaped. preferable.

  [4] In the semiconductor wafer dicing method of the present invention, it is also preferable that the corner portion is formed by processing the chamfered portion so that an end surface of the peripheral edge portion becomes a vertical surface.

  [5] In the semiconductor wafer dicing method of the present invention, it is preferable that the corner portion is formed over the entire circumference of the peripheral edge portion of the semiconductor wafer.

  [6] In the semiconductor wafer dicing method of the present invention, the corner portion may be formed only in a peripheral portion of a region corresponding to the peripheral portion on the dicing start side in the peripheral portion of the semiconductor wafer. Also preferred.

  [7] In the semiconductor wafer dicing method of the present invention, it is also preferable that the corner portion is formed only in a region corresponding to each scribe line in a peripheral portion of the semiconductor wafer.

  [8] In the semiconductor wafer dicing method of the present invention, the semiconductor wafer is preferably a wide band gap semiconductor wafer.

  [9] In the semiconductor wafer dicing method of the present invention, the wide band gap semiconductor wafer is preferably a silicon carbide semiconductor wafer.

  [10] In the semiconductor wafer dicing method of the present invention, the wide band gap semiconductor wafer is preferably a gallium nitride semiconductor wafer.

  [11] In the semiconductor wafer dicing method of the present invention, in the dicing step, the dicing blade is lowered from the upper side in the vertical direction to perform an operation of making a cut into the corner of the semiconductor wafer. It is preferable to include a step of performing dicing so as to move in the horizontal direction.

  [12] A semiconductor wafer according to the present invention is a semiconductor wafer using a semiconductor material having a high hardness and having a curved chamfered portion at a peripheral portion and a plurality of semiconductor chips separated by a scribe line. The chamfered portion is processed so that a corner portion is formed at least in a portion where the dicing blade contacts.

  According to the dicing method of the semiconductor wafer of the present invention, the dicing blade first contacts the corner portion at the start of dicing by processing the peripheral portion so that the corner portion is formed in the curved chamfered portion. Dicing is started using the corner portion as a dicing start position after contact or point contact. As a result, the dicing blade can easily bite into the semiconductor wafer without causing the dicing blade to slide left and right on the curved chamfered portion as in the case of starting dicing on the curved chamfered portion, so that the hardness is high. The semiconductor wafer can be diced smoothly.

  In addition, according to the semiconductor wafer of the present invention, since the corner is formed in the chamfered portion constituted by the curved surface, at the start of dicing, the dicing blade 300 first comes into contact with the corner, that is, makes point contact. Dicing starts at the corner as the dicing start position. For this reason, even if the semiconductor wafer of the present invention is a semiconductor wafer having a high hardness, the dicing blade can easily bite into the semiconductor wafer without causing the dicing blade to slide left and right on the surface of the chamfered portion when dicing. Therefore, smooth dicing becomes possible.

It is a figure shown in order to demonstrate the silicon carbide semiconductor wafer 100A which concerns on Embodiment 1. FIG. FIG. 3 is an enlarged cross-sectional view of a relevant part for explaining the silicon carbide semiconductor wafer dicing method according to the first embodiment. It is a figure shown in order to demonstrate the silicon carbide semiconductor wafer 100B which concerns on Embodiment 2. FIG. FIG. 6 is an enlarged cross-sectional view of a relevant part for illustrating a dicing method for a silicon carbide semiconductor wafer according to a second embodiment. It is a figure shown in order to demonstrate the silicon carbide semiconductor wafer 100C which concerns on Embodiment 3. FIG. FIG. 6 is an enlarged cross-sectional view of a relevant part for explaining a dicing method for a silicon carbide semiconductor wafer according to a third embodiment. It is a figure shown in order to demonstrate the silicon carbide semiconductor wafer 100D which concerns on Embodiment 4. FIG. It is a principal part expanded sectional view shown in order to demonstrate the dicing method of the semiconductor wafer 900 processed so that a peripheral part might become a curved chamfering part.

  Hereinafter, embodiments of the present invention will be described. In the following embodiment, a silicon carbide semiconductor wafer will be described as an example of a semiconductor wafer having high hardness.

[Embodiment 1]
FIG. 1 is a view for explaining a silicon carbide semiconductor wafer 100A according to the first embodiment. FIG. 1A is a plan view when silicon carbide semiconductor wafer 100A is viewed from the surface side, and FIG. 1B is an enlarged cross-sectional view taken along line aa in FIG.

  As shown in FIG. 1A, the silicon carbide semiconductor wafer 100A according to Embodiment 1 has a plurality of (six) scribe lines Lx1, Lx2,. Lx6 is provided and a plurality of (six) scribe lines Ly1, Ly2,... Ly6 are also provided in the y-axis direction.

  In addition, as shown in FIGS. 1A and 1B, the silicon carbide semiconductor wafer 100A according to the first embodiment has a smooth inclined surface 120 formed over the entire circumference on the upper end side in the peripheral portion. Yes. The area shown in gray in FIG. 1A shows the inclined surface 120. In addition, inclined surface 120 is formed by processing a chamfered portion (see FIG. 8) originally provided on the peripheral edge of silicon carbide semiconductor wafer 100A.

  By processing the peripheral portion of the silicon carbide semiconductor wafer 100A according to the first embodiment in this way, corner portions (upper corner portion C1 and lower corner portion C2) are formed on the upper and lower sides of the inclined surface 120, respectively. Is formed) (see FIG. 1B).

  In FIG. 1A, the scribe lines Lx1, Lx2,..., Lx6 along the x-axis direction and the scribe lines Lx1, Lx2,. The symbols “Lx3, Lx4, Ly5” and “Ly3, Lx4, Ly5” indicating the Lx3, Lx4, Lx5 and the scribe lines Ly3, Ly4, Ly5 are omitted. The same applies to FIG. 3, FIG. 5, and FIG.

  FIG. 2 is an enlarged cross-sectional view of a relevant part for explaining the dicing method for silicon carbide semiconductor wafer 100A according to the first embodiment. In the dicing of silicon carbide semiconductor wafer 100A, as in the case of general semiconductor wafer dicing, first, as a step before dicing, dicing tape 200 is attached to back surface 112 of silicon carbide semiconductor wafer 100A, and dicing is performed. The silicon carbide semiconductor wafer 100A with the tape 200 attached thereto is attached to an annular frame (not shown), and the silicon carbide semiconductor wafer 100A attached to the annular frame is vacuum-adsorbed to a stage of a dicing apparatus (not shown).

  2, illustration of an annular frame, a dicing apparatus, and the like is omitted, and only a relationship between the silicon carbide semiconductor wafer 100A attached with the dicing tape 200 and the dicing blade 300 is shown.

  When the previous step of dicing is completed, dicing is performed by the dicing blade 300 by moving the silicon carbide semiconductor wafer 100A in the horizontal direction (the direction of arrow b in FIG. 2). At this time, since the upper corner portion C1 and the lower corner portion C2 of the inclined surface 120 are formed at the peripheral portion of the silicon carbide semiconductor wafer 100A, the dicing blade 300 is first configured with the silicon carbide semiconductor wafer 100A. Dicing is started with the corner C2 in contact with the corner (the lower corner C2 in the example of FIG. 2), that is, a point contact, with the corner C2 as the dicing start position.

  Thereby, according to the dicing method of the semiconductor wafer according to the first embodiment, the dicing blade 300 is moved to the left and right on the chamfered portion as in the case where dicing is started on the chamfered portion configured with a curved surface (see FIG. 8). The dicing blade 300 can easily bite into the silicon carbide semiconductor wafer 100A without slipping in the direction, and the silicon carbide semiconductor wafer having high hardness can be smoothly diced.

[Embodiment 2]
FIG. 3 is a view for explaining the silicon carbide semiconductor wafer 100B according to the second embodiment. 3A is a plan view when silicon carbide semiconductor wafer 100A is viewed from the surface side, and FIG. 3B is an enlarged cross-sectional view taken along line aa in FIG. 3A. Similarly to the silicon carbide semiconductor wafer 100A according to the first embodiment, the silicon carbide semiconductor wafer 100B according to the second embodiment also has a plurality of (six) scribe lines Lx1, Lx2, on the surface 111 in the x-axis direction. .., Lx6 and a plurality of (six) scribe lines Ly1, Ly2,..., Ly6 in the y-axis direction.

  Further, as shown in FIGS. 3A and 3B, the silicon carbide semiconductor wafer 100B according to the second embodiment is formed with a notch portion 130 whose cross-sectional shape of the peripheral portion is L-shaped. ing. The area shown in gray in FIG. 3A shows the notch 130. This notch 130 is formed by processing a chamfered portion (see FIG. 8) provided on the peripheral edge of silicon carbide semiconductor wafer 100B.

  By processing the silicon carbide semiconductor wafer 100B in this way, corners (vertical side end corners C1 and C1) are respectively formed at the vertical side end and the horizontal side end of the L-shaped notch 130. A corner C2 at the end in the horizontal direction is formed (see FIG. 3B).

  FIG. 4 is an enlarged cross-sectional view of a relevant part for explaining the silicon carbide semiconductor wafer dicing method according to the second embodiment. In the silicon carbide semiconductor wafer dicing method according to the second embodiment, the same process as the silicon carbide semiconductor wafer dicing method according to the first embodiment is performed as a step before the dicing. In FIG. 4, the annular frame and the dicing apparatus are not shown, and only the relationship between the silicon carbide semiconductor wafer 100 </ b> B attached with the dicing tape 200 and the dicing blade 300 is shown.

  Then, after the previous step of dicing is completed, dicing is performed by dicing blade 300 by moving silicon carbide semiconductor wafer 100B in the horizontal direction (the direction of arrow b in FIG. 4). At this time, since the corner portion C1 of the L-shaped cutout portion 130 and the corner portion C2 of the horizontal end portion are formed in the peripheral portion of the silicon carbide semiconductor wafer 100B, the dicing blade First, 300 is brought into contact with, or point-contacted with, a corner portion of silicon carbide semiconductor wafer 100B (corner portion C2 at the horizontal side end in the example of FIG. 2), and dicing is started with the corner portion C2 being a dicing start position. Will be.

  Thereby, according to the dicing method of the semiconductor wafer according to the second embodiment, the dicing blade 300 is moved left and right on the chamfered portion as in the case where dicing is started on the chamfered portion formed of a curved surface (see FIG. 8). The dicing blade 300 can easily bite into the silicon carbide semiconductor wafer 100B without slipping in the direction, and the silicon carbide semiconductor wafer having high hardness can be smoothly diced.

[Embodiment 3]
FIG. 5 is a view for explaining the silicon carbide semiconductor wafer 100 </ b> C according to the third embodiment. FIG. 5A is a plan view when silicon carbide semiconductor wafer 100A is viewed from the surface side, and FIG. 5B is an enlarged cross-sectional view taken along the line aa in FIG. Similarly to the silicon carbide semiconductor wafer 100A according to the first embodiment, the silicon carbide semiconductor wafer 100C according to the third embodiment also has a plurality of (six) scribe lines Lx1, Lx2,. .., Lx6 and a plurality (six) of scribe lines Ly1, Ly2,... Ly6 in the y-axis direction.

  Moreover, as shown in FIGS. 5A and 5B, the silicon carbide semiconductor wafer 100C according to the third embodiment has a vertical surface 140 formed at the peripheral edge. This vertical surface 140 is formed by processing a chamfered portion (see FIG. 8) provided on the peripheral portion of silicon carbide semiconductor wafer 100A. The angle formed between vertical surface 140 and surface 111 of silicon carbide semiconductor wafer 100C and the angle formed between vertical surface 140 and back surface 112 of silicon carbide semiconductor wafer 100C are the same in silicon carbide semiconductor wafer 100C according to the third embodiment. Each is a right angle.

  By processing the silicon carbide semiconductor wafer in this manner, a right-angled corner C1 (referred to as an upper-side corner C1) is formed over the entire circumference on the upper end surface side of the silicon carbide semiconductor wafer and the lower end surface. A right-angled corner C2 (referred to as a lower-side corner C2) is also formed on the side (see FIG. 5B).

  FIG. 6 is an enlarged cross-sectional view of a main part for explaining the dicing method of the silicon carbide semiconductor wafer according to the third embodiment. In the silicon carbide semiconductor wafer dicing method according to the third embodiment, the same step as the dicing method of the silicon carbide semiconductor wafer according to the first embodiment is performed as a step before the dicing. 6 also omits the illustration of the annular frame and the dicing device, and shows only the relationship between the silicon carbide semiconductor wafer 100C to which the dicing tape 200 is attached and the dicing blade 300.

  Then, after the previous step of dicing is completed, dicing is performed by dicing blade 300 by moving silicon carbide semiconductor wafer 100C in the horizontal direction (the direction of arrow b in FIG. 6). At this time, since the right-angled corners (upper corner C1 and lower corner C2) are formed at the peripheral edge of the silicon carbide semiconductor wafer 100C, the dicing blade 300 is first formed of the silicon carbide semiconductor wafer. Dicing is started with the corner C1 in contact with the corner C1 on the upper side of 100C, that is, point contact, with the corner C1 as the dicing start position.

  In this way, at the start of dicing, the dicing blade 300 first contacts the upper corner C1, that is, makes a point contact, and performs the dicing with the corner as the dicing start position. As in the case of starting dicing (see FIG. 8), the dicing blade 300 does not slide in the left-right direction on the chamfered portion, and the dicing blade 300 can easily bite into the silicon carbide semiconductor wafer 100C, and the carbonization has high hardness. The silicon semiconductor wafer can be diced smoothly.

[Embodiment 4]
In each of the above embodiments, the corners are formed over the entire circumference of the peripheral edge of the silicon carbide semiconductor wafers 100A, 100B, 100C, but the corners do not necessarily need to be formed over the entire circumference. For example, the silicon carbide semiconductor wafers 100 </ b> A, 100 </ b> B, and 100 </ b> C may be formed only in the peripheral portion on the dicing start side, or may be provided only in the region corresponding to each scribe line. . In addition, when providing in the area | region corresponding to each scribe line, you may make it provide only in the area | region corresponding to the scribe line in the peripheral part of the dicing start side.

  FIG. 7 is a view for explaining a silicon carbide semiconductor wafer 100D according to the fourth embodiment. FIG. 7A is a diagram showing a case where corner portions are provided only in a region corresponding to the peripheral portion on the dicing start side in the peripheral portion of silicon carbide semiconductor wafer 100D, and FIG. It is a figure which shows the case where a corner | angular part is provided only in the area | region corresponding to the scribe line which exists in the peripheral part of a start side. In addition, the corner | angular part shall be formed by making the peripheral part of the silicon carbide semiconductor wafer 100D into the inclined surface 120 similarly to the silicon carbide semiconductor wafer 100A which concerns on the said Embodiment 1. FIG.

  Further, in this case, it is assumed that the moving direction of silicon carbide semiconductor wafer 100D when dicing is the left direction (arrow b direction) as shown in the above embodiments. That is, when silicon carbide semiconductor wafer 100D is moved in the direction of arrow b, dicing is performed by dicing blade 300 (not shown in FIG. 7).

  In the silicon carbide semiconductor wafer 100D according to the fourth embodiment, when corners are formed only in a region corresponding to the peripheral portion on the dicing start side, as shown in FIG. 7A, the peripheral portion of the silicon carbide semiconductor wafer 100D Is processed so that the peripheral edge (referred to as region A) from Ps to Pe in the entire circumference is an inclined surface. In addition, the area | region shown in gray in Fig.7 (a) has shown that it is the area | region A processed so that it might become an inclined surface.

  In this way, by providing corners only in the region A, for example, first, the scribe lines Lx1, Lx2,..., Lx6 along the x-axis direction are diced, and then, the scribe lines along the y-axis direction are diced. When dicing is performed in the order of dicing the lines Ly1, Ly2,..., Ly6, first, the silicon carbide semiconductor wafer 100D is first scribed from the region A side to the scribe lines Lx1, Lx2,. , Lx6 are sequentially diced, and when all the scribe lines Lx1, Lx2,..., Lx6 in the x-axis direction have been diced, the silicon carbide semiconductor wafer 100D is rotated 90 degrees counterclockwise to the region A side. The scribe lines Ly1, Ly2,..., Ly6 along the y-axis direction are sequentially diced.

  In this case, since the corner (the corner C1 on the upper side and the corner C2 on the lower side) corresponding to the region A is formed, as described in the first embodiment, the dicing blade 300 (FIG. 7 is not shown in the figure.) Can easily bite into the silicon carbide semiconductor wafer 100D, and the silicon carbide semiconductor wafer having high hardness can be diced smoothly.

  On the other hand, in the silicon carbide semiconductor wafer 100D according to the fourth embodiment, when the corner is provided only in the region corresponding to the scribe line existing in the peripheral portion (region A) on the dicing start side, as shown in FIG. As described above, the regions Ax1, Ax2,..., Ax6 corresponding to the scribe lines Lx1, Lx2,..., Lx6 in the x-axis direction are processed to have the inclined surface 120, and the scribe lines Ly1 in the y-axis direction are processed. , Ly2,..., Ly6 are processed so that the regions Ay1, Ay2,. In addition, the area | region shown in gray in FIG.7 (b) has shown that it is the area | region processed so that it may become the inclined surface 120. FIG.

  In this way, the regions Ax1, Ax2,..., Ax6 corresponding to the scribe lines Lx1, Lx2,..., Lx6 in the x-axis direction and the scribe lines Ly1, Ly2,. By forming the inclined surfaces 120 in the areas Ay1, Ay2,..., Ay6, the areas Ax1, Ax2, ..., Ax6 and the areas Ay1, Ay2,. Corners similar to those shown (upper corner C1 and lower corner C2) are formed.

  Thereby, when dicing is performed by moving silicon carbide semiconductor wafer 100D in the direction of arrow b, dicing blade 300 is divided into regions Ax1, Ax2, ..., Ax6 and regions Ay1, as described in the first embodiment. Dicing is started with the corner C2 in contact with the upper corner C2 of Ay2,. For this reason, dicing blade 300 can easily bite into silicon carbide semiconductor wafer 100D, and can smoothly dice a silicon carbide semiconductor wafer having high hardness.

  In FIG. 7B, reference numeral “120” indicating an inclined surface, and reference numerals “C1” and “C2” indicating upper and lower corners of the inclined surface 120. Are attached only to the regions Ax1 and Ay1 for simplification of the drawings, but the same inclined surface 120 is also applied to the other regions Ax2, Ax3,..., Ax6 and Ay2, Ay3,. In addition, an upper corner C1 and a lower corner C2 of the inclined surface 120 are formed.

  In FIG. 7B, the regions Ax5 and Ax6 corresponding to the scribe lines Lx5 and Lx6 in the x-axis direction and the regions Ay1 and Ay2 corresponding to the scribe lines Ly1 and Ly2 in the y-axis direction are close to each other. Therefore, these may be combined into one region, and the entire region may be the inclined surface 120.

  Further, the region A (peripheral portion on the dicing start side) and the regions Ax1, Ax2,..., Ax6 and the regions Ay1, Ay2, ..., Ay6 corresponding to the scribe lines are the peripheral portions of the silicon carbide semiconductor wafer. Although the case of the inclined surface is illustrated, the L-shaped notch 130 as described in the second embodiment may be used instead of the inclined surface, and the vertical surface 140 as described in the third embodiment. May be

  The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, the following modifications are possible.

  (1) In each of the above embodiments, when dicing is performed, the dicing is performed by the dicing blade 300 by moving the silicon carbide semiconductor wafer (referred to as the silicon carbide semiconductor wafer 100A) in the horizontal direction. Although the dicing is performed by moving the silicon carbide semiconductor wafer in the horizontal direction with respect to the blade 300, the dicing operation is not limited to this. For example, when a mechanism that allows the dicing blade 300 to move in the vertical direction (direction along the vertical axis) is provided and dicing is performed, the dicing blade 300 is first lowered from above in the vertical direction, and then the silicon carbide semiconductor wafer 100A. Dicing may be performed by moving the silicon carbide semiconductor wafer 100 </ b> A in the horizontal direction while performing an operation of cutting in the corners. Such a dicing operation can be similarly performed on the other silicon carbide semiconductor wafers 100B, 100C, and 100D.

  (2) In each of the above embodiments, a silicon carbide semiconductor wafer has been described as an example of a semiconductor wafer having high hardness. However, the present invention is not limited to a silicon carbide semiconductor wafer, and the present invention is widely applied to a wide band gap semiconductor wafer. Applicable. The wide band gap semiconductor wafer includes not only the silicon carbide semiconductor wafer described in the above embodiment but also a gallium nitride semiconductor wafer.

  (3) The corner portion formed in the semiconductor wafer is not limited to the shape described in the above embodiment, and various modifications can be made.

  100A, 100B, 100C, 100D ... silicon carbide semiconductor wafer, 111 ... front surface, 112 ... back surface, 120 ... inclined surface, 130 ... notch, 140 ... vertical surface, 200 ... Dicing tape, 300 ... Dicing blade, A ... Area (periphery on the dicing blade start side), C1, C2 ... Corner, Lx1, Lx2, ..., Lx6 ... x .., Ly6... Y6 scribe line, Ax1, Ax2,..., Ax6... Region corresponding to the scribe line in the x axis direction, Ay1, Ay2, ..., Ay6 ... Area corresponding to the scribe line in the y-axis direction

Claims (12)

A semiconductor wafer dicing method for dicing along a scribe line, a high-hardness semiconductor wafer having a curved chamfered portion at the peripheral edge and a plurality of semiconductor chips separated by a scribe line,
A semiconductor wafer preparation step of preparing a semiconductor wafer in which the chamfered portion is processed so that a corner portion is formed at least in a portion of the peripheral edge portion that comes into contact with the dicing blade;
A dicing step of performing dicing with the corner portion as a dicing start position;
In this order, a dicing method for a semiconductor wafer. The method for dicing a semiconductor wafer according to claim 1.
The semiconductor wafer dicing method, wherein the corner portion is formed by processing the chamfered portion so that the peripheral edge portion has a smooth inclined surface. The method for dicing a semiconductor wafer according to claim 1.
The semiconductor wafer dicing method, wherein the corner portion is formed by processing the chamfered portion so that a cross-sectional shape of the peripheral edge portion is L-shaped. The method for dicing a semiconductor wafer according to claim 1.
The method of dicing a semiconductor wafer, wherein the corner portion is formed by processing the chamfered portion so that an end surface of the peripheral edge portion becomes a vertical surface. In the semiconductor wafer dicing method according to any one of claims 1 to 4,
The semiconductor wafer dicing method, wherein the corner portion is formed over the entire periphery of the peripheral portion of the semiconductor wafer. In the semiconductor wafer dicing method according to any one of claims 1 to 4,
The semiconductor wafer dicing method, wherein the corner portion is formed only in a region corresponding to a peripheral portion on a dicing start side of peripheral portions of the semiconductor wafer. In the semiconductor wafer dicing method according to any one of claims 1 to 4,
The semiconductor wafer dicing method, wherein the corner portion is formed only in a region corresponding to each scribe line in a peripheral portion of the semiconductor wafer. In the semiconductor wafer dicing method according to any one of claims 1 to 7,
The semiconductor wafer dicing method, wherein the semiconductor wafer is a wide band gap semiconductor wafer. The method for dicing a semiconductor wafer according to claim 8.
The semiconductor wafer dicing method, wherein the wide band gap semiconductor wafer is a silicon carbide semiconductor wafer. The method for dicing a semiconductor wafer according to claim 8.
The semiconductor wafer dicing method, wherein the wide band gap semiconductor wafer is a gallium nitride semiconductor wafer. In the semiconductor wafer dicing method according to any one of claims 1 to 10,
In the dicing step, the dicing blade is moved downward in the vertical direction to perform a dicing operation by moving the semiconductor wafer in the horizontal direction while performing an operation of cutting the corner portion of the semiconductor wafer. A semiconductor wafer dicing method. A high-hardness semiconductor wafer having a curved chamfered portion at the periphery and a plurality of semiconductor chips separated by scribe lines,
The semiconductor wafer, wherein the chamfered portion is processed so that a corner portion is formed at least in a portion of the peripheral portion where the dicing blade contacts.

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