JP2012069814A - Printed circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce radiation noise by suppressing diffusion of power supply noise.SOLUTION: A sub power plane 8 is provided in a power conductive layer 3 and includes a range of a projection image of a semiconductor device 6 projected onto the power conductive layer 3. A main power plane 7 is provided in the power conductive layer 3 at an interval from the sub power plane 8. Power connecting wiring 10 connects the main power plane 7 and the sub power plane 8. A sub ground plane 12 is provided in a ground conductive layer 4 and includes a range of a projection image of the semiconductor device 6 projected onto the ground conductor layer 4. A main ground plane 11 is provided in the ground conductive layer 4 at an interval from the sub ground plane 12. Ground connecting wiring 14 connects the main ground plane 11 and the sub ground plane 12. The ground connecting wiring 14 intersects a projection image of the power connecting wiring 10 projected onto the ground conductive layer 4.

Description

  The present invention relates to a printed circuit board on which circuit elements are mounted.

  It is well known that printed circuit boards on which circuit elements such as ICs and LSIs are mounted generate radiation noise due to the operation of the circuit elements and cause malfunctions in the electronic device itself or other electronic devices. ing.

  In recent years, the speeding up of ICs and LSIs has further progressed, and the operating frequency has reached several hundred MHz to several GHz. In bands where the operating frequency exceeds several hundreds of MHz, the effects of the countermeasure components themselves and the parasitic components of the printed circuit board wiring become large, which hinders the effectiveness of the countermeasure components and seems to be generally used. With countermeasures against radiated noise using various countermeasure parts, sufficient effects cannot be obtained.

  In order to suppress radiation noise in such a band of several hundred MHz to several GHz, a method of using a multilayer printed circuit board configuration having a small parasitic component such as an embedded capacitor substrate is used. Conventionally, an embedded capacitor substrate has an entire surface of a power supply conductor layer and a ground conductor layer as electrodes, and a thin dielectric layer having a thickness of 100 μm or less is provided between the layers so that the power supply conductor layer and the ground conductor layer act as a capacitor. Has been proposed (see Patent Document 1).

  On the other hand, a method for suppressing the diffusion of power supply noise in a normal printed circuit board has been proposed (see Patent Document 2). Specifically, by providing island-shaped power planes and ground planes in the power conductor layer and ground conductor layer, respectively, and connecting them with the projected connection wiring provided at the same projected position, the path of power noise is limited. A method for suppressing the diffusion of power supply noise has been proposed. Each connection wiring is set to an appropriate width in consideration of the fact that if the wiring width is too wide, the diffusion of power supply noise is not suppressed, and if the wiring width is too narrow, the electric resistance increases.

Japanese Patent No. 2738590 JP 2007-173665 A

  However, in the configuration of Patent Document 1, since the entire surfaces of the power supply conductor layer and the ground conductor layer are used as electrodes, power supply noise generated due to the operation of circuit elements such as IC and LSI is diffused throughout the substrate. As a result, there is a problem that radiation noise increases.

  Further, even if the means for connecting with each connection wiring described in Patent Document 2 is simply applied to the embedded capacitor substrate described in Patent Document 1, the effect of suppressing the diffusion of power supply noise is sufficient. is not. In the embedded capacitor substrate, since the power supply conductor layer and the ground conductor layer are close to each other, the connection wiring between the power supply and the ground is strongly coupled. Therefore, the impedance (inductance component) of each connection wiring cannot be increased, and power supply noise is diffused through the connection wiring.

  Accordingly, an object of the present invention is to provide a printed circuit board that reduces radiation noise by suppressing the diffusion of power supply noise.

  The present invention has a power supply conductor layer, a ground conductor layer, and a wiring layer, the power supply conductor layer, the ground conductor layer, and the wiring layer are laminated via a dielectric layer, and a circuit element is mounted on the wiring layer. In the printed circuit board, a first power plane provided in the power supply conductor layer and supplying a power supply potential to the circuit element, and a first power plane provided in the power supply conductor layer and spaced apart from the first power supply plane. A second power plane, a power connection wiring connecting the first power plane and the second power plane, and a first ground plane provided in the ground conductor layer and supplying a ground potential to the circuit element A second ground plane that is spaced apart from the first ground plane in the ground conductor layer, the first ground plane, and the second ground plane A ground connection wiring that connects a ground plane, and the power connection wiring and the ground connection wiring intersect the projected image when the power connection wiring is projected onto the ground conductor layer and the ground connection wiring. It is the arrangement | positioning which carries out.

  According to the present invention, since the projected image when the power connection wiring is projected onto the ground conductor layer and the ground connection wiring intersect, the effective inductance of the power connection wiring and the ground connection wiring becomes higher than before, and the impedance is reduced. Get higher. Therefore, it is possible to suppress the power supply noise generated in the first power supply plane due to the operation of the circuit element from being diffused to the second power supply plane, and to reduce the radiation noise.

It is explanatory drawing which shows schematic structure of the printed circuit board which concerns on 1st Embodiment of this invention. It is the top view which looked at the ground conductor layer side from the power supply conductor layer, (a) is a figure which shows the whole power supply conductor layer, (b) is the elements on larger scale of a power supply conductor layer. It is an electric circuit diagram which shows the equivalent circuit of a power supply conductor layer and a ground conductor layer. It is explanatory drawing which shows schematic structure of the printed circuit board which concerns on 2nd Embodiment of this invention, (a) is a disassembled perspective view of a printed circuit board, (b) is the plane which looked at the ground conductor layer side from the power supply conductor layer FIG. 1 is a perspective view of a simulation model of a printed circuit board in Example 1. FIG. It is a perspective view of the simulation model of the printed circuit board of a comparative example. It is a figure which shows the reduction effect of power supply noise propagation, (a) is a figure which shows the simulation result of the printed circuit board of Example 1, and the simulation result of the printed circuit board of a comparative example. (B) is a figure which shows the simulation result of the printed circuit board of Example 2, and the simulation result of the printed circuit board of a comparative example. It is a figure which shows the relationship between the crossing angle in Example 1, and an effective inductance. 6 is a perspective view of a simulation model of a printed circuit board in Example 2. FIG.

  Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings.

[First Embodiment]
FIG. 1 is an explanatory diagram showing a schematic configuration of a printed circuit board according to the first embodiment of the present invention. The printed circuit board 1 in the present embodiment is a so-called multilayer printed circuit board, and includes a first wiring layer 2, a power supply conductor layer 3, a ground conductor layer 4, and a second wiring layer 5, and each layer is a dielectric layer. (Insulator layers) 21, 22 and 23 are sequentially stacked. The power supply conductor layer 3 and the ground conductor layer 4 are disposed to face each other with the dielectric layer 22 in between, thereby forming an embedded capacitor. On the first wiring layer 2, a semiconductor device 6 as a circuit element such as an IC or LSI is mounted, and a wiring pattern (not shown) is provided.

  The power supply conductor layer 3 is provided with a main power supply plane 7 and a sub power supply plane 8 spaced apart from each other. The main power plane 7 and the sub power plane 8 are connected by a power connection wiring 10.

  The sub power supply plane 8 is a first power supply plane for supplying the power supply potential (power) supplied to the main power supply plane 7 to the semiconductor device 6. The sub power supply plane (first power supply plane) 8 is preferably formed in a size including the range of the projected image when the semiconductor device 6 is projected onto the power supply conductor layer 3. In the present embodiment, the sub power supply plane 8 is formed in a size that overlaps (coincides with) a projected image when the semiconductor device 6 is projected onto the power supply conductor layer 3. The semiconductor device 6 is connected to the sub power supply plane 8 via a via (not shown) or the like. The sub power plane 8 may be formed smaller than a projected image when the semiconductor device 6 is projected onto the power conductor layer 3.

  The main power supply plane 7 is a second power supply plane provided on the power supply conductor layer 3 at a distance from the sub power supply plane 8. More specifically, the main power supply plane 7 and the sub power supply plane 8 are divided into island shapes by a substantially C-shaped first opening 9 and are connected by a power supply connection wiring 10. The power connection wiring 10 is provided so as to connect mutually opposing sides of the main power plane 7 and the sub power plane 8.

  The ground conductor layer 4 is provided with a main ground plane 11 and a sub ground plane 12 spaced apart from each other. The main ground plane 11 and the sub ground plane 12 are connected by a ground connection wiring 14.

  The sub ground plane 12 is a first ground plane for supplying a ground potential to the semiconductor device 6. The sub-ground plane 12 is preferably formed in a size that includes a range of a projected image when the semiconductor device 6 is projected onto the ground conductor layer 4. In the present embodiment, the sub ground plane 12 is formed in a size that overlaps (coincides with) a projected image when the semiconductor device 6 is projected onto the ground conductor layer 4. The semiconductor device 6 is connected to the sub ground plane 12 via a via (not shown) or the like. The sub-ground plane 12 may be formed smaller than a projected image when the semiconductor device 6 is projected onto the ground conductor layer 4.

  The main ground plane 11 is a second ground plane provided on the ground conductor layer 4 with a space from the sub ground plane 12. More specifically, the main ground plane 11 and the sub ground plane 12 are divided into island shapes by a substantially C-shaped second opening 13 and are connected by a ground connection wiring 14.

  The ground connection wiring 14 is provided so as to connect opposite sides of the main ground plane 11 and the sub ground plane 12. Each of the connection wirings 10 and 14 is set to an appropriate width in consideration of the fact that if the wiring width is too wide, the diffusion of power supply noise is not suppressed, and if the wiring width is too narrow, the electrical resistance increases.

  The second wiring layer 5 is provided with a wiring pattern and electronic parts (not shown). In the present embodiment, the power conductor layer 3 and the ground conductor layer 4 that are closer to the first wiring layer 2 on which the semiconductor device 6 is mounted are the power conductor layer 3, but the ground conductor layer 4. It may be.

  2 is a plan view of the power supply conductor layer 3 as viewed from the ground conductor layer 4 side. FIG. 2A is a diagram showing the entire power supply conductor layer 3, and FIG. 2B is a partially enlarged view of the power supply conductor layer 3. FIG. As shown in FIG. 2A, the power connection wiring 10 and the ground connection wiring 14 are arranged so that the projected image when the power connection wiring 10 is projected onto the ground conductor layer 4 and the ground connection wiring 14 intersect. ing.

  The power connection wiring 10 and the ground connection wiring 14 are strip-shaped conductors extending in a straight line. As shown in FIG. 2B, the crossing angle between the center line L1 of the projected image when the power connection wiring 10 is projected onto the ground conductor layer 4 and the center line L2 of the ground connection wiring 14 is θ. Here, the intersection angle θ is a case where the center lines L1 and L2 of the connection wirings 10 and 14 are orthogonal to the sides of the planes 8 and 12, and the projection image of the connection wiring 10 and the connection wiring 14 overlap. It is 0 °.

  When the semiconductor device 6 operates, the power supply noise current generated by the operation tends to flow from the sub power supply plane 8 to the main power supply plane 7 via the power supply connection wiring 10. At this time, the feedback current of power supply noise tends to flow from the main ground plane 11 toward the sub-ground plane 12 via the ground connection wiring 14 in the ground conductor layer 4. That is, the current flowing through the power supply connection line 10 and the current flowing through the ground connection line 14 have components of opposite phases.

  Here, FIG. 3 shows an equivalent circuit of the power supply conductor layer 3 and the ground conductor layer 4 serving as the embedded capacitor substrate. In FIG. 3, Lv is a self-inductance component of the power connection wiring 10, Lg is a self-inductance of the ground connection wiring 14, and M is a mutual inductance between the power connection wiring 10 and the ground connection wiring 14. Cm is a capacity between the main power plane 7 and the main ground plane 11, and Cs is a capacity between the sub power plane 8 and the sub ground plane 12.

  In order to suppress the diffusion of the power supply noise current, the effective inductance L of the connection wirings 10 and 14 may be increased. Here, the effective inductance L of the connection wires 10 and 14 is expressed by the following equation.

  When a current flows through the power connection wiring 10, a magnetic flux is generated in the right-handed direction on a plane orthogonal to the direction of the current. Mutual inductance M is generated by the magnetic flux interlinking with the ground connection wiring 14. When the crossing angle θ is in the range of 0 ° to 90 °, the mutual inductance M decreases as θ increases, so the effective inductance L increases. In particular, when the crossing angle is 90 °, the generated magnetic flux does not interlink with the ground connection wiring 14 and the mutual inductance M does not occur.

  Also, when the crossing angle θ is in the range of 90 ° to 180 °, the mutual inductance M increases as θ increases, so the effective inductance L increases. In the case where the conventional intersection angle θ is 0 °, the maximum mutual inductance M is generated because the magnetic fluxes generated by the currents flowing through the connection wires 10 and 14 are linked together, and the effective inductance L is minimized.

  Therefore, as the crossing angle θ is increased, the effective inductance L of the connection wirings 10 and 14 increases. However, in the printed circuit board 1 of the first embodiment in which a part of the power connection wiring 10 and the ground connection wiring 14 overlap, it is structurally impossible that the crossing angle θ is 180 °. Therefore, if the intersecting angle between the projected image when the power connection wiring 10 is projected on the ground conductor layer 4 and the ground connection wiring 14 intersect within the range of 0 ° <θ <180 °, the diffusion of power noise is suppressed. can do.

  Thus, since the projection image when the power supply connection line 10 is projected onto the ground conductor layer 4 and the ground connection line 14 are crossed, the effective inductance of the power supply connection line 10 and the ground connection line 14 sets the crossing angle θ to 0. It becomes higher than the case of °. Therefore, the impedances of the power connection wiring 10 and the ground connection wiring 14 are increased. Therefore, the power supply noise generated in the sub power supply plane 8 by the operation of the semiconductor device 6 as a circuit element can be prevented from diffusing to the main power supply plane 7, and the radiation noise can be reduced.

[Second Embodiment]
Next, a printed circuit board according to a second embodiment of the present invention will be described. 4A and 4B are explanatory views showing a schematic configuration of the printed circuit board according to the second embodiment of the present invention. FIG. 4A is an exploded perspective view of the printed circuit board, and FIG. It is the top view which looked at the ground conductor layer side. In addition, the same code | symbol is attached | subjected to the same part as the said 1st Embodiment, and description is abbreviate | omitted.

  In the printed circuit board 1A of the present embodiment shown in FIG. 4A, the power connection wiring 10A and the ground connection wiring 14A are different from the first embodiment in that the sub power plane 8 and the sub ground plane 12, respectively. It is a point arranged at each corner.

  Also in the printed circuit board 1A of the present embodiment, as shown in FIG. 4B, the projected image when the power connection wiring 10A is projected onto the ground conductor layer 4 and the ground connection wiring 14A are crossed. . Thereby, the effective inductances of the power supply connection wiring 10A and the ground connection wiring 14A are higher than when the crossing angle θ is 0 °, and the impedance is increased. Therefore, it is possible to suppress the power supply noise generated in the sub power supply plane 8 due to the operation of the semiconductor device 6 as a circuit element from being diffused to the main power supply plane 7 and to reduce the radiation noise.

  Although the present invention has been described based on the above embodiment, the present invention is not limited to this. In the above embodiment, the description is given on the assumption that there are four conductor layers. However, even when there are four or more conductor layers, the power supply conductor layer and the ground conductor layer are arranged adjacent to each other via the dielectric layer. As long as an embedded capacitor is configured, the present invention is applicable.

Example 1
Next, in order to verify the effect of the printed circuit board 1 of the first embodiment, a simulation was performed using an electromagnetic field simulator MW-Studio (manufactured by CST). FIG. 5 is a perspective view of a simulation model of the printed circuit board 1 in the first embodiment.

  In FIG. 5, the printed circuit board 1 is a rectangle having a short side of 40 mm and a long side of 90 mm. The first wiring layer 2, the power supply conductor layer 3, the ground conductor layer 4 and the second wiring layer 5 (see FIG. 1) are each made of copper having a thickness of 50 μm. Dielectric layers 21, 22, and 23 (see FIG. 1) having a relative dielectric constant of 4.3 are disposed between the respective conductor layers. The thickness of the dielectric layer 21 is 100 μm, the thickness of the dielectric layer 22 is 50 μm, and the thickness of the dielectric layer 23 is 1.3 mm. The sub power plane 8 and the sub ground plane 12 have a square shape with a side of 26 mm.

  Further, the power connection wiring 10 is arranged such that the intersection angle θ with the ground connection wiring 14 forms an angle of 90 ° when projected onto the ground conductor layer 4. The distance between the sides connected by the power connection wiring 10 between the main power plane 7 and the sub power plane 8 and the distance between the sides connected by the ground connection wiring 14 between the main ground plane 11 and the sub ground plane 12 are 4 mm. is there. The wiring width of the power connection wiring 10 and the ground connection wiring 14 is 2 mm.

  The input port 30 has one end connected to the sub power plane 8 and the other end connected to the sub ground plane 12. The output port 31 has one end connected to the main power plane 7 and the other end connected to the main ground plane 11. , Each having an impedance of 50Ω. Using such a model, the insertion loss (S21) when a Gaussian pulse having a frequency of 0 to 3 GHz and an amplitude of 1 W was input to the input port 30 was simulated.

  In addition, a simulation model of a printed circuit board of a comparative example corresponding to a conventional printed circuit board with a crossing angle θ of 0 ° was created, and the results were compared. FIG. 6 is a perspective view of a simulation model of the printed circuit board 100 of the comparative example. 6 is different from the simulation model of FIG. 5 only in that the power supply connection wiring 10 is arranged to face the position overlapping the ground connection wiring 14.

  The simulation result of the printed circuit board 1 of Example 1 and the simulation result of the printed circuit board 100 of the comparative example are shown in FIG. In FIG. 7A, the horizontal axis represents the frequency, the vertical axis represents the insertion loss (S21), the solid line represents the result of Example 1, and the broken line represents the result of the comparative example. As is clear from FIG. 7A, the printed circuit board 1 of the first embodiment has a larger insertion loss than the printed circuit board 100 of the comparative example, and the power supply noise from the input port 30 to the output port 31 is larger. Current propagation is small. That is, it can be seen that the diffusion of power supply noise is suppressed.

  Next, the relationship between the angle θ formed by the power supply connection wiring 10 and the ground connection wiring 14 and the effective inductance L was examined using a simulator FastHenry. The result is shown in FIG. From the results shown in FIG. 8, the effective inductance L when the crossing angle θ between the power connection wiring 10 and the ground connection wiring 14 is 0 ° is 0.15 nH, and the effective inductance L when the crossing angle θ is 30 ° is 0.85 nH. Therefore, the effective inductance is about five times or more when the crossing angle θ is 30 ° and 0 °.

  Further, the result shown in FIG. 8 shows that the effective inductance L takes a maximum value when the crossing angle θ is 180 °. However, in the printed circuit board 1 according to the first embodiment in which the power connection wiring 10 and the ground connection wiring 14 partially overlap, it is structurally impossible for the crossing angle θ to be 180 °. Further, making the crossing angle θ larger than 135 ° is not a realistic structure because it increases the wiring area.

  Furthermore, from the result shown in FIG. 8, the increase rate of the effective inductance in the range where the cross angle θ is larger than 135 ° is lower than the increase rate of the effective inductance in the range where the cross angle θ is 45 ° to 135 °. Therefore, even if the crossing angle θ is larger than 135 °, the effective inductance hardly increases, and there is almost no merit for making the crossing angle θ larger than 135 °. From this, it can be said that the crossing angle θ desirably has an angle in the range of 30 ° to 135 ° (30 ° ≦ θ ≦ 135 °).

  At this time, the dielectric layer laminated between the power supply conductor layer 3 and the ground conductor layer 4 may have a thickness of 100 μm or less, and preferably a thickness and a dielectric that form a capacitance of 38 pF to 4427 pF per square centimeter. It is desirable to have a rate. This value is based on a dielectric constant range of 4.3-25 and a thickness range of 5-100 μm.

  Further, it is more preferable that the crossing angle θ is 90 °. In this case, although the effective inductance L is not the maximum, the mutual inductance M does not occur, the effective inductance L is higher than the conventional one, and the connection wires 10 and 14 need only be orthogonal to each other. , 14 can be easily manufactured. When the crossing angle θ is 90 °, not only when noise propagates from the sub power plane 8 to the main power plane 7, but also when noise propagates from the main power plane 7 to the sub power plane 8. Noise propagation can be effectively suppressed.

(Example 2)
Next, in order to verify the effect of the printed circuit board 1A according to the second embodiment, a simulation was performed in the same manner as the printed circuit board 100 of Example 1. FIG. 9 is a perspective view of a simulation model of the printed circuit board 1A according to the second embodiment. 9 is different from the simulation model of FIG. 5 in that the power connection wiring 10A and the ground connection wiring 14A are arranged at the corners of the sub power plane 8 and the sub ground plane 12, and other conditions are as follows. This is the same as the printed circuit board 100 of FIG. Further, the intersection angle θ is 90 °.

  The result at this time is shown in FIG. In FIG. 7B, the horizontal axis represents frequency, the vertical axis represents insertion loss (S21), the solid line represents the result of the printed circuit board 1A of the second embodiment, and the broken line represents the result of the printed circuit board 100 of the comparative example. As is apparent from FIG. 7B, the printed circuit board 1A of the second embodiment has a larger insertion loss than the printed circuit board 100 of the comparative example, and the power supply noise from the input port 30 to the output port 31 is larger. Current propagation is small. That is, it can be seen that the diffusion of power supply noise is suppressed.

1, 1A Printed circuit board 2 First wiring layer 3 Power supply conductor layer 4 Ground conductor layer 5 Second wiring layer 6 Semiconductor device (circuit element)
7 Main power plane (second power plane)
8 Sub power plane (first power plane)
10, 10A Power connection wiring 11 Main ground plane (second ground plane)
12 Sub ground plane (first ground plane)
14,14A Ground connection wiring

Claims (3)

A printed circuit board having a power conductor layer, a ground conductor layer and a wiring layer, wherein the power conductor layer, the ground conductor layer and the wiring layer are laminated via a dielectric layer, and a circuit element is mounted on the wiring layer In
A first power supply plane provided in the power supply conductor layer for supplying a power supply potential to the circuit element;
A second power supply plane provided in the power supply conductor layer and spaced apart from the first power supply plane;
Power connection wiring for connecting the first power plane and the second power plane;
A first ground plane provided in the ground conductor layer and supplying a ground potential to the circuit element;
A second ground plane provided in the ground conductor layer and spaced from the first ground plane;
A ground connection wiring for connecting the first ground plane and the second ground plane,
The printed circuit board, wherein the power connection wiring and the ground connection wiring are arranged such that a projection image obtained by projecting the power connection wiring onto the ground conductor layer and the ground connection wiring intersect with each other. .   A crossing angle between a center line of a projected image when the power connection wiring is projected onto the ground conductor layer and a center line of the ground connection wiring is an angle within a range of 30 ° to 135 °. The printed circuit board according to claim 1.   The printed circuit board according to claim 1 or 2, wherein a thickness of a dielectric layer provided between the power supply conductor layer and the ground conductor layer is 100 µm or less.

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