JP2012049169A - Nitride semiconductor device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a normally-off type nitride semiconductor device that is operable at high frequency and can be fabricated only with a well-manageable manufacturing method.SOLUTION: A floating electrode 8 that makes Schottky-contact with an electron supply layer 4 is disposed on the electron supply layer 4 between a source electrode 5 and a drain electrode 6. A gate electrode 7 is disposed on the floating electrode 8 via an insulating film 9. A positive bias voltage is applied to the gate electrode so that electrons are accumulated in the floating electrode.

Description

  The present invention relates to a nitride semiconductor device and a manufacturing method thereof, and more particularly to a nitride semiconductor device constituting a high electron mobility transistor capable of normally-off operation and a manufacturing method thereof.

  Nitride semiconductors such as GaN, AlGaN, InGaN, InAlN, and InAlGaN have the features of high breakdown electric field and high electron saturation rate. Due to this feature, nitride semiconductors are promising as semiconductor materials capable of realizing high-power / high-frequency devices, and in recent years, practical development of high electron mobility transistors (HEMTs) using nitride semiconductor materials has been promoted.

FIG. 4 is a cross-sectional view of a conventional nitride semiconductor device having a HEMT structure. As shown in FIG. 4, a conventional nitride semiconductor device is formed on a substrate 1 such as sapphire (Al ₂ O ₃ ), silicon carbide (SiC), or silicon (Si) via a buffer layer 2. An electron transit layer 3 made of undoped GaN or the like and an electron supply layer 4 made of n-type impurities or made of undoped AlGaN or the like are formed. On the electron supply layer 4, a source electrode 5 and a drain electrode 6 that are in ohmic contact, and a gate electrode 7 that controls a current between the source electrode 5 and the drain electrode 6 are formed.

  The electron supply layer 4 is made of a material having a larger band gap and a smaller lattice constant than the electron transit layer 3. As shown in FIG. 4, when the electron transit layer 3 and the electron supply layer 4 are heterojunction, piezo polarization and spontaneous polarization occur due to tensile stress, and two-dimensional electrons having extremely high electron mobility on the electron transit layer 3 side in the vicinity of the heterojunction. Gas 10 is generated. This two-dimensional electron gas 10 becomes a channel of a nitride semiconductor device having a HEMT structure, and the current flowing between the source electrode 5 and the drain electrode 6 can be controlled by controlling the bias voltage applied to the gate electrode 7. it can.

  By the way, the conventional nitride semiconductor device as shown in FIG. 4 is a normally-on (depletion) type in which a current flows between the source electrode 5 and the drain electrode 6 without applying a control voltage to the gate electrode 7. . In order to keep such a normally-on type nitride semiconductor device in an off state (a state in which carriers do not flow in the two-dimensional electron gas 10), it is necessary to apply a negative bias voltage to the gate electrode 7.

  On the other hand, a normally-off (enhancement) type nitride semiconductor device in which no current flows between the source electrode 5 and the drain electrode 6 without applying a bias voltage to the gate electrode 7 has been developed. A normally-off type nitride semiconductor device is disclosed in Patent Document 1, for example. In the nitride semiconductor device disclosed in Patent Document 1, a part of the electron supply layer 4 is removed by etching to form a gate recess structure, and the distance between the gate electrode 7 and the two-dimensional electron gas 10 serving as a channel is shortened. . As a result, the electric field based on the Schottky barrier easily acts on the heterojunction, and the two-dimensional electron gas 10 immediately below the gate electrode 7 disappears when no bias voltage is applied to the gate electrode 7. .

JP 2008-144104 A

  In the conventional nitride semiconductor device as described above, a normally-off operation can be realized by adopting a gate recess structure, but the gate recess process is very difficult to control and has a problem that the yield is lowered. An object of the present invention is to provide a normally-off type nitride semiconductor device capable of solving the above-described problems and capable of high-frequency operation.

  In order to achieve the above object, a nitride semiconductor device according to a first invention of the present application includes an electron transit layer made of an undoped first nitride semiconductor and a heterogeneous structure between the electron transit layer and a heterolayer on a substrate via a buffer layer. An electron supply layer made of an n-type or undoped second nitride semiconductor having a larger band gap than the first nitride semiconductor, wherein a junction is formed and a two-dimensional electron gas is formed by the heterojunction. A nitride semiconductor device comprising: a source electrode and a drain electrode electrically connected to the electron supply layer; and a gate electrode for controlling a current flowing between the source electrode and the drain electrode. On the electron supply layer between the drain electrode and the drain electrode, the gate electrode is in contact with the electron supply layer via a Schottky contact and an insulating film covering the surface of the floating electrode. An electrode arranged, electrons are accumulated in the floating electrode, wherein the two-dimensional electron gas in the hetero-junction interfaces directly below the floating electrode does not exist.

  According to a second method of manufacturing a nitride semiconductor device of the present application, an electron transit layer made of an unnoded first nitride semiconductor and a heterojunction with the electron transit layer are formed on a substrate via a buffer layer. Forming a two-dimensional electron gas by the heterojunction, forming an electron supply layer made of an n-type or undoped second nitride semiconductor having a larger band gap than the first nitride semiconductor, and the electrons A nitride semiconductor device comprising: a step of forming and forming a source electrode and a drain electrode electrically connected to a supply layer; and a step of forming a gate electrode for controlling a current flowing between the source electrode and the drain electrode In the manufacturing method, a process for forming a floating electrode in Schottky contact with the electron supply layer on the surface of the electron supply layer between the source electrode and the drain electrode. Covering the surface of the floating electrode with an insulating film, forming a gate electrode on the floating electrode via the insulating film, applying a positive bias to the gate electrode, and applying electrons to the floating electrode And a step of eliminating the two-dimensional electron gas.

  In the nitride semiconductor device of the present invention, when a positive bias is applied to the gate electrode, electrons are accumulated in the floating electrode and the electrons are confined, so that the potential of the floating electrode can be increased. At this time, the two-dimensional electron gas constituting the normal channel disappears. As a result, the channel of the nitride semiconductor device can be eliminated without applying a control voltage to the gate electrode. That is, a normally-off operation is possible.

  The nitride semiconductor device of the present invention only needs to add a step of forming a floating electrode and a step of applying a positive bias to the floating electrode in the normal manufacturing process of the nitride semiconductor device. Is not required, and therefore, there is an advantage that a nitride semiconductor device can be formed with high yield.

It is sectional drawing of the nitride semiconductor device of this invention. It is an energy band figure of the nitride semiconductor device of the present invention. It is explanatory drawing of the transfer characteristic of the nitride semiconductor device of this invention. It is sectional drawing of the conventional nitride semiconductor device.

  The nitride semiconductor device of the present invention has a configuration in which a floating electrode is formed on an electron supply layer and a gate electrode is further formed through an insulating film. A major feature is that electrons (negative charges) are accumulated in the floating electrode by applying a positive bias to the floating electrode. Hereinafter, examples of the present invention will be described in detail according to the manufacturing process.

  First, the nitride semiconductor device of the first invention will be described according to the manufacturing process. FIG. 1 is a cross-sectional view of a nitride semiconductor device of the present invention. As shown in FIG. 1, an electron transit layer made of a first nitride semiconductor is formed on a substrate 1 via a buffer layer 2 by MOCVD (metal organic vapor phase epitaxy) or MBE (molecular beam epitaxy). 3 and an electron supply layer 4 made of a second nitride semiconductor are sequentially stacked. A source electrode 5, a drain electrode 6 and a floating electrode 8 are formed on the electron supply layer 4, and an insulating film 9 is formed on the entire surface of the electron supply layer 4 and the floating electrode 8 between the source electrode 5 and the drain electrode 6. Is formed. The gate electrode 7 is formed directly above the floating electrode 8 via an insulating film 9.

The substrate 1 functions as a growth substrate for epitaxially growing a semiconductor material, and also functions as a support substrate for mechanically supporting it. The substrate 1 is generally made of sapphire (Al ₂ O ₃ ), silicon carbide (SiC), or silicon (Si), and is grown on the substrate 1 in consideration of lattice constant matching, thermal conductivity, thermal expansion coefficient, and the like. It can be selected according to the nitride semiconductor layer to be formed. In this example, sapphire was used in consideration of the lattice constant matching with the nitride semiconductor layer described later.

  The buffer layer 2 is used as a buffer layer between the substrate 1 and the first nitride semiconductor epitaxially grown thereon. In this example, since the lattice mismatch between the sapphire used as the substrate 1 and the nitride semiconductor is large, GaN grown at a low temperature is grown thick as the buffer layer 2. Since the buffer layer 2 is not directly related to the operation of the nitride semiconductor device, the semiconductor material of the buffer layer 2 is replaced with a nitride semiconductor other than AlN or GaN or a III-V group compound semiconductor, or a multilayer structure. It can also be a buffer layer.

The electron transit layer 3 is composed of an undoped GaN layer having a thickness of 2.5 μm. The electron transit layer 3 is made of a nitride semiconductor having a smaller band gap than the nitride semiconductor used in the electron supply layer 4 described later, and generates a two-dimensional electron gas 10 in the vicinity of the heterojunction with the electron supply layer 4. . Moreover, the mobility of the two-dimensional electron gas 10 due to ion impurity scattering can be prevented by using an undoped GaN layer. Note that the electron transit layer 3 can be composed of, for example, In _a Ga _1-a N in addition to GaN. Here, a is a numerical value satisfying 0 ≦ a <1.

The electron supply layer 4 is composed of an n-type or undoped Al _0.35 Ga _0.65 N layer having a thickness of 25 nm. Further, the electron supply layer 4 may be composed of n-type or undoped Al _x In _y Ga _1-xy N. Here, x is 0 <x ≦ 1, y is 0 ≦ y <1, and x + y is a numerical value satisfying x + y ≦ 1, and a preferable value of x is 0.1 to 0.4.

  The source electrode 5 and the drain electrode 6 are in ohmic contact with the electron supply layer 4. As shown in FIG. 1, the source electrode 5 and the drain electrode 6 are formed by removing part or all of the electron supply layer 4 where the electrode is to be formed by a dry etching method or the like to form an ohmic recess structure. It can also be formed. By adopting an ohmic recess structure, the distance between the two-dimensional electron gas 10 and the source electrode 5 or the drain electrode 6 is reduced, and an ohmic contact with a low contact resistance can be formed.

The floating electrode 8 is made of a metal material that is in Schottky contact with the electron supply layer 4. In this embodiment, Ti (30 nm) and Al (200 nm) are sequentially stacked and used without heat treatment. The length (floating electrode length) L _f of the floating electrode 8 is 6 μm.

The insulating film 9 is made of Si ₃ N ₄ having a thickness of 50 nm, and is formed so as to cover the surface of the electron supply layer 4 between the source electrode 5 and the drain electrode 6 and the floating electrode 8. The insulating film 9 may be made of an insulating film material other than Si ₃ N ₄ , such as SiO ₂ , Al ₂ O ₃ , HfO _2, or the like. In addition, the thickness of the insulating film can be changed depending on the dielectric constant specific to the insulating film material or the target frequency band and system. For example, when the thickness of the insulating film 9 is reduced, gm and Cgs increase at the same rate. On the other hand, f _T is proportional to gm, inversely proportional to Cgs. That is, by changing the thickness of the insulating film 9, without changing the f _T, it is possible to obtain an arbitrary gm.

The gate electrode 7 is formed immediately above the floating electrode 8 via an insulating film 9. In this embodiment, the gate length L _g is 2 μm. In this embodiment, the relationship between the gate length L _g and the floating electrode length L _f is L _g <L _f , but L _g ≧ L _f can also be satisfied.

  With such a structure, when a positive bias of about +5 V is applied to the gate electrode 7, electrons accumulate in the floating electrode 8 and are confined. Due to the accumulation of negative charges in the floating electrode 8, the potential of the floating electrode 8 rises when the control voltage is not applied to the gate electrode 7, and the channel of the nitride semiconductor device can be lost. That is, a normally-off operation is possible.

  A mechanism for accumulating negative charges in the floating electrode 8 and eliminating the channel will be described with reference to an energy band diagram shown in FIG. The energy band diagram of FIG. 2 is an energy band diagram of the insulating film 9, the floating electrode 8, the electron supply layer 4, and the electron transit layer 3 immediately below the gate electrode 7, and the buffer layer 2 and the substrate 1 are omitted. . Further, since the nitride semiconductor device of the present invention only needs to consider majority carriers (electrons), the valence band is also omitted.

  First, FIG. 2A is an energy band diagram in a steady state. As shown in FIG. 2A, in the steady state, no voltage is applied to the gate electrode 7, so the potentials of the gate electrode 7 and the floating electrode 8 are the same as the Fermi level. In this case, a large polarization charge is generated near the heterojunction between the electron transit layer 3 and the electron supply layer 4 due to spontaneous polarization and piezoelectric polarization, and the conduction band of the electron transit layer is located below the Fermi level. This is a so-called two-dimensional electron gas 10. This two-dimensional electron gas 10 has high electron mobility and becomes a channel. That is, in a steady state, a channel is formed, resulting in a normally-on (enhancement) operation.

Next, FIG. 2B shows an energy band diagram when a bias voltage of about +5 V is applied to the gate electrode 7. As shown in FIG. 2B, when a positive bias voltage is applied to the gate electrode 7, the potential of the gate electrode 7 falls below the Fermi level, and the potential of the floating electrode 8 also follows the potential of the gate electrode 7. Become. At this time, since the built-in potential V _bi becomes low, electrons in the electron supply layer 4 flow and accumulate in the floating electrode 8. Thereafter, when returning to a steady state where no voltage is applied to the gate electrode 7, the potential of the floating electrode 8 is located above the Fermi level and the two-dimensional electron gas 10 serving as the channel disappears, as shown in FIG. To do. That is, the nitride semiconductor device of the present invention of normally-off (depletion) operation is obtained.

FIG. 3 shows transfer characteristics before and after accumulation of electrons in the floating electrode 8 in the nitride semiconductor device of this example formed as described above. Due to the accumulation of electrons in the floating electrode 8, the threshold voltage _Vth can be shifted in the positive direction.

  Next, the operation of the nitride semiconductor device of the present invention will be described. In the nitride semiconductor device of the present invention, the two-dimensional electron gas 10 is not generated immediately below the floating electrode 8 in a steady state. Therefore, when a positive bias voltage is applied to the gate electrode 7, the potential of the gate electrode 7 decreases, and the potential of the floating electrode 8 also decreases following the potential of the gate electrode 7. At this time, a two-dimensional electron gas is generated immediately below the floating electrode 8 and operates as a channel. As described above, the nitride semiconductor device of the present invention is normally off operation, and the drain current can be controlled only by the positive voltage without applying the negative voltage to the gate electrode 7. In addition, since the nitride semiconductor device of the present invention is configured to include the insulating film 9, the gate leakage current can be sufficiently suppressed.

1: substrate, 2: buffer layer, 3: electron transit layer, 4: electron supply layer, 5: source electrode, 6: drain electrode, 7: gate electrode, 8: floating electrode, 9: insulating film, 10: two-dimensional Electronic gas

Claims (2)

An electron transit layer made of an undoped first nitride semiconductor and a heterojunction with the electron transit layer are formed on the substrate via a buffer layer, and a two-dimensional electron gas is formed by the heterojunction. An electron supply layer made of an n-type or undoped second nitride semiconductor having a larger band gap than the first nitride semiconductor, and a source electrode and a drain electrode electrically connected to the electron supply layer; In a nitride semiconductor device including a gate electrode that controls a current flowing between a source electrode and the drain electrode,
On the electron supply layer between the source electrode and the drain electrode, a floating electrode that is in Schottky contact with the electron supply layer and the gate electrode are disposed via an insulating film that covers the surface of the floating electrode. ,
A nitride semiconductor device, wherein electrons are accumulated in the floating electrode, and the two-dimensional electron gas does not exist at the heterojunction interface immediately below the floating electrode. An electron transit layer made of an unnode first nitride semiconductor, a heterojunction with the electron transit layer, and a two-dimensional electron gas formed by the heterojunction on the substrate via a buffer layer; Forming a layer of an electron supply layer made of an n-type or undoped second nitride semiconductor having a band gap larger than that of one nitride semiconductor, and forming a source electrode and a drain electrode electrically connected to the electron supply layer In a method for manufacturing a nitride semiconductor device, comprising: a step of forming; and a step of forming a gate electrode that controls a current flowing between the source electrode and the drain electrode.
Forming a floating electrode in Schottky contact with the electron supply layer on the surface of the electron supply layer between the source electrode and the drain electrode;
Coating the floating electrode surface with an insulating film;
Forming a gate electrode on the floating electrode via the insulating film;
A method of manufacturing a nitride semiconductor device comprising: applying a positive bias to the gate electrode, accumulating and confining electrons in the floating electrode, and erasing the two-dimensional electron gas.

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