JP2012015192A5

JP2012015192A5 -

Info

Publication number: JP2012015192A5
Application number: JP2010147951A
Authority: JP
Filing date: 2010-06-29
Publication date: 2013-05-16
Anticipated expiration: 2030-06-29

Description

本発明の一実施態様によれば、スペーサ部材を介し接続された上基板及び下基板と、該上基板と該下基板の間に配置され、前記下基板に実装された半導体素子と、上面が前記上基板の表面で露出し底面が前記半導体素子に対向するように、前記上基板に取り付けられた放熱部材と、前記上基板と前記下基板との間の空間に充填された樹脂とを有し、前記放熱部材の底面は、全面が前記樹脂に密着して被覆され、前記放熱部材は前記上基板の表面から前記下基板に向けて突出し、前記放熱部材の前記底面に溝が形成され、該溝の底面と前記半導体素子との間の距離は、前記放熱部材の前記底面と前記半導体素子との間の距離より大きい半導体パッケージが提供される。 According to one embodiment of the present invention, an upper substrate and a lower substrate connected via a spacer member, a semiconductor element disposed between the upper substrate and the lower substrate, and mounted on the lower substrate, and an upper surface A heat dissipation member attached to the upper substrate and a resin filled in a space between the upper substrate and the lower substrate so as to be exposed on the surface of the upper substrate and have a bottom surface facing the semiconductor element. and, the bottom surface of the heat radiating member, the entire surface is covered in close contact with the resin, the heat dissipation member protrudes toward the lower substrate from the surface of the substrate, a groove is formed in the bottom surface of the heat radiating member, A semiconductor package is provided in which a distance between the bottom surface of the groove and the semiconductor element is larger than a distance between the bottom surface of the heat dissipation member and the semiconductor element .

また、上基板に貫通孔を形成し、底面が前記上基板の裏面に露出するように該貫通孔に放熱部材を嵌合し、前記放熱部材を前記上基板から下基板に向けて突出させ、該放熱部材の前記底面が下基板に搭載された半導体素子に対向するように、前記上基板を前記下基板に対して接続し、前記上基板と前記下基板との間の空間に樹脂を充填して、前記半導体素子と前記放熱部材とを樹脂モールドし、前記上基板と前記下基板との間の空間に樹脂を充填する際に、前記放熱部材の前記底面に形成された溝内に前記樹脂を流して前記空間全体に前記樹脂を充填し、前記放熱部材の前記底面全体を前記樹脂により被覆する半導体パッケージの製造方法が提供される。 Further, a through hole is formed in the upper substrate, a heat radiating member is fitted into the through hole so that the bottom surface is exposed on the back surface of the upper substrate, and the heat radiating member is protruded from the upper substrate toward the lower substrate , The upper substrate is connected to the lower substrate so that the bottom surface of the heat radiating member faces the semiconductor element mounted on the lower substrate, and the space between the upper substrate and the lower substrate is filled with resin. Then, when the semiconductor element and the heat radiating member are resin-molded, and the resin is filled in the space between the upper substrate and the lower substrate, the groove is formed in the bottom surface of the heat radiating member. A method of manufacturing a semiconductor package is provided in which a resin is poured to fill the entire space with the resin, and the entire bottom surface of the heat dissipation member is covered with the resin .

以上のように、上基板２０に予めヒートシンク２４を取り付けておくことで、モールド樹脂２２を充填した後の半導体パッケージ１０に機械加工で凹部を形成してヒートシンクを埋め込む工程は省略される。このため、半導体パッケージ１０のモールド樹脂充填後の製造工程数を増やすことなくヒートシンク２４を設けることができる。また、ヒートシンク２４を取り付けるための貫通孔を形成する工程は、上基板２０が単体のときに行なわれるので、この工程で仕損じが生じても、廃棄する部分上は基板２０のみであり、仕損じによる製造コストの上昇を抑えることができる。さらに、半導体素子１４が埋め込まれた状態のモールド樹脂２２を機械加工する必要が無くなり、機械加工による半導体素子１４への損傷を無くすことができる。 As described above, by attaching the heat sink 24 to the upper substrate 20 in advance, the step of forming a recess by machining and embedding the heat sink in the semiconductor package 10 after filling the mold resin 22 is omitted. For this reason, the heat sink 24 can be provided without increasing the number of manufacturing steps after the semiconductor package 10 is filled with the mold resin. In addition, since the process of forming the through hole for attaching the heat sink 24 is performed when the upper substrate 20 is a single unit, even if a failure occurs in this process, only the substrate 20 is disposed on the portion to be discarded. An increase in manufacturing cost due to damage can be suppressed. Further, it is not necessary to machine the mold resin 22 in the state where the semiconductor element 14 is embedded, and damage to the semiconductor element 14 due to the machining can be eliminated.

なお、上述の実施形態では、ヒートシンク２４の底面２４ｂが半導体素子１４に接触しないように各部の寸法を設定しているが、不測の事態に備えて、図６に示すように、半導体素子１４の背面に保護テープ３０を貼り付けておくこととしてもよい。図６は半導体素子１４の背面に保護テープ３０が貼り付けられた半導体パッケージ１０Ｂの断面図である。保護テープ３０は、半導体素子１４を保護するために半導体素子１４の背面全体を覆うように貼り付けることが好ましい。したがって、保護テープ３０としては、ある程度弾性を有し且つある程度熱伝導性を有する例えばエポキシ系樹脂で形成された導伝性シート材を用いることが好ましい。 In the above embodiment, although setting the size of each part as the bottom surface 24 b of the heat sink 24 is not in contact with the semiconductor device 14, in preparation for contingencies, as shown in FIG. 6, the semiconductor device 14 It is good also as sticking the protective tape 30 on the back surface. FIG. 6 is a cross-sectional view of the semiconductor package 10B in which the protective tape 30 is attached to the back surface of the semiconductor element 14. The protective tape 30 is preferably attached so as to cover the entire back surface of the semiconductor element 14 in order to protect the semiconductor element 14. Therefore, as the protective tape 30, it is preferable to use a conductive sheet material made of, for example, an epoxy resin having elasticity to some extent and heat conductivity to some extent.

図５（ｄ）に示す状態で、半導体パッケージ１０は完成するが、その後、下基板１２の外部接続パッド１２ａに外部接続端子としてはんだボールを接合する場合もある。また、上基板２０の表面側に、半導体素子や回路素子を搭載してもよい。 Figure 5 in a state (d), the semiconductor package 10 is completed, then, in some cases to bond the solder balls as external connection terminals to the external connection pads 12 a of the lower substrate 12. Further, a semiconductor element or a circuit element may be mounted on the surface side of the upper substrate 20.

図７は上基板２０に半導体素子や受動素子等の電子部品を搭載した状態の半導体パッケージ１０を示す図である。半導体パッケージ１０の下基板１２の外部接続パッド１２ａにはんだボール３２が接合されている。さらに、半導体パッケージ１０の上基板２０の部品接続パッド２０ａに、例えばメモリチップ等の半導体素子３４が接合されている。同様に、半導体パッケージ１０の上基板１２の部品接続パッド２０ａに、例えばチップ抵抗やチップコンデンサ等の受動素子３６が接合されている。これら半導体素子３４及び受動素子３６は、半導体素子１４と協働して機能回路を構成している。

FIG. 7 is a view showing the semiconductor package 10 in a state where electronic components such as semiconductor elements and passive elements are mounted on the upper substrate 20 . Solder balls 32 are bonded to the external connection pads 12 a of the lower substrate 12 of the semiconductor package 10. Further, a semiconductor element 34 such as a memory chip is bonded to the component connection pad 20 a of the upper substrate 20 of the semiconductor package 10. Similarly, a passive element 36 such as a chip resistor or a chip capacitor is bonded to the component connection pad 20 a of the upper substrate 12 of the semiconductor package 10. The semiconductor element 34 and the passive element 36 constitute a functional circuit in cooperation with the semiconductor element 14.

Claims

An upper substrate and a lower substrate connected via a spacer member;
A semiconductor element disposed between the upper substrate and the lower substrate and mounted on the lower substrate;
A heat dissipating member attached to the upper substrate such that the upper surface is exposed at the surface of the upper substrate and the bottom surface faces the semiconductor element;
A resin filled in a space between the upper substrate and the lower substrate;
The bottom surface of the heat radiating member is coated with the entire surface being in close contact with the resin ,
The heat dissipation member protrudes from the surface of the upper substrate toward the lower substrate,
A groove is formed on the bottom surface of the heat radiating member, and a distance between the bottom surface of the groove and the semiconductor element is larger than a distance between the bottom surface of the heat radiating member and the semiconductor element .

The semiconductor package according to claim 1,
The semiconductor package is formed so that the groove extends across the bottom surface of the heat dissipation member .

A semiconductor package according to claim 1 or 2,
The resin contains a filler, and the particle size of the filler is a semiconductor package smaller than the distance between the bottom surface of the groove and the semiconductor element .

A semiconductor package according to any one of claims 1 to 3 ,
A step is formed on the outer periphery of the heat radiating member, and the step is engaged with a step formed on the inner surface of the through hole or a step formed by the through hole and the back surface of the upper substrate. .

A semiconductor package according to any one of claims 1 to 4,
The said heat radiating member has a through-hole which penetrates the said heat radiating member in the direction facing the said semiconductor element, The said resin is arrange | positioned in the said through-hole.

Forming a through hole in the upper substrate,
Fitting a heat dissipation member to the through hole so that the bottom surface is exposed on the back surface of the upper substrate,
The heat dissipation member protrudes from the upper substrate toward the lower substrate ,
Connecting the upper substrate to the lower substrate such that the bottom surface of the heat dissipation member faces a semiconductor element mounted on the lower substrate;
Filling the space between the upper substrate and the lower substrate with resin, resin molding the semiconductor element and the heat dissipation member,
When the resin is filled in the space between the upper substrate and the lower substrate, the resin is poured into a groove formed in the bottom surface of the heat dissipation member to fill the space with the resin, and the heat dissipation A method for manufacturing a semiconductor package, wherein the entire bottom surface of a member is covered with the resin .

A method of manufacturing a semiconductor package according to claim 6,
A method of manufacturing a semiconductor package, wherein the groove is formed so as to extend across the bottom surface of the heat dissipation member .

8. The method of manufacturing a semiconductor package according to claim 6, wherein the resin contains a filler, and the filler has a particle size smaller than a distance between the bottom surface of the groove and the semiconductor element. Package manufacturing method.

A method of manufacturing a semiconductor package according to any one of claims 6 to 8 ,
When forming a through hole in the upper substrate, a step is formed on the inner surface of the through hole,
A method of manufacturing a semiconductor package, wherein the step of the outer shape of the heat dissipation member is engaged with the step of the inner surface of the through hole when the heat dissipation member is fitted into the through hole.

A method for manufacturing a semiconductor package according to any one of claims 6 to 9,
In the resin molding step, a semiconductor package manufacturing method in which a resin is also disposed in a through hole formed in the heat dissipation member.