JP2011517160A5 - - Google Patents

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Publication number
JP2011517160A5
JP2011517160A5 JP2010549822A JP2010549822A JP2011517160A5 JP 2011517160 A5 JP2011517160 A5 JP 2011517160A5 JP 2010549822 A JP2010549822 A JP 2010549822A JP 2010549822 A JP2010549822 A JP 2010549822A JP 2011517160 A5 JP2011517160 A5 JP 2011517160A5
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JP
Japan
Prior art keywords
signal
delayed
delay
tdc
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2010549822A
Other languages
English (en)
Japanese (ja)
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JP2011517160A (ja
Filing date
Publication date
Priority claimed from US12/041,403 external-priority patent/US7808418B2/en
Application filed filed Critical
Publication of JP2011517160A publication Critical patent/JP2011517160A/ja
Publication of JP2011517160A5 publication Critical patent/JP2011517160A5/ja
Pending legal-status Critical Current

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JP2010549822A 2008-03-03 2009-03-03 高速時間ディジタル・コンバータ Pending JP2011517160A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/041,403 2008-03-03
US12/041,403 US7808418B2 (en) 2008-03-03 2008-03-03 High-speed time-to-digital converter
PCT/US2009/035908 WO2009111491A1 (en) 2008-03-03 2009-03-03 High-speed time-to-digital converter

Publications (2)

Publication Number Publication Date
JP2011517160A JP2011517160A (ja) 2011-05-26
JP2011517160A5 true JP2011517160A5 (enExample) 2011-07-07

Family

ID=40666856

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010549822A Pending JP2011517160A (ja) 2008-03-03 2009-03-03 高速時間ディジタル・コンバータ

Country Status (7)

Country Link
US (1) US7808418B2 (enExample)
EP (1) EP2250732A1 (enExample)
JP (1) JP2011517160A (enExample)
KR (1) KR20100130205A (enExample)
CN (1) CN102089983A (enExample)
TW (1) TW200943734A (enExample)
WO (1) WO2009111491A1 (enExample)

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US8283960B2 (en) * 2009-04-27 2012-10-09 Oracle America, Inc. Minimal bubble voltage regulator
US8242823B2 (en) 2009-04-27 2012-08-14 Oracle America, Inc. Delay chain initialization
US8198931B2 (en) * 2009-04-27 2012-06-12 Oracle America, Inc. Fine grain timing
US8179165B2 (en) * 2009-04-27 2012-05-15 Oracle America, Inc. Precision sampling circuit
EP2717471A4 (en) * 2011-05-27 2015-04-01 Aika Design Inc SIGNAL CONVERSION CIRCUIT, PLL CIRCUIT, DELAY SETTING CIRCUIT AND PHASE CONTROL CIRCUIT
US20120319741A1 (en) * 2011-06-17 2012-12-20 Texas Instruments Incorporated Reduced crosstalk wiring delay effects through the use of a checkerboard pattern of inverting and noninverting repeaters
KR101214976B1 (ko) * 2011-11-01 2012-12-24 포항공과대학교 산학협력단 델타-시그마 변조방식을 이용한 노이즈 세이핑 시간-디지털 변환기
KR101797625B1 (ko) 2012-02-16 2017-11-15 한국전자통신연구원 저전력 고해상도 타임투디지털 컨버터
US9363071B2 (en) * 2013-03-07 2016-06-07 Qualcomm Incorporated Circuit to recover a clock signal from multiple wire data signals that changes state every state cycle and is immune to data inter-lane skew as well as data state transition glitches
JP5747070B2 (ja) * 2013-12-07 2015-07-08 株式会社アイカデザイン 位相同期ループ回路及び発振方法
US9606228B1 (en) 2014-02-20 2017-03-28 Banner Engineering Corporation High-precision digital time-of-flight measurement with coarse delay elements
KR102154189B1 (ko) 2014-12-01 2020-09-09 삼성전자 주식회사 추계적 위상 보간 방법을 이용한 시간-디지털 변환기
KR101621853B1 (ko) 2014-12-26 2016-05-17 연세대학교 산학협력단 데이터 송신 장치, 데이터 수신 장치 및 그를 이용하는 스마트 디바이스
CN106354001B (zh) * 2016-08-31 2019-03-12 中国科学院上海高等研究院 时间数字转换电路
US10848138B2 (en) 2018-09-21 2020-11-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method and apparatus for precision phase skew generation
US10928447B2 (en) 2018-10-31 2021-02-23 Taiwan Semiconductor Manufacturing Co., Ltd. Built-in self test circuit for measuring phase noise of a phase locked loop
US12204287B2 (en) * 2022-08-02 2025-01-21 Apple Inc. Multi-chain measurement circuit
US12164002B2 (en) * 2022-12-15 2024-12-10 Stmicroelectronics International N.V. Time-to-digital converter circuit with self-testing function

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JPS61227422A (ja) * 1985-03-30 1986-10-09 Toshiba Corp 位相比較回路
JP2659594B2 (ja) * 1989-10-11 1997-09-30 株式会社日本自動車部品総合研究所 物理量検出装置
US5796682A (en) * 1995-10-30 1998-08-18 Motorola, Inc. Method for measuring time and structure therefor
EP0844740B1 (en) * 1996-11-21 2003-02-26 Matsushita Electric Industrial Co., Ltd. A/D converter and A/D conversion method
JP3380206B2 (ja) * 1999-03-31 2003-02-24 沖電気工業株式会社 内部クロック発生回路
US6731667B1 (en) 1999-11-18 2004-05-04 Anapass Inc. Zero-delay buffer circuit for a spread spectrum clock system and method therefor
JP4397488B2 (ja) * 1999-12-17 2010-01-13 Ｎｓｃ株式会社 オーバーサンプリング処理回路およびデジタル−アナログ変換器
US6429693B1 (en) * 2000-06-30 2002-08-06 Texas Instruments Incorporated Digital fractional phase detector
US7045098B2 (en) * 2001-02-02 2006-05-16 James Matthew Stephens Apparatus and method for removing interfering substances from a urine sample using a chemical oxidant
DE10143770B4 (de) * 2001-09-06 2006-03-16 Infineon Technologies Ag Verstärkerschaltung
CA2474111A1 (en) * 2004-07-08 2006-01-08 Gordon John Allan Method and apparatus for mixed-signal dll/pll as usefull in timing manipulation
US7205924B2 (en) * 2004-11-18 2007-04-17 Texas Instruments Incorporated Circuit for high-resolution phase detection in a digital RF processor
US7629915B2 (en) * 2006-05-26 2009-12-08 Realtek Semiconductor Corp. High resolution time-to-digital converter and method thereof
US7427940B2 (en) * 2006-12-29 2008-09-23 Texas Instruments Incorporated Time-to-digital converter with non-inverting buffers, transmission gates and non-linearity corrector, SOC including such converter and method of phase detection for use in synthesizing a clock signal

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