JP2011509528A5 - - Google Patents
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- Publication number
- JP2011509528A5 JP2011509528A5 JP2010542235A JP2010542235A JP2011509528A5 JP 2011509528 A5 JP2011509528 A5 JP 2011509528A5 JP 2010542235 A JP2010542235 A JP 2010542235A JP 2010542235 A JP2010542235 A JP 2010542235A JP 2011509528 A5 JP2011509528 A5 JP 2011509528A5
- Authority
- JP
- Japan
- Prior art keywords
- migfit
- gate terminal
- gate
- output
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/971,591 | 2008-01-09 | ||
| US11/971,591 US7817387B2 (en) | 2008-01-09 | 2008-01-09 | MIGFET circuit with ESD protection |
| PCT/US2008/086180 WO2009088622A1 (en) | 2008-01-09 | 2008-12-10 | Migfet circuit with esd protection |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2011509528A JP2011509528A (ja) | 2011-03-24 |
| JP2011509528A5 true JP2011509528A5 (enExample) | 2012-02-02 |
| JP5418790B2 JP5418790B2 (ja) | 2014-02-19 |
Family
ID=40844358
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010542235A Expired - Fee Related JP5418790B2 (ja) | 2008-01-09 | 2008-12-10 | Esd保護を有するmigfet回路 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7817387B2 (enExample) |
| JP (1) | JP5418790B2 (enExample) |
| KR (1) | KR101581969B1 (enExample) |
| TW (1) | TW200945553A (enExample) |
| WO (1) | WO2009088622A1 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8179952B2 (en) * | 2008-05-23 | 2012-05-15 | Integrated Device Technology Inc. | Programmable duty cycle distortion generation circuit |
| US8194721B2 (en) * | 2008-05-23 | 2012-06-05 | Integrated Device Technology, Inc | Signal amplitude distortion within an integrated circuit |
| US8149553B2 (en) * | 2008-05-23 | 2012-04-03 | Integrated Device Technology, Inc | Electrostatic discharge event protection for an integrated circuit |
| US8259888B2 (en) * | 2008-05-23 | 2012-09-04 | Integrated Device Technology, Inc. | Method of processing signal data with corrected clock phase offset |
| FR2956246B1 (fr) * | 2010-02-08 | 2013-11-01 | St Microelectronics Rousset | Circuit integre muni d'une protection contre des decharges electrostatiques |
| US8604548B2 (en) | 2011-11-23 | 2013-12-10 | United Microelectronics Corp. | Semiconductor device having ESD device |
| US10332871B2 (en) * | 2016-03-18 | 2019-06-25 | Intel IP Corporation | Area-efficient and robust electrostatic discharge circuit |
Family Cites Families (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US544062A (en) * | 1895-08-06 | Bandage | ||
| JPS577969A (en) | 1980-06-18 | 1982-01-16 | Toshiba Corp | Semiconductor integrated circuit |
| JPH02113623A (ja) | 1988-10-21 | 1990-04-25 | Sharp Corp | 集積回路の静電気保護回路 |
| EP0435047A3 (en) | 1989-12-19 | 1992-07-15 | National Semiconductor Corporation | Electrostatic discharge protection for integrated circuits |
| US5237395A (en) | 1991-05-28 | 1993-08-17 | Western Digital Corporation | Power rail ESD protection circuit |
| US5255146A (en) | 1991-08-29 | 1993-10-19 | National Semiconductor Corporation | Electrostatic discharge detection and clamp control circuit |
| US5287241A (en) | 1992-02-04 | 1994-02-15 | Cirrus Logic, Inc. | Shunt circuit for electrostatic discharge protection |
| JP2589938B2 (ja) | 1993-10-04 | 1997-03-12 | 日本モトローラ株式会社 | 半導体集積回路装置の静電破壊保護回路 |
| US5361185A (en) | 1993-02-19 | 1994-11-01 | Advanced Micro Devices, Inc. | Distributed VCC/VSS ESD clamp structure |
| US5311391A (en) | 1993-05-04 | 1994-05-10 | Hewlett-Packard Company | Electrostatic discharge protection circuit with dynamic triggering |
| US5440162A (en) | 1994-07-26 | 1995-08-08 | Rockwell International Corporation | ESD protection for submicron CMOS circuits |
| US5610790A (en) | 1995-01-20 | 1997-03-11 | Xilinx, Inc. | Method and structure for providing ESD protection for silicon on insulator integrated circuits |
| US5559659A (en) | 1995-03-23 | 1996-09-24 | Lucent Technologies Inc. | Enhanced RC coupled electrostatic discharge protection |
| EP0740344B1 (en) | 1995-04-24 | 2002-07-24 | Conexant Systems, Inc. | Method and apparatus for coupling multiple independent on-chip Vdd busses to an ESD core clamp |
| US5946177A (en) | 1998-08-17 | 1999-08-31 | Motorola, Inc. | Circuit for electrostatic discharge protection |
| DE69920891D1 (de) * | 1999-07-05 | 2004-11-11 | St Microelectronics Srl | CMOS-Synchrongleichrichter für Aufwärtswandler |
| US6287244B1 (en) * | 2000-02-17 | 2001-09-11 | John L. Boos | Method for obviating knee joint injury |
| US6385021B1 (en) | 2000-04-10 | 2002-05-07 | Motorola, Inc. | Electrostatic discharge (ESD) protection circuit |
| JP3800501B2 (ja) * | 2001-02-15 | 2006-07-26 | 株式会社日立製作所 | 半導体装置 |
| JP2004523130A (ja) * | 2001-07-05 | 2004-07-29 | サーノフ コーポレイション | マルチフィンガ・ターンオンのための同時及び分散自己バイアス法を用いた静電放電(esd)保護デバイス |
| US20030151077A1 (en) | 2002-02-13 | 2003-08-14 | Leo Mathew | Method of forming a vertical double gate semiconductor device and structure thereof |
| US6724603B2 (en) | 2002-08-09 | 2004-04-20 | Motorola, Inc. | Electrostatic discharge protection circuitry and method of operation |
| US7209332B2 (en) * | 2002-12-10 | 2007-04-24 | Freescale Semiconductor, Inc. | Transient detection circuit |
| US6879476B2 (en) | 2003-01-22 | 2005-04-12 | Freescale Semiconductor, Inc. | Electrostatic discharge circuit and method therefor |
| US6838322B2 (en) | 2003-05-01 | 2005-01-04 | Freescale Semiconductor, Inc. | Method for forming a double-gated semiconductor device |
| US7098502B2 (en) * | 2003-11-10 | 2006-08-29 | Freescale Semiconductor, Inc. | Transistor having three electrically isolated electrodes and method of formation |
| JP4429798B2 (ja) * | 2004-05-12 | 2010-03-10 | 富士通マイクロエレクトロニクス株式会社 | フィン型チャネルfetを用いたシステムlsi及びその製造方法 |
| US7244640B2 (en) | 2004-10-19 | 2007-07-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for fabricating a body contact in a Finfet structure and a device including the same |
| US7301741B2 (en) | 2005-05-17 | 2007-11-27 | Freescale Semiconductor, Inc. | Integrated circuit with multiple independent gate field effect transistor (MIGFET) rail clamp circuit |
| DE102005022763B4 (de) | 2005-05-18 | 2018-02-01 | Infineon Technologies Ag | Elektronische Schaltkreis-Anordnung und Verfahren zum Herstellen eines elektronischen Schaltkreises |
| JP2007053316A (ja) | 2005-08-19 | 2007-03-01 | Toshiba Corp | Esd保護素子 |
| DE102005039365B4 (de) * | 2005-08-19 | 2022-02-10 | Infineon Technologies Ag | Gate-gesteuertes Fin-Widerstandselement, welches als pinch - resistor arbeitet, zur Verwendung als ESD-Schutzelement in einem elektrischen Schaltkreis und Einrichtung zum Schutz vor elektrostatischen Entladungen in einem elektrischen Schaltkreis |
-
2008
- 2008-01-09 US US11/971,591 patent/US7817387B2/en active Active
- 2008-12-10 KR KR1020107015023A patent/KR101581969B1/ko not_active Expired - Fee Related
- 2008-12-10 WO PCT/US2008/086180 patent/WO2009088622A1/en not_active Ceased
- 2008-12-10 JP JP2010542235A patent/JP5418790B2/ja not_active Expired - Fee Related
-
2009
- 2009-01-06 TW TW098100226A patent/TW200945553A/zh unknown
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