JP2011508418A - コンタクトを一体化した集積回路システム - Google Patents
コンタクトを一体化した集積回路システム Download PDFInfo
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- JP2011508418A JP2011508418A JP2010539424A JP2010539424A JP2011508418A JP 2011508418 A JP2011508418 A JP 2011508418A JP 2010539424 A JP2010539424 A JP 2010539424A JP 2010539424 A JP2010539424 A JP 2010539424A JP 2011508418 A JP2011508418 A JP 2011508418A
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- integrated circuit
- integrated
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53276—Conductive materials containing carbon, e.g. fullerenes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1068—Formation and after-treatment of conductors
- H01L2221/1094—Conducting structures comprising nanotubes or nanowires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
2.コンタクト表面の上に一体化コンタクトを形成する。その際、コンタクト表面の上にビアを形成し、コンタクト表面の上のビア内に選択的金属を形成し、コンタクト表面の上の選択的金属の上に少なくとも1つのナノチューブを形成し、ビアの一部のナノチューブの上にキャップを形成する。
Claims (10)
- 集積回路デバイス(104)を提供するステップと、
前記集積回路デバイス(104)の上に一体化コンタクト(102)を形成するステップと含み、
前記一体化コンタクト(102)を形成するステップは、
前記集積回路デバイス(104)の上にビア(112)を提供するステップと、
前記ビア(112)内に選択的金属(114)を形成するステップと、
前記選択的金属(114)の上に少なくとも1のナノチューブ(116)を形成するステップと、
前記ナノチューブ(116)の上にキャップ(118)を形成するステップとを含む、集積回路システムを形成するための方法(1000)。 - 前記ビア(112)を提供するステップは高いアスペクト比を有する前記ビア(112)を提供する、請求項1に記載の方法(1000)。
- 前記集積回路デバイス(104)を提供するステップは前記集積回路デバイス(104)の一部の上にシリサイド層(108)を形成する、請求項1に記載の方法(1000)。
- 前記集積回路デバイス(104)を提供するステップはトランジスタ(104)を提供する、請求項1に記載の方法(1000)。
- 前記一体化コンタクト(102)を含む電子システム(906)を作製するステップを更に含む、請求項1に記載の方法(1000)。
- 集積回路デバイス(104)と、
前記集積回路デバイス(104)の上の一体化コンタクト(102)とを備え、前記一体化コンタクト(102)は、
前記集積回路デバイス(104)の上のビア(112)と、
前記ビア(112)内の選択的金属(114)と、
前記選択的金属(114)の上の少なくとも1のナノチューブ(116)と、
前記ナノチューブ(116)の上のキャップ(118)とを有する、集積回路システム(100)。 - 前記ビア(112)は高いアスペクト比を有する、請求項6に記載のシステム(100)。
- 前記集積回路デバイス(104)は前記集積回路デバイス(104)の一部の上にシリサイド層(108)を有する、請求項6に記載のシステム(100)。
- 前記集積回路デバイス(104)はトランジスタ(104)である、請求項6に記載のシステム(100)。
- 前記一体化コンタクト(102)を有する電子システム(906)を更に備える、請求項6に記載のシステム(100)。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/963,254 US8283786B2 (en) | 2007-12-21 | 2007-12-21 | Integrated circuit system with contact integration |
PCT/US2008/013316 WO2009082431A2 (en) | 2007-12-21 | 2008-12-03 | Integrated circuit system with contact integration |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2011508418A true JP2011508418A (ja) | 2011-03-10 |
Family
ID=40677771
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010539424A Pending JP2011508418A (ja) | 2007-12-21 | 2008-12-03 | コンタクトを一体化した集積回路システム |
Country Status (7)
Country | Link |
---|---|
US (2) | US8283786B2 (ja) |
EP (1) | EP2232547A2 (ja) |
JP (1) | JP2011508418A (ja) |
KR (1) | KR20100098712A (ja) |
CN (1) | CN101861645A (ja) |
TW (1) | TWI556350B (ja) |
WO (1) | WO2009082431A2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8283786B2 (en) * | 2007-12-21 | 2012-10-09 | Advanced Micro Devices, Inc. | Integrated circuit system with contact integration |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2004006864A (ja) * | 2002-05-10 | 2004-01-08 | Texas Instruments Inc | 集積回路内の半導体デバイスおよびその構成方法 |
JP2005044818A (ja) * | 2000-09-22 | 2005-02-17 | Canon Inc | 電子放出素子、電子源及び画像形成装置 |
JP2006120730A (ja) * | 2004-10-19 | 2006-05-11 | Fujitsu Ltd | 層間配線に多層カーボンナノチューブを用いる配線構造及びその製造方法 |
JP2006185636A (ja) * | 2004-12-24 | 2006-07-13 | National Institute For Materials Science | ディスプレイ装置に用いる電子放出源の製造方法 |
JP2006339552A (ja) * | 2005-06-06 | 2006-12-14 | Fujitsu Ltd | 電気的接続構造、その製造方法および半導体集積回路装置 |
JP2006342040A (ja) * | 2005-05-09 | 2006-12-21 | Kumamoto Univ | 筒状分子構造およびその製造方法、並びに前処理基板およびその製造方法 |
Family Cites Families (22)
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DE10006964C2 (de) | 2000-02-16 | 2002-01-31 | Infineon Technologies Ag | Elektronisches Bauelement mit einer leitenden Verbindung zwischen zwei leitenden Schichten und Verfahren zum Herstellen eines elektronischen Bauelements |
JP2003131296A (ja) | 2001-10-23 | 2003-05-08 | Canon Inc | カメラおよびカメラシステム |
JP4683188B2 (ja) * | 2002-11-29 | 2011-05-11 | 日本電気株式会社 | 半導体装置およびその製造方法 |
US6933222B2 (en) * | 2003-01-02 | 2005-08-23 | Intel Corporation | Microcircuit fabrication and interconnection |
US20040152240A1 (en) * | 2003-01-24 | 2004-08-05 | Carlos Dangelo | Method and apparatus for the use of self-assembled nanowires for the removal of heat from integrated circuits |
US20040182600A1 (en) * | 2003-03-20 | 2004-09-23 | Fujitsu Limited | Method for growing carbon nanotubes, and electronic device having structure of ohmic connection to carbon element cylindrical structure body and production method thereof |
JP2004304667A (ja) | 2003-03-31 | 2004-10-28 | Toyo Commun Equip Co Ltd | 圧電発振器 |
JP2005165004A (ja) | 2003-12-03 | 2005-06-23 | Canon Inc | 画像形成装置 |
DE10359424B4 (de) | 2003-12-17 | 2007-08-02 | Infineon Technologies Ag | Umverdrahtungsplatte für Halbleiterbauteile mit engem Anschlussraster und Verfahren zur Herstellung derselben |
JP4323968B2 (ja) | 2004-01-14 | 2009-09-02 | 株式会社日立コミュニケーションテクノロジー | 無線通信装置のタイミング調整方法 |
CN101010793B (zh) * | 2004-06-30 | 2011-09-28 | Nxp股份有限公司 | 制造具有通过纳米线接触的导电材料层的电子器件的方法 |
US20060292716A1 (en) | 2005-06-27 | 2006-12-28 | Lsi Logic Corporation | Use selective growth metallization to improve electrical connection between carbon nanotubes and electrodes |
US7312531B2 (en) | 2005-10-28 | 2007-12-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and fabrication method thereof |
US7990037B2 (en) * | 2005-11-28 | 2011-08-02 | Megica Corporation | Carbon nanotube circuit component structure |
US20070148963A1 (en) | 2005-12-27 | 2007-06-28 | The Hong Kong University Of Science And Technology | Semiconductor devices incorporating carbon nanotubes and composites thereof |
WO2007110899A1 (ja) * | 2006-03-24 | 2007-10-04 | Fujitsu Limited | 炭素系繊維のデバイス構造およびその製造方法 |
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JP4364253B2 (ja) * | 2007-04-05 | 2009-11-11 | 株式会社東芝 | 配線、電子装置及び電子装置の製造方法 |
US8283786B2 (en) * | 2007-12-21 | 2012-10-09 | Advanced Micro Devices, Inc. | Integrated circuit system with contact integration |
JP5468496B2 (ja) * | 2010-08-25 | 2014-04-09 | 株式会社東芝 | 半導体基板の製造方法 |
-
2007
- 2007-12-21 US US11/963,254 patent/US8283786B2/en active Active
-
2008
- 2008-12-03 CN CN200880116676A patent/CN101861645A/zh active Pending
- 2008-12-03 WO PCT/US2008/013316 patent/WO2009082431A2/en active Application Filing
- 2008-12-03 KR KR1020107016083A patent/KR20100098712A/ko active Search and Examination
- 2008-12-03 EP EP08864575A patent/EP2232547A2/en not_active Withdrawn
- 2008-12-03 JP JP2010539424A patent/JP2011508418A/ja active Pending
- 2008-12-05 TW TW097147295A patent/TWI556350B/zh active
-
2012
- 2012-10-02 US US13/633,302 patent/US8709941B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2005044818A (ja) * | 2000-09-22 | 2005-02-17 | Canon Inc | 電子放出素子、電子源及び画像形成装置 |
JP2004006864A (ja) * | 2002-05-10 | 2004-01-08 | Texas Instruments Inc | 集積回路内の半導体デバイスおよびその構成方法 |
JP2006120730A (ja) * | 2004-10-19 | 2006-05-11 | Fujitsu Ltd | 層間配線に多層カーボンナノチューブを用いる配線構造及びその製造方法 |
JP2006185636A (ja) * | 2004-12-24 | 2006-07-13 | National Institute For Materials Science | ディスプレイ装置に用いる電子放出源の製造方法 |
JP2006342040A (ja) * | 2005-05-09 | 2006-12-21 | Kumamoto Univ | 筒状分子構造およびその製造方法、並びに前処理基板およびその製造方法 |
JP2006339552A (ja) * | 2005-06-06 | 2006-12-14 | Fujitsu Ltd | 電気的接続構造、その製造方法および半導体集積回路装置 |
Also Published As
Publication number | Publication date |
---|---|
TW200943481A (en) | 2009-10-16 |
CN101861645A (zh) | 2010-10-13 |
US8709941B2 (en) | 2014-04-29 |
WO2009082431A2 (en) | 2009-07-02 |
WO2009082431A3 (en) | 2009-08-27 |
US20130072014A1 (en) | 2013-03-21 |
KR20100098712A (ko) | 2010-09-08 |
US8283786B2 (en) | 2012-10-09 |
US20090159985A1 (en) | 2009-06-25 |
TWI556350B (zh) | 2016-11-01 |
EP2232547A2 (en) | 2010-09-29 |
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