JP2011134758A - Manufacturing method for printed board and printed board - Google Patents

Manufacturing method for printed board and printed board Download PDF

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Publication number
JP2011134758A
JP2011134758A JP2009290470A JP2009290470A JP2011134758A JP 2011134758 A JP2011134758 A JP 2011134758A JP 2009290470 A JP2009290470 A JP 2009290470A JP 2009290470 A JP2009290470 A JP 2009290470A JP 2011134758 A JP2011134758 A JP 2011134758A
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Japan
Prior art keywords
copper
thin film
pattern
circuit
resist
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JP2009290470A
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Japanese (ja)
Inventor
Yuichiro Naya
佑一郎 名屋
Tatsuo Wada
辰男 和田
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Meiko Co Ltd
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Meiko Co Ltd
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Priority to JP2009290470A priority Critical patent/JP2011134758A/en
Priority to PCT/JP2010/072554 priority patent/WO2011078031A1/en
Priority to TW99144986A priority patent/TW201141339A/en
Publication of JP2011134758A publication Critical patent/JP2011134758A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/188Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0364Conductor shape
    • H05K2201/0376Flush conductors, i.e. flush with the surface of the printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0388Other aspects of conductors
    • H05K2201/0391Using different types of conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/007Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for a printed board and a printed board by which when a thick copper circuit pattern of, for example, 70 μm or more in thickness is formed, a high-density current is not used to achieve a uniformed film thickness distribution. <P>SOLUTION: A copper thin film 2 is formed on a tabular support, and a first resist is formed on the surface of the copper thin film 2, which is then plated with copper to form an inside copper circuit 5. The first resist is removed, and an insulating base material 7 is overlaid on the surface of the copper thin film 2 to cover the inside copper circuit 5. The support is then removed, and a second resist is formed on the back surface of the surface of copper thin film 2 from which the support is removed. The back surface of the copper thin film 2 is plated with copper to form an outside copper circuit 10, and the second resist is removed. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、厚銅回路を好適に形成できるプリント基板の製造方法及びプリント基板に関するものである。   The present invention relates to a printed circuit board manufacturing method and a printed circuit board capable of suitably forming a thick copper circuit.

従来、例えば70μm以上の厚銅回路基板を製造する際、回路厚相当の銅箔、若しくは銅張積層板を用いて銅回路をエッチングして回路パターン形成を行っている。しかし、このようなエッチング方式で製造されている銅回路の断面は、工法の性質上、パターン上部が設計値より狭くなってしまい、台形形状になってしまう。さらに、回路厚70μm以上の厚銅基板となると、パターン上部が必要以上に細くなってしまい、銅回路パターン形成後の部品実装が困難になってしまう。また、上述した銅張積層板は、厚銅である場合とても高価であり、エッチング法を用いると銅の消費が激しいため、無駄な銅が多いことになる。   Conventionally, when manufacturing a thick copper circuit board of, for example, 70 μm or more, a circuit pattern is formed by etching a copper circuit using a copper foil or a copper-clad laminate equivalent to the circuit thickness. However, the cross section of the copper circuit manufactured by such an etching method has a trapezoidal shape because the upper part of the pattern becomes narrower than the design value due to the nature of the construction method. Furthermore, if the thickness of the copper substrate is 70 μm or more, the upper part of the pattern becomes thinner than necessary, and it becomes difficult to mount components after forming the copper circuit pattern. Further, the above-described copper-clad laminate is very expensive when it is thick copper, and when the etching method is used, the consumption of copper is severe, and therefore there is a lot of wasted copper.

上述したエッチング法の問題点が特許文献1に記載されている。特許文献1では、エッチング法は配線パターンの断面形状が基板側の底部の幅が広い台形状になると指摘し、これを解決するためにパターンめっき法があると記載している(特許文献1の段落0002〜段落0003)。そして、厚さ70μmの厚銅めっきパターンを形成している例が示されている(特許文献1の段落0035)。   The problem of the etching method described above is described in Patent Document 1. Patent Document 1 points out that the cross-sectional shape of the wiring pattern is a trapezoidal shape with a wide bottom portion on the substrate side, and describes that there is a pattern plating method to solve this (Patent Document 1). Paragraphs 0002 to 0003). An example is shown in which a thick copper plating pattern having a thickness of 70 μm is formed (paragraph 0035 of Patent Document 1).

しかしながら、このような70μmもの厚銅回路を形成する場合、従来では、電流密度を上げて形成している。このように電流密度を上げて厚銅回路を形成すると、電流が集中するため、膜厚分布がばらつく原因となる。特許文献1は、銅配線パターンを形成したプリント基板における下地銅箔のサイドエッチング量を減少させることを目的としているため、この問題点は解決されていない。   However, when such a thick copper circuit of 70 μm is formed, conventionally, it is formed by increasing the current density. When a thick copper circuit is formed by increasing the current density in this way, the current concentrates, which causes a variation in the film thickness distribution. Since patent document 1 aims at reducing the side etching amount of the base copper foil in the printed circuit board in which the copper wiring pattern was formed, this problem is not solved.

特開平6−152101号公報JP-A-6-152101

本発明は、上記従来技術を考慮したものであって、例えば70μm以上の厚銅回路パターンを形成する際に、高い電流密度を用いることなく、したがって膜厚分布を揃えることができるプリント基板の製造方法及びプリント基板を提供することを目的とする。   The present invention is based on the above prior art, and for example, when forming a thick copper circuit pattern of 70 μm or more, it is possible to manufacture a printed circuit board that can have a uniform film thickness distribution without using a high current density. It is an object to provide a method and a printed circuit board.

前記目的を達成するため、請求項1の発明では、板状の支持体に銅薄膜を形成し、前記銅薄膜の表面に、表側配線パターンに対応した第1の開口部を有し且つこの第1の開口部にて前記銅薄膜の表面を露出させる第1のレジストを形成し、前記銅薄膜の表面に前記第1の開口部を通じて銅めっきし、前記表側配線パターンからなる内側銅回路を形成し、前記第1のレジストを除去し、前記内側銅回路を覆うように前記銅薄膜の表面に絶縁基材を積層し、前記支持体を除去し、前記銅薄膜の前記支持体を除去した側の裏面に、前記表側配線パターンの少なくとも一部に相当する裏側配線パターン対応した第2の開口部を有し且つこの第2開口部にて前記銅薄膜の裏面を露出させる第2のレジストを形成し、前記銅薄膜の裏面に前記第2の開口部を通じて銅めっきし、前記裏側配線パターンからなる外側銅回路を形成し、前記第2のレジストを除去することを特徴とするプリント基板の製造方法を提供する。   In order to achieve the above object, according to the first aspect of the present invention, a copper thin film is formed on a plate-like support, and a first opening corresponding to the front-side wiring pattern is formed on the surface of the copper thin film. A first resist that exposes the surface of the copper thin film is formed at one opening, and copper is plated on the surface of the copper thin film through the first opening to form an inner copper circuit composed of the front wiring pattern And removing the first resist, laminating an insulating base material on the surface of the copper thin film so as to cover the inner copper circuit, removing the support, and removing the support from the copper thin film. And forming a second resist that has a second opening corresponding to the back-side wiring pattern corresponding to at least a part of the front-side wiring pattern and exposes the back surface of the copper thin film in the second opening. And the second opening on the back surface of the copper thin film. Through with copper plating to form an outer copper circuit consisting of the back side wiring patterns, to provide a method of manufacturing a printed circuit board and removing the second resist.

請求項2の発明では、請求項1の発明において、前記支持体はシリコン系樹脂又はゴム製のキャリアシートであることを特徴としている。
また、請求項3の発明では、板状の絶縁基材と、前記絶縁基材の少なくとも一方の面側に設けられたパターン配線とを備え、前記パターン配線は、前記一方の面から突出して形成された外側銅回路と、前記外側銅回路と対応する部位にて前記絶縁基材に埋設された内側銅回路と、前記外側銅回路と前記内側銅回路との間に挟み込まれた銅薄膜とを有することを特徴とするプリント基板を提供する。
The invention of claim 2 is characterized in that, in the invention of claim 1, the support is a carrier sheet made of silicon resin or rubber.
According to a third aspect of the present invention, a plate-shaped insulating base material and a pattern wiring provided on at least one surface side of the insulating base material are provided, and the pattern wiring is formed so as to protrude from the one surface. An outer copper circuit, an inner copper circuit embedded in the insulating base at a portion corresponding to the outer copper circuit, and a copper thin film sandwiched between the outer copper circuit and the inner copper circuit. There is provided a printed circuit board characterized by comprising:

請求項4の発明では、請求項3の発明において、前記パターン配線が複数形成されていて、個々のパターン配線の前記外側銅回路同士或いは前記内側銅回路同士の厚さ、又は、同一のパターン配線における前記外側銅回路と前記内側銅回路の厚さが異なっていることを特徴としている。
請求項5の発明では、請求項3の発明において、前記絶縁基材の両面に前記パターン配線が形成されていることを特徴としている。
In the invention of claim 4, in the invention of claim 3, a plurality of the pattern wirings are formed, and the thicknesses of the outer copper circuits or the inner copper circuits of each pattern wiring, or the same pattern wiring The outer copper circuit and the inner copper circuit are different in thickness.
According to a fifth aspect of the present invention, in the third aspect of the present invention, the pattern wiring is formed on both surfaces of the insulating base material.

請求項1の発明によれば、例えば70μm以上の厚銅回路パターンを形成する場合でも、この厚さの厚銅回路を内側銅回路と外側銅回路の二つに分けて形成するので、高い電流密度を用いなくても迅速にその回路パターンを形成することができ、したがって膜厚(めっき厚)のばらつきを抑えることができ、膜厚分布を揃えることができる。また、内側銅回路又は外側銅回路のそれぞれの厚さは適宜調整可能であるため、所望に応じたパターン厚の回路を形成することが可能となる。   According to the first aspect of the present invention, even when a thick copper circuit pattern of, for example, 70 μm or more is formed, the thick copper circuit having this thickness is divided into two parts, an inner copper circuit and an outer copper circuit. Even if the density is not used, the circuit pattern can be formed quickly. Therefore, variations in film thickness (plating thickness) can be suppressed, and the film thickness distribution can be made uniform. In addition, since the thickness of each of the inner copper circuit and the outer copper circuit can be adjusted as appropriate, it is possible to form a circuit having a pattern thickness as desired.

請求項2の発明によれば、支持体がシリコン系樹脂又はゴム製のキャリアシートで形成されているため、銅薄膜から支持体を剥がす工程をスムーズに行うことができる。
請求項3の発明によれば、外側銅回路と内側銅回路とが接触していることにより、これらを合わせて厚銅の銅回路を形成することができる。
請求項4の発明によれば、異なる厚さの外側銅回路又は内側銅回路を基板内で形成しているので、所望の銅厚の回路パターンを有するプリント基板を得ることができる。
According to invention of Claim 2, since the support body is formed with the silicon-type resin or the rubber | gum carrier sheet, the process of peeling a support body from a copper thin film can be performed smoothly.
According to the invention of claim 3, since the outer copper circuit and the inner copper circuit are in contact with each other, they can be combined to form a thick copper copper circuit.
According to the invention of claim 4, since the outer copper circuit or the inner copper circuit having different thicknesses is formed in the substrate, a printed circuit board having a circuit pattern having a desired copper thickness can be obtained.

請求項5の発明によれば、厚銅回路を有するいわゆる両面基板を形成できる。   According to invention of Claim 5, what is called a double-sided board | substrate which has a thick copper circuit can be formed.

本発明に係るプリント基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板の製造方法を順番に示す概略図である。It is the schematic which shows the manufacturing method of the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板の概略図である。It is the schematic of the printed circuit board which concerns on this invention. 本発明に係るプリント基板を用いた積層基板の製造を順番に示す概略図である。It is the schematic which shows manufacture of the laminated substrate using the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板を用いた積層基板の製造を順番に示す概略図である。It is the schematic which shows manufacture of the laminated substrate using the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板を用いた積層基板の製造を順番に示す概略図である。It is the schematic which shows manufacture of the laminated substrate using the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板を用いた積層基板の製造を順番に示す概略図である。It is the schematic which shows manufacture of the laminated substrate using the printed circuit board which concerns on this invention in order. 本発明に係るプリント基板を用いた積層基板の製造を順番に示す概略図である。It is the schematic which shows manufacture of the laminated substrate using the printed circuit board which concerns on this invention in order.

図1〜図11は本発明に係るプリント基板の製造方法を順番に示す概略図である。
図1に示すように、板状の支持体1に銅薄膜2を堆積させる。支持体1は、例えばSUS板(SUSベルト)やシリコン系樹脂、又はゴム製のキャリアシート等を用いることができる。SUS板を用いた場合、銅薄膜2を堆積する側の面に表面研磨等を施すことが好ましい。この場合、SUS板に直接銅薄膜2を形成する。例えば、電極間距離を3mm〜10mmとし、陽極は不溶性、陰極はグラファイト板を摺動する表面研磨・活性済みSUSベルト(0.1mm(t)〜0.6mm(t))とし、電解液は乱流状態で撹拌、同時に電解銅溶液濃度・温度を特定し、電流密度が0.5A/cm〜2.5A/cmを採用する高速めっき装置で銅薄膜2を製造する。キャリアシートを用いる場合は、屈曲性・耐薬品性のある粘着シートを用いることが好ましい。この場合は、一旦SUS板に形成した銅薄膜2を剥がし、これをキャリアシートに接着する。このような支持体1を用いることにより、薄い銅薄膜2を含めて以下のパターン形成のための支持体として用いることができる。銅薄膜2は、例えば9μm厚の銅箔である。
1 to 11 are schematic views sequentially showing a method of manufacturing a printed circuit board according to the present invention.
As shown in FIG. 1, a copper thin film 2 is deposited on a plate-like support 1. As the support 1, for example, a SUS plate (SUS belt), a silicon-based resin, a rubber carrier sheet, or the like can be used. When the SUS plate is used, it is preferable to perform surface polishing or the like on the surface on which the copper thin film 2 is deposited. In this case, the copper thin film 2 is formed directly on the SUS plate. For example, the distance between the electrodes is 3 mm to 10 mm, the anode is insoluble, the cathode is a surface-polished and activated SUS belt that slides on a graphite plate (0.1 mm (t) to 0.6 mm (t)), and the electrolyte is The copper thin film 2 is manufactured by the high-speed plating apparatus which stirs in a turbulent state, specifies an electrolytic copper solution concentration and temperature at the same time, and employs a current density of 0.5 A / cm 2 to 2.5 A / cm 2 . When using a carrier sheet, it is preferable to use an adhesive sheet having flexibility and chemical resistance. In this case, the copper thin film 2 once formed on the SUS plate is peeled off and bonded to the carrier sheet. By using such a support 1, the thin copper thin film 2 can be used as a support for the following pattern formation. The copper thin film 2 is, for example, a 9 μm thick copper foil.

図2に示すように、銅薄膜2の表面にレジストパターンとなる第1のレジスト3を形成する。この第1のレジスト3は、銅めっきパターン(表側配線パターン)となる箇所を第1の開口部4として所定の位置に形成される。第1のレジスト3の厚さは、形成すべき銅回路の厚さに対して1.4倍以上であることが好ましい。そして、図3に示すように、第1の開口部4に表側配線パターンからなる内側銅回路5を形成する。この内側銅回路5は銅薄膜2の表面を活性させた後、所定の電流密度(例えば10ASD〜20ASD)で行われる。より詳しくは、5%(wt)硫酸浴に室温で、30秒間浸漬活性後、硫酸銅の銅濃度85g/L、硫酸60g/L、不溶性陽極との極間距離20mm、カソードロック100mm/秒、噴流吐出量600L/分(ノズルピッチ25mm)、浴温40℃、CD11ASDで20分間電解し、50μm/分の厚銅回路めっきとなる内側銅回路5を形成する。そして、図4に示すように、第1のレジスト3を剥離除去する。この除去には、例えば水酸化ナトリウム溶液が用いられ、これを水洗後、常温の5%硫酸で30秒間中和処理を施し、再び水洗される。これにより、内側銅回路5の銅めっきによる回路パターンが形成される。   As shown in FIG. 2, a first resist 3 serving as a resist pattern is formed on the surface of the copper thin film 2. The first resist 3 is formed at a predetermined position with a portion serving as a copper plating pattern (front wiring pattern) as a first opening 4. The thickness of the first resist 3 is preferably 1.4 times or more the thickness of the copper circuit to be formed. Then, as shown in FIG. 3, an inner copper circuit 5 having a front wiring pattern is formed in the first opening 4. The inner copper circuit 5 is activated at a predetermined current density (for example, 10 ASD to 20 ASD) after activating the surface of the copper thin film 2. More specifically, after being immersed in a 5% (wt) sulfuric acid bath at room temperature for 30 seconds, the copper concentration of copper sulfate is 85 g / L, the sulfuric acid is 60 g / L, the distance between the insoluble anode is 20 mm, the cathode lock is 100 mm / second, Electrolysis is performed at a jet discharge amount of 600 L / min (nozzle pitch 25 mm), a bath temperature of 40 ° C., and CD11 ASD for 20 minutes to form an inner copper circuit 5 that is thick copper circuit plating of 50 μm / min. Then, as shown in FIG. 4, the first resist 3 is peeled and removed. For this removal, for example, a sodium hydroxide solution is used, which is washed with water, neutralized with 5% sulfuric acid at room temperature for 30 seconds, and washed again with water. Thereby, the circuit pattern by the copper plating of the inner side copper circuit 5 is formed.

次に、図5に示すように、積層の前処理となるプロファイル6を形成する(黒化処理)。このプロファイル6と内側銅回路5との接着性を高めるために、予め内側銅回路5に表面処理を施してもよい。プロファイル6は、伝送損失を抑えるために形成される。そして、図6に示すように、絶縁基材7で回路パターンを転写し、これを熱プレスで硬化させる。この絶縁基材7には、例えば0.2mm(t)プリプレグ(樹脂量52%)が2枚用いられる。熱プレスは、例えば真空度4.0kPaの170℃で40分行う。そして、図7に示すように、支持体1を剥がして除去する。このとき、支持体1をシリコン系樹脂又はゴム製のキャリアシートで形成すれば、銅薄膜2から支持体1を剥がす工程をスムーズに行うことができる。なお、図では、支持体1の除去後に上下反転させている。   Next, as shown in FIG. 5, a profile 6 is formed as a pretreatment for stacking (blackening treatment). In order to enhance the adhesion between the profile 6 and the inner copper circuit 5, the inner copper circuit 5 may be subjected to surface treatment in advance. Profile 6 is formed in order to suppress transmission loss. And as shown in FIG. 6, a circuit pattern is transcribe | transferred with the insulating base material 7, and this is hardened | cured by hot press. For example, two 0.2 mm (t) prepregs (52% resin amount) are used for the insulating base material 7. The hot pressing is performed, for example, at 170 ° C. with a vacuum degree of 4.0 kPa for 40 minutes. And as shown in FIG. 7, the support body 1 is peeled and removed. At this time, if the support 1 is formed of a silicon-based resin or a rubber carrier sheet, the process of peeling the support 1 from the copper thin film 2 can be performed smoothly. In the drawing, the substrate 1 is turned upside down after the support 1 is removed.

次に、図8に示すように、銅薄膜2の支持体1を除去した側の裏面に、第2のレジスト8を形成する。第2のレジスト8は、銅めっきパターン(裏側配線パターン)となる箇所を第2の開口部9として所定の位置に形成される。第2の開口部9は、少なくとも一部において内側銅回路5が露出するように形成される。図の例(断面視)では、3つの第2の開口部9のうち、2つの第2の開口部9に内側銅回路5が露出している。第2のレジスト8の厚さは、第1のレジスト3と同様に形成する。そして、図9に示すように、第2の開口部9に外側銅回路10を形成する。外側銅回路10は、内側銅回路5と同様にして形成される。そして、図10に示すように、第2のレジスト8を剥離除去する。これにより、外側銅回路10の銅めっきによる回路パターンが形成される。   Next, as shown in FIG. 8, the 2nd resist 8 is formed in the back surface of the side from which the support body 1 of the copper thin film 2 was removed. The second resist 8 is formed at a predetermined position with a portion serving as a copper plating pattern (back side wiring pattern) as a second opening 9. The second opening 9 is formed so that the inner copper circuit 5 is exposed at least partially. In the example of the drawing (sectional view), the inner copper circuit 5 is exposed in two second openings 9 out of the three second openings 9. The thickness of the second resist 8 is formed in the same manner as the first resist 3. Then, as shown in FIG. 9, the outer copper circuit 10 is formed in the second opening 9. The outer copper circuit 10 is formed in the same manner as the inner copper circuit 5. Then, as shown in FIG. 10, the second resist 8 is peeled and removed. Thereby, the circuit pattern by the copper plating of the outer side copper circuit 10 is formed.

次に、フラッシュエッチングにより、除去された第2のレジスト8のレジストパターン下に形成されている銅薄膜2を除去する。この場合、エッチング液としては、例えばSPS(過硫酸ナトリウム)水溶液等を使用する。そして、銅薄膜2の側面及び外側銅回路10の表面にプロファイル6を形成する。プロファイル6の形成は、内側銅回路5のプロファイル6の形成と同様である。   Next, the copper thin film 2 formed under the resist pattern of the removed second resist 8 is removed by flash etching. In this case, for example, an SPS (sodium persulfate) aqueous solution or the like is used as the etching solution. Then, the profile 6 is formed on the side surface of the copper thin film 2 and the surface of the outer copper circuit 10. The formation of the profile 6 is the same as the formation of the profile 6 of the inner copper circuit 5.

以上により、本発明に係るプリント基板11が製造される。これにより、例えば70μm以上の厚銅回路パターンを形成する場合で、この厚さの厚銅回路を内側銅回路5と外側銅回路10の二つに分けたパターン配線16として形成するので、高い電流密度を用いなくても迅速にその回路パターンを形成することができ、したがって膜厚(めっき厚)のばらつきを抑えることができ、膜厚分布を揃えることができる。なお、本発明に係る製造方法は、いわゆるセミアディティブ法によるプリント基板の製造方法であり、銅薄膜2がシード層に該当する。   Thus, the printed board 11 according to the present invention is manufactured. Thereby, for example, when a thick copper circuit pattern of 70 μm or more is formed, the thick copper circuit having this thickness is formed as the pattern wiring 16 divided into the inner copper circuit 5 and the outer copper circuit 10. Even if the density is not used, the circuit pattern can be formed quickly. Therefore, variations in film thickness (plating thickness) can be suppressed, and the film thickness distribution can be made uniform. The manufacturing method according to the present invention is a method for manufacturing a printed circuit board by a so-called semi-additive method, and the copper thin film 2 corresponds to the seed layer.

本発明に係るプリント基板の製造方法を用いた場合、図12に示すようなプリント基板を製造可能である。図示したように、内側銅回路5と、外側銅回路10と、これらに挟み込まれた銅薄膜2からなるパターン配線16が複数備わっている場合において、各パターン配線16の回路厚、すなわち個々のパターン配線16の外側銅回路10同士又は隣り合う内側銅回路5同士の厚さ、又は同一のパターン配線16における外側銅回路10と内側銅回路5の厚さをそれぞれ変更可能である。これにより、所望に応じたパターン厚の回路を形成することが可能となる。また、絶縁基材7を介して両面に外側銅回路10、内側銅回路5、銅薄膜2を形成することも可能である。このように、本発明に係るプリント基板は、使用態様に応じて適宜回路厚や回路パターンを設定可能である。   When the printed circuit board manufacturing method according to the present invention is used, a printed circuit board as shown in FIG. 12 can be manufactured. As shown in the figure, when there are a plurality of pattern wirings 16 made of the inner copper circuit 5, the outer copper circuit 10, and the copper thin film 2 sandwiched between them, the circuit thickness of each pattern wiring 16, that is, the individual pattern The thicknesses of the outer copper circuits 10 of the wiring 16 or the adjacent inner copper circuits 5 or the thicknesses of the outer copper circuit 10 and the inner copper circuit 5 in the same pattern wiring 16 can be changed. This makes it possible to form a circuit having a pattern thickness as desired. It is also possible to form the outer copper circuit 10, the inner copper circuit 5, and the copper thin film 2 on both surfaces via the insulating base material 7. As described above, the printed circuit board according to the present invention can appropriately set the circuit thickness and the circuit pattern according to the usage mode.

図13〜図17は、本発明に係るプリント基板を用いた積層基板の製造を順番に示す概略図である。
図13に示すように、図の上側から第1層基板11a、第2層基板11b、第3層基板11c、第4層基板11d、第5層基板11eとして、各基板を積層する。第1層基板11a、及び第5層基板11eは積層基板の外側に位置する基板であり、いわゆる外層基板である。これらの基板11a、11eは内側銅回路5のみが外側に向けて形成され、銅薄膜2で覆われている。一方、内層基板たる第2層基板11b、第3層基板11c及び第4層基板11dのうち、基板11bと11dは上側銅回路10を持備えた厚銅回路が形成され、基板11cはこれを転写したプリプレグからなっている。この状態で、図14に示すように、スルーホール用の孔あけがされる。この孔あけは例えばドリルにより行われる。このようにして形成されたスルーホール12にデスミア処理、すなわちスルーホール12発生しているスミアの除去とめっきとの密着強度を上げるための樹脂粗化を目的とした処理を施し、スルーホール12に化学銅めっきからなるめっき13を形成する。
13 to 17 are schematic views sequentially showing the production of a multilayer substrate using the printed circuit board according to the present invention.
As shown in FIG. 13, the first layer substrate 11a, the second layer substrate 11b, the third layer substrate 11c, the fourth layer substrate 11d, and the fifth layer substrate 11e are stacked from the upper side of the drawing. The first layer substrate 11a and the fifth layer substrate 11e are substrates located outside the laminated substrate, and are so-called outer layer substrates. These substrates 11 a and 11 e are formed so that only the inner copper circuit 5 faces outward and is covered with the copper thin film 2. On the other hand, among the second layer substrate 11b, the third layer substrate 11c, and the fourth layer substrate 11d as the inner layer substrate, the substrates 11b and 11d are formed with a thick copper circuit having the upper copper circuit 10, and the substrate 11c It consists of a prepreg that has been transferred. In this state, as shown in FIG. 14, through holes are drilled. This drilling is performed by a drill, for example. The through hole 12 thus formed is subjected to desmear treatment, that is, treatment for the purpose of removing the smear generated in the through hole 12 and roughening the resin in order to increase the adhesion strength with the plating. A plating 13 made of chemical copper plating is formed.

次に、図15に示すように、外層基板となる第1層基板11a及び第5層基板11eの外側にレジスト15を形成する。そして、図16に示すように、銅めっきパターンである銅回路14を形成する。そして図17に示すように、レジスト15を除去し、フラッシュエッチングにより銅薄膜2を除去する。これにより、スルーホール12のめっき13を介して第1層基板11aの回路パターンと第5層基板11eの回路パターンが接続された積層基板を得ることができる。なお、レジスト15及び銅回路14の形成は、上述した第1及び第2のレジスト3,8、内側銅回路5及び外側銅回路10と同様にして形成される。   Next, as shown in FIG. 15, a resist 15 is formed on the outer side of the first layer substrate 11a and the fifth layer substrate 11e which are the outer layer substrates. And as shown in FIG. 16, the copper circuit 14 which is a copper plating pattern is formed. Then, as shown in FIG. 17, the resist 15 is removed, and the copper thin film 2 is removed by flash etching. Thereby, a laminated substrate in which the circuit pattern of the first layer substrate 11a and the circuit pattern of the fifth layer substrate 11e are connected via the plating 13 of the through hole 12 can be obtained. The resist 15 and the copper circuit 14 are formed in the same manner as the first and second resists 3 and 8, the inner copper circuit 5 and the outer copper circuit 10 described above.

1 支持体
2 銅薄膜
3 第1のレジスト
4 第1の開口部
5 内側銅回路
6 プロファイル
7 絶縁基材
8 第2のレジスト
9 第2の開口部
10 外側銅回路
11 基板
12 スルーホール
13 めっき
14 銅回路
15 レジスト
16 パターン配線
DESCRIPTION OF SYMBOLS 1 Support body 2 Copper thin film 3 1st resist 4 1st opening part 5 Inner copper circuit 6 Profile 7 Insulation base material 8 Second resist 9 2nd opening part 10 Outer copper circuit 11 Board | substrate 12 Through-hole 13 Plating 14 Copper circuit 15 Resist 16 Pattern wiring

Claims (5)

板状の支持体に銅薄膜を形成し、
前記銅薄膜の表面に、表側配線パターンに対応した第1の開口部を有し且つこの第1の開口部にて前記銅薄膜の表面を露出させる第1のレジストを形成し、
前記銅薄膜の表面に前記第1の開口部を通じて銅めっきし、前記表側配線パターンからなる内側銅回路を形成し、
前記第1のレジストを除去し、
前記内側銅回路を覆うように前記銅薄膜の表面に絶縁基材を積層し、
前記支持体を除去し、
前記銅薄膜の前記支持体を除去した側の裏面に、前記表側配線パターンの少なくとも一部に相当する裏側配線パターン対応した第2の開口部を有し且つこの第2開口部にて前記銅薄膜の裏面を露出させる第2のレジストを形成し、
前記銅薄膜の裏面に前記第2の開口部を通じて銅めっきし、前記裏側配線パターンからなる外側銅回路を形成し、
前記第2のレジストを除去することを特徴とするプリント基板の製造方法。
A copper thin film is formed on a plate-like support,
Forming a first resist on the surface of the copper thin film having a first opening corresponding to the front-side wiring pattern and exposing the surface of the copper thin film in the first opening;
Copper plating is performed on the surface of the copper thin film through the first opening to form an inner copper circuit composed of the front wiring pattern,
Removing the first resist;
Laminating an insulating base material on the surface of the copper thin film so as to cover the inner copper circuit,
Removing the support,
The back surface of the copper thin film from which the support is removed has a second opening corresponding to the back side wiring pattern corresponding to at least a part of the front side wiring pattern, and the copper thin film is formed at the second opening. Forming a second resist that exposes the back surface of
Copper plating is performed on the back surface of the copper thin film through the second opening, and an outer copper circuit composed of the backside wiring pattern is formed.
A method of manufacturing a printed circuit board, wherein the second resist is removed.
前記支持体はシリコン系樹脂又はゴム製のキャリアシートであることを特徴とする請求項1に記載のプリント基板の製造方法。   The method for manufacturing a printed circuit board according to claim 1, wherein the support is a carrier sheet made of silicon resin or rubber. 板状の絶縁基材と、
前記絶縁基材の少なくとも一方の面側に設けられたパターン配線とを備え、
前記パターン配線は、
前記一方の面から突出して形成された外側銅回路と、
前記外側銅回路と対応する部位にて前記絶縁基材に埋設された内側銅回路と、
前記外側銅回路と前記内側銅回路との間に挟み込まれた銅薄膜とを有することを特徴とするプリント基板。
A plate-like insulating substrate;
Pattern wiring provided on at least one surface side of the insulating base material,
The pattern wiring is
An outer copper circuit formed protruding from the one surface;
An inner copper circuit embedded in the insulating substrate at a portion corresponding to the outer copper circuit;
A printed circuit board comprising: a copper thin film sandwiched between the outer copper circuit and the inner copper circuit.
前記パターン配線が複数形成されていて、
個々のパターン配線の前記外側銅回路同士或いは前記内側銅回路同士の厚さ、又は、同一のパターン配線における前記外側銅回路と前記内側銅回路の厚さが異なっていることを特徴とする請求項3に記載のプリント基板。
A plurality of the pattern wirings are formed,
The thicknesses of the outer copper circuits or the inner copper circuits of individual pattern wirings or the thicknesses of the outer copper circuit and the inner copper circuit in the same pattern wiring are different. 3. The printed circuit board according to 3.
前記絶縁基材の両面に前記パターン配線が形成されていることを特徴とする請求項3に記載のプリント基板。   The printed circuit board according to claim 3, wherein the pattern wiring is formed on both surfaces of the insulating base material.
JP2009290470A 2009-12-22 2009-12-22 Manufacturing method for printed board and printed board Pending JP2011134758A (en)

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Citations (5)

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Publication number Priority date Publication date Assignee Title
JPH02159789A (en) * 1988-12-14 1990-06-19 Meiko Denshi Kogyo Kk Manufacture of printed wiring board
JPH04116997A (en) * 1990-09-07 1992-04-17 Asahi Chem Ind Co Ltd Manufacture of printed circuit board
JPH06152105A (en) * 1991-03-22 1994-05-31 Meikoo:Kk Manufacture of printed wiring board
JP2004072027A (en) * 2002-08-09 2004-03-04 Cmk Corp Method of manufacturing wiring board with bump electrode
JP2007067382A (en) * 2005-08-03 2007-03-15 Toray Ind Inc Wiring board forming carrier, wiring board forming substrate, and manufacturing method of wiring board using the same

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Publication number Priority date Publication date Assignee Title
JPS59227185A (en) * 1983-06-07 1984-12-20 日立化成工業株式会社 Method of producing printed circuit board
JPS61267396A (en) * 1985-05-22 1986-11-26 株式会社日立製作所 Printed circuit board, multilayer printed circuit equipped therewith and manufacture thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02159789A (en) * 1988-12-14 1990-06-19 Meiko Denshi Kogyo Kk Manufacture of printed wiring board
JPH04116997A (en) * 1990-09-07 1992-04-17 Asahi Chem Ind Co Ltd Manufacture of printed circuit board
JPH06152105A (en) * 1991-03-22 1994-05-31 Meikoo:Kk Manufacture of printed wiring board
JP2004072027A (en) * 2002-08-09 2004-03-04 Cmk Corp Method of manufacturing wiring board with bump electrode
JP2007067382A (en) * 2005-08-03 2007-03-15 Toray Ind Inc Wiring board forming carrier, wiring board forming substrate, and manufacturing method of wiring board using the same

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