JP2011060369A - Filter coefficient control apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a filter coefficient control apparatus for adaptively determining a filter coefficient of a digital filter. <P>SOLUTION: The filter coefficient control apparatus adaptively calculates and outputs the filter coefficient of the digital filter based on an output signal from the digital filter. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present disclosure relates to a technique for shaping a waveform of a signal reproduced from an optical disc or the like.

  In recent years, CDs (Compact Discs), DVDs (Digital Versatile Discs), Blu-ray Discs, and the like have been used as recording media for information recording and reproduction. Along with the improvement in recording density, in order to reproduce the information recorded on these recording media, more powerful reproduction signal processing is required.

  A PRML (Partial Response Maximum Likelihood) detection method has attracted attention and is becoming popular as a high-performance playback signal processing. The PRML detection method is a technique used as a signal processing method for a signal read from a recording medium on which high-density recording such as an HDD (Hard Disk Drive) or a rewritable optical disk is performed. This method is a combination of partial response, which is a waveform equalization technique, and Viterbi decoding, which is one of the maximum likelihood decoding methods. According to this method, a reproduced signal having a low S / N (signal-to-noise) ratio, Thus, correct data can be decoded from a reproduction signal with a lot of nonlinear distortion.

  An example of a reproduction signal processing apparatus using the PRML detection method is described in Patent Document 1.

JP 2004-199727 A

  When the analog filter processes the reproduction signal and the processed signal is given to the digital filter, the analog filter can be simplified by performing high-frequency emphasis on the input signal with the digital filter. However, when the characteristics of the input signal change, there are cases where sufficient reproduction performance cannot be obtained. When data cannot be reproduced, it is necessary to select an optimum filter coefficient of the digital filter again.

  As a method for adaptively calculating a filter coefficient, there is a method using an LMS (Least Mean Square) algorithm, which is generally used in a PR (Partial Response) equalizer. However, the sample value of the reproduction signal may be asymmetric with respect to 0 as shown in FIG. 4, and it is difficult to uniquely determine the equalization target value for the reproduction signal having such distortion.

  Further, the MTF (Mutual Transfer Function) characteristic, which is an optical reproduction characteristic of a DVD or the like, is distributed in a low range as shown in FIG. Since the signal information exists only in the low frequency, the gain of the digital filter at the aliasing frequency (normalized frequency = 0.5) increases as shown in FIG. The noise is emphasized. Then, the control characteristics of a PLL (Phase Locked Loop) that uses the output signal of the digital filter deteriorates, and the performance of the reproduction signal processing device deteriorates.

  An object of the present invention is to provide a filter coefficient controller that adaptively obtains a filter coefficient of a digital filter.

  The filter coefficient controller according to the embodiment of the present invention adaptively calculates and outputs the filter coefficient of the digital filter based on the output signal from the digital filter even during processing of the signal by the digital filter.

  According to this, since the filter coefficient can be updated sequentially, the filter coefficient of the digital filter can be maintained appropriately.

  According to the embodiment of the present invention, the filter coefficient of the digital filter can be obtained adaptively. Therefore, data reproduction from a reproduction signal such as an optical disk can be appropriately continued.

It is a block diagram which shows the structural example of the reproduction | regeneration signal processing apparatus which concerns on embodiment of this invention. It is a graph which shows the MTF characteristic which is the optical reproduction characteristic of DVD, and some PR characteristics. It is a graph which shows the example of the frequency characteristic of a general digital equalizer. It is a graph which shows the example of distribution of the sample value of the reproduction signal from a recording medium. It is a block diagram which shows the structural example of the filter coefficient controller of FIG. 6 is a graph showing an example of an input signal to the filter coefficient controller in FIG. 1 when the timing of the zero cross point coincides with the timing of sampling. 2 is a graph showing an example of an input signal to the filter coefficient controller of FIG. 1 when the zero cross point timing does not coincide with the sampling timing. It is a graph which shows an example of the reproduction signal from a recording medium. It is a graph which shows the example of the frequency characteristic of the digital equalizer of FIG. It is a block diagram which shows the other example of the filter coefficient controller of FIG.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the components indicated by the same reference numerals in the last two digits correspond to each other and are the same or similar components.

  Each functional block in this specification may typically be realized by hardware. For example, each functional block can be formed on a semiconductor substrate as part of an IC (integrated circuit). Here, the IC includes a large-scale integrated circuit (LSI), an application-specific integrated circuit (ASIC), a gate array, a field programmable gate array (FPGA), and the like. Alternatively, some or all of each functional block can be implemented in software. For example, such a functional block can be realized by a program executed on a processor. In other words, each functional block described in the present specification may be realized by hardware, may be realized by software, or may be realized by any combination of hardware and software.

  FIG. 1 is a block diagram showing a configuration example of a reproduction signal processing apparatus according to an embodiment of the present invention. 1 includes a preamplifier 6, a gain controller (AGC / Offset) 8, an analog equalizer 10, an A / D converter 12, a VCO (Voltage Controlled Oscillator) 14, and a range controller 16. A digital equalizer 18, a filter coefficient controller 20, a PLL (Phase Locked Loop) controller 22, a PR (Partial Response) equalizer 24, an adaptive learner 26, and a maximum likelihood decoder 28. ing.

  The optical pickup 4 irradiates the recording medium 2 with laser light. The optical pickup 4 converts the reflected light from the recording medium 2 into a reproduction signal and outputs it. The recording medium 2 is, for example, a CD, a DVD, or a Blu-ray Disc, and will be described here as a DVD. The preamplifier 6 amplifies the reproduction signal output from the optical pickup 4 and outputs the amplified signal to the gain controller 8. The gain controller 8 performs automatic gain control (AGC) and offset control (that is, removal of DC fluctuation) on the reproduction signal output from the preamplifier 6 in accordance with the control signal output from the range control unit 16 and outputs it. .

  The analog equalizer 10 removes high frequency noise components from the output of the gain controller 8 and outputs the result. The A / D converter 12 converts the output of the analog equalizer 10 into a digital signal DI according to the clock output from the VCO 14 and outputs the digital signal DI. The range control unit 16 generates a control signal and outputs it to the gain controller 8 so that the signal input to the A / D converter 12 falls within the dynamic range of the A / D converter 12.

  The A / D converter 12, the digital equalizer 18, the PLL controller 22, and the VCO 14 constitute a PLL. The digital equalizer 18 includes a digital FIR (Finite Impulse Response) filter (hereinafter simply referred to as an FIR filter), and outputs an output signal of the FIR filter. This FIR filter uses the filter coefficient output from the filter coefficient controller 20. The digital equalizer 18 performs processing for emphasizing the frequency band necessary for PLL control on the digital signal DI output from the A / D converter 12, and outputs a processed signal ES.

  The filter coefficient controller 20 calculates the filter coefficient (tap coefficient) of the digital equalizer 18 by adaptive learning based on the output signal from the digital equalizer 18, and outputs the filter coefficient to the digital equalizer 18. The filter coefficient controller 20 is adaptive even when the digital equalizer 18 is processing the digital signal DI so that sufficient reproduction performance can be obtained even when the characteristic of the reproduction signal from the recording medium 2 changes. Specifically, the filter coefficient of the digital equalizer 18 is continuously updated while learning. The PLL controller 22 detects a phase error of the signal ES output from the digital equalizer 18 with respect to the reference signal, and outputs a signal corresponding to the detected phase error. The VCO 14 generates a clock having a frequency corresponding to the output of the PLL controller 22 and outputs it to the A / D converter 12.

  The PR equalizer 24 has a transversal filter or FIR filter, and uses the filter coefficients output from the adaptive learning device 26 as filter coefficients of these filters. The PR equalizer 24 performs waveform equalization on the output signal ES of the digital equalizer 18 so as to obtain a signal having a desired PR characteristic, and outputs the signal. The adaptive learner 26 calculates the filter coefficient of the PR equalizer 24 by adaptively learning and outputs the filter coefficient to the PR equalizer 24. The maximum likelihood decoder 28 performs maximum likelihood decoding on the output signal of the PR equalizer 24 by viterbi decoding, which is one of the maximum likelihood decoding methods, and outputs the result as a decoded signal BS. The decoded signal BS is a binarized signal.

  FIG. 2 is a graph showing MTF (Mutual Transfer Function) characteristics, which are optical reproduction characteristics of a DVD, and some PR characteristics. The PR equalizer 24 makes the signal having the MTF characteristic become a signal having a desired PR characteristic (for example, PR (1, 2, 2, 1) or PR (3,4, 4, 3)). Perform waveform equalization. The adaptive learner 26 obtains optimum filter coefficients using, for example, an LMS (Least Mean Square) algorithm.

The LMS algorithm updates the filter coefficient of the PR equalizer 24 from time to time so as to minimize the square value of the equalization error signal, which is the difference between the output value of the PR equalizer 24 and the equalization target value. . The filter coefficient C _i (t) of the i-th tap of the FIR filter at the time t, the time t, the updated filter coefficient C _i (t + 1) of the i-th tap, the loop gain μ, and the equalization error e ( t), using the input value x _i (t) for the i th tap,
The general formula for updating the filter coefficients of the LMS algorithm is
C _i (t + 1) = C _i (t) + μ × e (t) × x _i (t) (1)
It is. The maximum likelihood decoder 28 performs decoding using the waveform interference intentionally given by the PR equalizer 24.

  FIG. 3 is a graph showing an example of frequency characteristics of a general digital equalizer. FIG. 4 is a graph showing an example of distribution of sample values of a reproduction signal from the recording medium 2. As shown in FIG. 2, while the MTF characteristics of DVD are distributed in the low frequency range, the characteristics of PR (3, 4, 4, 3) and PR (1, 2, 2, 1) Has a certain value even above the vicinity of the normalized frequency of 0.3. Therefore, when the LMS algorithm is simply used to update the filter coefficient of the digital equalizer, the frequency characteristic of the digital equalizer becomes a characteristic with a large gain at the aliasing frequency (normalized frequency = 0.5) as shown in FIG. As a result, high-frequency noise increases.

  By selecting a high-order PR method having a smaller gain in the high frequency band, noise in the high frequency band can be suppressed. However, it is difficult to obtain a sufficient effect for a signal whose value distribution is asymmetric with respect to “0” like the signal shown in FIG. Therefore, in the present embodiment, the filter coefficient controller 20 is configured as follows.

  FIG. 5 is a block diagram illustrating a configuration example of the filter coefficient controller 20 of FIG. The filter coefficient controller 20 includes adders 32 and 34, a coefficient calculation unit 36, an adaptive AC component control unit 40, an adaptive DC component control unit 50, and a jitter minimization control unit 60. .

  The jitter minimizing control unit 60 includes a binarizing unit 62, an edge detector 64, an adder 66, a zero cross point control unit 70, and an amplitude control unit 80. The binarization unit 62 binarizes the output signal ES of the digital equalizer 18 and outputs the binarized signal. The edge detector 64 detects an edge of the signal output from the binarizing unit 62, generates a signal EG indicating the detected edge timing, and outputs the signal EG. The edge detector 64 detects an edge when the edge timing of the output signal of the signal ES does not satisfy a predetermined condition, for example, when data is recorded on the recording medium 2 in violation of a predetermined data format. It is not necessary to perform.

  The zero cross point control unit 70 includes zero cross point detection units 72 and 73, a zero cross point error detection unit 74, a correlation detection unit 76, and a gain setting unit 77. The zero cross point control unit 70 sets the value of the signal ES at the zero cross point (the timing of the edge detected by the edge detector 64 indicated by the signal EG) to a target value (for example, “0”, even if the value is other than “0”). The gain is obtained by using the LMS algorithm so that it approaches (good), and the coefficient calculation unit 36 calculates the filter coefficient based on this gain.

  The zero cross point detector 72 detects the value of the input signal DI to the digital equalizer 18 at the timing indicated by the signal EG, and outputs it to the correlation detector 76. The zero cross point detector 73 detects the value of the output signal ES from the digital equalizer 18 at the timing indicated by the signal EG, and outputs it to the zero cross point error detector 74.

  The zero cross point error detection unit 74 detects a difference between the value detected by the zero cross point detection unit 73 and the target value. The correlation detection unit 76 obtains a correlation between the error detected by the zero cross point error detection unit 74 and the value detected by the zero cross point detection unit 72. The gain setting unit 77 obtains a gain according to the correlation obtained by the correlation detection unit 76.

  The amplitude control unit 80 includes amplitude calculation units 82 and 83, an amplitude error detection unit 84, a correlation detection unit 86, and a gain setting unit 87. The amplitude control unit 80 obtains a gain using the LMS algorithm so that the amplitude calculated from the sample values of the signal ES before and after the zero cross point approaches the target amplitude, and based on this gain, the coefficient calculation unit 36 uses the filter coefficient. Is calculated.

  The amplitude calculator 82 uses the signal EG to calculate the signal amplitude of the input signal DI from the sample values before and after the zero cross point of the input signal DI to the digital equalizer 18. The amplitude calculator 83 uses the signal EG to calculate the signal amplitude of the output signal ES from the sample values before and after the zero cross point of the output signal ES from the digital equalizer 18.

  The amplitude error detector 84 detects the difference between the amplitude obtained by the amplitude calculator 83 and the target amplitude. The correlation detection unit 86 obtains a correlation between the error detected by the amplitude error detection unit 84 and the amplitude detected by the amplitude calculation unit 82. The gain setting unit 87 obtains a gain according to the correlation obtained by the correlation detection unit 86. The adder 66 adds the gains obtained by the zero cross point control unit 70 and the amplitude control unit 80 and outputs the result.

  The adaptive AC component control unit 40 includes a sequence generator 42, a multiplier 43, an adder 44, an AC error detection unit 45, a correlation detection unit 46, and a gain setting unit 47. The adaptive AC component control unit 40 controls the filter characteristic of the digital equalizer 18 at the aliasing frequency.

  The sequence generator 42 repeatedly outputs “1” and “−1” alternately. The output values correspond to the filter taps of the digital equalizer 18, respectively. The sequence generator 42 first outputs “1” or “−1”. That is, the sequence generator 42 generates and outputs a sequence “1, -1,1,...” Or “−1,1, -1,.

  The multiplier 43 multiplies the coefficient of each tap of the filter calculated by the coefficient calculator 36 by the value included in the number sequence output from the number sequence generator 42 and corresponding to each tap, and outputs the result. The adder 44 calculates and outputs the sum of the multiplication results of the multiplier 43 for each tap. The sum total output from the adder 44 indicates the gain of the filter characteristic at the aliasing frequency.

  The AC error detector 45 detects an error between the output of the adder 44 and the target gain. The correlation detection unit 46 outputs the sequence “1, -1,1,...” Or “−1,1, -1,...” Output from the sequence generator 42 and the error detected by the AC error detection unit 45. The correlation between is calculated. The gain setting unit 47 obtains and outputs a gain according to the correlation obtained by the correlation detection unit 46. The adaptive AC component control unit 40 obtains the gain so that the sum obtained by the adder 44 approaches the target sum.

  The adaptive DC component control unit 50 includes a sequence generator 52, a multiplier 53, an adder 54, a DC error detection unit 55, a correlation detection unit 56, and a gain setting unit 57. The adaptive DC component control unit 50 controls the filter characteristic of the digital equalizer 18 at the frequency 0 (DC).

  The sequence generator 52 generates and outputs a sequence “1, 1, 1,...” Or “−1, −1, −1,. The output values correspond to the filter taps of the digital equalizer 18, respectively. The multiplier 53 multiplies the coefficient of each tap of the filter calculated by the coefficient calculator 36 by the value included in the numerical sequence output from the numerical sequence generator 52 and corresponding to each tap, and outputs the result. The adder 54 calculates and outputs the sum of the multiplication results of the multiplier 53 for each tap. The sum total output from the adder 54 indicates the gain of the filter characteristic at the frequency 0.

  The DC error detector 55 detects an error between the output of the adder 54 and the target gain. The correlation detection unit 56 outputs the sequence “1, -1,1,...” Or “−1,1, -1,...” Output from the sequence generator 52 and the error detected by the DC error detection unit 55. The correlation between is calculated. The gain setting unit 57 obtains and outputs a gain according to the correlation obtained by the correlation detection unit 56. The adaptive DC component control unit 50 obtains the gain so that the sum obtained by the adder 54 approaches the target sum.

  The adder 32 adds the gain obtained by the gain setting unit 47 and the gain obtained by the gain setting unit 57 and outputs the result. The adder 34 adds the addition result from the adder 32 and the addition result from the adder 66 and outputs the result. The coefficient calculator 36 calculates and outputs the coefficient of each tap of the FIR filter of the digital equalizer 18 according to the addition result in the adder 34.

  FIG. 6 is a graph showing an example of an input signal to the filter coefficient controller 20 of FIG. 1 when the zero cross point timing coincides with the sampling timing. FIG. 7 is a graph showing an example of an input signal to the filter coefficient controller 20 of FIG. 1 when the zero cross point timing does not coincide with the sampling timing. In FIGS. 6 and 7, the sampling points are indicated by white circles.

The jitter minimization control unit 60 will be described in more detail. Since the sampling interval of A / D conversion is constant, jitter smaller than the sampling interval cannot be obtained. Therefore, the zero cross point detectors 72 and 73 convert the value in the amplitude direction of the input signal into a value in the time axis direction and use it. In the case of FIG. 6, y _t−1 −y _{t + 1} (in the case of a falling edge) or y _{t + 1} −y _t−1 (in the case of a rising edge) corresponds to the time 2T. Therefore, the zero cross point detector 72 and 73, the difference _{y t} between the signal value and the target value in the zero crossing point time _{ts t = y t / | y} t + 1 -y t-1 | is converted into × 2T, time Jitter is obtained from ts _t .

In FIG. 7, the phase of the sampling point is shifted by 180 degrees from the case of FIG. In this case, since there is no digital data sampled in the vicinity of the zero cross point, the zero cross point detection units 72 and 73 perform zero cross by linear interpolation from data of two adjacent sample points (these values sandwich zero). The signal value at the point (circle with hatching) is calculated. Note that the signal value at the zero cross point may be calculated by Nyquist interpolation. Zero crossing point detecting unit 72 and 73, the difference _{y t} between the signal value and the target value in the zero crossing point time _{ts t = y 't / |} y t -y t-1 | into a × T, the time ts Jitter is obtained from _t .

  Since the PLL control becomes more stable as the jitter amount is smaller, the jitter minimizing control unit 60 adaptively calculates the filter coefficient of the digital equalizer so that the jitter amount becomes smaller. That is, the jitter minimizing control unit 60 performs adaptive filter coefficient learning so that the signal value at the zero cross point approaches a target value (for example, “0”).

Loop gain μ ₁ , sampling data y (t) at time t (zero cross point), zero cross point data y ′ (t) obtained by linear interpolation from sampling data at times t and t−1, target value TRG, digital The input value x _{ZERO i} (t) to the i th tap of the FIR filter of the equalizer 18 and the sampling data before and after the input value to the i th tap of the FIR filter of the digital equalizer 18 are linearly interpolated as shown in FIG. Using the obtained value x ′ _{ZERO i} (t), the filter coefficient C _i of the FIR filter is
C _i (t + 1) = C _i (t) + μ ₁ × {y (t) −TRG} × x _{ZERO i} (t) (2)
C _i (t + 1) = C _i (t) + μ ₁ × {y ′ (t) −TRG} × x ′ _{ZERO i} (t) (3)
It is expressed. Equation (2) shows the case of FIG. 6, and Equation (3) shows the case of FIG. The second term in the equations (2) and (3) indicates the update amount of the filter coefficient, and the zero cross point control unit 70 generates these terms. The target value may be other than “0”.

The jitter minimizing control unit 60 performs adaptive filter coefficient learning so that the amplitude amount of the reference width becomes the target amplitude. Using the loop gain μ ₂ and the target amplitude Tamp, the filter coefficient C _i of the FIR filter is
C _i (t + 1) = C _i (t) + μ ₂ × [± {y (t + 1) −y (t−1)} − Tamp] × (±) {x _i (t + 1) −x _i (t−1) } (4)
C _i (t + 1) = C _i (t) + μ ₂ × [± {y (t−1) −y (t)} − Tamp] × (±) {x _i (t−1) −x _i (t) } (5)
It is expressed. Equation (4) shows the case of FIG. 6, and Equation (5) shows the case of FIG. The second term in the equations (4) and (5) indicates the update amount of the filter coefficient, and the amplitude control unit 80 generates these terms.

  FIG. 8 is a graph showing an example of a reproduction signal from the recording medium 2. Since the jitter minimizing control unit 60 learns the filter coefficient using the data around the zero cross point in FIGS. 6 and 8, that is, the data of the jitter minimum control point in FIG. 8, it is asymmetric with respect to the amplitude “0” shown in FIG. Even when a waveform is input, it is less susceptible to waveform distortion.

The adaptive AC component control unit 40 performs control to adjust the gain of the digital equalizer 18 at the normalized frequency = 0.5 (that is, the folding frequency). Using the loop gain μ ₃ and the target gain AC _Trg at the folding frequency, the filter coefficient C _i of the FIR filter is
C _i (t + 1) = C _i (t) + μ ₃ × [Σ _{i = 0} ^{i = n−1} {C _i (t) × (−1) ⁱ } −AC _Trg ] × C _i (t) (6) )
It is expressed. The second term in Expression (6) indicates the update amount of the filter coefficient, and the adaptive AC component control unit 40 generates this term. The adaptive AC component control unit 40 is obtained by multiplying the filter coefficient C _i (0 ≦ i ≦ n−1) by the corresponding value of the sequence “1, -1,1,..., -1,1”. The gain at the aliasing frequency is obtained by obtaining the sum of the product, and the filter coefficient is adaptively learned so that this gain becomes the target gain AC _Trg .

The adaptive DC component control unit 50 performs control to adjust the gain of the digital equalizer 18 at the normalized frequency = 0 (that is, DC). Using a loop gain μ ₄ and a target gain DC _Trg at DC, the filter coefficient C _i of the FIR filter is
C _i (t + 1) = C _i (t) + μ ₄ × [Σ _{i = 0} ^{i = n−1} {C _i (t) × 1} −DC _Trg ] × C _i (t) (7)
It is expressed. The second term in Equation (7) indicates the update amount of the filter coefficient, and the adaptive DC component control unit 50 generates this term. The adaptive DC component control unit 50 multiplies the filter coefficient C _i (0 ≦ i ≦ n−1) by the corresponding value of the sequence “1, 1, 1,... The gain at DC is obtained by obtaining the sum of the values, and the filter coefficient is learned adaptively so that this gain becomes the target gain DC _Trg .

Here, when the update of the filter coefficient by the jitter minimizing control unit 60, the adaptive AC component control unit 40, and the adaptive DC component control unit 50 is combined, an equation indicating the update of the filter coefficient by the filter coefficient controller 20,
C _i (t + 1) = C _i (t)
+ Μ ₁ × {y (t) −TRG} × x _{ZERO i} (t)
+ Μ ₂ × [± {y (t + 1) −y (t−1)} − Tamp] × (±) {x _i (t + 1) −x _i (t−1)}
+ Μ ₃ × [Σ _{i = 0} ^{i = n−1} {C _i (t) × (−1) ⁱ } −AC _Trg ] × C _i (t)
+ Μ ₄ × [Σ _{i = 0} ^{i = n−1} {C _i (t) × 1} −DC _Trg ] × C _i (t)
... (8)
C _i (t + 1) = C _i (t)
+ Μ ₁ × {y ′ (t) −TRG} × x ′ _{ZERO i} (t)
+ Μ ₂ × [± {y (t−1) −y (t)} − Tamp] × (±) {x _i (t−1) −x _i (t)}
+ Μ ₃ × [Σ _{i = 0} ^{i = n−1} {C _i (t) × (−1) ⁱ } −AC _Trg ] × C _i (t)
+ Μ ₄ × [Σ _{i = 0} ^{i = n−1} {C _i (t) × 1} −DC _Trg ] × C _i (t)
... (9)
Is obtained. Equation (8) shows the case of FIG. 6, and Equation (9) shows the case of FIG.

  FIG. 9 is a graph showing an example of frequency characteristics of the digital equalizer 18 of FIG. The filter coefficient controller 20 adaptively controls the filter coefficient according to the equation (8) or (9). Thereby, the frequency characteristic of the digital equalizer 18 can be obtained as shown in FIG. 9 while suppressing jitter. In the frequency characteristic of FIG. 9, the gain at the aliasing frequency is greatly reduced, and the gain at DC is also an appropriate value.

  The adaptive DC control and adaptive AC control described in the above embodiments can also be used in a system that performs general LMS control. FIG. 10 is a block diagram showing another example of the filter coefficient controller 20 of FIG. The adaptive filter coefficient controller 220 of FIG. 10 includes an adaptive AC component control unit 40, an adaptive DC component control unit 50, a coefficient calculation unit 236, an adder 238, and an adaptive waveform equalization control unit 260. And have.

  The adaptive waveform equalization control unit 260 performs general LMS control. The adder 238 adds the outputs of the adaptive waveform equalization control unit 260, the adaptive AC component control unit 40, and the adaptive DC component control unit 50, and outputs the result to the coefficient calculation unit 236. The coefficient calculation unit 236 obtains a filter coefficient according to the output of the adder 238 and outputs it to the FIR filter 218.

  Not only the output of the adaptive waveform equalization control unit 260 but also the outputs of the adaptive AC component control unit 40 and the adaptive DC component control unit 50 are given to the coefficient calculation unit 236. For this reason, it is possible to learn the filter coefficient while keeping the aliasing frequency and the gain at DC at appropriate values.

  According to the filter coefficient controller of the above embodiment, it is possible to stably perform digital filter processing even when the characteristics of the reproduction signal change, and reproduction data extraction can always be performed appropriately. Since the filter characteristics can be adaptively changed, it is not necessary to pre-learn the filter coefficient, and the start-up time can be shortened. Further, even when the characteristics of the analog equalizer that supplies a signal to the digital equalizer are not optimal, it is possible to perform the filtering process stably. Therefore, an analog equalizer can be made roughly to some extent, and its circuit scale can be reduced.

  The many features and advantages of the present invention are apparent from the written description, and thus, it is intended by the appended claims to cover all such features and advantages of the invention. Further, since many changes and modifications will readily occur to those skilled in the art, the present invention should not be limited to the exact construction and operation as illustrated and described. Accordingly, all suitable modifications and equivalents are intended to be within the scope of the present invention.

  As described above, according to the embodiment of the present invention, the filter coefficient of the digital filter can be obtained adaptively. Therefore, the present invention is useful for a filter coefficient controller, a reproduction signal processing device for an optical disk, and the like.

20,220 Filter coefficient controller 40 Adaptive AC component controller 50 Adaptive DC component controller 64 Edge detector 70 Zero cross point controller 80 Amplitude controller

Claims (5)

A filter coefficient controller that adaptively calculates and outputs a filter coefficient of the digital filter based on an output signal from the digital filter even during processing of the signal by the digital filter. The filter coefficient controller of claim 1,
An edge detector for detecting an edge of an output signal of the digital filter;
A zero cross point control unit that detects the value of the output signal from the digital filter at the edge timing detected by the edge detector, and obtains and outputs a first gain based on the detected value;
The amplitude of the output signal is calculated based on the value of the output signal from the digital filter before and after the edge timing detected by the edge detector, and the second gain is obtained based on the calculated value. Output amplitude control unit,
A coefficient calculator that calculates a filter coefficient of the digital filter based on the first and second gains;
The zero cross point control unit obtains the first gain so that a value detected by the zero cross point control unit approaches a target value,
The coefficient calculation unit is a filter coefficient controller for obtaining the second gain so that the amplitude approaches a target amplitude. The filter coefficient controller according to claim 2,
The edge detector is a filter coefficient controller that does not detect an edge when an edge timing of an output signal of the digital filter does not satisfy a predetermined condition. The filter coefficient controller according to claim 2,
A DC component control unit that calculates a sum of filter coefficients of the digital filter calculated by the coefficient calculation unit, and obtains and outputs a third gain based on the sum;
The coefficient calculation unit calculates a filter coefficient of the digital filter based on the third gain,
The DC component control unit is a filter coefficient controller that obtains the third gain so that the sum approaches a target sum. The filter coefficient controller according to claim 2,
The filter coefficient of the digital filter calculated by the coefficient calculator is inverted every other filter coefficient, the sum of the inverted filter coefficient and the filter coefficient that has not been inverted is calculated, and based on the total An AC component control unit that obtains and outputs a gain of 3;
The coefficient calculation unit calculates a filter coefficient of the digital filter based on the third gain,
The AC component control unit is a filter coefficient controller that obtains the third gain so that the sum approaches a target sum.