JP2006216175A - Pll circuit and disk player - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a PLL circuit capable of smoothly detecting phase difference, even if inter-code interferences arise in a reproduced signal waveform, and to provide a disk player that uses the circuit. <P>SOLUTION: A re-sample data produced by a data interpolation circuit 104 is processed by frequency component enhancement of the high-frequency components of a reproduced RF signal, namely, frequency components, corresponding to a short mark (for example, 2T to 3T) through an equalizer 107, and then the re-sampled data is inputted to a phase comparator 108. Waveform fluctuations in the short mark period are enhanced by such a high-frequency region enhancement processing, and a zero-crossing state over a slice level is improved. Thus, the comparator 108 can smoothly detect a phase shift, on the basis of a zero-crossing detection, and as a result, frequency adjustment in a VCO 110 can be performed smoothly. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a PLL (Phase Locked Loop) circuit and a disk playback apparatus, and is particularly suitable for use when intersymbol interference occurs in a playback signal waveform, such as when data playback is performed on a high-density disk. .

  In the PLL circuit, processing for adjusting the period or frequency of the data sampling timing is performed based on the phase difference of the data sampling timing with respect to the appropriate sampling timing. Here, the phase difference is detected based on the edge position of the reproduced signal waveform. More specifically, the zero crossing position of the reproduction signal waveform with respect to the slice level is detected as an edge, and the phase shift between the regular sample timing set based on this edge and the sampling timing generated by the PLL circuit is detected. Detected by seeking.

  On the other hand, in the field of recording media, the density of media has been increased in response to the need to increase data capacity. However, as the recording density of the medium increases, the recording mark becomes shorter in accordance with the increase in the recording density, resulting in intersymbol interference in the reproduced signal waveform. For this reason, in high-density disk drives such as DVD (Digital Versatile Disc) drives, decoding processing (Viterbi decoding processing, etc.) that actively uses intersymbol interference is used.

However, when the intersymbol interference occurs in this way, the edge detection accuracy of the reproduced signal waveform deteriorates, which causes a problem that the phase difference detection accuracy in the PLL circuit deteriorates. For example, in the example shown in FIG. 7, since the waveform fluctuation in the period A corresponding to the continuous period of the short mark is small, there is a possibility that the edge detection in this period cannot be performed smoothly. In addition, there is a period in which zero crossing does not occur due to intersymbol interference (period B). As a result, it is possible that periods during which edge detection cannot be performed are scattered. In this case, since the frequency of detecting the phase difference decreases as the edge detection frequency decreases, there arises a problem that the accuracy of the PLL deteriorates accordingly.
Japanese Patent Laid-Open No. 2004-234738

Accordingly, an object of the present invention is to provide a PLL circuit that can detect a phase difference smoothly even when intersymbol interference occurs in a reproduced signal waveform, and a disk reproducing apparatus using the same.

  According to the first aspect of the present invention, in the PLL circuit that compensates the phase shift of the data sampling timing with respect to the reproduction signal, the phase difference detection unit that detects the phase difference of the data sampling timing with respect to the appropriate timing and the phase difference detection unit detect the phase difference. A sampling timing adjustment unit that adjusts the data sampling timing based on the phase difference, and a high frequency component of a signal waveform that is arranged before the phase difference detection unit and that is referenced in the detection of the phase difference. And a high frequency emphasizing part for emphasizing.

  According to a second aspect of the present invention, in the disk reproducing apparatus for acquiring data from a reproduction signal at a sampling timing generated by a PLL circuit, the PLL circuit detects a phase difference of the data sampling timing with respect to an appropriate timing. A sampling timing adjustment unit that adjusts the data sampling timing based on the phase difference detected by the phase difference detection unit, and a phase difference detection unit that is arranged before the phase difference detection unit and detects the phase difference. And a high-frequency emphasizing unit that emphasizes a high-frequency component of a signal waveform to be referred to.

  According to a third aspect of the present invention, in the disc reproducing apparatus according to the second aspect, an AD converter that samples the reproduction signal to generate digital data is provided, and the AD converter has a sampling timing generated by the PLL circuit. And sampling the reproduction signal.

  According to a fourth aspect of the present invention, in the disc reproducing apparatus according to the second aspect, the AD converter generates the digital data by sampling the reproduction signal with an asynchronous clock having a frequency higher than the sampling timing generated by the PLL circuit. And a resample data acquisition circuit for acquiring a sample value of the reproduction signal at the sampling timing generated by the PLL based on the digital data generated by the AD converter.

  According to a fifth aspect of the present invention, there is provided the disk reproducing apparatus according to any one of the second to fourth aspects, wherein the waveform equalizer performs a waveform equalization process on the reproduced signal waveform, and the waveform equalizer uses the waveform equalizer. A binarized data generating circuit for generating binarized data from the processed reproduction signal waveform, and the high frequency emphasis unit of the PLL circuit includes the waveform equalizer and the binarized data generating circuit It is characterized by being arranged so as to branch to the signal system.

  According to a sixth aspect of the present invention, in the disc reproducing apparatus according to the fifth aspect, the high frequency emphasis unit of the PLL circuit is connected in parallel to the waveform equalizer.

  In the following embodiments, the PLL circuit according to the present invention includes a circuit (FIGS. 1 and 6) including the equalizer 107, the phase comparator 108, the LPF 109, and the digital VCO 110, or the equalizer 107, the phase comparator 108, It is embodied by a circuit (FIG. 4) comprising the LPF 109 and the digital VCO 120, or a circuit (FIG. 5) comprising the equalizer 107, phase comparator 108, LPF 109, DAC 121 and analog VCO 122.

  The “data sampling timing” in the present invention corresponds to the “resample timing” in the embodiments of FIGS. 1 and 6, and in the embodiments of FIGS. 4 and 5, the ADC 103 defined by the PLL clock is used. Sampling timing is supported.

  Further, the “sampling timing adjustment unit” in the present invention is embodied by the LPF 109 and the digital VCO 110 in the embodiment of FIGS. 1 and 6, and is embodied by the LPF 109 and the digital VCO 120 in the embodiment of FIG. In the embodiment of FIG. 5, the embodiment is embodied by the LPF 109, the DAC 121, and the analog VCO 122.

  The “high frequency emphasis unit” in the present invention is embodied in the equalizer 107 in the following embodiments, and the “waveform equalizer” and the “binary data generation circuit” in the present invention are as follows. In the embodiment, the equalizer 105 and the Viterbi decoder 106 are embodied.

The “AD converter” in claim 3 is embodied by the ADC 103 in the embodiment of FIGS. 4 and 5, and the “AD converter” and the “resampled data acquisition circuit” in claim 4 are the same as those in FIG. And the ADC 103 and the data interpolation circuit 104 in the embodiment of FIG.

  According to the present invention, by emphasizing the high frequency component of the signal waveform referred to in the detection of the phase difference, it is possible to increase the waveform fluctuation of the signal waveform during the short mark corresponding period. Even if intersymbol interference occurs, edge detection of the signal waveform can be performed smoothly. Therefore, according to the present invention, even if intersymbol interference occurs in the signal waveform, phase difference detection based on edge detection can be performed properly, and the accuracy of the PLL can be improved.

  If the high frequency emphasis unit is arranged so as to branch to the signal system including the waveform equalizer and the binarized data generation circuit as described in claim 5 or 6, high frequency emphasis is provided. It is possible to avoid the influence of the high-frequency emphasis by the unit on this signal system, and thus it is possible to suppress the deterioration of the reproduction data.

The effects and significance of the present invention will become more apparent from the following description of embodiments. However, the embodiment described below is merely an example of the present invention, and the meaning of the present invention or each constituent element is not limited to that described in the following embodiment.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a configuration of an optical disc apparatus according to the embodiment. In the present embodiment, the present invention is applied to an optical disc apparatus that performs recording / reproduction on a high-density optical disc such as a DVD (Digital Versatile Disc) or a next-generation DVD. In FIG. 1, only the reproduction system is shown, and the recording system is not shown. Also, servo systems such as a focus servo circuit and a tracking servo circuit are not shown.

  As shown in FIG. 1, the optical disc apparatus according to the present embodiment includes an optical pickup 101, an amplifier circuit 102, an ADC (Analog-Digital Converter) 103, a data interpolation circuit 104, an equalizer 105, a Viterbi decoder 106, and the like. , An equalizer 107, a phase comparator 108, an LPF (loop filter) 109, and a digital VCO (Voltage Controlled Oscillator) 110.

  The optical pickup 101 irradiates a disk with laser light to write data and receives reflected light from the disk to read data. The amplification circuit 102 amplifies the reproduction RF signal supplied from the optical pickup 101 and outputs it to the ADC 103. The ADC 103 samples the reproduction RF signal at a sampling timing corresponding to an asynchronous clock (hereinafter referred to as a system clock) having a frequency higher than that of the resample clock generated by the digital VCO 110, converts the sample value into digital data, and outputs data. Output to the interpolation circuit 104.

  The data interpolation circuit 104 uses the digital data input from the ADC 103 and the resample clock and resample phase information input from the digital VCO 110 to use the data value (resample timing) at the data interpolation timing (hereinafter referred to as “resample timing”). Data) and the calculated resample data is output to the equalizer 105 and the equalizer 107. That is, as shown in FIG. 2, the interpolated value at the resample timing (timing indicated by ● in the figure) shifted by the phase corresponding to the resample phase information from the rise timing of the resample clock is the AD before and after the resample timing. Calculation is performed based on the data (digital data input from the ADC 103), and this is output to the equalizer 105 as resample data at the resample timing.

  The equalizer 105 performs waveform equalization processing on the resampled data supplied from the data interpolation circuit 104 and outputs the result to the Viterbi decoder 106. The Viterbi decoder 106 performs Viterbi decoding processing on the digital data supplied from the equalizer 105 to generate and output binary data of 1 and 0.

  The equalizer 107 subjects the resampled data supplied from the data interpolation circuit 104 to processing that emphasizes the high-frequency component of the reproduced RF signal waveform, and outputs the result to the phase comparator 108. A specific method for high frequency emphasis will be described later with reference to FIG.

  The phase comparator 108 determines the edge of the reproduced RF signal waveform based on the resample data supplied from the equalizer 107, that is, the intersection position of the reproduced RF signal waveform and the slice level shown in FIG. And the phase difference between the regular resample timing set to 1 and the resample timing generated by the digital VCO 110 is detected. Then, digital data (phase difference data) corresponding to the phase difference is output to the LPF 109.

  The LPF 109 cuts off the high-frequency component of the phase difference data and turns it into a direct current, and outputs this to the digital VCO 110. The digital VCO 110 adjusts the period of the resample clock so as to compensate the phase difference according to the phase difference data supplied from the LPF 109, and outputs the adjusted resample clock and the resample phase information to the data interpolation circuit 104. .

  FIG. 3 shows a signal waveform when the equalizer 107 emphasizes the high frequency component of the reproduced RF signal waveform. In the figure, as a comparative example, the signal waveform of the reproduction RF signal shown in FIG. 7 is superimposed.

  In the figure, the plot value marked with * indicates the amplitude value (8-bit range) at the time of re-sampling with respect to the reproduced RF signal waveform, and the plotted value marked with ◯ is the re-sample timing with respect to the signal waveform with emphasized high frequency components. The amplitude value is shown. The horizontal axis in the figure is the elapsed time after measurement (× 15.4 nsec).

This signal waveform is intended for the next-generation DVD, and emphasizes the frequency component corresponding to the mark length of 2T as the high frequency component among the frequency components of the reproduction RF signal waveform. Specifically, a 3-tap transversal filter in which the gain of each tap is set to [−0.5 2.0 −0.5] is used as the equalizer 107 for high frequency emphasis. That is, when the value of the resampled data at the resample timing T _n and D _n, data D _n after high band emphasis' is for this value D _n, the value D _n and, before and after resampling timing T _{n- From} the resampled data values D _n-1 and D _{n + 1 at 1} and T _{n + 1} ,
D _n ′ = (− 0.5 × D _n−1 ) + (2 × D _n ) + (− 0.5 × D _{n + 1} )
As required. In this configuration, the signal waveform of the frequency component corresponding to the 2T mark length is raised by 6 dB (2 times). Note that a transversal filter having 5 taps or more can be used as the equalizer 107 for high frequency emphasis. In this case, it is necessary to appropriately set the gain of each tap so that the signal waveform of the frequency component corresponding to the mark length of 2T can be effectively lifted.

  As shown in the figure, according to this measurement example, by emphasizing the high frequency component, the waveform fluctuation in the signal period (for example, period A in the figure) corresponding to the continuous period of the short mark can be increased. Thus, it can be seen that the edge detection in this period can be performed smoothly.

  Further, a signal period in which zero cross does not occur due to intersymbol interference (for example, period B in the figure) also causes zero cross, and as a result, suppresses a phenomenon that periods in which edge detection cannot be performed are scattered. Can do. Therefore, it is possible to solve the problem of deterioration in PLL accuracy that occurs with a decrease in the edge detection frequency.

  In a high-density optical disc such as a DVD, the appearance frequency of short marks is considerably higher than the appearance frequency of all mark lengths. For example, in the case of a next-generation DVD, the appearance frequency of 2T and 3T mark lengths accounts for about 60 to 70% of the appearance frequency of all mark lengths. Therefore, even if only this frequency component is emphasized, the appearance frequency of the signal period in which zero crossing does not occur can be considerably suppressed, and as a result, deterioration of PLL accuracy can be effectively suppressed.

  In the measurement example of FIG. 3, the frequency component corresponding to the 2T mark length is emphasized. Thus, the appearance frequency of the 2T and 3T signal mark lengths is 60 to 70 of the appearance frequency of all mark lengths. If it is about%, it is possible to more effectively suppress the deterioration of the PLL accuracy by further emphasizing the frequency component corresponding to the mark length of 3T. In this case, a transversal filter of 5 taps or more is used as the equalizer 107 for high frequency emphasis, and the signal waveform of the frequency component corresponding to the mark length of 2T and 3T can be effectively raised by using the gain of each tap. It is necessary to set it appropriately.

  Note that when emphasizing not only the high frequency component but also the low frequency component, the equalizer 107 is close to the function of a simple amplifier, and for example, the signal period B in FIG. 3 can be zero-crossed. Disappear. In this case, the value of the resample data in the signal period B is further away from the zero level by passing through the equalizer 107. Therefore, the equalizer 107 needs to emphasize only the frequency component corresponding to the short mark as described above. In this case, the frequency component corresponding to which mark length is emphasized may be appropriately set in consideration of the appearance frequency of the mark length as described above. In the case of the next-generation DVD, as described above, if the frequency component corresponding to the mark length from 2T to 3T is emphasized, the PLL accuracy can be sufficiently satisfied.

  As described above, according to the present embodiment, by emphasizing the high frequency component of the reproduced RF signal waveform, the waveform fluctuation of the signal waveform during the short mark corresponding period can be increased. Even if interference occurs, edge detection of the signal waveform can be performed smoothly. Therefore, according to the present embodiment, even if intersymbol interference occurs in the signal waveform, phase difference detection based on edge detection can be performed properly, and the accuracy of the PLL can be improved.

  Further, according to the present embodiment, since the equalizer 107 for high frequency emphasis is connected in parallel with the equalizer 105 for waveform equalization, the influence of the high frequency emphasis by the equalizer 107 for high frequency emphasis is affected by the waveform equalization. It is possible to avoid reaching the resampling data generated and processed by the equalizer 105 and the Viterbi decoder 106, and thus it is possible to suppress the deterioration of the reproduction data.

  In addition, this invention is not limited to the said embodiment, A various change is possible for others.

  For example, in the above embodiment, the data sampled by the ADC 103 is interpolated by the data interpolation circuit 104 to acquire data at the resampling timing. However, as shown in FIG. It is also possible to use the PLL clock generated in step S3 as a sampling clock for the ADC 103 and input the digital data (AD data) sampled by the ADC 103 to the equalizer 105 as it is to perform the decoding process.

  In this configuration, the equalizer 107 subjects the AD data supplied from the ADC 103 to processing that emphasizes the high frequency component of the reproduced RF signal waveform, and outputs the AD data supplied to the ADC 103 to the phase comparator 108. The phase comparator 108 determines the edge of the reproduced RF signal waveform based on the AD data supplied from the equalizer 107, and detects the phase difference between this edge and the PLL clock. Then, digital data (phase difference data) corresponding to the phase difference is output to the LPF 109.

  The LPF 109 cuts off the high-frequency component of the phase difference data and turns it into a direct current, and outputs this to the digital VCO 120. The digital VCO 120 adjusts the oscillation frequency of the PLL clock so as to compensate the phase difference according to the phase difference data supplied from the LPF 109, and outputs the adjusted PLL clock to the ADC 103.

  In this configuration, the digital VCO 120 can be changed to an analog VCO. In this case, as shown in FIG. 5, the phase difference data is converted into an analog signal (voltage value) by a DAC (Digital-Analog Converter) 121 and then input to the analog VCO 122. The analog VCO 122 changes the oscillation frequency of the PLL clock using the analog signal (voltage value) supplied from the DAC 121 as a control signal.

  In the above-described embodiment, the equalizer 107 for high frequency emphasis is connected in parallel to the equalizer 105 for waveform equalization. Instead, for example, as shown in FIG. The equalizer 107 can be connected in series to the equalizer 105 for waveform equalization. In this case, the equalizer 105 for waveform equalization cancels the high frequency emphasis added by the equalizer 107 for high frequency emphasis in addition to the function of performing the waveform equalization processing suitable for the Viterbi decoding process. It is desirable that a function for returning to the original reproduced RF signal waveform is further added.

  However, in this case, it is necessary to adjust the design of the equalizer 105 for waveform equalization accordingly, and if the high frequency emphasis is applied too much, the signal waveform is restored to the original by the equalizer 105 for waveform equalization. There is a concern that the reproduced RF signal waveform cannot be accurately restored. On the other hand, if the degree of high frequency emphasis is reduced in order to avoid this, the effect shown in FIG. 3, that is, the effect of emphasizing waveform fluctuation in the short mark period and the frequency of occurrence of zero crossing can be increased. The effect cannot be exhibited satisfactorily. Therefore, the equalizer 107 for high frequency emphasis is preferably connected in parallel to the equalizer 105 for waveform equalization as shown in the above embodiment. In this way, it is possible to appropriately adjust the degree of high frequency emphasis to a desired one while avoiding adverse effects on reproduced data.

  Further, in the above-described embodiment, an example in which the present invention is applied to an optical disc apparatus that performs recording / reproduction on a high-density optical disc such as a DVD or a next-generation DVD has been described. The present invention can also be applied to other drive devices such as an optical disk device that performs recording / reproduction with respect to other optical disks such as Recordable) and RW (ReWritable), or magneto-optical disk devices and magnetic disk devices. . However, as described above as the problems and effects of the present invention, the present invention is effective when applied to a drive apparatus that handles a disk in which intersymbol interference occurs.

  In addition, in the above, the VCO frequency is adjusted based on the phase difference of the resample timing. However, not only the phase difference of the resample timing but also the frequency shift is further detected, and both the phase difference and the frequency shift are detected. The VCO frequency may be adjusted while taking into account.

The embodiment of the present invention can be appropriately modified in various ways within the scope of the technical idea shown in the claims.

The figure which shows the structure of the optical disk apparatus which concerns on embodiment The figure explaining the production | generation method of the resample data which concerns on embodiment The figure which shows the example of a measurement at the time of the high frequency emphasis which concerns on embodiment The figure which shows the structure of the optical disk apparatus based on other embodiment. The figure which shows the structure of the optical disk apparatus based on other embodiment. The figure which shows the structure of the optical disk apparatus based on other embodiment. The figure explaining the subject of this invention

Explanation of symbols

103 ADC (Analog-Digital Converter)
104 Data interpolation circuit 105 Equalizer (for waveform equalization)
106 Viterbi decoder 107 Equalizer (for high frequency emphasis)
108 Phase comparator 109 LPF
109 Adder 110 Digital VCO
120 digital VCO
121 DAC (Digital-Analog Converter)
122 Analog VCO

Claims (6)

A phase difference detection unit that detects a phase difference of data sampling timing with respect to appropriate timing;
A sampling timing adjustment unit that adjusts the data sampling timing based on the phase difference detected by the phase difference detection unit;
A high-frequency emphasizing unit that is arranged upstream of the phase-difference detecting unit and emphasizes a high-frequency component of a signal waveform referred to in the detection of the phase difference.
A PLL circuit characterized by that. In a disk reproducing apparatus that acquires data from a reproduction signal at a sampling timing generated by a PLL circuit, the PLL circuit includes:
A phase difference detection unit that detects a phase difference of data sampling timing with respect to appropriate timing;
A sampling timing adjustment unit that adjusts the data sampling timing based on the phase difference detected by the phase difference detection unit;
A high-frequency emphasizing unit that is arranged before the phase-difference detecting unit and emphasizes a high-frequency component of a signal waveform referred to in the detection of the phase difference;
A disc player characterized by that. In claim 2,
An AD converter that samples the reproduction signal to generate digital data, and the AD converter samples the reproduction signal at a sampling timing generated by the PLL circuit;
A disc player characterized by that. In claim 2,
An AD converter that samples the reproduction signal with an asynchronous clock having a frequency higher than the sampling timing generated by the PLL circuit to generate digital data;
A resample data acquisition circuit for acquiring a sample value of the reproduction signal at the sampling timing generated by the PLL based on the digital data generated by the AD converter;
A disc player characterized by that. In any of claims 2 to 4,
A waveform equalizer for performing waveform equalization processing on the reproduced signal waveform;
A binarized data generating circuit that generates binarized data from a reproduced signal waveform that has been subjected to waveform equalization processing by the waveform equalizer;
The high frequency emphasis unit of the PLL circuit is arranged to branch to a signal system including the waveform equalizer and the binarized data generation circuit.
A disc player characterized by that. In claim 5,
The high frequency emphasis unit of the PLL circuit is connected in parallel to the waveform equalizer,
A disc player characterized by that.

Images