JP2011009794A - Mounting of electronic component on ic chip - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a highly reliable method for mounting electronic components for securely and easily joining the electronic components without using solder paste.SOLUTION: A semiconductor device includes a silicon substrate 100 where circuit elements are formed, a plurality of protrusion-shaped metal electrodes 110A, 110B formed on the silicon substrate 100, and a capacitor 140 having Au-plated electrodes 142, 144. The electrodes 142, 144 of the capacitor 140 are metallurgically bonded to the protrusion-shaped metal electrodes 110A, 110B by supersonic thermocompression bonding.

Description

  The present invention relates to mounting an electronic component on an IC chip or a silicon substrate, and more particularly to mounting an electronic component that is metal-bonded to the surface of an IC chip.

  In order to remove noise caused by fluctuations in power supply voltage such as when power is turned on, a bypass capacitor is connected outside the semiconductor device. The capacitor can be mounted on the circuit board on which the semiconductor device is mounted, but this method cannot increase the mounting density of the circuit board. Therefore, a semiconductor device incorporating a capacitor has been proposed.

  For example, in Patent Document 1, as shown in FIG. 1, an insulating sheet made of polyimide tape or the like is formed on a semiconductor chip 1 via an adhesive, and a Cu plate is formed on the upper surface of the insulating sheet by an adhesive. The first and second conductor plates 3 and 4 are juxtaposed and bonded. A chip capacitor 5 is mounted on the first and second conductor plates 3 and 4 by a conductive adhesive 6 such as an epoxy resin containing Ag. The two conductor plates 3 and 4 are respectively connected to the ground electrode and the power supply electrode of the semiconductor chip 1, the periphery of the semiconductor chip 1 is sealed with resin, and the package body 8 is formed.

JP-A-5-21698

  FIG. 2 is an example of a semiconductor device incorporating a conventional electronic component. The semiconductor device shown in FIG. 2A is obtained by modularizing a plurality of semiconductor chips. A plurality of ball-shaped bump electrodes 12 are formed on the back surface of the multilayer wiring substrate 10, and a plurality of conductor patterns 14 electrically connected to the bump electrodes 12 and the like are formed on the front surface. The semiconductor chips 20 and 22 are mounted on the multilayer wiring board 10 by connecting bump electrodes on the back surface thereof to the conductor pattern 14. Furthermore, the electrode portions of the electronic components 32 and 34 are soldered to the conductor pattern 14 by a solder paste 30 formed by screen printing or the like on the surface of the multilayer wiring board 10.

  The semiconductor device shown in FIG. 2B is a resin-sealed package in which a semiconductor chip 42 is mounted on a lead frame 40. On the lead frame 40, the electrode portion of the electronic component 46 is soldered via a solder paste 44. The electrode part of the electronic component 46 is electrically connected to the electrode of the semiconductor chip 42 by a wire 48 such as Au, Al, or Cu.

  FIG. 2C is a perspective plan view and a perspective side view of a semiconductor device using a bare die mounting substrate incorporating an electronic component. A semiconductor chip 52 is mounted on an IC mounting board or a bare die mounting board 50, and electronic components 54 and 56 are soldered onto the mounting board 50 via a solder paste 58. A conductor pattern 60 such as Cu formed on the bare die mounting substrate 50 is electrically connected to the electrode 64 of the semiconductor chip 52 by a wire 62 such as Au, Al, or Cu. The semiconductor chip 52 and the electronic components 54 and 56 on the bare die mounting substrate 50 are covered with a resin 66.

  Such a semiconductor device incorporating a conventional electronic component has the following problems because the electronic component is soldered using a solder paste. Due to the lead-free soldering, the wettability of the electronic component with respect to the electrodes deteriorates. In addition, there are problems of storage stability, supply stability, and high melting point. Moreover, since the process of forming solder paste by screen printing etc. is required, it will become expensive. Furthermore, there is a problem that a void is generated at the joint portion or a liquid flux residue is generated by a gas generated from the substrate. In particular, when a void is generated, an electrical connection failure of an electronic component is caused, leading to a decrease in reliability. Further, depending on the bonding failure, a short circuit may occur due to a bridge or the like.

  Furthermore, the mounting position of the electronic component mounted on the semiconductor chip or the mounting substrate is limited due to the position of the conductor pattern 14 and the space. For this reason, the connection distance to the conductor pattern 14 is increased by the electronic component, and the electrical characteristics of the electronic component are deteriorated, or noise is generated between the semiconductor chip and the electronic component. If a new electronic component is added to reduce such deterioration of electrical characteristics and noise, the number of components increases and the cost increases.

The present invention has been made to solve such conventional problems, and a highly reliable semiconductor device capable of reliably and easily joining electronic components without using a solder paste. The purpose is to provide.
It is another object of the present invention to provide a semiconductor device that can stabilize the electrical characteristics of an electronic component and can be reduced in size and cost.

  A semiconductor device according to the present invention includes a semiconductor substrate on which a plurality of circuit elements are formed, and a plurality of protruding metals formed on the semiconductor substrate and electrically connected to selected elements of the plurality of circuit elements. An electrode and at least one electronic component having first and second electrodes, wherein the first electrode is metal-bonded to a first protruding metal electrode, and the second electrode is a second protruding shape And at least one electronic component disposed on the semiconductor substrate, wherein the first and second electrodes are first and second protruding metal electrodes by ultrasonic thermocompression bonding. A semiconductor device connected to the semiconductor device.

  Preferably, the protruding metal electrode includes an electrode pad, a Cu layer formed on the electrode pad, a palladium layer formed on the Cu layer, and the first and second electrodes of the electronic component are plated with gold. And the metal bond comprises a gold-palladium eutectic. Preferably, the protruding metal electrode includes an electrode pad, a Cu layer formed on the electrode pad, a palladium layer formed on the Cu layer, and the first and second electrodes of the electronic component include Cu Plating is performed and the metal bond includes a Cu-palladium eutectic. The protruding metal electrode may include a nickel layer between the Cu layer and the palladium layer.

  The protruding metal electrode includes a wiring layer extending on the surface of a semiconductor substrate via an insulating film, and the first or second electrode is metal-bonded to the extended wiring layer. There may be. Preferably, the first electrode is connected to the first electrode pad via a first extending wiring layer, and the second electrode is connected to the first electrode layer via a second extending wiring layer. The first conductive distance from the first electrode to the first electrode pad is equal to the second conductive distance from the second electrode to the second electrode pad. Further, a space may be formed between the at least one electronic component and the surface of the semiconductor substrate, and the space may be filled with an underfill resin.

  Furthermore, a semiconductor device according to the present invention includes a semiconductor substrate on which a plurality of circuit elements are formed, and a plurality of protrusions formed on the semiconductor substrate and electrically connected to selected elements of the plurality of circuit elements. The protruding metal electrode includes an electrode pad, a Cu layer formed on the electrode pad, a palladium layer formed on the Cu layer, and the first and first protrusions. At least one capacitor having two electrodes, wherein the first and second electrodes of the electronic component are plated with gold, and the first and second electrodes are first and second protruding metal electrodes. And at least one capacitor disposed on the semiconductor substrate by metal bonding by ultrasonic thermocompression.

  Preferably, the first electrode of the capacitor is electrically connected to a power supply potential, and the second electrode is electrically connected to a reference potential. An underfill resin may be filled between the capacitor and the semiconductor substrate. The plurality of protruding metal electrodes may include a bump electrode made of Au or Cu on the palladium layer. Further, the plurality of protruding metal electrodes may be disposed on an active region where the circuit element is formed.

  Furthermore, a space may be formed between at least one electronic component and the surface of the semiconductor substrate, and the space may be filled with an underfill resin. The mounted electronic component includes a capacitor, a resistor, a filter, and other components. For example, the capacitor is a bypass capacitor connected between a power supply potential and a reference potential. Or it is a capacitor used for an A / D converter. Further, a package-on-package structure in which a semiconductor substrate is stacked on another semiconductor substrate may be used. The semiconductor substrate may be a resin package that is entirely sealed with resin.

  A mounting method according to the present invention is to mount an electronic component on a semiconductor chip, and prepare a semiconductor substrate on which a circuit element is formed, and an electrode electrically connected to the circuit element on the semiconductor substrate, A plurality of protruding metal electrodes including a Cu layer formed on the electrode and a palladium layer formed on the Cu layer are formed, the electronic component is kept in a heated state, and the gold-plated electrode of the electronic component is precursor The plurality of protruding metal electrodes are pressed, ultrasonic vibration is applied to the electronic component, and the electronic component electrode is metal-bonded to the protruding metal electrode. Preferably, the ultrasonic vibration is started when the electronic component reaches the first load, and the ultrasonic vibration is ended when the electronic component reaches the second load.

  According to the present invention, since the metal electrode of the electronic component is mounted by metal bonding to the protruding metal electrode formed on the semiconductor substrate or the semiconductor chip, the solder paste is formed on the substrate as in the past. A process is unnecessary, and the cost of the semiconductor device can be reduced. Moreover, since it is not soldering using a solder paste, the connection failure by a void and generation | occurrence | production of a bubble-like flux residue can be suppressed, and the reliability of joining of electronic components can be improved. Furthermore, since the electrode of the electronic component is connected to the protruding metal electrode, the electrical connection distance from the electronic component to the electrode on the substrate is shortened, noise generation is suppressed, and the electrical characteristics of the electronic component are kept good. be able to. In particular, when a plurality of electronic components are mounted, the electrical characteristics of each electronic component can be made uniform by equalizing the electrical connection distances. Further, by connecting the electronic component to the protruding metal electrode, it is possible to contribute to miniaturization of the semiconductor device.

It is a figure which shows the example of the semiconductor device incorporating the conventional chip capacitor. It is a figure which shows the other example of the semiconductor device incorporating the conventional electronic component. It is a figure which shows the other example of the semiconductor device incorporating the conventional electronic component. It is a figure which shows the other example of the semiconductor device incorporating the conventional electronic component. FIG. 3A is a cross-sectional view of an essential part of a semiconductor device incorporating an electronic component according to an embodiment of the present invention, and FIG. 3B is an enlarged view of a protruding metal electrode. It is the perspective view which represented the capacitor and the protruding metal electrode typically. It is a figure which shows the example of the manufacturing process of the protruding metal electrode which concerns on a present Example. It is a figure which shows the wiring layer which extended the protruding metal electrode. It is a figure which shows the mounting apparatus for mounting an electronic component. FIG. 8A is a side view of the mount head, and FIG. 8B is an enlarged view of the mount head as viewed from the front. It is a figure which shows the relationship between a pressure waveform, an ultrasonic vibration, and a distance. It is a figure which shows the example of the semiconductor device which mounted the electronic component which concerns on a present Example. It is a figure which shows the example of the semiconductor device which mounted the electronic component which concerns on a present Example. It is a figure which shows the example of the semiconductor device which mounted the electronic component which concerns on a present Example. It is a figure which shows the example of the semiconductor device with which the some electronic component was mounted. It is principal part sectional drawing of the semiconductor device which concerns on the 2nd Example of this invention. It is principal part sectional drawing of the semiconductor device which concerns on the 3rd Example of this invention.

  DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the best embodiment of the present invention will be described in detail with reference to the drawings. It should be noted that the drawings include exaggeration for the purpose of clarifying and clarifying the features of the invention and are not necessarily the same as the scale of an actual semiconductor device.

  FIG. 3 shows a cross-sectional view of a main part of a semiconductor device incorporating an electronic component according to an embodiment of the present invention. The semiconductor device of this embodiment includes a silicon substrate 100, and a plurality of circuit elements are formed on the silicon substrate 100. A plurality of protruding metal electrodes 110 electrically connected to circuit elements are formed on the surface of the silicon substrate 100. Although only two projecting metal electrodes 110A and 110B are shown in the figure, in practice, a larger number of projecting metal electrodes may be formed.

  Since the protruding metal electrodes 110A and 110B have the same configuration, the protruding metal electrode 110A will be described here. The protruding metal electrode 110A preferably includes an electrode pad 120, a TiW / Cu barrier metal layer 122, a Cu layer 124, a nickel layer 126, and a palladium layer 128.

  The electrode pad 120 is formed from aluminum or an aluminum alloy. The electrode pad 120 is electrically connected to a lower conductive metal or conductive polysilicon layer through a via hole (not shown), or diffused at a high impurity concentration formed on the surface of the silicon substrate 100 through a contact hole. Electrically connected to the area. The surface of the silicon substrate 100 is covered with a protective film 130 such as a silicon oxide film or a silicon nitride film, and an opening 132 for exposing the electrode pad 120 is formed in the protective film 130. The TiW / Cu barrier metal 122 is connected to the electrode pad 120 through the opening 132. On the TiW / Cu barrier metal layer 122, a patterned CU layer 124, a nickel layer 126, and a palladium layer 128 are sequentially laminated.

  Capacitors 140 in which the electrodes are metal-bonded are mounted on the protruding metal electrodes 110A and 110B. The capacitor 140 is, for example, a tantalum ceramic capacitor, and Au plating is applied to the surfaces of the electrodes 142 and 144 at both ends thereof. The lengths of the electrodes 142 and 144 of the capacitor 140 correspond to the distance between the protruding metal electrodes 110A and 110B, the electrode 142 is metal-bonded to the protruding metal electrode 110A, and the electrode 144 is metal-bonded to the protruding metal electrode 110B. The metal bond includes a palladium-gold eutectic.

  FIG. 4 is a perspective view schematically showing the capacitor and the protruding metal electrode. The capacitor 140 has a substantially rectangular shape, and the overall length L in the longitudinal direction is about 600 μm. The widths W in the short direction of the electrodes 142 and 144 are about 300 μm, the height H is about 300 μm, and the lengths L1 and L2 are about 100 μm. Au plating is applied to the surfaces of the electrodes 142 and 144. The length of the main body 146 between the electrodes 142 and 144 is 400 μm. The height from the surface of the silicon substrate to the palladium layer 128 is about 12 μm, and a slight gap 148 is formed between the main body 146 of the capacitor 140 and the silicon substrate. The gap 148 may be reinforced by filling the underfill resin with the capacitor 140.

  The capacitor 140 is, for example, a bypass capacitor connected to the semiconductor device, and removes noise due to fluctuations in the power supply voltage. In this case, one electrode 142 of the capacitor 140 is connected to the power supply voltage via the protruding metal electrode 110A, and the other electrode 144 is connected to the ground potential or the reference potential via the protruding metal electrode 110B.

  Next, a method for forming the protruding metal electrode will be described. An aluminum layer is formed on the entire surface of the silicon substrate 100, and the electrode pad 120 is patterned as shown in FIG. 5A by using a known photolithography process.

  Next, as shown in FIG. 5B, a protective film 130 of SiO2 or Si3N4 is formed on the entire surface of the substrate so as to cover the electrode pad 120, and then the protective film 130 is etched using a mask (not shown). As shown in FIG. 5C, an opening 132 is formed in the protective film 130, and the electrode pad 120 is exposed. Next, after removing the mask, TiW, Cu, nickel, and palladium are sequentially stacked by CVD or sputtering, and etching is performed from the palladium layer to TiW using an etching mask (not shown), and the protruding metal electrodes 110A and 110B are formed. Form.

  In addition to forming the protruding metal electrodes 110A and 110B so as to extend in the vertical direction from the substrate as shown in FIG. 3, the wiring pattern extending over the protective film 130 as shown in FIG. 110C may be sufficient. The wiring pattern 110C includes a Cu layer 124, a nickel layer 126, and a palladium layer 128. The width and length of the wiring pattern 110C are determined by the shape of the electronic component to be mounted.

  The protruding metal electrodes 110A and 110B and the wiring pattern 110C described above can be formed on an active region on which a circuit element is formed on a semiconductor substrate, and the protruding metal electrodes 110A and 110B and the wiring pattern 110C are formed of an electron. In addition to mounting components, it can also be used as a bonding pad. When bonding is directly performed on the electrode pad 120, stress due to ultrasonic waves or a load is greatly applied to the circuit element. However, since the protruding metal electrodes 110A and 110B and the wiring pattern 110C include the Cu layer 124 on the electrode pad 120, the protrusions Even if ultrasonic waves or a load is applied to the metal electrodes 110A and 110B and the wiring pattern 110C, the Cu layer 124 functions as a buffer material, and damage to circuit elements can be suppressed.

  Since the protruding metal electrodes 110A and 110B and the wiring pattern 110C can be formed on the active region, the restriction on the mounting position of the capacitor 140 is relaxed, and the degree of freedom is greatly increased. If the degree of freedom of the mounting position of the capacitor 140 is wide, it is convenient for stabilizing the electrical characteristics of the capacitor 140. That is, the electrical connection distance from the electrodes 142 and 144 of the capacitor 140 to the electrode pad 120 can be reduced, thereby suppressing the generation of noise. Also, when mounting a plurality of capacitors corresponding to a plurality of channels, such as an A / D converter, by making all the electrical connection distances between the electrodes and electrode pads of each capacitor equal, the electrical characteristics of each capacitor Can be made uniform.

  Next, a method for mounting the capacitor will be described. FIG. 7 is a diagram illustrating an example of a mounting apparatus for ultrasonic thermocompression bonding of electronic components such as capacitors onto a semiconductor chip. The mounting apparatus 200 measures the loads of the substrate stage 210 slidable in the X axis and the Y axis, the mount head 220 that mounts the capacitor, the recognition camera 230 that recognizes the semiconductor chip on the substrate stage 210, and the mount head 220. A load cell 240 and a motor 250 that moves the mount head 220 in the Z-axis direction and rotates at an angle θ about the Z-axis are provided.

  FIG. 8 shows a side view of the mount head and an enlarged view seen from the front. The mount head 220 is composed of a cylindrical metal member extending in the axial direction, and has a suction surface 222 whose diameter gradually decreases toward the tip. The suction surface 222 is flat, and a circular hole 224 is formed at the center thereof. The hole 224 advances along the axial direction of the mount head 220 and is connected to a suction device (not shown). Further, ultrasonic vibration is applied to the mount head 220 by the ultrasonic vibration device 270, and heat is applied by the ceramic heater 280.

  First, a chip tray 260 containing a plurality of semiconductor chips is placed on the substrate stage 210, and the chip tray 260 is positioned by moving the substrate stage 210 in the X direction or the Y direction.

  Next, the motor 250 moves the mount head 220 to a predetermined position, and the air is sucked from the hole 224 of the suction surface 222 of the mount head 220 to hold the capacitor on the suction surface 222. The mount head 220 that has attracted the capacitor is aligned with the semiconductor chip on the substrate stage 210. The positioning of the mount head 220 is performed by performing image processing on image data from the recognition camera 230.

  The mount head 220 holding the capacitor is heated by the heat from the ceramic heater 280, so that the capacitor is maintained at a temperature of about 170 degrees. Next, the mount head 220 presses the capacitor against the protruding metal electrodes 110 </ b> A and 110 </ b> B with a constant load, and then ultrasonic vibration is applied to the mount head 220 by the ultrasonic vibration device 270.

  As shown in FIG. 9, the mount head 220 preferably starts ultrasonic vibration when the load on the mount head 220 reaches P0, and when the load on the mount head 220 reaches P1 greater than P0. The ultrasonic vibration is terminated. During the period in which the ultrasonic vibration is applied, the height of the mount head 220 changes, and this is represented by distance D. That is, the distance D is the amount of change in the height of the mount head 220 in the Z-axis direction during ultrasonic vibration. Since the distance D depends on the height and shape of the protruding electrode, the period of ultrasonic vibration can be determined from the desired distance D. Thus, the capacitor electrode is metal-bonded to the protruding metal electrode by ultrasonic thermocompression bonding, and a eutectic of Au and palladium is formed.

  Next, several examples of the semiconductor device according to this embodiment will be described. FIG. 10A is a diagram when this embodiment is applied to the conventional semiconductor device of FIG. 2A. As shown in the figure, semiconductor devices 20A and 22A are mounted on the multilayer wiring board 10A. The capacitor 140A is metal-bonded and mounted on a protruding metal electrode formed on the chips of the semiconductor devices 20A and 22A. Thereby, the size of the multilayer wiring board 10A on which the semiconductor devices 20A and 22A are mounted or these modules can be reduced. In addition, since the capacitor is not soldered using a solder paste as in the prior art, the manufacturing process is simplified and the cost can be reduced.

  FIG. 10B shows a semiconductor device sealed with a mold resin corresponding to FIG. 2B. As shown in the figure, the capacitor 140B is mounted on the protruding metal electrode on the semiconductor chip by metal bonding. Thereby, the size of the resin package for sealing the semiconductor chip can be reduced.

  FIG. 10C shows a semiconductor device corresponding to FIG. 2C. As shown in the figure, the capacitor 140C is mounted on the surface of the semiconductor chip 52A, and these are sealed with a resin 66C. In addition, an example is shown in which one capacitor 140C is metal-bonded to the extended wiring layer 110C. When the difference in thermal expansion coefficient between the capacitor and the semiconductor substrate is large, the space between the capacitor and the semiconductor substrate may be filled with an underfill resin, and then the whole may be sealed with resin. .

  FIG. 11 shows an example in which a plurality of types of electronic components are mounted on a semiconductor chip. The semiconductor device 300 includes a semiconductor chip 302 and a plurality of external terminals 304, and a large number of protruding metal electrodes formed on the surface of the semiconductor chip 302 or wiring patterns extending therefrom. This wiring pattern extends on the active region of the semiconductor chip. Selected electronic components (indicated by hatching) 310 to 324 are metal-bonded to the selected protruding metal electrode or wiring pattern. These electronic components 310 to 324 are, for example, small nuclear chip fixed resistors, tantalum capacitors, terminal EMI filters, IC protectors, and the like.

  Next, a second embodiment of the present invention will be described. In the second embodiment, as shown in FIG. 12, the metal bump 410 is formed on the protruding metal electrode 400 including the Al electrode 120, the Cu layer 124, the nickel layer 126, and the palladium layer 128. The electrode is connected to the metal-plated electrode 430 of the electronic component 420 such as a capacitor by ultrasonic thermocompression bonding. The metal bump 410 is made of a metal material that can be metal-bonded to the protruding metal electrode 400 such as Au or Cu. The metal plating of the electrode 430 is made of a metal material that can be metal eutectic with the metal bumps 410 such as Au and Cu.

  Next, a third embodiment of the present invention will be described. In the third embodiment, as shown in FIG. 13, a bump electrode 500 made of a material such as Au or Cu is formed on the Al electrode pad 120. The electrode 520 of the electronic component 510 is metal-plated with a material that can form a metal eutectic with the metal bump 500, such as Au or Cu.

  Although the preferred embodiments of the present invention have been described in detail, the present invention is not limited to the specific embodiments, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims. It can be changed.

  Preferably, the protruding metal electrode may have a configuration including a palladium layer as the uppermost layer and a Cu layer between the palladium layer and the electrode pad. For example, the protruding metal electrode may not include a nickel layer, or may include another metal layer in addition to the nickel layer. The barrier metal layer is not necessarily TiW / Cu, and may be a TiW layer.

DESCRIPTION OF SYMBOLS 100: Silicon substrate 110A, 110B: Protruding metal electrode 110C: Extended wiring pattern 120: Electrode pad 122: TiW / Cu barrier metal layer 124: Cu layer 126: Nickel layer 128: Palladium layer 130: Protective film 132: Openings 140, 140A, 140B, 140C: capacitors 142, 144: electrodes 146: main body 148: gap

Claims (17)

A semiconductor substrate on which a plurality of circuit elements are formed;
A plurality of protruding metal electrodes formed on a semiconductor substrate and electrically connected to selected elements of the plurality of circuit elements;
At least one electronic component having a first and a second electrode, wherein the first electrode is metal-bonded to a first protruding metal electrode, and the second electrode is a second protruding metal electrode And at least one electronic component that is metal bonded and disposed on the semiconductor substrate;
The semiconductor device, wherein the first and second electrodes are connected to the first and second protruding metal electrodes by ultrasonic thermocompression bonding.   The protruding metal electrode includes an electrode, a Cu layer formed on the electrode, and a palladium layer formed on the Cu layer, and the first and second electrodes of the electronic component are plated with gold, The semiconductor device according to claim 1, wherein the metal bond includes a gold-palladium eutectic.   The protruding metal electrode includes an electrode, a Cu layer formed on the electrode, and a palladium layer formed on the Cu layer. Cu plating is applied to the first and second electrodes of the electronic component. The semiconductor device according to claim 1, wherein the metal bond includes a Cu-palladium eutectic.   The semiconductor device according to claim 2, wherein the protruding metal electrode includes a nickel layer between the Cu layer and the palladium layer.   The projecting metal electrode includes a wiring layer extending over an insulating film on a surface of a semiconductor substrate, and the first or second electrode is metal-bonded to the extended wiring layer. Item 14. The semiconductor device according to Item 1.   The first electrode is connected to the first electrode pad via a first extended wiring layer, and the second electrode is connected to the second electrode via a second extended wiring layer. 6. A first conductive distance from the first electrode to the first electrode pad connected to an electrode pad is equal to a second conductive distance from the second electrode to the second electrode pad. A semiconductor device according to 1.   The semiconductor device according to claim 1, wherein a space is formed between the at least one electronic component and the surface of the semiconductor substrate, and the space is filled with an underfill resin. A semiconductor substrate on which a plurality of circuit elements are formed;
A plurality of protruding metal electrodes formed on a semiconductor substrate and electrically connected to selected elements of the plurality of circuit elements, wherein the protruding metal electrodes are formed on the electrodes. The protruding metal electrode including a Cu layer, a palladium layer formed on the Cu layer, and
At least one capacitor having first and second electrodes, wherein the first and second electrodes of the electronic component are gold-plated, and the first and second electrodes are first and second The at least one capacitor metal-bonded to the protruding metal electrode by ultrasonic thermocompression bonding and disposed on the semiconductor substrate;
A semiconductor device.   The semiconductor device according to claim 8, wherein the first electrode of the capacitor is electrically connected to a power supply potential, and the second electrode is electrically connected to a reference potential.   The semiconductor device according to claim 8, wherein an underfill resin is filled between the capacitor and the semiconductor substrate.   The semiconductor device according to claim 1, wherein the plurality of protruding metal electrodes include bump electrodes made of Au or Cu on a palladium layer.   The semiconductor device according to claim 1, wherein the plurality of protruding metal electrodes are disposed on an active region where the circuit element is formed.   The semiconductor device according to claim 1, wherein the semiconductor substrate is mounted on another semiconductor substrate.   The semiconductor device according to claim 1, wherein the semiconductor substrate is resin-sealed. A method of mounting an electronic component on a semiconductor chip,
Prepare a semiconductor substrate on which circuit elements are formed,
A plurality of protruding metal electrodes including an electrode electrically connected to a circuit element, a Cu layer formed on the electrode, and a palladium layer formed on the Cu layer are formed on a semiconductor substrate,
Keep the electronic component in a heated state, press the gold-plated electrode of the electronic component against the plurality of protruding metal electrodes,
Apply ultrasonic vibration to electronic parts,
Metal bonding of the electrode of the electronic component to the protruding metal electrode,
Electronic component mounting method.   The mounting method according to claim 15, wherein ultrasonic vibration is started when the electronic component reaches the first load, and ultrasonic vibration is ended when the electronic component reaches the second load.   The mounting method according to claim 15, wherein the electrode of the electronic component is bonded to the protruding metal electrode by a gold-palladium eutectic.

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