JP2010534374A5 - - Google Patents

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JP2010534374A5
JP2010534374A5 JP2010518222A JP2010518222A JP2010534374A5 JP 2010534374 A5 JP2010534374 A5 JP 2010534374A5 JP 2010518222 A JP2010518222 A JP 2010518222A JP 2010518222 A JP2010518222 A JP 2010518222A JP 2010534374 A5 JP2010534374 A5 JP 2010534374A5
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processing system
decomposition
data processing
level circuit
transformation
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JP2010518222A
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Japanese (ja)
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JP2010534374A (ja
JP5706689B2 (ja
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Priority claimed from US12/177,867 external-priority patent/US8819608B2/en
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JP2010518222A 2007-07-23 2008-07-23 アーキテクチャー上の物理的合成 Active JP5706689B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US95143607P 2007-07-23 2007-07-23
US60/951,436 2007-07-23
US12/177,867 US8819608B2 (en) 2007-07-23 2008-07-22 Architectural physical synthesis
US12/177,867 2008-07-22
PCT/US2008/008998 WO2009014731A2 (en) 2007-07-23 2008-07-23 Architectural physical synthesis

Publications (3)

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JP2010534374A JP2010534374A (ja) 2010-11-04
JP2010534374A5 true JP2010534374A5 (enExample) 2012-11-29
JP5706689B2 JP5706689B2 (ja) 2015-04-22

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JP2010518222A Active JP5706689B2 (ja) 2007-07-23 2008-07-23 アーキテクチャー上の物理的合成

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US (2) US8819608B2 (enExample)
EP (1) EP2171623A2 (enExample)
JP (1) JP5706689B2 (enExample)
CN (1) CN101821737A (enExample)
WO (1) WO2009014731A2 (enExample)

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