JP2010282284A5 - - Google Patents
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- Publication number
- JP2010282284A5 JP2010282284A5 JP2009133213A JP2009133213A JP2010282284A5 JP 2010282284 A5 JP2010282284 A5 JP 2010282284A5 JP 2009133213 A JP2009133213 A JP 2009133213A JP 2009133213 A JP2009133213 A JP 2009133213A JP 2010282284 A5 JP2010282284 A5 JP 2010282284A5
- Authority
- JP
- Japan
- Prior art keywords
- bus
- internal memory
- internal
- control unit
- construction data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Claims (1)
構築データを記憶する内部メモリと、
前記内部メモリと接続された内部バスと、
バスコントローラと、
外部バスインタフェースとを備え、
前記バスコントローラは、
前記内部バスを介して前記内部メモリをアクセスするバス制御部と、
プログラム可能な論理部とを含み、
前記制御部は、前記内部メモリに記憶された構築データを読み出して、前記構築データに基づいて、前記プログラム可能な論理部上に、前記外部バスインタフェースを介して接続される外部メモリをアクセスするためのバス制御機能を構築する、マイクロコンピュータ。 A control unit;
An internal memory for storing construction data;
An internal bus connected to the internal memory;
A bus controller;
With an external bus interface,
The bus controller
A bus control unit for accessing the internal memory via the internal bus;
Including a programmable logic part,
The control unit reads the construction data stored in the internal memory, and accesses the external memory connected via the external bus interface on the programmable logic unit based on the construction data. A microcomputer that builds the bus control function of the system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009133213A JP5401700B2 (en) | 2009-06-02 | 2009-06-02 | Microcomputer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009133213A JP5401700B2 (en) | 2009-06-02 | 2009-06-02 | Microcomputer |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010282284A JP2010282284A (en) | 2010-12-16 |
| JP2010282284A5 true JP2010282284A5 (en) | 2012-04-12 |
| JP5401700B2 JP5401700B2 (en) | 2014-01-29 |
Family
ID=43538982
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009133213A Expired - Fee Related JP5401700B2 (en) | 2009-06-02 | 2009-06-02 | Microcomputer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5401700B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5745165B2 (en) * | 2011-05-17 | 2015-07-08 | アルテラ コーポレイションＡｌｔｅｒａ Ｃｏｒｐｏｒａｔｉｏｎ | System and method for interfacing between hard logic and soft logic in a hybrid integrated device |
| CN108134683B (en) * | 2016-12-01 | 2021-06-11 | 腾讯科技（深圳）有限公司 | Terminal and bus architecture implementation method |
| DE102018215881B3 (en) * | 2018-09-19 | 2020-02-06 | Siemens Aktiengesellschaft | Device and method for coupling two direct current networks |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63214995A (en) * | 1987-03-04 | 1988-09-07 | Ando Electric Co Ltd | Memory selecting circuit |
| JPH03263185A (en) * | 1990-03-14 | 1991-11-22 | Hitachi Ltd | Lsi with any-time writable interface circuit |
| JP3191996B2 (en) * | 1992-08-27 | 2001-07-23 | 株式会社リコー | External memory control method |
| JP2001175586A (en) * | 1999-12-21 | 2001-06-29 | Hitachi Ltd | Data processor and data processing system |
| JP2001265647A (en) * | 2000-03-17 | 2001-09-28 | Mitsubishi Electric Corp | Board system, memory control method in board system and memory replacing method in board system |
| JP2001290758A (en) * | 2000-04-10 | 2001-10-19 | Nec Corp | Computer system |
| JP3904493B2 (en) * | 2002-07-24 | 2007-04-11 | 株式会社ルネサステクノロジ | Semiconductor device |
| JP4453271B2 (en) * | 2003-04-25 | 2010-04-21 | コニカミノルタホールディングス株式会社 | Computer system and memory connection method |
| JP4892970B2 (en) * | 2005-12-27 | 2012-03-07 | 富士ゼロックス株式会社 | Method of using electronic circuit and programmable logic device |
| JP2008009564A (en) * | 2006-06-27 | 2008-01-17 | Fujitsu Ltd | Memory access device, memory access method, memory manufacturing method and program |
| JP4659774B2 (en) * | 2007-03-07 | 2011-03-30 | 三菱電機株式会社 | Electrical equipment |
| JP2008293096A (en) * | 2007-05-22 | 2008-12-04 | Shinko Electric Ind Co Ltd | Memory interface and system |
-
2009
- 2009-06-02 JP JP2009133213A patent/JP5401700B2/en not_active Expired - Fee Related
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