JP2010225943A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
JP2010225943A
JP2010225943A JP2009072891A JP2009072891A JP2010225943A JP 2010225943 A JP2010225943 A JP 2010225943A JP 2009072891 A JP2009072891 A JP 2009072891A JP 2009072891 A JP2009072891 A JP 2009072891A JP 2010225943 A JP2010225943 A JP 2010225943A
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Prior art keywords
liquid crystal
flexible substrate
crystal driver
semiconductor device
heat dissipation
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JP2009072891A
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Japanese (ja)
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Fumihiko Etani
文彦 惠谷
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Toshiba Corp
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Toshiba Corp
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Priority to JP2009072891A priority Critical patent/JP2010225943A/en
Priority to US12/703,936 priority patent/US20100244243A1/en
Publication of JP2010225943A publication Critical patent/JP2010225943A/en
Pending legal-status Critical Current

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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin type semiconductor device that can be improved in heat dissipation. <P>SOLUTION: A liquid crystal driver 40 of a liquid crystal display device 70 includes: a flexible substrate 2 which is bent in a U shape, comprises a polyimide resin 13 and a lead, and has an uneven portion 12 provided on an outer surface; and a liquid crystal driver chip 1 which is mounted on an inner surface of the flexible substrate 2 and electrically connected to the lead of the flexible substrate 2 through the lead and a projection electrode, and has a side surface and a bottom surface sealed with a resin 10. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、半導体装置に関する。   The present invention relates to a semiconductor device.

移動体機器やＴＶ等の電子機器では、小型・軽量化、薄型化のために内部に設けられる半導体チップなどの各種電子部品の小型化が図られており、その電子部品を実装するスペースも極めて制限される。例えば、小型或いは大型のＬＣＤ（liquid crystal display）モニタ、ＬＣＤ−ＴＶなどの表示装置ではＣＯＦ（chip on film）方式やＴＡＢ（tape automated bonding）方式などを用いて実装され、各種電子部品の小型化が図られている（例えば、特許文献１参照。）。特許文献１などでは、画素駆動用ドライバのパッケージに侠額縁・薄型に適した折り曲げ可能なＣＯＦ方式が用いられる。   In electronic devices such as mobile devices and TVs, various electronic components such as a semiconductor chip provided therein are miniaturized in order to reduce the size, weight, and thickness, and the space for mounting the electronic components is extremely large. Limited. For example, display devices such as small or large LCD (liquid crystal display) monitors and LCD-TVs are mounted using the COF (chip on film) method or TAB (tape automated bonding) method, and various electronic components are miniaturized. (For example, refer to Patent Document 1). In Patent Document 1 and the like, a foldable COF method suitable for a frame and a thin shape is used for a package of a pixel driving driver.

近年、表示装置の大型化や高細精化などの進展に伴い、画素駆動用ドライバの多出力化が進行している。また、表示パネルの大型化により一画素当たりの消費電流が増加して表示装置の発熱が増大する。ＣＯＦ方式を用い、薄型実装された表示装置では、フレキシブル基板を折り曲げて実装するので、熱の逃げ口が塞がれており、放熱しにくく熱が籠もりやすい。このため放熱効率が大幅に低下するという問題点がある。   2. Description of the Related Art In recent years, with the progress of upsizing and high-definition display devices, the number of pixel driver drivers is increasing. In addition, the current consumption per pixel increases due to an increase in the size of the display panel, and heat generation of the display device increases. In a thinly mounted display device using the COF method, a flexible substrate is bent and mounted, so that a heat escape port is blocked, and heat is not easily radiated and heat is likely to be trapped. For this reason, there exists a problem that heat dissipation efficiency falls significantly.

特開２００６−１３５２４７号公報（頁１１、図７及び図８）JP 2006-135247 A (Page 11, FIGS. 7 and 8)

本発明は、放熱効率を向上することができる薄型の半導体装置を提供することにある。   An object of the present invention is to provide a thin semiconductor device capable of improving heat dissipation efficiency.

本発明の一態様の半導体装置は、Ｕ型状に折り曲げ可能であり、外側面に放熱用の凹凸部が設けられるフレキシブル基板と、前記フレキシブル基板の内側面に載置され、前記フレキシブル基板と電気的に接続される半導体チップとを具備することを特徴とする。   A semiconductor device of one embodiment of the present invention can be bent into a U shape, and has a flexible substrate on which an uneven surface for heat dissipation is provided on an outer surface, and is placed on an inner surface of the flexible substrate. And a semiconductor chip connected to each other.

更に、本発明の他態様の半導体装置は、Ｕ型状に折り曲げ可能であり、放熱孔が設けられるフレキシブル基板と、前記フレキシブル基板の内側面に載置され、前記フレキシブル基板と電気的に接続される半導体チップとを具備することを特徴とする。   Furthermore, a semiconductor device according to another aspect of the present invention can be bent into a U shape, is mounted on a flexible substrate provided with a heat dissipation hole, and an inner surface of the flexible substrate, and is electrically connected to the flexible substrate. And a semiconductor chip.

本発明によれば、放熱効率を向上することができる薄型の半導体装置を提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the thin semiconductor device which can improve heat dissipation efficiency can be provided.

本発明の実施例１に係る液晶表示装置を示す断面図。1 is a cross-sectional view illustrating a liquid crystal display device according to Embodiment 1 of the present invention. 本発明の実施例１に係る半導体装置としての液晶ドライバを示す拡大断面図。1 is an enlarged cross-sectional view showing a liquid crystal driver as a semiconductor device according to Embodiment 1 of the present invention. 本発明の実施例１に係る比較例のドライバ部を示す断面図。Sectional drawing which shows the driver part of the comparative example which concerns on Example 1 of this invention. 本発明の実施例２に係る半導体装置としての液晶ドライバを示す断面図。Sectional drawing which shows the liquid crystal driver as a semiconductor device which concerns on Example 2 of this invention. 本発明の実施例３に係る液晶表示装置を示す断面図。Sectional drawing which shows the liquid crystal display device which concerns on Example 3 of this invention. 図５の領域Ａの拡大断面図。The expanded sectional view of the area | region A of FIG. 本発明の実施例３に係る半導体装置としての液晶ドライバを示す拡大断面図。FIG. 6 is an enlarged cross-sectional view showing a liquid crystal driver as a semiconductor device according to Example 3 of the invention.

以下本発明の実施例について図面を参照しながら説明する。   Embodiments of the present invention will be described below with reference to the drawings.

まず、本発明の実施例１に係る半導体装置について、図面を参照して説明する。図１は液晶表示装置を示す断面図、図２は半導体装置としての液晶ドライバを示す拡大断面図、図３は比較例の液晶ドライバである。本実施例では、U型構造のフレキシブル基板の外側面に、液晶ドライバの放熱用として凹凸部を設けている。   First, a semiconductor device according to Embodiment 1 of the present invention will be described with reference to the drawings. 1 is a cross-sectional view showing a liquid crystal display device, FIG. 2 is an enlarged cross-sectional view showing a liquid crystal driver as a semiconductor device, and FIG. 3 is a liquid crystal driver of a comparative example. In this embodiment, an uneven portion is provided on the outer surface of the U-shaped flexible substrate for heat dissipation of the liquid crystal driver.

図１に示すように、液晶表示装置７０には、液晶ドライバ４０、フレキシブル基板２、外部回路基板３、液晶表示パネル４、バックライトユニット５、接着剤６ａ、接着剤６ｂ、及びソルダーレジスト９が設けられる。液晶表示装置７０は、例えばＬＣＤ（liquid crystal display）モニタに適用される。   As shown in FIG. 1, the liquid crystal display device 70 includes a liquid crystal driver 40, a flexible substrate 2, an external circuit substrate 3, a liquid crystal display panel 4, a backlight unit 5, an adhesive 6a, an adhesive 6b, and a solder resist 9. Provided. The liquid crystal display device 70 is applied to, for example, an LCD (liquid crystal display) monitor.

フレキシブル基板２は、樹脂と金属の２層構造からなる。具体的には、比較的厚さが厚いポリイミド樹脂１３と比較的厚さの薄いリード７ａ及び７ｂから構成される。リード７ａ及び７ｂは、Ｕ型に折り曲げられたフレキシブル基板２の内側面側に設けられる。フレキシブル基板２は、例えばキャスティング法で形成されたＣＯＦ方式のフレキシブル基板である。キャスティング法とは、Ｃｕ（銅）箔をポリイミド樹脂に貼り付けて、Ｃｕ（銅）箔を選択的にエッチングしてＣｕ（銅）箔パターンを形成するものである。   The flexible substrate 2 has a two-layer structure of resin and metal. Specifically, it is composed of a relatively thick polyimide resin 13 and relatively thin leads 7a and 7b. The leads 7a and 7b are provided on the inner surface side of the flexible substrate 2 bent into a U shape. The flexible substrate 2 is a COF type flexible substrate formed by, for example, a casting method. In the casting method, a Cu (copper) foil is attached to a polyimide resin, and the Cu (copper) foil is selectively etched to form a Cu (copper) foil pattern.

リード７ａは、一端が液晶ドライバ４０に接続され、他端が導電性の接着材６ａを介して外部回路基板３に電気的に接続される。外部回路基板３は、導電性の接着剤６によりフレキシブル基板２の図中下端部に固着され、液晶ドライバ４０に画像表示用に使用されるデジタル信号を送信する。   One end of the lead 7a is connected to the liquid crystal driver 40, and the other end is electrically connected to the external circuit board 3 via the conductive adhesive 6a. The external circuit board 3 is fixed to the lower end of the flexible board 2 in the figure by the conductive adhesive 6 and transmits a digital signal used for image display to the liquid crystal driver 40.

リード７ｂは、一端が液晶ドライバ４０に接続され、他端が導電性の接着材６ｂを介して液晶表示パネル４に電気的に接続される。液晶表示パネル４は、導電性の接着材６ｂによりフレキシブル基板２の図中上端部に固着され、液晶ドライバ４０から出力され、画像表示用に使用されるアナログ信号を受信する。   One end of the lead 7b is connected to the liquid crystal driver 40, and the other end is electrically connected to the liquid crystal display panel 4 via the conductive adhesive 6b. The liquid crystal display panel 4 is fixed to the upper end portion of the flexible substrate 2 in the figure by a conductive adhesive 6b, and is output from the liquid crystal driver 40 and receives an analog signal used for image display.

バックライトユニット５は、液晶表示パネル４の裏面側に、例えば図示しない光学シートを介して液晶表示パネル４に装着される。バックライトユニット５は、図示しない光拡散源、発光源、バックライトシャーシなどから構成される。Ｕ型に折り曲げられたフレキシブル基板２の内側面側のリード７ａ及び７ｂ上（接着剤６ａ及び６ｂが設けられていない領域）には、リード７ａ及び７ｂをカバーするソルダーレジスト９が設けられる。   The backlight unit 5 is attached to the liquid crystal display panel 4 via, for example, an optical sheet (not shown) on the back side of the liquid crystal display panel 4. The backlight unit 5 includes a light diffusion source, a light emission source, a backlight chassis, and the like (not shown). A solder resist 9 that covers the leads 7a and 7b is provided on the leads 7a and 7b on the inner surface side of the flexible substrate 2 bent into a U shape (a region where the adhesives 6a and 6b are not provided).

図２に示すように、液晶ドライバ４０では、フレキシブル基板２の内側面側（図中上側）に液晶ドライバチップ１がチップ端子１１ａ及び１１ｂを下側にして、フレキシブル基板２に実装される（フェースダウン実装）。液晶ドライバチップ１は、ソースドライバである。なお、ここではゲートドライバは、液晶表示パネル４内に設けられる。   As shown in FIG. 2, in the liquid crystal driver 40, the liquid crystal driver chip 1 is mounted on the flexible substrate 2 with the chip terminals 11a and 11b on the inner side (upper side in the drawing) of the flexible substrate 2 (face). Down implementation). The liquid crystal driver chip 1 is a source driver. Here, the gate driver is provided in the liquid crystal display panel 4.

液晶ドライバチップ１のチップ端子１１ａは、突起電極８ａを介してリード７ａに接続される。液晶ドライバチップ１のチップ端子１１ｂは、突起電極８ｂを介してリード７ｂに接続される。突起電極８ａ及び８ｂにはＡｕ（金）バンプが使用される。液晶ドライバチップ１の両側面及び底部には、アンダーフィル材としての樹脂１０が充填される。樹脂１０には、例えばエポキシ樹脂が用いられる。   The chip terminal 11a of the liquid crystal driver chip 1 is connected to the lead 7a through the protruding electrode 8a. The chip terminal 11b of the liquid crystal driver chip 1 is connected to the lead 7b through the protruding electrode 8b. Au (gold) bumps are used for the protruding electrodes 8a and 8b. Both sides and bottom of the liquid crystal driver chip 1 are filled with a resin 10 as an underfill material. For example, an epoxy resin is used as the resin 10.

フレキシブル基板２のポリイミド樹脂１３の外側面側（図中下側）には、凹凸部１２が設けられる。なお、凹凸部１２は、図１に示すフレキシブル基板２の外側面側（左部及び上部）にも設けられる。凹凸部１２は、例えばＣｕ（銅）箔を貼り付ける前のポリイミド樹脂１３に予め形成するのが好ましい。例えば、キャスティング法の前に。   On the outer surface side (lower side in the figure) of the polyimide resin 13 of the flexible substrate 2, an uneven portion 12 is provided. In addition, the uneven | corrugated | grooved part 12 is provided also in the outer surface side (left part and upper part) of the flexible substrate 2 shown in FIG. The concavo-convex portion 12 is preferably formed in advance on the polyimide resin 13 before the Cu (copper) foil is attached, for example. For example, before the casting method.

ポリイミド樹脂１３の外側面側に凹凸部１２を設けることにより、放熱面積を増加させることができ、ポリイミド樹脂１３の熱伝導率が比較的小さいにもかかわらず、液晶ドライバチップ１で発生する熱を迅速にフレキシブル基板２の外側面側に逃がすことができる。このため、フレキシブル基板２の外側面側の放熱効率を向上させることができる。   By providing the concavo-convex portion 12 on the outer surface side of the polyimide resin 13, the heat dissipation area can be increased, and the heat generated in the liquid crystal driver chip 1 is generated despite the relatively low thermal conductivity of the polyimide resin 13. It can quickly escape to the outer surface side of the flexible substrate 2. For this reason, the heat dissipation efficiency on the outer surface side of the flexible substrate 2 can be improved.

フレキシブル基板２がU型形状を有し、発熱源として液晶ドライバ４０、バックライトユニット５、及び液晶表示パネル４などがU型のフレキシブル基板２の上部の両側に配置されている。このため、フレキシブル基板２の内側面側（図中上側、液晶ドライバチップ１の裏面側）では、液晶ドライバチップ１のシリコンの熱伝導率（１５１Ｗ／ｍｋ）が比較的大きいにもかかわらず熱が籠もりやすい。したがって、フレキシブル基板２の内側面側は放熱効率が悪い。   The flexible substrate 2 has a U shape, and a liquid crystal driver 40, a backlight unit 5, a liquid crystal display panel 4, and the like are arranged on both sides of the upper portion of the U type flexible substrate 2 as heat sources. For this reason, on the inner surface side of the flexible substrate 2 (upper side in the drawing, the back surface side of the liquid crystal driver chip 1), heat is generated even though the silicon thermal conductivity (151 W / mk) of the liquid crystal driver chip 1 is relatively large. It's easy to be trapped. Therefore, the heat radiation efficiency is poor on the inner surface side of the flexible substrate 2.

図３に示すように、比較例の液晶ドライバ５０には、ポリイミド樹脂１３の外側面側は平坦であり、凹凸部１２が設けられていない。このため、放熱面積が小さく、液晶ドライバチップ１で発生する熱を迅速にフレキシブル基板２の外側面側に逃がすことができない。フレキシブル基板２の外側面側は、本実施例の液晶ドライバ４０と比べ放熱効率が悪い。   As shown in FIG. 3, in the liquid crystal driver 50 of the comparative example, the outer surface side of the polyimide resin 13 is flat and the uneven portion 12 is not provided. For this reason, the heat radiation area is small, and the heat generated in the liquid crystal driver chip 1 cannot be quickly released to the outer surface side of the flexible substrate 2. The outer surface side of the flexible substrate 2 has a lower heat dissipation efficiency than the liquid crystal driver 40 of the present embodiment.

なお、比較例の液晶ドライバ５０では、ポリイミド樹脂１３の外側面側が平坦である以外は本実施例の液晶ドライバ４０と同様な構造を有する。   The liquid crystal driver 50 of the comparative example has the same structure as the liquid crystal driver 40 of the present embodiment except that the outer surface side of the polyimide resin 13 is flat.

上述したように、本実施例の半導体装置では、液晶表示装置７０に、液晶ドライバ４０、フレキシブル基板２、外部回路基板３、液晶表示パネル４、バックライトユニット５、接着剤６ａ、接着剤６ｂ、及びソルダーレジスト９が設けられる。液晶ドライバ４０は、Ｕ型状に折り曲げられ、ポリイミド樹脂１３及びリードから構成され、外側面に凹凸部１２が設けられるフレキシブル基板２と、フレキシブル基板２の内側面に載置され、フレキシブル基板２のリードと突起電極を介して電気的に接続され、樹脂１０で側面及び底面が封止される液晶ドライバチップ１とを有する。凹凸部１２により、フレキシブル基板２の外側面側の表面積を大きくすることができる。   As described above, in the semiconductor device of this embodiment, the liquid crystal display device 70 includes the liquid crystal driver 40, the flexible substrate 2, the external circuit substrate 3, the liquid crystal display panel 4, the backlight unit 5, the adhesive 6a, the adhesive 6b, And a solder resist 9 is provided. The liquid crystal driver 40 is bent into a U shape, is composed of a polyimide resin 13 and a lead, and is provided on the inner side surface of the flexible substrate 2. The liquid crystal driver chip 1 is electrically connected via a lead and a protruding electrode, and the side surface and the bottom surface are sealed with a resin 10. The surface area on the outer surface side of the flexible substrate 2 can be increased by the uneven portion 12.

このため、液晶ドライバチップ１で発生する熱を迅速にフレキシブル基板２の外側面側に逃がすことができる。したがって、液晶ドライバ４０の放熱効率を向上させることができる。   For this reason, the heat generated in the liquid crystal driver chip 1 can be quickly released to the outer surface side of the flexible substrate 2. Therefore, the heat dissipation efficiency of the liquid crystal driver 40 can be improved.

なお、本実施例では、キャスティング法で形成されたＣＯＦ方式のフレキシブル基板を用いているが、代わりにメッキ・蒸着・スパッタ法、或いはラミネート法などを用いてＣＯＦ方式のフレキシブル基板を形成してもよい。液晶表示装置７０は、ＬＣＤ（liquid crystal display）モニタに適用しているがＬＣＤ−ＴＶ、携帯電話用表示装置、ＰＤＡ用表示装置、カムデコーダ用表示装置などにも適用することができる。また、折り曲げられたフレキシブル基板２の外側面に凹凸部１２を設けているが、更に折り曲げられたフレキシブル基板２の内側面にも設けてもよい。その場合、リード７ａ及び７ｂが設けられていない領域に設けるのが好ましい。   In this embodiment, a COF type flexible substrate formed by a casting method is used. Alternatively, a COF type flexible substrate may be formed by using a plating / vapor deposition / sputtering method or a laminating method. Good. The liquid crystal display device 70 is applied to an LCD (liquid crystal display) monitor, but can also be applied to an LCD-TV, a mobile phone display device, a PDA display device, a cam decoder display device, and the like. Moreover, although the uneven | corrugated | grooved part 12 is provided in the outer surface of the bent flexible substrate 2, you may provide in the inner surface of the bent flexible substrate 2 further. In that case, it is preferable to provide in the region where the leads 7a and 7b are not provided.

次に、本発明の実施例２に係る半導体装置について、図面を参照して説明する。図４は半導体装置としての液晶ドライバを示す断面図である。本実施例では、液晶ドライバの放熱用としてフレキシブル基板に凹凸部を設け、凹部を覆うように放熱材を設けている。   Next, a semiconductor device according to Embodiment 2 of the present invention will be described with reference to the drawings. FIG. 4 is a cross-sectional view showing a liquid crystal driver as a semiconductor device. In this embodiment, an uneven portion is provided on the flexible substrate for heat dissipation of the liquid crystal driver, and a heat dissipating material is provided so as to cover the recess.

以下、実施例１と同一構成部分には、同一符号を付してその部分の説明を省略し、異なる部分のみ説明する。   In the following, the same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted, and only different portions are described.

図４に示すように、液晶表示装置に使用される液晶ドライバ４１では、フレキシブル基板２の内側面側（図中上側）に液晶ドライバチップ１がチップ端子１１ａ及び１１ｂを下側にして、フレキシブル基板２に実装される（フェースダウン実装）。フレキシブル基板２のポリイミド樹脂１３の外側面側（図中下側）には、凹凸部１２ａが設けられる。凹凸部１２ａ上には、凹部２１を覆うように放熱材２２が設けられる。凹凸部１２ａ及び放熱材２２は、液晶ドライバチップ１が載置されていないフレキシブル基板２の外側面側（左部及び上部）にも設けられる。   As shown in FIG. 4, in the liquid crystal driver 41 used in the liquid crystal display device, the liquid crystal driver chip 1 is placed on the inner surface side (upper side in the drawing) of the flexible substrate 2 with the chip terminals 11a and 11b on the lower side. 2 (face-down mounting). On the outer surface side (lower side in the figure) of the polyimide resin 13 of the flexible substrate 2, an uneven portion 12 a is provided. On the concavo-convex portion 12 a, a heat dissipation material 22 is provided so as to cover the concave portion 21. The uneven portion 12a and the heat dissipation material 22 are also provided on the outer surface side (left and upper portions) of the flexible substrate 2 on which the liquid crystal driver chip 1 is not placed.

ここで、放熱材２２には、ポリイミド樹脂１３よりも熱伝導率が大きな絶縁物質を用いるのが好ましい。放熱材２２には、熱伝導率が１７０〜２００（Ｗ／ｍｋ）のＡＬＮ（窒化アルミニウム）を用いているが、代わりに熱伝導率が５５〜１５０（Ｗ／ｍｋ）のＳｉＣ（炭化シリコン）、熱伝導率が２０〜１５０（Ｗ／ｍｋ）のＳｉ３Ｎ４（窒化シリコン）、熱伝導率が５０〜６０（Ｗ／ｍｋ）のＢＮ（窒化ホウ素）、或いは熱伝導率が２９〜３６（Ｗ／ｍｋ）のＡＬ２Ｏ３（アルミナ）などを用いてもよい。 Here, it is preferable to use an insulating material having a higher thermal conductivity than the polyimide resin 13 for the heat dissipation material 22. The heat radiating material 22 uses ALN (aluminum nitride) having a thermal conductivity of 170 to 200 (W / mk), but instead SiC (silicon carbide) having a thermal conductivity of 55 to 150 (W / mk). , Si 3 N 4 (silicon nitride) having a thermal conductivity of 20 to 150 (W / mk), BN (boron nitride) having a thermal conductivity of 50 to 60 (W / mk), or a thermal conductivity of 29 to 36 (W / mk) AL 2 O 3 (alumina) or the like may be used.

放熱材２２のフレキシブル基板２の外側面側への装着方法としては、例えば絶縁物質であるＡＬＮ（窒化アルミニウム）を焼結形成し、ポリイミド樹脂１３の外側面側の凹凸部１２ａに貼り付けるのが好ましい。   As a method of mounting the heat radiating material 22 on the outer surface side of the flexible substrate 2, for example, an insulating material ALN (aluminum nitride) is sintered and pasted on the uneven portion 12 a on the outer surface side of the polyimide resin 13. preferable.

放熱材２２を設けることにより、液晶ドライバチップ１で発生する熱を迅速にフレキシブル基板２の外側面側に逃がすことができる。このため、フレキシブル基板２の放熱効率が向上する。   By providing the heat dissipating material 22, the heat generated in the liquid crystal driver chip 1 can be quickly released to the outer surface side of the flexible substrate 2. For this reason, the heat dissipation efficiency of the flexible substrate 2 is improved.

上述したように、本実施例の半導体装置では、Ｕ型状に折り曲げられ、ポリイミド樹脂１３及びリードから構成され、外側面に凹凸部１２ａが設けられるフレキシブル基板２と、凹凸部１２ａ上には、凹部２１を覆うように設けられる放熱材２２と、フレキシブル基板２の内側面に載置され、フレキシブル基板２のリードと突起電極を介して電気的に接続され、樹脂１０で側面及び底面が封止される液晶ドライバチップ１とを有する。   As described above, in the semiconductor device of the present embodiment, the flexible substrate 2 that is bent into a U shape, is composed of the polyimide resin 13 and the leads, and has the uneven portion 12a on the outer surface, and the uneven portion 12a, The heat radiating material 22 provided so as to cover the recess 21 is placed on the inner side surface of the flexible substrate 2 and is electrically connected via the lead and the protruding electrode of the flexible substrate 2, and the side surface and the bottom surface are sealed with the resin 10. Liquid crystal driver chip 1.

このため、液晶ドライバチップ１で発生する熱を迅速にフレキシブル基板２の外側面側に逃がすことができる。したがって、液晶ドライバ４１の放熱効率を向上させることができる。   For this reason, the heat generated in the liquid crystal driver chip 1 can be quickly released to the outer surface side of the flexible substrate 2. Therefore, the heat dissipation efficiency of the liquid crystal driver 41 can be improved.

なお、本実施例では、凹部２１を折り曲げられたフレキシブル基板２の外側面に設けているが、更に折り曲げられたフレキシブル基板２の内側面にも設けてもよい。その場合、リード７ａ及び７ｂが設けられていない領域に設けるのが好ましい。   In this embodiment, the concave portion 21 is provided on the outer side surface of the folded flexible substrate 2, but may be provided on the inner side surface of the bent flexible substrate 2 as well. In that case, it is preferable to provide in the region where the leads 7a and 7b are not provided.

次に、本発明の実施例３に係る半導体装置について、図面を参照して説明する。図５は液晶表示装置を示す断面図、図６は図５の領域Ａの拡大断面図、図７は半導体装置としての液晶ドライバを示す拡大断面図である。本実施例では、液晶ドライバの放熱用としてフレキシブル基板に放熱孔を設けている。   Next, a semiconductor device according to Embodiment 3 of the present invention will be described with reference to the drawings. 5 is a cross-sectional view showing a liquid crystal display device, FIG. 6 is an enlarged cross-sectional view of a region A in FIG. 5, and FIG. 7 is an enlarged cross-sectional view showing a liquid crystal driver as a semiconductor device. In this embodiment, a heat dissipation hole is provided in the flexible substrate for heat dissipation of the liquid crystal driver.

図５に示すように、液晶表示装置７１には、液晶ドライバ４２、フレキシブル基板２、外部回路基板３、液晶表示パネル４、及びバックライトユニット５が設けられる。液晶表示装置７１は、例えばＬＣＤ（liquid crystal display）モニタに適用される。なお、図５はフレキシブル基板２の内側面のリードが設けられていない部分の断面図である。   As shown in FIG. 5, the liquid crystal display device 71 includes a liquid crystal driver 42, a flexible substrate 2, an external circuit substrate 3, a liquid crystal display panel 4, and a backlight unit 5. The liquid crystal display device 71 is applied to, for example, an LCD (liquid crystal display) monitor. 5 is a cross-sectional view of a portion where the leads on the inner surface of the flexible substrate 2 are not provided.

図６に示すように、Ｕ型形状を有し、リードが設けられていない部分のフレキシブル基板２の底部（図５の左端部）には、互いに離間する複数の放熱孔３１がポリイミド樹脂１３に設けられる。放熱孔３１は、液晶ドライバチップ１、バックライトユニット５、液晶表示パネル４などにより、Ｕ型のフレキシブル基板２の内側面側で発生し、閉じ込められ籠もった熱をＵ型のフレキシブル基板２の外側面側に放熱する役目をする。   As shown in FIG. 6, a plurality of heat radiation holes 31 that are spaced apart from each other are formed in the polyimide resin 13 at the bottom portion (left end portion in FIG. 5) of the flexible substrate 2 that has a U shape and is not provided with a lead. Provided. The heat radiating holes 31 are generated on the inner surface side of the U-shaped flexible substrate 2 by the liquid crystal driver chip 1, the backlight unit 5, the liquid crystal display panel 4, and the like, and trapped heat is trapped in the U-shaped flexible substrate 2. It serves to dissipate heat to the outer side.

図７に示すように、液晶ドライバ４２では、液晶ドライバチップ１が載置され、互いに離間する複数の放熱孔３１が樹脂１０で封止されている領域を除く部分のポリイミド樹脂１３に設けられる。放熱孔３１は、液晶ドライバチップ１、バックライトユニット５、液晶表示パネル４などにより、Ｕ型のフレキシブル基板２の内側面側で発生し、閉じ込められ籠もった熱をＵ型のフレキシブル基板２の外側面側に放熱する役目をする。   As shown in FIG. 7, in the liquid crystal driver 42, the liquid crystal driver chip 1 is placed, and a plurality of heat radiation holes 31 that are separated from each other are provided in a portion of the polyimide resin 13 excluding a region sealed with the resin 10. The heat radiating holes 31 are generated on the inner surface side of the U-shaped flexible substrate 2 by the liquid crystal driver chip 1, the backlight unit 5, the liquid crystal display panel 4, and the like, and trapped heat is trapped in the U-shaped flexible substrate 2. It serves to dissipate heat to the outer side.

上述したように、本実施例の半導体装置では、液晶表示装置７１に、液晶ドライバ４２、フレキシブル基板２、外部回路基板３、液晶表示パネル４、及びバックライトユニット５が設けられる。液晶ドライバ４２は、Ｕ型状に折り曲げられ、ポリイミド樹脂１３及びリードから構成されるフレキシブル基板２と、フレキシブル基板２の内側面に載置され、フレキシブル基板２のリードと突起電極を介して電気的に接続され、樹脂１０で側面及び底面が封止される液晶ドライバチップ１と、フレキシブル基板２の液晶ドライバチップ１が載置される領域を除く部分のポリイミド樹脂１３に互いに離間形成される放熱孔３１とを有する。   As described above, in the semiconductor device of this embodiment, the liquid crystal display device 71 is provided with the liquid crystal driver 42, the flexible substrate 2, the external circuit substrate 3, the liquid crystal display panel 4, and the backlight unit 5. The liquid crystal driver 42 is bent in a U shape, is placed on the flexible substrate 2 composed of the polyimide resin 13 and the leads, and the inner surface of the flexible substrate 2, and is electrically connected via the leads of the flexible substrate 2 and the protruding electrodes. The liquid crystal driver chip 1 whose side and bottom surfaces are sealed with a resin 10 and the polyimide resin 13 in a portion excluding the region where the liquid crystal driver chip 1 of the flexible substrate 2 is placed are spaced apart from each other. 31.

このため、液晶ドライバチップ１で発生する熱を迅速にフレキシブル基板２の外側面側に逃がすことができる。したがって、液晶ドライバ４２の放熱効率を向上させることができる。   For this reason, the heat generated in the liquid crystal driver chip 1 can be quickly released to the outer surface side of the flexible substrate 2. Therefore, the heat dissipation efficiency of the liquid crystal driver 42 can be improved.

本発明は、上記実施例に限定されるものではなく、発明の趣旨を逸脱しない範囲で、種々、変更してもよい。   The present invention is not limited to the above-described embodiments, and various modifications may be made without departing from the spirit of the invention.

実施例では、ＣＯＦ方式を用いているが、ＴＡＢ（tape automated bonding）方式を用いてもよい。ＴＡＢ方式では折り曲げ性及びＩＬＢピッチがＣＯＦ方式よりも若干劣るが、ＴＡＢ方式でもドライバチップ起因の放熱性を改善できる。実施例３では、フレキシブル基板２に放熱孔３１を設けているが、放熱孔３１に熱伝導率の大きな放熱材を埋め込んでもよい。   In the embodiment, the COF method is used, but a TAB (tape automated bonding) method may be used. In the TAB method, the bendability and the ILB pitch are slightly inferior to those in the COF method. However, even with the TAB method, the heat dissipation due to the driver chip can be improved. In the third embodiment, the heat dissipation holes 31 are provided in the flexible substrate 2, but a heat dissipation material having a large thermal conductivity may be embedded in the heat dissipation holes 31.

本発明は、以下の付記に記載されているような構成が考えられる。
（付記１） Ｕ型状に折り曲げ可能であり、放熱孔が設けられるフレキシブル基板と、前記フレキシブル基板の内側面に載置され、突起電極を介して前記フレキシブル基板と電気的に接続される半導体チップとを具備することを特徴とする半導体装置。 The present invention can be configured as described in the following supplementary notes.
(Supplementary Note 1) A flexible substrate that can be bent into a U-shape and provided with a heat dissipation hole, and a semiconductor chip that is placed on the inner surface of the flexible substrate and electrically connected to the flexible substrate via a protruding electrode A semiconductor device comprising:

（付記２） 前記放熱孔には、放熱材が埋め込まれている付記１に記載の半導体装置。 (Supplementary note 2) The semiconductor device according to supplementary note 1, wherein a heat dissipation material is embedded in the heat dissipation hole.

１ 液晶ドライバチップ
２ フレキシブル基板
３ 外部回路基板
４ 液晶表示パネル
５ バックライトユニット
６ａ、６ｂ 接着剤
７ａ、７ｂ リード
８ａ、８ｂ 突起電極
９ ソルダーレジスト
１０ 樹脂
１１ａ、１１ｂ チップ端子
１２、１２ａ 凹凸部
１３ ポリイミド樹脂
２１ 凹部
２２ 放熱材
３１ 放熱孔
４０、４１、４２、５０ 液晶ドライバ
７０、７１ 液晶表示装置 DESCRIPTION OF SYMBOLS 1 Liquid crystal driver chip 2 Flexible board 3 External circuit board 4 Liquid crystal display panel 5 Backlight unit 6a, 6b Adhesive 7a, 7b Lead 8a, 8b Protrusion electrode 9 Solder resist 10 Resin 11a, 11b Chip terminal 12, 12a Uneven part 13 Polyimide Resin 21 Recess 22 Heat radiating material 31 Heat radiating holes 40, 41, 42, 50 Liquid crystal driver 70, 71 Liquid crystal display device

Claims (5)

Ｕ型状に折り曲げ可能であり、外側面に放熱用の凹凸部が設けられるフレキシブル基板と、
前記フレキシブル基板の内側面に載置され、前記フレキシブル基板と電気的に接続される半導体チップと、
を具備することを特徴とする半導体装置。 A flexible substrate that can be bent into a U-shape, and has an uneven surface for heat dissipation on the outer surface;
A semiconductor chip mounted on the inner surface of the flexible substrate and electrically connected to the flexible substrate;
A semiconductor device comprising: 前記フレキシブル基板の内側面に凹凸部が設けられる請求項１に記載の半導体装置。   The semiconductor device according to claim 1, wherein an uneven portion is provided on an inner surface of the flexible substrate. 前記凹凸部上に設けられる放熱材を具備することを特徴とする請求項１又は２に記載の半導体装置。   The semiconductor device according to claim 1, further comprising a heat dissipating material provided on the uneven portion. 前記放熱材は、ＡＬＮ（窒化アルミニウム）、ＳｉＣ（炭化シリコン）、Ｓｉ３Ｎ４（窒化シリコン）、ＢＮ（窒化ホウ素）、或いはＡＬ２Ｏ３（アルミナ）であることを特徴とする請求項３に記載の半導体装置。 4. The heat radiation material is ALN (aluminum nitride), SiC (silicon carbide), Si 3 N 4 (silicon nitride), BN (boron nitride), or AL 2 O 3 (alumina). A semiconductor device according to 1. Ｕ型状に折り曲げ可能であり、放熱孔が設けられるフレキシブル基板と、
前記フレキシブル基板の内側面に載置され、前記フレキシブル基板と電気的に接続される半導体チップと、
を具備することを特徴とする半導体装置。 A flexible board that can be bent into a U-shape and provided with heat dissipation holes;
A semiconductor chip mounted on the inner surface of the flexible substrate and electrically connected to the flexible substrate;
A semiconductor device comprising:
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013211523A (en) * 2012-03-02 2013-10-10 Canon Components Inc Flexible circuit board
JP2014013940A (en) * 2012-03-02 2014-01-23 Canon Components Inc Flexible circuit board
US20140333175A1 (en) * 2012-02-14 2014-11-13 Murata Manufacturing Co., Ltd. Electronic component element and composite module including the same

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9756733B2 (en) 2011-10-04 2017-09-05 Apple Inc. Display and multi-layer printed circuit board with shared flexible substrate
US20140266935A1 (en) * 2013-03-15 2014-09-18 Senseonics, Incorporated Mini flat antenna system
CN103894516B (en) * 2014-04-14 2015-11-25 福建闽光电机制造有限公司 A kind of curved line frame for movement of enamel-covered wire
CN109087934A (en) * 2018-07-26 2018-12-25 武汉华星光电半导体显示技术有限公司 A kind of COF structure and OLED display panel

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04305946A (en) * 1991-04-02 1992-10-28 Sumitomo Electric Ind Ltd Film carrier board
JP2006135247A (en) * 2004-11-09 2006-05-25 Sharp Corp Semiconductor device
JP2008270453A (en) * 2007-04-19 2008-11-06 Nec Electronics Corp Semiconductor device and method of manufacturing the same

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB961161A (en) * 1959-07-13 1964-06-17 Minnesota Mining & Mfg Improvements in semiconductor devices
US3373318A (en) * 1965-06-25 1968-03-12 North American Aviation Inc Electrical component mounting including thermal coupling and electrical isolating means
US4603374A (en) * 1984-07-03 1986-07-29 Motorola, Inc. Packaging module for a semiconductor wafer
US5397916A (en) * 1991-12-10 1995-03-14 Normington; Peter J. C. Semiconductor device including stacked die
US5315154A (en) * 1993-05-14 1994-05-24 Hughes Aircraft Company Electronic assembly including heat absorbing material for limiting temperature through isothermal solid-solid phase transition
US5497027A (en) * 1993-11-30 1996-03-05 At&T Global Information Solutions Company Multi-chip module packaging system
US6541852B2 (en) * 1994-07-07 2003-04-01 Tessera, Inc. Framed sheets
US5895973A (en) * 1997-05-19 1999-04-20 Delco Electronics Corp. Electronic component assembly for maintaining component alignment during soldering
JP4058607B2 (en) * 1999-08-19 2008-03-12 セイコーエプソン株式会社 WIRING BOARD AND ITS MANUFACTURING METHOD, ELECTRONIC COMPONENT, CIRCUIT BOARD AND ELECTRONIC DEVICE
CN1230046C (en) * 1999-10-01 2005-11-30 精工爱普生株式会社 Wiring board, semiconductor device and method of producing, testing and packaging the same, and circuit board and electronic equipment
JP2001203319A (en) * 2000-01-18 2001-07-27 Sony Corp Laminated semiconductor device
TW521555B (en) * 2000-08-25 2003-02-21 Hitachi Aic Inc Electronic device sealing electronic element therein and manufacturing method thereof, and printed wiring board suitable for such electronic device
US6940729B2 (en) * 2001-10-26 2005-09-06 Staktek Group L.P. Integrated circuit stacking system and method
JP3560599B2 (en) * 2002-04-26 2004-09-02 松下電器産業株式会社 Electronic circuit device
US7112472B2 (en) * 2003-06-25 2006-09-26 Intel Corporation Methods of fabricating a composite carbon nanotube thermal interface device
US6992376B2 (en) * 2003-07-17 2006-01-31 Intel Corporation Electronic package having a folded package substrate
KR100699823B1 (en) * 2003-08-05 2007-03-27 삼성전자주식회사 Low cost type flexible film package module and method for fabricating thereof
US7286359B2 (en) * 2004-05-11 2007-10-23 The U.S. Government As Represented By The National Security Agency Use of thermally conductive vias to extract heat from microelectronic chips and method of manufacturing
JP3994989B2 (en) * 2004-06-14 2007-10-24 セイコーエプソン株式会社 Semiconductor device, circuit board, electro-optical device, and electronic apparatus
JP4285339B2 (en) * 2004-06-15 2009-06-24 パナソニック株式会社 Circuit module and method of manufacturing circuit module
US7105918B2 (en) * 2004-07-29 2006-09-12 Micron Technology, Inc. Interposer with flexible solder pad elements and methods of manufacturing the same
US7790504B2 (en) * 2006-03-10 2010-09-07 Stats Chippac Ltd. Integrated circuit package system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04305946A (en) * 1991-04-02 1992-10-28 Sumitomo Electric Ind Ltd Film carrier board
JP2006135247A (en) * 2004-11-09 2006-05-25 Sharp Corp Semiconductor device
JP2008270453A (en) * 2007-04-19 2008-11-06 Nec Electronics Corp Semiconductor device and method of manufacturing the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140333175A1 (en) * 2012-02-14 2014-11-13 Murata Manufacturing Co., Ltd. Electronic component element and composite module including the same
US9941461B2 (en) * 2012-02-14 2018-04-10 Murata Manufacturing Co., Ltd. Electronic component element and composite module including the same
JP2013211523A (en) * 2012-03-02 2013-10-10 Canon Components Inc Flexible circuit board
JP2014013940A (en) * 2012-03-02 2014-01-23 Canon Components Inc Flexible circuit board
JP2015046625A (en) * 2012-03-02 2015-03-12 キヤノン・コンポーネンツ株式会社 Flexible circuit board
US9119302B2 (en) 2012-03-02 2015-08-25 Canon Components, Inc. Flexible circuit board

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