JP2010181312A - Angular velocity sensor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an angular velocity sensor that can be reduced in size by fining a semiconductor process. <P>SOLUTION: The angular velocity sensor includes: a ΣΔ type A/D converter 66 for converting analog signals output from a first sense electrode 34 and a second one 35 to digital signals; a correction computation means 71 for correcting output signals from the ΣΔ type A/D converter 66; and further a ΣΔ type D/A converter 75 provided at the rear stage of the correction computation means 71. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention particularly relates to an angular velocity sensor used for attitude control of a moving body such as an aircraft or a vehicle, a navigation system, or the like.

  A conventional angular velocity sensor of this type will be described with reference to the drawings.

  FIG. 4 is a block diagram showing a conventional angular velocity sensor. In FIG. 4, reference numeral 1 denotes a sensor element, and the sensor element 1 includes a sense electrode 2 and a monitor electrode 3. Reference numeral 4 denotes a drive circuit. The drive circuit 4 includes a current amplifier 5 for inputting the charge of the monitor electrode 3 in the sensor element 1, a bandpass filter 6 for inputting an output signal of the current amplifier 5, and the bandpass filter 6 , A smoothing circuit 8 for inputting the output signal of the rectifier 7, an output signal of the smoothing circuit 8, and amplifying or attenuating the output signal of the bandpass filter 6 in the drive circuit 4. The AGC circuit 9 is an analog circuit composed of an AGC circuit 9 to be input and a drive circuit 10 for inputting an output signal of the AGC circuit 9 and outputting a drive signal to the sensor element 1. Reference numeral 11 denotes a sense circuit. The sense circuit 11 converts a signal output from the sense electrode 2 in the sensor element 1 into an angular velocity output signal.

As prior art document information relating to the invention of this application, for example, Patent Document 1 is known.
JP-A-7-181042

  However, in the conventional configuration described above, all of the current amplifier 5, the band pass filter 6, the AGC circuit 9, and the drive circuit 10 in the drive circuit 4 are configured by analog circuits. Had the problem of being difficult.

  SUMMARY OF THE INVENTION An object of the present invention is to solve the above-described conventional problems and to provide an angular velocity sensor that can be miniaturized by miniaturization of a semiconductor process.

  In order to achieve the above object, the present invention has the following configuration.

  According to a first aspect of the present invention, there is provided a sensor element having a drive electrode, a sense electrode, and a monitor electrode, a drive circuit for driving the sensor element at a predetermined drive frequency, and an analog signal output from the sense electrode. A AD converter for converting the signal into a digital signal and a correction calculation means for correcting the output signal from the AD converter, and a DA converter is provided after the correction calculation means. According to the present invention, the AD converter that converts the analog signal output from the sense electrode of the sensor element into a digital signal, the correction calculation means that corrects the output signal from the AD converter, and the subsequent stage of the correction calculation means are further provided. Since the D / A converter is provided, all sense circuits are composed of digital circuits, thereby miniaturizing semiconductor processes. Possible, and therefore, those having a effect that it is possible to easily reduce the size of the angular velocity sensor.

According to the second aspect of the present invention, in particular, the AD converter includes an input switching unit that switches at least two input signals, a DA conversion unit that outputs charge amounts of at least two levels, and the input switching unit. Integrating means for integrating the charges output from the DA converting means and holding at least two integral values thereof, comparing means for comparing at least two integral values outputted from the integrating means with a predetermined value, and ΣΔ AD conversion comprising DA switching means for switching the output of the DA conversion means in accordance with at least two outputs of the comparison means, and difference calculation means for calculating the difference between at least two comparison signals output from the comparison means It is composed of a vessel,
According to this configuration, since the difference calculation means for calculating the difference between at least two comparison signals output from the comparison means is provided as the calculation means, the input switching means due to the influence of the power supply voltage change or the temperature change, The output signals from the DA conversion means, the integration means, the comparison means, and the DA switching means are similarly applied to at least two input signals to the calculation means, so that at least 2 by the difference calculation means included in the calculation means. By calculating the difference between the signal processing results of the two input signals, the effect of canceling the influence of the reference voltage fluctuation or the like in the output signal from the input switching means, DA conversion means, integration means, comparison means, and DA switching means can be achieved. It is what you have.

  The invention according to claim 3 of the present invention is, in particular, that the DA converter is configured by a ΣΔ DA converter, and according to this configuration, both the AD converter and the DA converter are configured by a ΣΔ type. Therefore, when the AD converter and the DA converter are made into an IC composed of one chip, there is an effect that the size can be further reduced.

  The invention according to claim 4 of the present invention is particularly configured so that an SPI bus is provided in parallel with the DA converter after the correction calculation means, and an output signal composed of a digital signal is output to the outside by this SPI bus. Therefore, according to this configuration, an SPI bus is provided in parallel with the DA converter at the subsequent stage of the correction calculation means, and an output signal composed of a digital signal is output to the outside through this SPI bus. It has the effect of being able to output angular velocity information of both signals and digital signals.

  According to the fifth aspect of the present invention, in particular, a temperature sensor is provided, a switch is provided between the correction calculation means and the DA converter, an output signal from the temperature sensor is input to the switch, and an SPI bus is provided. The temperature information is output from the DA converter according to the command from the controller. According to this configuration, the output signal from the temperature sensor is input to the switch, and the DA converter receives the command from the SPI bus. Since it is configured to output temperature information, it has an operational effect that it can be output while selecting either angular velocity information or temperature information from the DA converter.

  As described above, the angular velocity sensor of the present invention includes a sensor element having a drive electrode, a sense electrode, and a monitor electrode, a drive circuit for driving the sensor element at a predetermined drive frequency, and an analog signal output from the sense electrode. Since the AD converter for converting into a digital signal and the correction calculation means for correcting the output signal from the AD converter are provided, and the DA converter is provided in the subsequent stage of the correction calculation means, all of the sense circuits are provided. Since this is constituted by a digital circuit, the semiconductor process can be miniaturized, so that it has an excellent effect that it can be easily downsized.

(Embodiment 1)
Hereinafter, the first and second aspects of the present invention will be described with reference to the drawings.

  FIG. 1 is a circuit diagram of an angular velocity sensor using a ΣΔ AD converter according to Embodiment 1 of the present invention.

  In FIG. 1, reference numeral 30 denotes a sensor element. The sensor element 30 includes a vibrating body 31, a drive electrode 32 having a piezoelectric body for vibrating the vibrating body 31, and a piezoelectric body that generates an electric charge according to the vibration state. And a pair of sense electrodes having a piezoelectric body that generates an electric charge when an angular velocity is applied to the sensor element 30. Further, the pair of sense electrodes in the sensor element 30 includes a first sense electrode 34 and a second sense electrode 35 that generates charges having a polarity opposite to that of the first sense electrode 34. Reference numeral 36 denotes a charge amplifier. The charge amplifier 36 receives charges output from the monitor electrode 33 of the sensor element 30, and converts the input charges into a voltage at a predetermined magnification. Reference numeral 37 denotes a band pass filter. The output of the charge amplifier 36 is input to the band pass filter 37, and a noise component of the input signal is removed to output a monitor signal. An AGC circuit 38 has a half-wave rectifying / smoothing circuit (not shown). The AGC circuit 38 generates a smoothed DC signal by half-wave rectifying the output signal of the bandpass filter 37. Based on this DC signal, the monitor signal output from the band-pass filter 37 is amplified or attenuated and output. Reference numeral 39 denotes a drive circuit. The output of the AGC circuit 38 is input to the drive circuit 39, and a drive signal is output to the drive electrode 32 of the sensor element 30. The charge amplifier 36, the band pass filter 37, the AGC circuit 38, and the drive circuit 39 constitute a drive circuit 40.

  The PLL circuit 41 multiplies the monitor signal output from the bandpass filter 37 in the drive circuit 40, and integrates and reduces the phase noise in time to output it. Reference numeral 42 denotes a timing generation circuit. The timing generation circuit 42 is based on a signal obtained by multiplying the monitor signal output from the PLL circuit 41, and the first timing Φ1 and the second timing Φ2 for two periods of the monitor signal. The timing signal is divided into a third timing Φ3 and a fourth timing Φ4, and is output. The PLL circuit 41 and the timing generation circuit 42 constitute a timing control circuit 43. Reference numeral 44 denotes input switching means. The input switching means 44 is connected to the first sense electrode 34 in the sensor element 30 and operates at the second timing Φ2, and is referred to as SW. The analog switch 46 is connected to the sense electrode 35 and operates at the fourth timing Φ4. With this configuration, the input switching unit 44 switches and outputs the input signal from the first sense electrode 34 or the second sense electrode 35 at the second timing Φ2 or the fourth timing Φ4. Reference numeral 47 denotes a DA switching means. The DA switching means 47 has a first reference voltage 49 and a second reference voltage 50, and the first reference voltage 49 and the second reference voltage 50 are set to a predetermined signal. The signal of the first reference voltage 49 is output at the second timing Φ2, while the signal of the second reference voltage 50 is output at the fourth timing Φ4. Reference numeral 51 denotes DA output means. The DA output means 51 is connected to the capacitor 52 to which the output signal of the DA switching means 47 is input, and to both ends of the capacitor 52, and the first timing Φ1 and the third timing. It is composed of SWs 53 and 54 that operate at Φ3 and discharge the electric charge of the capacitor 52. The DA switching unit 47 and the DA output unit 51 constitute a DA conversion unit 48. The DA conversion unit 48 discharges the electric charge of the capacitor 52 at the first timing Φ1 and the third timing Φ3. Further, charges corresponding to the reference voltage output by the DA switching means 47 are input / output at the second timing Φ2 and the fourth timing Φ4.

  55 is a switch, and the switch 55 receives the outputs of the input switching means 44 and the DA conversion means 48 and outputs them at the second timing Φ2 and the fourth timing Φ4. Reference numeral 56 denotes an integrating circuit to which the output of the switch 55 is input. The operational amplifier 57, a pair of capacitors 58 and 59 connected in parallel to the feedback of the operational amplifier 57, It is composed of a pair of switches 60 and 61 connected to capacitors 58 and 59. Further, the switch 60 operates at the first timing Φ1 and the second timing Φ2, and the input signal to the integration circuit 56 is integrated into the capacitor 58 and the integrated value is held. In addition, the switch 61 operates at the third timing Φ3 and the fourth timing Φ4, and the input signal to the integrating circuit 56 is integrated into the capacitor 59 to hold the integrated value. The switch 55 and the integrating circuit 56 constitute an integrating means 62, and the integrating means 62 integrates the output of the switch 55 into the capacitor 58 at the first timing Φ1 and the second timing Φ2. In addition to outputting an integral value, the output of the switch 55 is integrated into the capacitor 59 at the third timing Φ3 and the fourth timing Φ4, and the integral value is output.

  63 is a comparison means. The comparison means 63 receives the integration signal output from the integration means 62, and compares the integration signal with a predetermined value. Comparing means 63 is constituted by a D-type flip-flop 65 to which a bit digital signal is inputted. The D-type flip-flop 65 latches the 1-bit digital signal and outputs a latch signal at the start of the second timing Φ2 and the fourth timing Φ4. The reference voltage 49, 50 is input to the DA switching means 47 of the means 48 and switched. The input switching means 44, DA converting means 48, integrating means 62, and comparing means 63 constitute a ΣΔ AD converter 66. Further, the ΣΔ AD converter 66 is configured to ΣΔ modulate the electric charges output from the pair of sense electrodes 34 and 35 in the sensor element 30 and convert it into a 1-bit digital signal and output it.

  A latch circuit 67 receives a 1-bit digital signal output from the comparator 64 in the comparison means 63 of the ΣΔ AD converter 66 and latches the 1-bit digital signal. A latch circuit 67 is constituted by the type flip-flops 68 and 69. The D-type flip-flop 68 latches the 1-bit digital signal at the second timing Φ2, and the D-type flip-flop 69 latches the 1-bit digital signal at the fourth timing Φ4. Reference numeral 70 denotes difference calculation means. The difference calculation means 70 receives a pair of 1-bit digital signals latched and output by the pair of D-type flip-flops 68 and 69 in the latch circuit 67. A 1-bit difference operation for calculating the difference between the pair of 1-bit digital signals is realized by a replacement process. That is, when the pair of 1-bit digital signals input to the difference calculation means 70 are “00”, “01”, “10”, and “11”, they are replaced with “0”, “−1”, “1”, and “0”, respectively. Output.

  Reference numeral 71 denotes a correction calculation means. The correction calculation means 71 receives a 1-bit difference signal output from the difference calculation means 70, and realizes a correction calculation between the 1-bit difference signal and predetermined correction information by replacement processing. Is. That is, as described above, the 1-bit difference signal input to the correction calculation means 71 is “0”, “1”, “−1”. For example, when the correction information is “5”, “0” “ The output is replaced with 5 ""-5 ". Reference numeral 72 denotes a digital filter. The digital filter 72 receives a digital difference signal output from the correction calculation means 71, and the digital filter 72 performs a filtering process to remove noise components. The latch circuit 67, the difference calculation means 70, the correction calculation means 71, and the digital filter 72 constitute a calculation means 73. The calculation means 73 is a pair of one bit at the second and fourth timings. A digital signal is latched, a difference operation, a correction operation, and a filtering process are performed, and a multi-bit signal is output. The timing control circuit 43, the ΣΔ AD converter 66, and the arithmetic means 73 constitute a sense circuit 74.

  75 is a ΣΔ DA converter, and this ΣΔ DA converter is composed of a first adder 76, a second adder 77, a delay element 78, a 1-bit converter 79, and an amplifier 80. is there.

  As described above, in the angular velocity sensor according to the first embodiment of the present invention, the ΣΔ AD converter 66 that converts the analog signals output from the first sense electrode 34 and the second sense electrode 35 into digital signals, Since the correction calculation means 71 for correcting the output signal from the ΣΔ AD converter 66 is provided and the ΣΔ DA converter 75 is provided at the subsequent stage of the correction calculation means 71, all of the sense circuits 74 are digital. As a result, the semiconductor process can be miniaturized, so that the angular velocity sensor can be easily reduced in size.

  Further, since both the ΣΔ AD converter 66 and the ΣΔ DA converter 75 are ΣΔ types, when the ΣΔ AD converter 66 and the ΣΔ DA converter 75 are integrated into one chip, the size is further reduced. The effect that it can do is acquired.

  Next, the operation of the angular velocity sensor according to the first embodiment of the present invention configured as described above will be described.

  When an AC voltage is applied to the drive electrode 32 of the sensor element 30, the vibrating body 31 resonates and charges are generated at the monitor electrode 33. The charge generated on the monitor electrode 33 is input to the charge amplifier 36 in the drive circuit 40 and converted into a sinusoidal output voltage. Then, the output voltage of the charge amplifier 36 is input to a band pass filter 37, and only the resonance frequency of the vibrating body 31 is extracted, and a sine waveform as shown in FIG. Further, the output signal of the bandpass filter 37 in the drive circuit 40 is input to a half-wave rectifying / smoothing circuit (not shown) included in the AGC circuit 38 to be converted into a DC signal. The AGC circuit 38 generates a signal for attenuating the output signal of the bandpass filter 37 in the drive circuit 40 when the DC signal is large, while the AGC circuit 38 in the drive circuit 40 when the DC signal is small. A signal that amplifies the output signal of the bandpass filter 37 is input to the drive circuit 39, and the vibration of the vibrating body 31 is adjusted to have a constant amplitude. Further, the sine wave signal shown in FIG. 2A is inputted to the timing control circuit 43 in the sense circuit 74, and the timing generation circuit 42 based on the signal multiplied by the PLL circuit 41 shows the timing control circuit 43 in FIG. The first timing Φ1, the second timing Φ2, the third timing Φ3, and the fourth timing Φ4 are formed. This timing signal is input to the ΣΔ AD converter 66 and the arithmetic means 73 as SW switching and latch timing of the latch circuit. Further, the sine wave signal whose phase is shifted by 90 degrees by the phase shifter is input to a voltage comparator (not shown) that compares it with a predetermined reference voltage (not shown), and the output thereof is a logic circuit (not shown). ), It is possible to form the timing signals Φ1, Φ2, Φ3, and Φ4. In this case, however, the voltage noise of the sine wave signal and the voltage noise due to temperature change and power supply fluctuation are in phase. It will appear as noise. The phase noise is a factor that adversely affects the accuracy of signal processing as timing noise for switching the input signal and the integration switching means. However, the phase noise is integrated with time using the PLL circuit 41 and the phase signal is reduced. By doing so, switching timing noise can be reduced and the accuracy of signal processing can be increased. When the sensor element 30 is bent and vibrated at a speed V in the driving direction illustrated in FIG. 1, the sensor element 30 rotates at an angular speed ω around the central axis in the longitudinal direction of the vibrating body 31. A Coriolis force of F = 2 mV × ω is generated in the sensor element 30. Due to this Coriolis force, electric charges are generated in the pair of sense electrodes 34 and 35 of the sensor element 30 as shown in FIGS. 2 (c) and 2 (d). Since the charges generated in the sense electrodes 34 and 35 are generated by Coriolis force, the phase is advanced by 90 degrees from the signal generated in the monitor electrode 33. The output signals generated at the pair of sense electrodes 34 and 35 are in a relationship between a positive polarity signal and a negative polarity signal as shown in FIGS. 2 (c) and 2 (d).

  The operation of the ΣΔ AD converter 66 in this case will be described below. The ΣΔ type AD converter 66 operates by repeating the first timing Φ1, the second timing Φ2, the third timing Φ3, and the fourth timing Φ4. The first timing Φ1 and the second timing At Φ2, the positive polarity signal output from the sense electrode 34 in the sensor element 30 is ΣΔ modulated and converted into a 1-bit digital signal, and at the third timing Φ3 and the fourth timing Φ4, the negative polarity signal is ΣΔ modulated. It is converted into a 1-bit digital signal.

  The operation at the above four timings will be described one by one. First, at the first timing Φ1, the SW 60 connected to the capacitor 58 in the integrating means 62 is turned on, and the integrated value held in the capacitor 58 is input to the comparator 64 in the comparing means 63 and the comparison result is 1. It is output as a bit digital signal. Further, the switches 53 and 54 in the DA conversion means 48 are turned on, and the electric charge held in the capacitor 52 is discharged.

  Next, at the second timing Φ2, the 1-bit digital signal output from the comparator 64 of the comparing means 63 is latched in the D-type flip-flop 65 at the rising edge of the second timing Φ2, and this latch signal is converted to the DA converter. Input to the DA switching means 47 of the means 48. The reference voltages 49 and 50 are switched in accordance with the input latch signal and input to the capacitor 52, and the charge corresponding to the switched reference voltage is output from the DA converter 48. At the same time, the switch 45 is turned ON in the input switching means 44, and the electric charge generated from the sense electrode 34 of the sensor element 30 is output. Further, the switch 55 in the integrating means 62 is turned ON, and the charges output from the input switching means 44 and the DA converting means 48 are input to the integrating circuit 56. Thus, at the second timing Φ2, the sum of the charge amount indicated by the hatched portion in FIG. 2C and the charge amount output from the DA conversion means 48 is integrated and held in the capacitor 58 in the integration circuit 56. It will be.

  With the above operation at the first timing Φ1 and the second timing Φ2, the charge amount corresponding to half of the amplitude value output from the sense electrode 34 of the sensor element 30 is ΣΔ modulated, and in particular, the first timing Φ1. When the signal at the second timing Φ2 rises, it is output as a 1-bit digital signal.

  Similarly to the operations at the first timing Φ1 and the second timing Φ2, the third timing Φ3 and the fourth timing Φ4 correspond to half of the amplitude value output from the sense electrode 35 of the sensor element 30. The amount of charge to be modulated is ΣΔ-modulated, and is converted into a 1-bit digital signal and output, particularly at the rise of the signals at the third timing Φ3 and the fourth timing Φ4. With the above operation, the charge amount corresponding to half of the amplitude value of the charges output from the pair of sense electrodes 34 and 35 in the sensor element 30 is ΣΔ modulated by one ΣΔ AD converter 66 and paired with one pair of 1-bit digital signals. The signal is output at the above timing.

  In addition, the electric charges output from the pair of sense electrodes 34 and 35 in the sensor element 30 are not only the sense signal whose phase is advanced by 90 degrees from the signal generated in the monitor electrode 33, which is generated by the Coriolis force due to the angular velocity, Since there is an unnecessary signal in phase with the signal, a case where a combined signal of the sense signal and the unnecessary signal is output from the pair of sense electrodes 34 and 35 in the sensor element 30 will be described. The sense signal generated by the Coriolis force due to the angular velocity is shown in FIGS. 2C and 2D, and as described above, the integration circuit 56 generates the sense signal shown in FIG. c) The charge amount indicated by the hatched portion in (d), that is, the charge amount corresponding to half of the amplitude value is integrated. Further, unnecessary signals generated from the sense electrodes 34 and 35 are shown in FIGS. 2E and 2F, and in the same manner as the sense signal, the second timing Φ2 and the fourth timing Φ4, FIG. The amount of charge indicated by the shaded area in (f), that is, the amount of charge in the interval from the maximum value to the minimum value of the amplitude of the unnecessary signal is integrated. This is canceled if integration is performed based on the median value of the amplitude. Thus, the charge amount becomes “0”. That is, a so-called synchronous detection process in which the unnecessary signal is canceled and the charge amount according to the amplitude of the sense signal is integrated by the operation of the integrating means 62 at the second timing Φ2 and the fourth timing Φ4 is a pair of inputs. Will be implemented for each of the signals. Therefore, similarly to the description of the operation when there is no unnecessary signal, the signal subjected to the synchronous detection processing is ΣΔ modulated from the ΣΔ AD converter 66, converted into a 1-bit digital signal, and output. .

  With the above operation, the pair of output signals in the sensor element 30 can be subjected to ΣΔ modulation while performing synchronous detection processing, and the digital value of the signal subjected to such synchronous detection is converted into a normal IV conversion circuit, phase The circuit can be obtained without the need for an analog circuit such as a detector and a synchronous detection circuit, and with a circuit scale much smaller than when these are used, that is, with a small size and low cost.

  Next, the operation of the calculation means 73 will be described. First, the 1-bit digital signal output from the comparator 64 in the comparator 63 of the ΣΔ AD converter 66 is latched in the D-type flip-flop 68 of the latch circuit 67 at the second timing Φ2. At the fourth timing Φ 4, the 1-bit digital signal output from the comparator 64 in the comparison unit 63 of the ΣΔ AD converter 66 is latched in the D-type flip-flop 69 of the latch circuit 67.

  The pair of 1-bit digital signals latched by the pair of D-type flip-flops 68 and 69 excludes unnecessary signals output from the pair of sense electrodes 34 and 35 in the sensor element 30 as described above. The charge amount corresponding to half of the amplitude value is converted into a digital value by ΣΔ modulation. Next, a pair of 1-bit digital signals output from the latch circuit 67 are input to a 1-bit difference calculation means 70, and a difference between the pair of 1-bit digital signals is calculated to output a 1-bit difference signal. Here, the 1-bit difference signal at the first timing Φ1 is the difference between the 1-bit digital signal latched at the second timing Φ2 and the fourth timing Φ4 in the previous period, and this 1-bit difference signal. The signal is a signal representing an amplitude value excluding unnecessary signals of signals output from the pair of sense electrodes 34 and 35 in the sensor element 30 shown in FIGS. As a result of the above operation, the pair of input signals in the relationship between the positive polarity signal and the negative polarity signal output from the pair of sense electrodes 34 and 35 in the sensor element 30 are integrated using the same single integration means 62. The influence on the relative error of the integration result of a pair of input signals due to the characteristics of the individual integration means is greatly reduced as compared with the case where the integration is performed separately by the two integration means. Similarly, the DA conversion means 48 is configured to use the same one DA conversion means for signal processing of a pair of input signals. Also, the comparison means 63 compares the pair of integration results with the same reference voltage and the comparator, thereby greatly reducing the influence of the comparator characteristics and the reference voltage variation on the relative error of the comparison result. As described above, since a pair of input signals are subjected to signal processing using the same integration means, DA conversion means, and comparison means, each means is compared with a case where a plurality of means are used for signal processing. The influence of relative error is greatly reduced.

  In addition, since the influence of the reference voltage variation in each means due to the influence of the power supply voltage change and the temperature change is similarly applied to the pair of input signals, the pair of input signals is obtained by the 1-bit difference calculation means 70 included in the calculation means 73. By calculating the difference between the signal processing results, it is possible to cancel the influence of the reference voltage fluctuation or the like in each means, thereby having the effect that the difference between the pair of input signals can be accurately AD converted, and at the same time, The influence of the in-phase noise component and the offset component included in the pair of input signals output from the pair of sense electrodes 34 and 35 in the sensor element 30 and input to the ΣΔ type AD converter can be canceled. It is possible to form a difference signal between the input signals.

  Further, the 1-bit difference calculation that takes a difference between a pair of input signals is a pair of comparison signals input to the difference calculation means when the output signal of the comparison means is a 1-bit signal consisting of “1” and “0”. Is limited to four types, “00”, “01”, “10”, and “11”, and the result of taking the difference is also determined in advance as “0”, “−1”, “1”, and “0”. This is a 1-bit digital operation that can obtain the result of the subtraction process according to the input signal without using an arithmetic unit that performs addition / subtraction with a very simple circuit configuration. A signal processing such as low-pass and decimation using a digital filter, which is normally required for ΣΔ AD conversion, after the input signal has been converted into one differential signal, allows signal processing of a pair of input signals using low-pass and decimation. Compared to the case where the difference filter is processed using an arithmetic unit that can add and subtract multi-bits after the digital filter is prepared for each input signal and converted into multi-bits by the digital filter, the difference calculation circuit, the digital filter, etc. The circuit has an effect that the circuit can be configured with a very small circuit scale, that is, small in size and at low cost, and high-accuracy signal processing can be realized.

  Next, the 1-bit difference signal output from the 1-bit difference calculation means 70 is input to the correction calculation means 71, and the correction calculation between the 1-bit difference signal and predetermined correction information is performed by a replacement process. As described above, this correction calculation uses the fact that the 1-bit difference signal is limited to the three values “0”, “1”, “−1”, and for example, when the predetermined correction information is “5”. The 1-bit differential signal “0”, “1”, “−1” input to the correction calculation means is replaced with “0”, “5”, “−5”, respectively, so that multiplication is realized to correct the signal. It is possible.

  Accordingly, it is possible to correct the sensitivity variation with respect to the angular velocity due to the manufacturing variation of the sensor element 30 and the sensitivity variation of the sensor element 30 due to the temperature variation by setting appropriate correction information. is there. Furthermore, it can be realized with a very small circuit scale as compared with the case where signal correction is performed by preparing a multiplier that multiplies the multibit signal after conversion to a multibit signal by a digital filter and performing the multiplication process. In this replacement process, there is no truncation of data in a finite tone, and a highly accurate correction calculation can be realized. As a result, the sensitivity adjustment of the sensor element and the sense circuit can be realized with a small size and a high accuracy at a low cost.

  Then, the multi-bit digital signal output from the digital filter 72 is input to the ΣΔ DA converter 75 and DA-converted, whereby the ΣΔ DA converter 75 includes an analog signal corresponding to the angular velocity. An output signal is output.

(Embodiment 2)
Hereinafter, the second and second embodiments of the present invention will be described in particular.

  FIG. 3 is a circuit diagram of the angular velocity sensor according to the second embodiment of the present invention. In the second embodiment of the present invention, components having the same configurations as those of the first embodiment of the present invention described above are denoted by the same reference numerals and description thereof is omitted.

  Reference numeral 81 denotes a temperature sensor. The temperature sensor 81 constantly measures the ambient temperature. By inputting an output signal from the temperature sensor 81 to the correction calculation means 71 in the calculation means 73, the 1-bit difference calculation means 70 The output signal is corrected. Reference numeral 82 denotes a switch. The switch 82 inputs output signals from both the digital filter 72 and the temperature sensor 81, and commands from an SPI bus 83 provided in parallel with the ΣΔ DA converter 75. Thus, one of the angular velocity signal from the digital filter 72 and the temperature information signal from the temperature sensor 81 is selected and output to the ΣΔ DA converter 75. The ΣΔ DA converter 75 converts either one of the angular velocity signal and the temperature information signal into an analog output signal and outputs the analog output signal to the outside.

  As described above, in the angular velocity sensor according to the second embodiment of the present invention, the output signal from the temperature sensor 81 is input to the switch 82, and the temperature information is received from the ΣΔ DA converter 75 by the command from the SPI bus 83. Since it is configured to output, it is possible to obtain an effect that it can be output while selecting either angular velocity information or temperature information from the ΣΔ DA converter 75.

  On the other hand, the output signal from the digital filter 72 in the computing means 73 is also input to the SPI bus 83, and the angular velocity information consisting of digital signals is output to the outside via the SPI bus 83, that is, Since the SPI bus 83 is provided in parallel with the ΣΔ DA converter 75 and the output signal composed of the digital signal is output to the outside by the SPI bus 83, the angular velocity information of both the analog signal and the digital signal is provided. Can be output.

  The angular velocity sensor according to the present invention has an effect of providing an angular velocity sensor that can be miniaturized by miniaturization of a semiconductor process, and is used for attitude control of a moving body such as an aircraft or a vehicle, a navigation system, or the like. It is useful as an angular velocity sensor.

Circuit diagram of an angular velocity sensor using a ΣΔ AD converter according to Embodiment 1 of the present invention (A)-(f) Waveform diagram which shows the operating state of the same angular velocity sensor Circuit diagram of angular velocity sensor according to Embodiment 2 of the present invention Block diagram showing a conventional angular velocity sensor

DESCRIPTION OF SYMBOLS 30 Sensor element 32 Drive electrode 33 Monitor electrode 34, 35 Sense electrode 40 Drive circuit 44 Input switching means 47 DA switching means 48 DA conversion means 62 Integration means 63 Comparison means 66 Sigma-delta type AD converter 70 Difference calculation means 71 Correction calculation means 75 ΣΔ DA converter 81 Temperature sensor 82 Switch 83 SPI bus

Claims (5)

A sensor element having a drive electrode, a sense electrode, and a monitor electrode; a drive circuit for driving the sensor element at a predetermined drive frequency; an AD converter for converting an analog signal output from the sense electrode into a digital signal; An angular velocity sensor provided with correction calculation means for correcting an output signal from the AD converter, and further provided with a DA converter at a subsequent stage of the correction calculation means. The AD converter integrates the charges output from the input switching means for switching at least two input signals, the DA conversion means for outputting charge amounts of at least two levels, the input switching means and the DA conversion means, Integrating means for holding at least two integral values, comparing means for comparing at least two integral values output from the integrating means with a predetermined value, and the DA converting means in accordance with at least two outputs of the comparing means 2. An angular velocity sensor according to claim 1, comprising a ΣΔ type AD converter comprising a DA switching means for switching the output and a difference calculation means for calculating a difference between at least two comparison signals output from the comparison means. 3. The angular velocity sensor according to claim 1, wherein the DA converter is a ΣΔ DA converter. 2. An angular velocity sensor according to claim 1, wherein an SPI bus is provided in parallel with the DA converter after the correction calculation means, and an output signal composed of a digital signal is output to the outside by the SPI bus. In addition to providing a temperature sensor, a switch is provided between the correction calculation means and the DA converter, an output signal from the temperature sensor is input to the switch, and temperature information is output from the DA converter in response to a command from the SPI bus. The angular velocity sensor according to claim 4 configured as described above.

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