JP2010028809A5 - - Google Patents
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- Publication number
- JP2010028809A5 JP2010028809A5 JP2009161829A JP2009161829A JP2010028809A5 JP 2010028809 A5 JP2010028809 A5 JP 2010028809A5 JP 2009161829 A JP2009161829 A JP 2009161829A JP 2009161829 A JP2009161829 A JP 2009161829A JP 2010028809 A5 JP2010028809 A5 JP 2010028809A5
- Authority
- JP
- Japan
- Prior art keywords
- duty cycle
- clock signal
- ended
- differential amplifier
- ended clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005259 measurement Methods 0.000 claims 6
- 238000000034 method Methods 0.000 claims 2
- 230000003321 amplification Effects 0.000 claims 1
- 229910044991 metal oxide Inorganic materials 0.000 claims 1
- 150000004706 metal oxides Chemical class 0.000 claims 1
- 238000003199 nucleic acid amplification method Methods 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/171,805 US7965118B2 (en) | 2008-07-11 | 2008-07-11 | Method and apparatus for achieving 50% duty cycle on the output VCO of a phased locked loop |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2010028809A JP2010028809A (ja) | 2010-02-04 |
| JP2010028809A5 true JP2010028809A5 (enExample) | 2012-08-16 |
Family
ID=41077098
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009161829A Pending JP2010028809A (ja) | 2008-07-11 | 2009-07-08 | 位相同期ループの出力ｖｃｏにおいて５０％デューティサイクルを達成するための方法および装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7965118B2 (enExample) |
| EP (1) | EP2144373A1 (enExample) |
| JP (1) | JP2010028809A (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7839195B1 (en) * | 2009-06-03 | 2010-11-23 | Honeywell International Inc. | Automatic control of clock duty cycle |
| US20120154021A1 (en) * | 2010-12-20 | 2012-06-21 | Amita Chandrakant Patil | Integrated circuit and method of fabricating same |
| KR20130096495A (ko) | 2012-02-22 | 2013-08-30 | 삼성전자주식회사 | 반도체 장치의 버퍼 회로 |
| US9148135B2 (en) * | 2012-06-26 | 2015-09-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Real time automatic and background calibration at embedded duty cycle correlation |
| US8872562B2 (en) * | 2013-03-21 | 2014-10-28 | Kabushiki Kaisha Toshiba | Semiconductor device |
| US9019014B2 (en) * | 2013-07-29 | 2015-04-28 | King Fahd University Of Petroleum And Minerals | Programmable multi-gain current amplifier |
| US9007096B1 (en) * | 2014-07-07 | 2015-04-14 | Xilinx, Inc. | High-speed analog comparator |
| US9614527B2 (en) * | 2014-09-04 | 2017-04-04 | Fujitsu Limited | Differential to single-ended signal conversion |
| CN108037345B (zh) * | 2017-09-27 | 2020-08-04 | 北京集创北方科技股份有限公司 | 信号处理方法、装置、存储介质和处理器 |
| US11165431B1 (en) * | 2020-12-09 | 2021-11-02 | Analog Devices, Inc. | Techniques for measuring slew rate in current integrating phase interpolator |
| CN115603710A (zh) * | 2022-10-25 | 2023-01-13 | 四川和芯微电子股份有限公司（Cn） | 占空比校正电路 |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4437171A (en) | 1982-01-07 | 1984-03-13 | Intel Corporation | ECL Compatible CMOS memory |
| US4496856A (en) | 1982-07-21 | 1985-01-29 | Sperry Corporation | GaAs to ECL level converter |
| US4533842A (en) | 1983-12-01 | 1985-08-06 | Advanced Micro Devices, Inc. | Temperature compensated TTL to ECL translator |
| US4656375A (en) | 1985-12-16 | 1987-04-07 | Ncr Corporation | Temperature compensated CMOS to ECL translator |
| US4968905A (en) | 1989-08-25 | 1990-11-06 | Ncr Corporation | Temperature compensated high speed ECL-to-CMOS logic level translator |
| JP2549743B2 (ja) | 1990-03-30 | 1996-10-30 | 株式会社東芝 | 出力回路 |
| US5034635A (en) | 1990-03-30 | 1991-07-23 | Texas Instruments Incorporated | Positive to negative voltage translator circuit and method of operation |
| JPH07183775A (ja) * | 1993-12-22 | 1995-07-21 | Kawasaki Steel Corp | 波形整形回路 |
| AU1726795A (en) * | 1994-02-15 | 1995-08-29 | Rambus Inc. | Amplifier with active duty cycle correction |
| US6104229A (en) | 1996-05-02 | 2000-08-15 | Integrated Device Technology, Inc. | High voltage tolerable input buffer and method for operating same |
| WO1999012259A2 (en) * | 1997-09-05 | 1999-03-11 | Rambus Incorporated | Duty cycle correction circuit using two differential amplifiers |
| JP3745517B2 (ja) * | 1997-10-20 | 2006-02-15 | 富士通株式会社 | タイミング回路 |
| JP3745123B2 (ja) * | 1998-08-24 | 2006-02-15 | 三菱電機株式会社 | デューティ比補正回路及びクロック生成回路 |
| US6563342B1 (en) | 2001-12-20 | 2003-05-13 | Honeywell International, Inc. | CMOS ECL output buffer |
| US6535017B1 (en) | 2001-12-20 | 2003-03-18 | Honeywell International Inc. | CMOS ECL input buffer |
| US7088160B2 (en) | 2004-04-08 | 2006-08-08 | Infineon Technologies Ag | Circuit arrangement for regulating a parameter of an electrical signal |
| GB0413152D0 (en) | 2004-06-14 | 2004-07-14 | Texas Instruments Ltd | Duty cycle controlled CML-CMOS converter |
| US7345931B2 (en) * | 2005-08-01 | 2008-03-18 | Infineon Technologies Ag | Maintaining internal voltages of an integrated circuit in response to a clocked standby mode |
| KR100715158B1 (ko) | 2005-12-13 | 2007-05-10 | 삼성전자주식회사 | 동작특성 및 동작전압을 개선하는 듀티보정 증폭회로 |
| US20070159224A1 (en) * | 2005-12-21 | 2007-07-12 | Amar Dwarka | Duty-cycle correction circuit for differential clocking |
| US7688110B2 (en) | 2008-01-07 | 2010-03-30 | Honeywell International, Inc. | System for providing a complementary metal-oxide semiconductor (CMOS) emitter coupled logic (ECL) equivalent input/output (I/O) circuit |
-
2008
- 2008-07-11 US US12/171,805 patent/US7965118B2/en active Active
-
2009
- 2009-06-30 EP EP09164251A patent/EP2144373A1/en not_active Withdrawn
- 2009-07-08 JP JP2009161829A patent/JP2010028809A/ja active Pending
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