JP2010016176A - Test piece holder - Google Patents

Test piece holder Download PDF

Info

Publication number
JP2010016176A
JP2010016176A JP2008174695A JP2008174695A JP2010016176A JP 2010016176 A JP2010016176 A JP 2010016176A JP 2008174695 A JP2008174695 A JP 2008174695A JP 2008174695 A JP2008174695 A JP 2008174695A JP 2010016176 A JP2010016176 A JP 2010016176A
Authority
JP
Japan
Prior art keywords
sample holder
base
pin
curved surface
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008174695A
Other languages
Japanese (ja)
Other versions
JP2010016176A5 (en
Inventor
Takeshi Muneishi
猛 宗石
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2008174695A priority Critical patent/JP2010016176A/en
Publication of JP2010016176A publication Critical patent/JP2010016176A/en
Publication of JP2010016176A5 publication Critical patent/JP2010016176A5/ja
Pending legal-status Critical Current

Links

Images

Landscapes

  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To suppress the generation of particles or the scattering of particles and shorten an exhausting time necessary for evacuation. <P>SOLUTION: The test piece holder has a base and a projected part provided on the principal surface of the base, wherein the projected part includes a projected end face substantially parallel to the principal surface; and a side surface, continued from the projected end surface to the principal surface, includes a projected curved surface continued to the peripheral rim of the projected end face and a recessed curved surface continued from the projected curved surface to the principal surface. In this case, a distance from the parallel plane to the principal surface is made larger than a distance from the top surface to a plane parallel to the principal surface through the boundary between the projected curved surface and the recessed curved surface. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、半導体集積回路の製造に用いられるシリコンウエハや、液晶表示装置の製造に用いられるガラス基板等の各製造工程において、シリコンウエハやガラス基板等の各試料に研磨、検査、搬送などの処理を施す際に試料を保持する試料保持具に関する。   The present invention provides a polishing process, an inspection process, a transfer process and the like for each sample such as a silicon wafer and a glass substrate in each manufacturing process of a silicon wafer used for manufacturing a semiconductor integrated circuit and a glass substrate used for manufacturing a liquid crystal display device. The present invention relates to a sample holder that holds a sample when processing is performed.

半導体集積回路の製造に用いられるシリコンなどを原料とする半導体ウエハや、液晶表示装置の製造に用いられるガラス基板等の試料は、その製造工程において製造装置や検査装置の試料台上に複数回保持される。試料台に試料を保持する装置や方法は、製造工程の種類に応じて様々な形態のものが提案されている。   Samples of semiconductor wafers made of silicon or other materials used in the manufacture of semiconductor integrated circuits and glass substrates used in the manufacture of liquid crystal display devices are held multiple times on the sample stage of manufacturing equipment or inspection equipment during the manufacturing process. Is done. Various apparatuses and methods for holding a sample on a sample stage have been proposed depending on the type of manufacturing process.

半導体集積回路の微細化、高密度化、および集積回路の製造時間の短縮化の要求は、近年さらに高まっている。これにともない、試料保持具に求められる性能、例えば、試料と試料保持具との間の摩擦摩耗によるパーティクル発生の抑制や、試料保持具の表面に付着したパーティクルの飛散の抑制、また、例えば真空引きした際に試料を十分な強度で吸着するまでに必要な排気時間の短時間化に対する要求も高まっている。   In recent years, demands for miniaturization and high density of semiconductor integrated circuits and shortening of manufacturing time of integrated circuits have been further increased. Accordingly, performance required for the sample holder, for example, suppression of particle generation due to frictional wear between the sample and the sample holder, suppression of scattering of particles attached to the surface of the sample holder, and, for example, vacuum There is an increasing demand for shortening the exhaust time required to adsorb the sample with sufficient strength when it is pulled.

例えば、下記特許文献1〜3には、基体の主面に複数のピンを設け、このピンの頂面と基体の主面との間隙を真空引きして、ピンの頂面に載置した試料を保持する試料保持具が各々開示されている。例えば特許文献1では、試料保持具のピンの頂面および側面を鏡面研磨することにより、リフトピンなどを用いて試料保持具から試料を離脱する際に、試料の裏面と、ピンの頂面および側面とが接触しても接触が滑らかになり摩擦係数が小さくなるのでパーティクルの発生を防止できると提案されている。また、特許文献2では、平坦な頂面を有するピンを形成した後に、ピンの頂面の周辺部を丸められた滑らかな曲面とすることが提案されている。また、特許文献3では、試料とピンとの接触に伴うパーティクル発生の低減を図るために試料とピンの接触比率を低減する手段として、ピンを円錐台形状、角錐台形状、径の異なる円柱を積み重ねた形状などにすることが提案されている。また、例えば特許文献1には、試料保持具の製造方法の一例として、基体の表面にマスクパターンを設けた後でサンドブラストすることで、マスクパターンに対応する位置に、表面が略垂直な突状部を形成している。
特開2003−86664号公報 特開平9−283605号公報 特開平10−242255号公報
For example, in Patent Documents 1 to 3 below, a sample is provided on a top surface of a pin by providing a plurality of pins on the main surface of the substrate and evacuating the gap between the top surface of the pins and the main surface of the substrate. A sample holder for holding each is disclosed. For example, in Patent Document 1, when the sample is detached from the sample holder using a lift pin or the like by mirror polishing the top surface and side surface of the pin of the sample holder, the top surface and side surface of the pin It has been proposed that the generation of particles can be prevented because the contact is smooth and the coefficient of friction is reduced even if the contact is made. Patent Document 2 proposes that after forming a pin having a flat top surface, the peripheral portion of the top surface of the pin is rounded and smoothly curved. In Patent Document 3, as a means for reducing the contact ratio between the sample and the pin in order to reduce the generation of particles due to the contact between the sample and the pin, the pin is truncated cone-shaped, the truncated pyramid shape, and the cylinders having different diameters are stacked. It has been proposed to use a different shape. Further, for example, in Patent Document 1, as an example of a method for manufacturing a sample holder, a protrusion having a surface substantially vertical at a position corresponding to a mask pattern by sandblasting after a mask pattern is provided on the surface of a substrate. Forming part.
JP 2003-86664 A JP-A-9-283605 Japanese Patent Laid-Open No. 10-242255

しかし、上記特許文献1〜3では、試料保持具からのパーティクルを抑制することのみを目的としており、試料を吸着するまでに必要な時間を短縮することについては、一切考慮されていない。また、特許文献1では、サンドブラスト後にバフ研磨することで突状部の表面を鏡面化しているが、バフ研磨の際に、突状部と基体の表面との接合角部に力がかかり易く、突状部が破損してしまうといった課題もあった。本願発明は、かかる課題を解決するためになされたものである。   However, in the above Patent Documents 1 to 3, the object is only to suppress particles from the sample holder, and no consideration is given to shortening the time required to adsorb the sample. Further, in Patent Document 1, the surface of the protruding portion is mirror-finished by buffing after sandblasting, but when buffing, a force is easily applied to the bonding corner between the protruding portion and the surface of the substrate. There was also a problem that the protrusion was damaged. The present invention has been made to solve this problem.

上記課題を解決するために、本発明は、基体と、前記基体の一主面上に設けられた突起部と、を有する試料保持具であって、前記突起部は、前記一主面と略平行な突出端面を有し、前記突出端面から前記一主面に連なる側面が、前記突出端面の周縁に連ねる凸曲面部と、前記凸曲面部から前記一主面にかけて連なる凹曲面部と、を備え、前記頂面から、前記凸曲面部と前記凹曲面部との境界を通り前記一主面と平行な平面まで距離に対し、前記平行な平面から前記一主面までの距離が、より大きくされていることを特徴とする試料保持具を提供する。   In order to solve the above-mentioned problems, the present invention provides a sample holder having a base and a protrusion provided on one main surface of the base, the protrusion being substantially the same as the one main surface. A convex curved surface portion that has a parallel projecting end surface, and a side surface that extends from the projecting end surface to the one main surface, and a concave curved surface portion that continues from the convex curved surface portion to the one main surface; The distance from the parallel plane to the one principal surface is greater than the distance from the top surface to the plane parallel to the one principal surface through the boundary between the convex curved surface portion and the concave curved surface portion. A sample holder is provided.

なお、前記突出端面の中心線を通り、前記一主面に垂直な平面による切断線は、前記一主面から前記突出端面に近づくにしたがい、傾きが大きくなっていることが好ましい。   In addition, it is preferable that the cutting line by the plane perpendicular to the one main surface passing through the center line of the protruding end surface has a larger inclination as it approaches the protruding end surface from the one main surface.

また、前記基体の前記一主面が、単結晶層の表面からなることが好ましい。   Moreover, it is preferable that the one main surface of the base body is composed of a surface of a single crystal layer.

また、前記単結晶層は、炭化珪素質焼結体からなる土台部の表面に設けられていることが好ましい。   The single crystal layer is preferably provided on the surface of a base portion made of a silicon carbide sintered body.

本発明は、また、基体の一主面上に設けられた突起部によって、前記一主面の側に配置された試料を保持する試料保持具であって、前記突起部は、前記一主面と略平行な突出端面を有し、前記突出端面から前記一主面に連なる側面に、凸曲面と凹曲面とが交互に連続して配置された複数の段差領域を備えることを特徴とする試料保持具を、併せて提供する。   The present invention is also a sample holder for holding a sample disposed on the one main surface side by a protrusion provided on one main surface of the substrate, wherein the protrusion is the one main surface. And a plurality of step regions in which convex curved surfaces and concave curved surfaces are alternately and continuously arranged on a side surface continuous from the protruding end surface to the one main surface. A holder is also provided.

本発明の試料保持具によれば、試料保持具からのパーティクル発生や、試料保持具の表面に付着したパーティクルの飛散を、抑制することができる。また、例えば、真空引きした際に試料を十分な強度で吸着するまでに必要な排気時間を、短時間化することができる。   According to the sample holder of the present invention, generation of particles from the sample holder and scattering of particles attached to the surface of the sample holder can be suppressed. Further, for example, it is possible to shorten the exhaust time required for adsorbing the sample with sufficient strength when evacuated.

以下、本発明の試料保持具について説明する。図1は、本発明の試料保持具の実施形態の一つである、ウエハチャック20の構成について説明する概略断面図である。図1(a)は、ウエハチャック20の平面図、図1(b)は(a)のX−X線断面図である。ウエハチャック20は、円板状をした基体3の主面側に凹欠部12を設け、該凹欠部12の外周に環状のシール壁15を構成してある。また、上記凹欠部12の底面(主面3a)には、主面3aから突出して形成された複数のピン1が設けられている。複数のピン1の突出端面(頂面1a)は、シール壁15の頂面15aと略同一平面に位置されている。また、基体3の内部には排気孔16が穿設されており、該排気孔16は凹欠部12の底面(主面3a)に形成した吸引口16aと連通している。なお、複数のピン1は、セラミック基体3の主面の中心から同心円状に配置されていることが好ましい。   Hereinafter, the sample holder of the present invention will be described. FIG. 1 is a schematic cross-sectional view illustrating the configuration of a wafer chuck 20 that is one embodiment of a sample holder of the present invention. FIG. 1A is a plan view of the wafer chuck 20, and FIG. 1B is a sectional view taken along line XX of FIG. The wafer chuck 20 is provided with a recessed portion 12 on the main surface side of the disk-shaped substrate 3, and an annular seal wall 15 is formed on the outer periphery of the recessed portion 12. The bottom surface (main surface 3a) of the recess 12 is provided with a plurality of pins 1 that protrude from the main surface 3a. The projecting end surfaces (top surfaces 1 a) of the plurality of pins 1 are positioned substantially in the same plane as the top surface 15 a of the seal wall 15. Further, an exhaust hole 16 is formed in the inside of the base 3, and the exhaust hole 16 communicates with a suction port 16 a formed on the bottom surface (main surface 3 a) of the recess 12. The plurality of pins 1 are preferably arranged concentrically from the center of the main surface of the ceramic substrate 3.

ウエハチャック20では、例えば半導体ウエハ50が、半導体ウエハ50の周辺部をシール壁15の頂面15aと当接させるとともに、複数のピン1の頂面1aとも同時に当接させるようにして載置される。この状態で、排気孔16に接続した真空ポンプ(不図示)により真空吸引して、ウエハ50と凹欠部12とで囲まれる空間内を減圧することで、ウエハ50をピン1の頂面1aとシール壁の頂面15aとで構成される保持面上に吸着保保持する。   In the wafer chuck 20, for example, the semiconductor wafer 50 is placed so that the peripheral portion of the semiconductor wafer 50 is in contact with the top surface 15 a of the seal wall 15 and is also in contact with the top surfaces 1 a of the plurality of pins 1 at the same time. The In this state, vacuum suction is performed by a vacuum pump (not shown) connected to the exhaust hole 16 to reduce the pressure in the space surrounded by the wafer 50 and the recessed portion 12, so that the wafer 50 is placed on the top surface 1 a of the pin 1. And the top surface 15a of the sealing wall are held by suction.

図2は、ウエハチャック20の基体3に設けられた複数のピン1について説明する断面図である。基体3は、例えば、炭化珪素などのセラミックからなる。本実施形態のピン1は、セラミックスからなる基体3の一主面3aと略平行な突出端面(頂面1a)を備えている。図2は、ピン1の突出端面(頂面1a)の中心を通り、この一主面3aに垂直な平面で切断した断面図である。ピン1は頂面1aから基体3の一主面3aに連なる側面4に、頂面1aの周縁に連なる凸曲面部4aと、凸曲面部4aから一主面3aにかけ連なる凹曲面部4bと、を備えている。ピン1では、凸曲面部4aに対し、凹曲面部4bがより大きくなっている。すなわち、図2に示す断面図において、基体3の主面3aから、凸曲面部4aと凹曲面部4bとの境界5までの高さH1に比べて、この境界5から頂面1aまでの高さH2の方が、より小さくされている。本実施形態では、例えば、高さH1が20μm〜40μm、高さH2が200μm〜300μmとされている。なお、凸曲面部4aおよび凹曲面4bの表面には、微小な凹凸を備えていてもよい。たとえば、凸曲面部4aおよび凹曲面図4bの表面粗さ曲線において、最高高さと最低高さの差が30μm程度の微小な凹凸を有していてもよい。   FIG. 2 is a cross-sectional view illustrating a plurality of pins 1 provided on the base 3 of the wafer chuck 20. The base 3 is made of a ceramic such as silicon carbide, for example. The pin 1 of the present embodiment includes a protruding end surface (top surface 1a) substantially parallel to one main surface 3a of the base 3 made of ceramics. FIG. 2 is a cross-sectional view taken along a plane that passes through the center of the protruding end surface (top surface 1a) of the pin 1 and is perpendicular to the one principal surface 3a. The pin 1 has a convex curved surface portion 4a continuous from the top surface 1a to the principal surface 3a of the base 3, a convex curved surface portion 4a continuous from the peripheral edge of the top surface 1a, and a concave curved surface portion 4b continuous from the convex curved surface portion 4a to the principal surface 3a. It has. In the pin 1, the concave curved surface portion 4b is larger than the convex curved surface portion 4a. That is, in the sectional view shown in FIG. 2, the height from the boundary 5 to the top surface 1a is higher than the height H1 from the main surface 3a of the base 3 to the boundary 5 between the convex curved surface portion 4a and the concave curved surface portion 4b. The length H2 is made smaller. In the present embodiment, for example, the height H1 is 20 μm to 40 μm, and the height H2 is 200 μm to 300 μm. In addition, the surface of the convex curved surface part 4a and the concave curved surface 4b may be provided with minute unevenness. For example, in the surface roughness curves of the convex curved surface portion 4a and the concave curved surface FIG. 4b, there may be minute irregularities in which the difference between the maximum height and the minimum height is about 30 μm.

すなわち、ピン1では、図2に示す断面において、境界5から側面4の下端(基体3の主面3aとの接合端)7を結ぶ直線に対して、凹曲面部4bの断面線が、基体3の主面4aにより近い側に向けて凹状に湾曲している。すなわち、ウエハチャック20では、図2に示す断面図における、上記境界5を通って基体3の主面3aに垂直な平面Cと、この平面Cに平行な上記下端7を通る平面とで挟まれた領域では、ピン1に対応する部分の面積がが、ピン1以外の空間に対応する部分の面積に比べて、小さくされている。   That is, in the pin 1, in the cross section shown in FIG. 2, the cross-sectional line of the concave curved surface portion 4 b corresponds to the straight line connecting the boundary 5 to the lower end of the side surface 4 (joining end with the main surface 3 a of the base 3) 7 3 is curved in a concave shape toward the side closer to the main surface 4a. That is, the wafer chuck 20 is sandwiched between a plane C passing through the boundary 5 and perpendicular to the main surface 3a of the substrate 3 and a plane passing through the lower end 7 parallel to the plane C in the sectional view shown in FIG. In this area, the area of the portion corresponding to the pin 1 is made smaller than the area of the portion corresponding to the space other than the pin 1.

ウエハチャック20において、例えば半導体ウエハ50を真空吸着する際、ピン1以外の空間部分は、図示しない真空ポンプによる真空吸引時、ウエハ50と凹欠部12とで囲まれた領域を通過する空気の通り道となる。このウエハ50と凹欠部12とで囲まれた領域において、ピン1は、真空吸引時の空気の流れを阻害する障害物となる。このため、ウエハ50と凹欠部12とで囲まれた領域における、ピン1の占める体積の割合が比較的大きい場合、真空吸引時の空気抵抗(排気コンダクタンス)は比較的大きくなってしまう。   In the wafer chuck 20, for example, when the semiconductor wafer 50 is vacuum-sucked, the space portion other than the pins 1 is air that passes through the region surrounded by the wafer 50 and the recess 12 when vacuum suction is performed by a vacuum pump (not shown). It becomes a way. In the region surrounded by the wafer 50 and the recess 12, the pin 1 becomes an obstacle that hinders the air flow during vacuum suction. For this reason, when the ratio of the volume occupied by the pins 1 in the region surrounded by the wafer 50 and the recessed portion 12 is relatively large, the air resistance (exhaust conductance) during vacuum suction becomes relatively large.

本実施形態のウエハチャック20では、ピン1の側面4に、凸曲面部4aから一主面3aにかけ連なる凹曲面部4bを備えており、かつ、側面4の凸曲面部4aに対し、側面4の凹曲面部4bがより大きくされている。このため、ウエハ50と凹欠部12とで囲まれた領域における、ピン1の占める体積の割合を比較的小さくしている。このため、ウエハチャック20では、真空吸引時の空気抵抗(排気コンダクタンス)が比較的小さくされ、比較的短時間で、ウエハ50を十分な強度で真空吸着することができる。   In the wafer chuck 20 of the present embodiment, the side surface 4 of the pin 1 is provided with a concave curved surface portion 4b that continues from the convex curved surface portion 4a to the one main surface 3a, and the side surface 4 is opposed to the convex curved surface portion 4a of the side surface 4. The concave curved surface portion 4b is made larger. For this reason, the ratio of the volume occupied by the pins 1 in the region surrounded by the wafer 50 and the recessed portion 12 is relatively small. Therefore, in the wafer chuck 20, the air resistance (exhaust conductance) during vacuum suction is relatively small, and the wafer 50 can be vacuum-sucked with sufficient strength in a relatively short time.

また、本実施形態のウエハチャック20では、側面4に、頂面1aの周縁に連なる凸曲面部4aを備えており、ピン1の頂面1aにウエハ50を載置する際における、ウエハ50の傷や、パーティクルの発生を抑制している。図3(a)および(b)は、それぞれ、試料保持具のピンの断面形状の例であり、ピン1とは異なる断面形状を示している。図3(a)および(b)では、図1および図2に示すピン1と同様の構成については、同じ符号で示している。図3(a)に示すピン20では、ピン1の頂面1aの周縁に、角部1cが形成されている。図3(a)に示すような角部1cが形成されている場合、ピン1の頂面1aにウエハ50を載置した際、この角部1cとウエハ50とが摺接し、ウエハ50にスクラッチ傷が生じるとともに、パーティクルが発生する場合もあった。一方、図2に示すピン1では、ピン1の頂部1aの周縁に、ピン1の周縁に連なる凸曲面部4aが設けられている。このため、図2に示すピン1では、頂面1aにウエハ50を載置する場合、ウエハ50とこの凸曲面部4aとが接触する場合があっても、ウエハ50へのスクラッチ傷の発生は抑制されている。   Further, in the wafer chuck 20 of the present embodiment, the side surface 4 is provided with a convex curved surface portion 4 a continuous with the periphery of the top surface 1 a, and the wafer 50 is placed on the top surface 1 a of the pin 1. Scratches and particle generation are suppressed. 3A and 3B are examples of the cross-sectional shape of the pin of the sample holder, and show a cross-sectional shape different from that of the pin 1. FIG. 3 (a) and 3 (b), the same components as those of the pin 1 shown in FIGS. 1 and 2 are denoted by the same reference numerals. In the pin 20 shown in FIG. 3A, a corner 1 c is formed on the periphery of the top surface 1 a of the pin 1. When the corner portion 1 c as shown in FIG. 3A is formed, when the wafer 50 is placed on the top surface 1 a of the pin 1, the corner portion 1 c and the wafer 50 are in sliding contact with each other, and the wafer 50 is scratched. In some cases, scratches and particles were generated. On the other hand, in the pin 1 shown in FIG. 2, a convex curved surface portion 4 a connected to the periphery of the pin 1 is provided on the periphery of the top portion 1 a of the pin 1. For this reason, in the pin 1 shown in FIG. 2, when the wafer 50 is placed on the top surface 1a, even if the wafer 50 may come into contact with the convex curved surface portion 4a, the scratches on the wafer 50 are not generated. It is suppressed.

また、図3(b)に示すピン30では、側面4は、頂面1aから基体3の主面3aに至る凸曲面となっている。この場合、側面4とウエハ50との距離は比較的小さく、ウエハ50と側面4との間隙にパーティクルPが挟まった状態となることもある。また、側面4が凸面状の場合、ウエハ50比較的近い部分においても、この側面4に垂直なベクトル成分(図3中に矢印で示している)は、ウエハ50の側を向くように傾いている。このため、側面4に付着している細かなパーティクルは、ウエハチャック20の振動に起因してウエハ50の側に付勢され易い。このため、側面4に付着したパーティクルが、ウエハ50に付着し易いといった問題があった。また、側面4が一様に凸曲面状にされている場合、ウエハ50と凹欠部12とで囲まれた領域における、ピン1の占める体積の割合が比較的大きい。この場合、上述のように、真空吸引時の空気抵抗(排気コンダクタンス)が比較的大きくなっている。すなわち、側面4が一様に凸曲面状にされている場合、ウエハ50を十分な強度で真空吸着する為に要する時間は、比較的長くなる。   In the pin 30 shown in FIG. 3B, the side surface 4 is a convex curved surface that extends from the top surface 1 a to the main surface 3 a of the base 3. In this case, the distance between the side surface 4 and the wafer 50 is relatively small, and the particles P may be sandwiched between the wafer 50 and the side surface 4. When the side surface 4 is convex, the vector component (indicated by an arrow in FIG. 3) perpendicular to the side surface 4 is inclined so as to face the wafer 50 even in a portion relatively close to the wafer 50. Yes. For this reason, the fine particles adhering to the side surface 4 are easily urged toward the wafer 50 due to the vibration of the wafer chuck 20. For this reason, there has been a problem that particles adhering to the side surface 4 are likely to adhere to the wafer 50. Further, when the side surface 4 is uniformly formed in a convex curved surface shape, the proportion of the volume occupied by the pins 1 in the region surrounded by the wafer 50 and the recessed portion 12 is relatively large. In this case, as described above, the air resistance (exhaust conductance) during vacuum suction is relatively large. That is, when the side surface 4 is uniformly convex, the time required to vacuum-suck the wafer 50 with sufficient strength is relatively long.

一方、図2に示すピン1では、側面4に、凸曲面部4aから一主面3aにかけて連なる凹曲面部4bを備えている。このため、ピン1では、特に凹曲面部4bとウエハ50との距離が比較的大きくされ、ウエハ50と側面4との間隙にパーティクルPが挟まることが抑止されている。また、ピン1では、特に凹曲面部4bの、ウエハ50に比較的近い部分において、この凹曲面部4bに垂直なベクトル成分(図2に矢印で示す)が、主面3aに平行な方向を向くように傾いている。このため、ウエハチャック20に振動が生じた場合でも、側面4(特に凹曲面部4b)に付着している細かなパーティクルは、ウエハ50に向かう方向ではなく、側面4から主面3aと略平行に遠ざかる方向に付勢される。このため、側面4(特に凹曲面部4b)に付着したパーティクルの、ウエハ50への付着は、良好に抑制されている。また、上述のように、ピン1では、真空吸引時の空気抵抗(排気コンダクタンス)が比較的小さくされており、ウエハ50を十分な強度で真空吸着する為に要する時間が、比較的短い。   On the other hand, in the pin 1 shown in FIG. 2, the side surface 4 is provided with a concave curved surface portion 4b continuous from the convex curved surface portion 4a to the one main surface 3a. For this reason, in the pin 1, in particular, the distance between the concave curved surface portion 4 b and the wafer 50 is relatively large, and the particles P are prevented from being caught in the gap between the wafer 50 and the side surface 4. Further, in the pin 1, the vector component (indicated by an arrow in FIG. 2) perpendicular to the concave curved surface portion 4 b is parallel to the main surface 3 a, particularly in the portion of the concave curved surface portion 4 b that is relatively close to the wafer 50. Tilt to face. For this reason, even when vibration occurs in the wafer chuck 20, fine particles adhering to the side surface 4 (particularly the concave curved surface portion 4 b) are not parallel to the main surface 3 a from the side surface 4, but in a direction toward the wafer 50. It is energized in the direction to go away. For this reason, the adhesion of the particles adhering to the side surface 4 (particularly the concave curved surface portion 4b) to the wafer 50 is well suppressed. Further, as described above, the air resistance (exhaust conductance) at the time of vacuum suction is relatively small in the pin 1, and the time required to vacuum-suck the wafer 50 with sufficient strength is relatively short.

本実施形態のウエハチャック20では、例えば、炭化珪素、アルミナ、窒化珪素等を主成分とする焼結体から形成すればよい。特に、炭化珪素質焼結体からなることが好ましい。炭化珪素質焼結体は、室温における熱伝導率を180W/(m・K)以上とすることができるので、試料に局所的に熱が加わった場合でも放熱性に優れ、熱膨張に伴う試料の歪みが生じにくく、半導体製造の露光の発熱による精度の悪化を低減することができる。なお、室温における熱伝導率とは、測定温度を22℃から24℃の範囲内として測定した値であり、この温度範囲内のうち何れかの設定温度で測定した熱伝導率が180W/(m・K)以上であることを示す。さらに、室温を超える環境においても、熱伝導率を高い値で保持することができ、例えば600℃以上での用途でも、熱伝導率60W/(m・K)以上を保つことができる。   For example, the wafer chuck 20 of the present embodiment may be formed of a sintered body mainly composed of silicon carbide, alumina, silicon nitride, or the like. In particular, it is preferably made of a silicon carbide sintered body. Since the silicon carbide sintered body can have a thermal conductivity of 180 W / (m · K) or more at room temperature, it is excellent in heat dissipation even when heat is locally applied to the sample, and a sample accompanying thermal expansion. This distortion is less likely to occur, and accuracy deterioration due to heat generated during exposure in semiconductor manufacturing can be reduced. The thermal conductivity at room temperature is a value measured at a measurement temperature in the range of 22 ° C. to 24 ° C., and the thermal conductivity measured at any set temperature within this temperature range is 180 W / (m -K) Indicates that it is greater than or equal to Furthermore, even in an environment exceeding the room temperature, the thermal conductivity can be maintained at a high value, and for example, the thermal conductivity of 60 W / (m · K) or more can be maintained even in applications at 600 ° C. or higher.

この炭化珪素質焼結体は、平均結晶粒径が3〜10μmの範囲が好ましい。平均粒径が3μm以上であると、炭化珪素質焼結体中の結晶粒子が比較的十分に充填され、焼結体の機械的特性が比較的良好にされる。また、平均結晶粒径が10μm以下のサイズの結晶とすることで、結晶間に存在するボイドの残留を比較的少なくし、例えば、ボイドへのパーティクルの残留を良好に抑制することもできる。したがって、平均結晶粒径は3〜10μmの範囲がよく、好ましくは3〜7μmの範囲が好ましい。   The silicon carbide sintered body preferably has an average crystal grain size in the range of 3 to 10 μm. When the average particle size is 3 μm or more, the crystal particles in the silicon carbide sintered body are relatively sufficiently filled, and the mechanical properties of the sintered body are made relatively good. In addition, by setting the crystal having an average crystal grain size of 10 μm or less, it is possible to relatively reduce the residual voids existing between the crystals, for example, to favorably suppress the residual particles to the voids. Therefore, the average crystal grain size is preferably in the range of 3 to 10 μm, and more preferably in the range of 3 to 7 μm.

炭化珪素質焼結体は、その密度が3.18g/cm以上、ヤング率が440GPa以上、比剛性が135GPa・cm/g以上とすることが好ましく、ピン1の頂面1aに載置された試料の平面度を精度良く保つことが可能になる。また、線膨張係数が室温で2.6×10−6/℃以下である場合、上述の放熱性と相まって半導体製造装置用部材として好適な材質となる。加えて平均ボイド径が1.5μm以下、最大ボイド径が5μm以下であることで、試料に直接接触する部材であってもボイドが小さく、炭化珪素質結晶間に発生するパーティクルの発生を抑制することができる。本実施形態のウエハチャック20は、炭化珪素質焼結体からなる土台基板の表面に、例えば炭化珪素の単結晶層が設けられている。 The silicon carbide sintered body preferably has a density of 3.18 g / cm 3 or more, a Young's modulus of 440 GPa or more, and a specific rigidity of 135 GPa · cm 3 / g or more, and is placed on the top surface 1 a of the pin 1. It becomes possible to maintain the flatness of the obtained sample with high accuracy. Further, when the linear expansion coefficient is 2.6 × 10 −6 / ° C. or less at room temperature, it becomes a material suitable as a member for a semiconductor manufacturing apparatus in combination with the heat dissipation described above. In addition, since the average void diameter is 1.5 μm or less and the maximum void diameter is 5 μm or less, even if the member is in direct contact with the sample, the void is small and the generation of particles generated between silicon carbide crystals is suppressed. be able to. In the wafer chuck 20 of the present embodiment, for example, a single crystal layer of silicon carbide is provided on the surface of a base substrate made of a silicon carbide sintered body.

次いで、上述の試料保持具であるウエハチャック20を得るための製造方法の一実施形態について説明する。図4は、本実施形態の製造方法のフローチャートであり、図5は、本実施形態の製造方法について説明する概略断面図である。   Next, an embodiment of a manufacturing method for obtaining the wafer chuck 20 as the sample holder will be described. FIG. 4 is a flowchart of the manufacturing method of the present embodiment, and FIG. 5 is a schematic cross-sectional view illustrating the manufacturing method of the present embodiment.

まず、基体3を作製する(ステップS102)。この基体3の作製について、詳述しておく。基体主成分として炭化珪素の粉末に、添加剤として少なくともホウ素の化合物及び炭素の化合物の粉末を添加した原料粉末を得る。次いで、この原料粉末を種々の成形方法を用いて成形して成形体を得た後、この成形体を炭化珪素の粒子が粒成長するのを抑制した温度で一次焼結を終了させ一次焼結体を得た後、熱間静水圧プレス成形(HIP:Hot Isostatic Pressing)処理を行う。   First, the base 3 is produced (step S102). The production of the substrate 3 will be described in detail. A raw material powder obtained by adding at least a boron compound powder and a carbon compound powder as additives to silicon carbide powder as a main component of the substrate is obtained. Next, the raw material powder is molded using various molding methods to obtain a molded body, and then the primary sintering is completed at a temperature at which silicon carbide particles are suppressed from growing, and primary sintering is performed. After obtaining the body, hot isostatic pressing (HIP) processing is performed.

基体3の説明について、さらに詳細に説明しておく。主成分として炭化珪素粉末に、添加剤としてホウ素成分を成すホウ素の化合物として炭化ホウ素(BC)や金属ホウ素等、炭素成分を成す炭素の化合物ではカーボンブラック、グラファイト等の他に熱分解により炭素を生成しうるフェノール樹脂やコールタールピッチ等を用いることができる。これら添加剤の含有量は、原料粉末中の酸素量に依存し、炭化珪素原料中の酸素量1モルに対して0.15〜3モルのホウ素、1〜5モルの炭素が残ることが必要である。 The description of the base 3 will be described in more detail. Silicon carbide powder as the main component, boron carbide (B 4 C), metal boron, etc. as boron compounds that form boron components as additives, carbon compounds that form carbon components, such as carbon black, graphite, etc. A phenol resin or coal tar pitch that can generate carbon can be used. The content of these additives depends on the amount of oxygen in the raw material powder, and it is necessary that 0.15 to 3 mol of boron and 1 to 5 mol of carbon remain with respect to 1 mol of oxygen in the silicon carbide raw material. It is.

これらの原料粉末を所定の割合で秤量し、ボールミル等の混合手段により充分に混合した後、この粉末にバインダーを添加し、周知の成形方法、例えば、プレス成形、押出成形、鋳込み成形、冷間静水圧成形等により所望の形状に成形することで成形体を得る。なお、添加剤としてフェノール樹脂等を添加した場合には、600〜800℃で成形体を非酸化性雰囲気中で仮焼処理して熱分解することにより炭素を生成することができる。   These raw material powders are weighed at a predetermined ratio and mixed thoroughly by a mixing means such as a ball mill, and then a binder is added to the powder, and a known molding method such as press molding, extrusion molding, casting molding, cold A molded body is obtained by molding into a desired shape by isostatic pressing or the like. In addition, when phenol resin etc. are added as an additive, carbon can be produced | generated by carrying out the calcination process in 600-800 degreeC in a non-oxidizing atmosphere, and thermally decomposing.

次に、高熱伝導を得るために、前記のようにして得られた成形体を真空中またはAr等の不活性雰囲気中で、1900〜2100℃の比較的低温で一次焼結を行う。これにより、一次焼結の際の熱量を少なくして活性を上げずに粒成長を抑制できるため、成形体の炭化珪素粒子が粒成長するのを抑制でき、且つ結晶間に存在するボイドも小さくすることができる。一次焼結の温度が1900℃よりも低い温度となると、結晶の焼結が進まず、その後にいくらHIP処理を行っても十分なボイドの消滅が困難となる。一方、2100℃よりも高い温度となると、一次焼結体の結晶が肥大化してしまうため、さらにHIP処理を行う場合に、いくら低温で処理しても得られる炭化珪素質焼結体の結晶が大きく、ボイドの消滅が困難となってしまう。さらに、結晶の焼結が不十分であると、粒子の結合も不十分となり、この炭化珪素質焼結体を基板保持盤に使用すると、突起形成時にブラスト加工を行う際に結晶の脱粒が起きやすく、チッピングの原因となってしまう。また、結晶が肥大化した場合は、結晶1つが脱粒した際に一度に欠損部が生じるため、この場合でも突起形成時のブラスト加工時において好ましくない。   Next, in order to obtain high thermal conductivity, the sintered body obtained as described above is subjected to primary sintering at a relatively low temperature of 1900 to 2100 ° C. in a vacuum or in an inert atmosphere such as Ar. As a result, since the grain growth can be suppressed without increasing the activity by reducing the amount of heat at the time of primary sintering, it is possible to suppress the grain growth of the silicon carbide particles of the molded body, and the voids existing between the crystals are also small. can do. When the primary sintering temperature is lower than 1900 ° C., the crystal does not sinter, and it becomes difficult to eliminate sufficient voids no matter how much the HIP treatment is performed thereafter. On the other hand, when the temperature is higher than 2100 ° C., the crystals of the primary sintered body will be enlarged, so that when the HIP treatment is further performed, the crystals of the silicon carbide-based sintered body that can be obtained no matter how low the temperature is, Large, void disappearance becomes difficult. Furthermore, if the crystals are not sufficiently sintered, the bonding of the particles will be insufficient, and if this silicon carbide sintered body is used for a substrate holding disk, the grains will be shattered during blasting during the formation of protrusions. It is easy to cause chipping. In addition, when the crystal is enlarged, a defect portion is generated at a time when one crystal is crushed, and this case is also not preferable at the time of blasting when forming a protrusion.

最後に、得られた一次焼結体をHIP処理する。これにより、炭化珪素の結晶の大きさを一次焼結の終了時の大きさとほぼ同じ大きさに維持したまま、ボイド径が5μmを超えるボイドをほとんど消滅させることができる。加えて、ホウ素や炭素の化合物からなる添加剤や添加物中の陽イオンの炭化珪素への固溶を制御することが可能となり、炭化珪素粒子の粒成長を有効に抑制することができる。   Finally, the obtained primary sintered body is subjected to HIP treatment. As a result, voids having a void diameter exceeding 5 μm can be almost eliminated while maintaining the size of the silicon carbide crystal substantially the same as the size at the end of the primary sintering. In addition, it becomes possible to control the solid solution of an additive composed of a compound of boron or carbon or a cation in the additive into silicon carbide, and the grain growth of silicon carbide particles can be effectively suppressed.

焼成工程において、一次焼結は温度1900〜2100℃、真空雰囲気で行うことが、HIP処理は温度1800〜2000℃、180MPa以上の不活性ガス雰囲気にて行うことにより、得られる炭化珪素質焼結体の平均ボイド径を1.5μm以下、最大ボイド径を5μm以下にすることができ、半導体や液晶製造装置の部材である基板保持盤や、ウエハチャック200として用いた際に、炭化珪素質結晶間に発生するパーティクルの発生を抑制することができる。HIP処理の温度が1800℃よりも低くなると、一次焼結体を形成した温度に対して低いため、緻密化の促進が行われない。さらに、一次焼結の温度よりも100℃以下の低い温度でHIP処理の温度を設定することが好ましく、この温度範囲であれば結晶が軟化した際に高圧にすることができるため、ボイドがより消滅しやすい。一方、2000℃よりも高い温度となると、一次焼結の温度よりも高い温度範囲となるので、結晶の成長が促進されてボイドが消滅しにくく、ウエハチャック200として用いた際に正反射率が低くなりやすい。同時に、180MPa以上の不活性ガス雰囲気とすることで、炭化硅素粒子間に存在するボイドを押しつぶすため、さらにボイドが消滅しやすい。   In the firing step, primary sintering is performed in a vacuum atmosphere at a temperature of 1900 to 2100 ° C., and HIP treatment is performed in an inert gas atmosphere at a temperature of 1800 to 2000 ° C. and 180 MPa or higher to obtain a silicon carbide-based sintered material. The body can have an average void diameter of 1.5 μm or less and a maximum void diameter of 5 μm or less. When used as a substrate holding disk or a wafer chuck 200 as a member of a semiconductor or liquid crystal manufacturing apparatus, a silicon carbide crystal Generation of particles that occur in the meantime can be suppressed. When the temperature of the HIP process is lower than 1800 ° C., the densification is not promoted because the temperature is lower than the temperature at which the primary sintered body is formed. Furthermore, it is preferable to set the temperature of HIP treatment at a temperature lower than 100 ° C. below the temperature of primary sintering, and if this temperature range is reached, the pressure can be increased when the crystal is softened. Easily disappear. On the other hand, when the temperature is higher than 2000 ° C., the temperature range is higher than the temperature of primary sintering, so that crystal growth is promoted and voids are not easily lost. It tends to be low. At the same time, by setting the inert gas atmosphere to 180 MPa or more, voids existing between the silicon carbide particles are crushed, and the voids are more likely to disappear.

さらに好ましくは、前記一次焼結の温度が1950〜2050℃の真空雰囲気にて焼成するとともに、前記HIP処理の温度が1850〜1950℃、190MPa以上の不活性ガス雰囲気にて処理すればよい。   More preferably, the primary sintering temperature is fired in a vacuum atmosphere of 1950 to 2050 ° C., and the HIP treatment temperature is 1850 to 1950 ° C. and an inert gas atmosphere of 190 MPa or more.

また、添加剤として、TiC、TiN、TiO等のチタンの化合物をチタン換算で200ppm以上、且つ400ppm以下の範囲で添加することが好ましい。これは、200ppm未満となると、得られる焼結体の熱伝導率が180W/(m・K)以上、600〜800℃における熱伝導率が60W/(m・K)以上を得ることができず、400ppmを超えると、これらの金属化合物が炭化珪素結晶中に固溶しやすく、炭化珪素質焼結体の強度や剛性を劣化させてしまうためである。また、他の焼結助剤であるホウ素と化合物を生成しやすくなり、焼結性が阻害され、密度が上がらないなどの影響が出てしまう。 Further, as additives, TiC, TiN, a compound of titanium such as TiO 2 200ppm or more in terms of titanium, and is preferably added in the range 400 ppm. If it is less than 200 ppm, the thermal conductivity of the obtained sintered body is 180 W / (m · K) or higher, and the thermal conductivity at 600 to 800 ° C. cannot be 60 W / (m · K) or higher. If it exceeds 400 ppm, these metal compounds are liable to be dissolved in silicon carbide crystals, and the strength and rigidity of the silicon carbide based sintered body are deteriorated. Moreover, it becomes easy to produce | generate a boron and compound which are other sintering auxiliary agents, and sinterability will be inhibited, and influences, such as a density not going up, will come out.

本実施形態では、以上のように作製した炭化珪素質焼結体の土台基板の表面に、例えば公知のCVD法によって、例えば炭化珪素の単結晶層を形成する。単結晶層は、焼結体と比較してボイド等が十分少なく、粒子の脱落によるパーティクルの発生や、ボイド内へのパーティクルの付着等も、比較的十分に抑制される。なお、土台基板の表面に設けられる単結晶層としては、炭化珪素であることに限定されず、例えばサファイア単結晶等を貼り付けてもよい。また、土台基板の表面に、例えばCVD法等によって、非晶質層を形成してもよい。   In the present embodiment, for example, a single crystal layer of silicon carbide is formed on the surface of the base substrate of the silicon carbide sintered body produced as described above, for example, by a known CVD method. The single crystal layer has a sufficiently small amount of voids and the like as compared with the sintered body, and the generation of particles due to the dropping of particles, the adhesion of particles into the voids, and the like are relatively sufficiently suppressed. Note that the single crystal layer provided on the surface of the base substrate is not limited to silicon carbide, and, for example, a sapphire single crystal may be attached. Further, an amorphous layer may be formed on the surface of the base substrate by, for example, a CVD method.

以上のように作成した基体3の主面にレジストを塗布し、第1のレジスト層40を形成する(ステップS104)。レジスト塗布は、例えばラミネート方式やスピンコータ方式など、公知の手法を用いて行えばよい。また、レジストとしては、ウレタン系やシリコン系の感光性樹脂など、公知の感光性樹脂を用いればよい。レジストとしては、いわゆるネガ型であってもポジ型であっても、いずれのレジストであってもよい。以下、いわゆるネガ型レジストを用いた場合について記載する。   A resist is applied to the main surface of the base 3 prepared as described above to form the first resist layer 40 (step S104). The resist coating may be performed using a known method such as a laminate method or a spin coater method. As the resist, a known photosensitive resin such as a urethane-based or silicon-based photosensitive resin may be used. The resist may be a so-called negative type, positive type, or any type of resist. Hereinafter, the case where a so-called negative resist is used will be described.

次に、第1のレジスト40の所定部分を露光して感光させる(ステップS106)。第1のレジスト層40はネガ型であり、露光部分51が感光して硬化される。本実施形態では、ステップS103のレジスト塗布工程と、ステップ104の露光工程と、を繰り返し実施する。このレジスト塗布および露光の繰り返しは、所望の露光パターンが形成されるまで、すなわち、ステップS108における判定がYESとなるまで繰り返し実施される。本実施形態では、図5に示すように、第1のレジスト層40から第4のレジスト層46まで、多層(4層)のレジスト層を順次形成し、各層を順次露光する。第2のレジスト層42以降については、1つ前の層の露光部分の内部領域に対応する部分を露光する。これにより、図5(c)に示すように、上側にいくにつれて基体に平行な断面積が縮小するように段差状に積層された露光部分52〜56を有する、レジスト層の積層体が形成される。   Next, a predetermined portion of the first resist 40 is exposed and exposed (step S106). The first resist layer 40 is a negative type, and the exposed portion 51 is exposed and cured. In the present embodiment, the resist coating process in step S103 and the exposure process in step 104 are repeatedly performed. The resist coating and exposure are repeated until a desired exposure pattern is formed, that is, until the determination in step S108 is YES. In the present embodiment, as shown in FIG. 5, a multilayer (four layers) resist layer is sequentially formed from the first resist layer 40 to the fourth resist layer 46, and each layer is sequentially exposed. For the second resist layer 42 and subsequent portions, a portion corresponding to the inner region of the exposed portion of the previous layer is exposed. As a result, as shown in FIG. 5C, a layered structure of resist layers is formed having exposed portions 52 to 56 that are stacked in steps so that the cross-sectional area parallel to the substrate decreases toward the upper side. The

次に、このように段差状に露光されたレジスト層の積層体を現像し(ステップS110)、図5(d)に示すような、上側にいくにつれて基体に平行な断面積が縮小するように段差状に積層されたレジストパターン60を、基体3の表面に形成する。   Next, the layered structure of resist layers exposed in steps is developed (step S110), and as shown in FIG. 5D, the cross-sectional area parallel to the substrate is reduced toward the upper side. A resist pattern 60 laminated in steps is formed on the surface of the substrate 3.

この状態で、レジストパターン60の側から粒子を吹き付け、基体3の表面をブラスト加工する(ステップS112)。具体的には、例えば公知のブラスト装置を用い、気体と一緒にノズルから酸化アルミや炭化珪素等の粒子を、レジストパターン60が形成された基体3の表面に向けて射出する。その際、噴射流量を例えば0.1〜5m/min、噴射圧力を例えば0.1〜1.0MPaとすればよい。 In this state, particles are sprayed from the resist pattern 60 side, and the surface of the substrate 3 is blasted (step S112). Specifically, for example, using a known blasting apparatus, particles such as aluminum oxide and silicon carbide are ejected from a nozzle together with gas toward the surface of the substrate 3 on which the resist pattern 60 is formed. At that time, the injection flow rate may be set to 0.1 to 5 m 3 / min, and the injection pressure may be set to 0.1 to 1.0 MPa, for example.

このブラスト加工では、基体3のみではなく、レジストパターン60も粒子Dによって表面から除去されていく。このため、図6(a)〜(d)に示すように、ブラスト加工時間が進むにつれて、レジストパターン60の段差形状は一様な斜面形状に近づき、レジストパターンと基体3との接触面積は縮小していく。レジストパターン60は、基体3に垂直な高さが中央領域で最も高い段差状であり、中央領域に近づくにつれてレジストパターン60は長時間残留している。かかるレジストパターン60をマスクとしたブラスト加工を行うことで、図5(e)に示すような、側面が凹曲面状の突出部を容易に形成することができる。   In this blasting process, not only the substrate 3 but also the resist pattern 60 is removed from the surface by the particles D. For this reason, as shown in FIGS. 6A to 6D, as the blast processing time advances, the step shape of the resist pattern 60 approaches a uniform slope shape, and the contact area between the resist pattern and the substrate 3 is reduced. I will do it. The resist pattern 60 has the highest step shape in the central region, the height perpendicular to the base 3, and the resist pattern 60 remains for a long time as it approaches the central region. By performing blasting using the resist pattern 60 as a mask, it is possible to easily form a protrusion having a concave curved surface as shown in FIG.

なお、このブラスト工程の際、噴射流量や噴射圧力を調整することで、基体3およびレジストパターン60の除去レートを、それぞれ調整することができる。このように、基体3およびレジストパターン60の除去レートのバランスを調整することで、図5(e)に示される形態と異なる形態で、突状部を形成することができる。例えば、図3(a)および(b)に示すような断面のピン1を形成することもできる。また、図7(a)に示すように、凸曲面と凹曲面とが交互に連続して配置された複数の段差を側面に有する突出部を形成することも可能であり、また、図7(b)に示すように、基体と接合する下側部分にのみ段差を備えるピンを形成することもできる。   In this blasting process, the removal rate of the substrate 3 and the resist pattern 60 can be adjusted by adjusting the jet flow rate and jet pressure. Thus, by adjusting the balance of the removal rate of the substrate 3 and the resist pattern 60, the protruding portion can be formed in a form different from the form shown in FIG. For example, the pin 1 having a cross section as shown in FIGS. 3A and 3B can be formed. Further, as shown in FIG. 7A, it is possible to form a protrusion having a plurality of steps on the side surface in which convex curved surfaces and concave curved surfaces are arranged alternately and continuously. As shown in b), it is also possible to form a pin having a step only on the lower part joined to the base.

また、このブラスト工程では、粒子Pの種類や吹き付け速度を調整することで、ピン1の側面の表面粗さの程度を調整することができる。さらに、ピン1の側面4は、部分に応じて表面の方向(例えば表面に垂直なベクトルの方向)が異なっている。このため、ピン1では、部分に応じて、ブラスト加工用の粒子Pの衝突する方向が異なっている。本実施形態の製造方法によれば、ピン1の側面4の表面粗さを、異なる部分それぞれで相違させることができる。   In this blasting process, the degree of surface roughness of the side surface of the pin 1 can be adjusted by adjusting the type and spraying speed of the particles P. Further, the side surface 4 of the pin 1 has a different surface direction (for example, a vector direction perpendicular to the surface) depending on the portion. For this reason, in the pin 1, the direction in which the particles P for blasting collide differs depending on the portion. According to the manufacturing method of the present embodiment, the surface roughness of the side surface 4 of the pin 1 can be made different at different portions.

次に、ブラスト加工後の残留レジストを除去した後、基体3に形成された突出部の研磨を行う(ステップS112)。まず、例えばナイロン繊維等を材質としたブラシや、ウレタン系樹脂を材質としたワイピングクロスを用い、基体3の突出部の全体について研磨を行う。この研磨では、研磨油(実際はオリーブ油)に、ダイヤモンド砥粒(数〜数十μmの粒径)を混ぜたスラリーを用いて研磨を行う。この後、基体3に設けられた複数の突状部の頂部を研磨し、各突状部の頂面1aを同一平面上に設定する。この際、例えば、上述と同様のスラリーを使用して、ラップ手法(ラップ定盤と呼ばれる平面度が1μm以下の定盤上に、研磨面を砥流を介して押しつけながら研磨する手法)にて実施すればよい。かかる製造方法によれば、一度のブラスト工程を実施するだけで、所望の形状のピンを形成することが可能であり、所望の形状のピンを複数備える試料保持具を、比較的低いコストで製造することができる。   Next, after removing the residual resist after blasting, the protruding portion formed on the base 3 is polished (step S112). First, for example, a brush made of nylon fiber or the like or a wiping cloth made of urethane resin is used to polish the entire protruding portion of the base 3. In this polishing, polishing is performed using a slurry in which diamond abrasive grains (particle diameter of several to several tens of μm) are mixed with polishing oil (actually olive oil). Thereafter, the tops of the plurality of protrusions provided on the base 3 are polished, and the top surfaces 1a of the protrusions are set on the same plane. At this time, for example, using the same slurry as described above, a lapping method (a method of polishing while pressing the polishing surface through a grinding flow onto a surface plate called a lapping surface plate with a flatness of 1 μm or less) Just do it. According to such a manufacturing method, a pin having a desired shape can be formed only by performing a single blasting process, and a sample holder having a plurality of pins having a desired shape is manufactured at a relatively low cost. can do.

上記ブラスト加工の際、突状部の表面は、ブラストにおける物理的衝撃で形成された破砕層に覆われた状態となっている。この研磨工程では、突出部の頂部を研磨する際、特に頂部近傍の破砕層が同時に除去される。これにより、この研磨工程後の状態では、突状部の頂面1aから連なる側面4に、この頂面1aの周縁に連ねる凸曲面部4aが良好に形成される。なお、突状部(ピン1)の側面4の、基体3に近い側は凹曲面部4bを備え、基体3の主面3aとの接合部は、頂面1aの面積に比べて十分広くされている。このため、ピン1と基体3との接合強度は比較的高くされており、この研磨工程において突出部1に外力が加わった場合でも、ピン1の脱落が抑制されている。また、側面4には比較的大きな段差がないので、たとえばバフ研磨等を実施した際でも、バフによって特定箇所(例えば段差部分)に応力がかかることが抑制されている。また、例えば、図7(a)に示すような、凸曲面と凹曲面とが交互に連続して配置された複数の段差を有する突出部でも、研磨の際に突出部にかかる力が、複数の凹曲面に分散してかかるので、特定の凹曲面に集中して力が印加されることがなく、突出部の損傷が抑制されている。   During the blasting process, the surface of the protrusion is covered with a crushed layer formed by physical impact in blasting. In this polishing step, when the top of the protruding portion is polished, particularly the crushing layer near the top is removed at the same time. Thereby, in the state after this polishing step, the convex curved surface portion 4a that continues to the periphery of the top surface 1a is satisfactorily formed on the side surface 4 that continues from the top surface 1a of the protruding portion. In addition, the side close to the base 3 of the side surface 4 of the protruding portion (pin 1) is provided with a concave curved surface portion 4b, and the joint portion with the main surface 3a of the base 3 is sufficiently wide compared to the area of the top surface 1a. ing. For this reason, the bonding strength between the pin 1 and the substrate 3 is relatively high, and even when an external force is applied to the protrusion 1 in this polishing process, the pin 1 is prevented from falling off. Moreover, since there is no comparatively large level | step difference in the side surface 4, even when buffing etc. are implemented, it is suppressed that a specific location (for example, level | step-difference part) applies a stress by buffing. Further, for example, even in a protruding portion having a plurality of steps in which convex curved surfaces and concave curved surfaces are alternately and continuously arranged as shown in FIG. 7A, a plurality of forces are applied to the protruding portions during polishing. Therefore, the force is not applied concentratedly on the specific concave curved surface, and damage to the protruding portion is suppressed.

なお、上記基体3は、多角形状等などであってもよく、形状について特に限定はされない。また、基体3の材質についても特に限定されないが、セラミックス焼結体等から形成され、特にアルミナ質焼結体、イットリア質焼結体、YAG質焼結体、窒化珪素焼結体、炭化珪素焼結体であることが好ましい。また、基体3の特に表層部は、単結晶や非晶質で構成されていることが好ましい。単結晶や非晶質ではブラスト加工後の表面粗さを比較的小さくすることができ、ピンの側面の微小な凹凸へのパーティクルが滞留等を抑制することができる。
また、プラズマ処理装置等に用いる試料保持具は、耐プラズマ特性を有する必要があり、この場合には、イットリア質焼結体、アルミナ質焼結体、YAG質焼結体を用いることが好ましい。
In addition, the said base | substrate 3 may be polygonal shape etc., and it does not specifically limit about a shape. The material of the substrate 3 is not particularly limited, but is formed from a ceramic sintered body or the like, and in particular, an alumina sintered body, an yttria sintered body, a YAG sintered body, a silicon nitride sintered body, a silicon carbide sintered body, or the like. It is preferable that it is a ligature. Moreover, it is preferable that especially the surface layer part of the base | substrate 3 is comprised by the single crystal or the amorphous. In the case of a single crystal or amorphous material, the surface roughness after blasting can be made relatively small, and particles can be prevented from staying on minute irregularities on the side surface of the pin.
Moreover, the sample holder used for a plasma processing apparatus etc. needs to have a plasma-resistant characteristic. In this case, it is preferable to use a yttria sintered body, an alumina sintered body, or a YAG sintered body.

以上、本発明の試料保持具について説明したが、本発明は上記各実施形態に限定されず、本発明の要旨を逸脱しない範囲において、各種の改良および変更を行ってもよいのはもちろんである。   Although the sample holder of the present invention has been described above, the present invention is not limited to the above embodiments, and various modifications and changes may be made without departing from the scope of the present invention. .

本発明の試料保持具の実施形態の一つである、ウエハチャックの構成について説明する概略断面図である。It is a schematic sectional drawing explaining the structure of the wafer chuck which is one of the embodiments of the sample holder of this invention. 図1に示すウエハチャックに設けられた複数のピンについて説明する断面図である。FIG. 2 is a cross-sectional view illustrating a plurality of pins provided on the wafer chuck shown in FIG. 1. (a)および(b)は、それぞれ、試料保持具のピンの断面形状の例であり、図2に示すピンとは異なる断面形状を示している。(a) And (b) is an example of the cross-sectional shape of the pin of a sample holder, respectively, and has shown cross-sectional shape different from the pin shown in FIG. 本実施形態の試料保持具の製造方法のフローチャートである。It is a flowchart of the manufacturing method of the sample holder of this embodiment. 本実施形態の試料保持具の製造方法について説明する概略断面図である。It is a schematic sectional drawing explaining the manufacturing method of the sample holder of this embodiment. 本実施形態の試料保持具の製造方法の、ブラスト加工工程における形状変化を示す概略断面図である。It is a schematic sectional drawing which shows the shape change in the blasting process of the manufacturing method of the sample holder of this embodiment. 本発明の試料保持具の製造方法によって形成される突出部の形状の、他の例を示す概略断面図である。It is a schematic sectional drawing which shows the other example of the shape of the protrusion part formed by the manufacturing method of the sample holder of this invention.

符号の説明Explanation of symbols

1 ピン
3 基体
3a 主面
4 側面
4a 凸曲面部
4b 凹曲面部
5 境界
7 下端
12 凹欠部
15 シール壁
15a 頂面
20 ウエハチャック
40 レジスト層
50 半導体ウエハ
60 レジストパターン
DESCRIPTION OF SYMBOLS 1 Pin 3 Base | substrate 3a Main surface 4 Side surface 4a Convex curved surface part 4b Concave curved surface part 5 Boundary 7 Lower end 12 Recessed part 15 Seal wall 15a Top surface 20 Wafer chuck 40 Resist layer 50 Semiconductor wafer 60 Resist pattern

Claims (5)

基体と、前記基体の一主面上に設けられた突起部と、を有する試料保持具であって、
前記突起部は、前記一主面と略平行な突出端面を有し、
前記突出端面から前記一主面に連なる側面が、
前記突出端面の周縁に連ねる凸曲面部と、前記凸曲面部から前記一主面にかけて連なる凹曲面部と、を備え、
前記頂面から、前記凸曲面部と前記凹曲面部との境界を通り前記一主面と平行な平面まで距離に対し、前記平行な平面から前記一主面までの距離が、より大きくされていることを特徴とする試料保持具。
A sample holder having a base and a protrusion provided on one main surface of the base,
The protruding portion has a protruding end surface substantially parallel to the one main surface,
A side surface that continues from the protruding end surface to the one main surface,
A convex curved surface portion that continues to the periphery of the protruding end surface, and a concave curved surface portion that continues from the convex curved surface portion to the one main surface,
The distance from the parallel plane to the one principal surface is made larger than the distance from the top surface to the plane parallel to the one principal surface through the boundary between the convex curved surface portion and the concave curved surface portion. A sample holder.
前記突出端面の中心線を通り、前記一主面に垂直な平面による切断線は、
前記一主面から前記突出端面に近づくにしたがい、傾きが大きくなっていることを特徴とする請求項1記載の試料保持具。
A cutting line by a plane passing through the center line of the protruding end surface and perpendicular to the one principal surface is
2. The sample holder according to claim 1, wherein the inclination increases as it approaches the protruding end surface from the one main surface.
前記基体の前記一主面が、単結晶層の表面からなることを特徴とする請求項1または2に記載の試料保持具。   The sample holder according to claim 1, wherein the one main surface of the base body is formed of a surface of a single crystal layer. 前記単結晶層は、炭化珪素質焼結体からなる土台部の表面に設けられていることを特徴とする請求項3記載の試料保持具。   The sample holder according to claim 3, wherein the single crystal layer is provided on a surface of a base portion made of a silicon carbide sintered body. 基体と、前記基体の一主面上に設けられた突起部と、を有する試料保持具であって、
前記突起部は、前記一主面と略平行な突出端面を有し、
前記突出端面から前記一主面に連なる側面に、凸曲面と凹曲面とが交互に連続して配置された複数の段差領域を備えることを特徴とする試料保持具。
A sample holder having a base and a protrusion provided on one main surface of the base,
The protruding portion has a protruding end surface substantially parallel to the one main surface,
A sample holder comprising a plurality of step regions in which convex curved surfaces and concave curved surfaces are alternately and continuously arranged on a side surface continuous from the protruding end surface to the one main surface.
JP2008174695A 2008-07-03 2008-07-03 Test piece holder Pending JP2010016176A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008174695A JP2010016176A (en) 2008-07-03 2008-07-03 Test piece holder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008174695A JP2010016176A (en) 2008-07-03 2008-07-03 Test piece holder

Publications (2)

Publication Number Publication Date
JP2010016176A true JP2010016176A (en) 2010-01-21
JP2010016176A5 JP2010016176A5 (en) 2011-04-28

Family

ID=41702008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008174695A Pending JP2010016176A (en) 2008-07-03 2008-07-03 Test piece holder

Country Status (1)

Country Link
JP (1) JP2010016176A (en)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013030677A (en) * 2011-07-29 2013-02-07 Dainippon Screen Mfg Co Ltd Substrate processing apparatus, substrate holding apparatus, and substrate holding method
JP2013207128A (en) * 2012-03-29 2013-10-07 Dainippon Screen Mfg Co Ltd Substrate holding device and substrate processing device
JP2015050300A (en) * 2013-08-30 2015-03-16 太平洋セメント株式会社 Vacuum suction device and vacuum suction method
WO2015043890A1 (en) * 2013-09-27 2015-04-02 Asml Netherlands B.V. Support table for a lithographic apparatus, lithographic apparatus and device manufacturing method
JPWO2014170929A1 (en) * 2013-04-19 2017-02-16 テクノクオーツ株式会社 Wafer support pin
US9575419B2 (en) 2011-08-17 2017-02-21 Asml Netherlands B.V. Support table for a lithographic apparatus, lithographic apparatus and device manufacturing method
JP2017129848A (en) * 2016-01-18 2017-07-27 Hoya株式会社 Substrate holding device, drawing device, photomask inspection device, and manufacturing method of photomask
WO2017170738A1 (en) * 2016-03-30 2017-10-05 京セラ株式会社 Suction member
JP2017191949A (en) * 2014-09-30 2017-10-19 住友大阪セメント株式会社 Electrostatic chuck device
CN109119372A (en) * 2017-06-26 2019-01-01 日本特殊陶业株式会社 Substrate holding structure
JP2020004892A (en) * 2018-06-29 2020-01-09 日本特殊陶業株式会社 Substrate holding member and manufacturing method thereof
JP2020021922A (en) * 2018-07-24 2020-02-06 住友電気工業株式会社 Substrate heating unit and surface plate
JP6702526B1 (en) * 2019-02-20 2020-06-03 住友大阪セメント株式会社 Electrostatic chuck device
WO2020170514A1 (en) * 2019-02-20 2020-08-27 住友大阪セメント株式会社 Electrostatic chuck device
JP7430074B2 (en) 2020-02-20 2024-02-09 株式会社荏原製作所 Substrate holding device

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08139169A (en) * 1994-11-11 1996-05-31 Sumitomo Metal Ind Ltd Method for making ceramic member for wafer holding base
JP2000252352A (en) * 1999-03-03 2000-09-14 Nikon Corp Substrate holder and charged particle beam aligner employing it
JP2000286329A (en) * 1999-03-31 2000-10-13 Hoya Corp Substrate-holding chuck, manufacture thereof, exposure method, manufacture of semiconductor device and aligner
JP2001176957A (en) * 1999-12-20 2001-06-29 Ngk Spark Plug Co Ltd Suction plate and evacuator
JP2001274227A (en) * 2000-03-27 2001-10-05 Hitachi Chem Co Ltd Method of manufacturing ceramic member for holding wafer
JP2001293650A (en) * 2000-04-12 2001-10-23 Hitachi Chem Co Ltd Manufacturing method of ceramic member for holding wafer
JP2003258069A (en) * 2002-03-05 2003-09-12 Sumitomo Mitsubishi Silicon Corp Retaining tool of semiconductor wafer
JP2006216886A (en) * 2005-02-07 2006-08-17 Dainippon Screen Mfg Co Ltd Chuck, processing unit, substrate processing apparatus and method for cleaning chucking face
JP2007258668A (en) * 2006-02-23 2007-10-04 Kyocera Corp Test piece holder

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08139169A (en) * 1994-11-11 1996-05-31 Sumitomo Metal Ind Ltd Method for making ceramic member for wafer holding base
JP2000252352A (en) * 1999-03-03 2000-09-14 Nikon Corp Substrate holder and charged particle beam aligner employing it
JP2000286329A (en) * 1999-03-31 2000-10-13 Hoya Corp Substrate-holding chuck, manufacture thereof, exposure method, manufacture of semiconductor device and aligner
JP2001176957A (en) * 1999-12-20 2001-06-29 Ngk Spark Plug Co Ltd Suction plate and evacuator
JP2001274227A (en) * 2000-03-27 2001-10-05 Hitachi Chem Co Ltd Method of manufacturing ceramic member for holding wafer
JP2001293650A (en) * 2000-04-12 2001-10-23 Hitachi Chem Co Ltd Manufacturing method of ceramic member for holding wafer
JP2003258069A (en) * 2002-03-05 2003-09-12 Sumitomo Mitsubishi Silicon Corp Retaining tool of semiconductor wafer
JP2006216886A (en) * 2005-02-07 2006-08-17 Dainippon Screen Mfg Co Ltd Chuck, processing unit, substrate processing apparatus and method for cleaning chucking face
JP2007258668A (en) * 2006-02-23 2007-10-04 Kyocera Corp Test piece holder

Cited By (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013030677A (en) * 2011-07-29 2013-02-07 Dainippon Screen Mfg Co Ltd Substrate processing apparatus, substrate holding apparatus, and substrate holding method
US9971252B2 (en) 2011-08-17 2018-05-15 Asml Netherlands B.V. Support table for a lithographic apparatus, lithographic apparatus and device manufacturing method
US9740110B2 (en) 2011-08-17 2017-08-22 Asml Netherlands B.V. Support table for a lithographic apparatus, lithographic apparatus and device manufacturing method
US11650511B2 (en) 2011-08-17 2023-05-16 Asml Netherlands B.V. Support table for a lithographic apparatus, lithographic apparatus and device manufacturing method
US10324382B2 (en) 2011-08-17 2019-06-18 Asml Netherlands B.V. Support table for a lithographic apparatus, lithographic apparatus and device manufacturing method
US10747126B2 (en) 2011-08-17 2020-08-18 Asml Netherlands B.V. Support table for a lithographic apparatus, lithographic apparatus and device manufacturing method
US9575419B2 (en) 2011-08-17 2017-02-21 Asml Netherlands B.V. Support table for a lithographic apparatus, lithographic apparatus and device manufacturing method
JP2013207128A (en) * 2012-03-29 2013-10-07 Dainippon Screen Mfg Co Ltd Substrate holding device and substrate processing device
JPWO2014170929A1 (en) * 2013-04-19 2017-02-16 テクノクオーツ株式会社 Wafer support pin
JP2015050300A (en) * 2013-08-30 2015-03-16 太平洋セメント株式会社 Vacuum suction device and vacuum suction method
US9835957B2 (en) 2013-09-27 2017-12-05 Asml Netherlands B.V. Support table for a lithographic apparatus, lithographic apparatus and device manufacturing method
WO2015043890A1 (en) * 2013-09-27 2015-04-02 Asml Netherlands B.V. Support table for a lithographic apparatus, lithographic apparatus and device manufacturing method
CN105683839A (en) * 2013-09-27 2016-06-15 Asml荷兰有限公司 Support table for a lithographic apparatus, lithographic apparatus and device manufacturing method
JP2017191949A (en) * 2014-09-30 2017-10-19 住友大阪セメント株式会社 Electrostatic chuck device
US10068790B2 (en) 2014-09-30 2018-09-04 Sumitomo Osaka Cement Co., Ltd. Electrostatic chuck device
JP2017129848A (en) * 2016-01-18 2017-07-27 Hoya株式会社 Substrate holding device, drawing device, photomask inspection device, and manufacturing method of photomask
JPWO2017170738A1 (en) * 2016-03-30 2019-01-10 京セラ株式会社 Adsorption member
WO2017170738A1 (en) * 2016-03-30 2017-10-05 京セラ株式会社 Suction member
CN109119372A (en) * 2017-06-26 2019-01-01 日本特殊陶业株式会社 Substrate holding structure
CN109119372B (en) * 2017-06-26 2023-04-25 日本特殊陶业株式会社 Substrate holding member
JP7141262B2 (en) 2018-06-29 2022-09-22 日本特殊陶業株式会社 SUBSTRATE HOLDING MEMBER AND MANUFACTURING METHOD THEREOF
JP2020004892A (en) * 2018-06-29 2020-01-09 日本特殊陶業株式会社 Substrate holding member and manufacturing method thereof
JP2020021922A (en) * 2018-07-24 2020-02-06 住友電気工業株式会社 Substrate heating unit and surface plate
JP6702526B1 (en) * 2019-02-20 2020-06-03 住友大阪セメント株式会社 Electrostatic chuck device
WO2020170514A1 (en) * 2019-02-20 2020-08-27 住友大阪セメント株式会社 Electrostatic chuck device
US11012008B2 (en) 2019-02-20 2021-05-18 Sumitomo Osaka Cement Co., Ltd. Electrostatic chuck device
KR20210068318A (en) * 2019-02-20 2021-06-09 스미토모 오사카 세멘토 가부시키가이샤 electrostatic chuck device
KR102338223B1 (en) 2019-02-20 2021-12-10 스미토모 오사카 세멘토 가부시키가이샤 electrostatic chuck device
JP7430074B2 (en) 2020-02-20 2024-02-09 株式会社荏原製作所 Substrate holding device

Similar Documents

Publication Publication Date Title
JP2010016176A (en) Test piece holder
US11667577B2 (en) Y2O3—ZrO2 erosion resistant material for chamber components in plasma environments
KR101142000B1 (en) Electrostatic chuck
JP4942364B2 (en) Electrostatic chuck, wafer holding member, and wafer processing method
JP2008132562A (en) Vacuum chuck and vacuum suction device using it
JP5063797B2 (en) Adsorption member, adsorption device, and adsorption method
JP4666656B2 (en) Vacuum adsorption apparatus, method for producing the same, and method for adsorbing an object to be adsorbed
JP4782744B2 (en) Adsorption member, adsorption device, and adsorption method
US8971010B2 (en) Electrostatic chuck and method of manufacturing electrostatic chuck
JP6592188B2 (en) Adsorption member
WO2015129302A1 (en) Handle substrate of composite substrate for semiconductor
US9469571B2 (en) Handle substrates of composite substrates for semiconductors
JP2009056518A (en) Suction device, machining system having the same, and machining method
JP5014495B2 (en) Sample holder
JPH10229115A (en) Vacuum chuck for wafer
JP4722006B2 (en) Sample holder
JP5849176B1 (en) Handle substrate for composite substrate for semiconductor and composite substrate for semiconductor
JP2009033001A (en) Vacuum chuck and vacuum sucker and working device using the same
JP2005279789A (en) Vacuum chuck for grinding/polishing
JP2008006529A (en) Vacuum chuck and vacuum suction device using the same
CN110494956B (en) Temporary fixing substrate and molding method of electronic component
JP2006182641A (en) Silicon carbide-based sintered compact, its producing method, and member for semiconductor production device using the same
JP6430081B1 (en) Temporary fixing substrate and electronic component temporary fixing method
JP2005123556A (en) Wafer polishing suction plate
JP2022086147A (en) Method for manufacturing suction member, and suction member

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110314

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20110314

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20120123

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120131

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20120529