JP2010008172A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device relaxing the stress generated in a functional element owing to the difference of the linear expansion ratio with a mounting board. <P>SOLUTION: This device includes: a sensor board 1, which is formed using a first semiconductor board 10, integrated with functional elements (sensor parts E1, IC parts E2); a through-hole wiring forming board 2, which is formed using a second semiconductor board 20, sealed at the one surface side of the sensor board 1; and a cover board 3, which is formed using a third semiconductor board 30, sealed at the other surface side of the sensor board 1. A plurality of pads 25 electrically connected with the functional elements are formed on the surface (the mounting surface side of the second semiconductor board 20) on the opposite side of the sensor board 1 in the through-hole wiring forming board 2. In comparison to the inner pads 25a located relatively closer from the center M of a virtual circle VC which incorporates all pads 25, the rigidity of the outer side pads 25b located relatively further from it is set lower. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor device.

  In recent years, semiconductor devices having a chip size package (CSP) have been researched and developed in various places, and as semiconductor devices whose packages are rapidly becoming chip size packages, acceleration sensors, gyro sensors, pressure sensors, microactuators MEMS (Micro Electro Mechanical Systems) devices such as micro relays are known (for example, see Patent Document 1). In this type of MEMS device, the functional element is, for example, a movable part composed of a beam-shaped bending part and a weight part, a movable part composed of a support spring part and a comb-shaped movable electrode, It has a structure such as a diaphragm part.

  In Patent Document 1, as an example of this type of semiconductor device, as shown in FIG. 10, a piezoresistor (not shown), which is a sensing unit and is formed using a first semiconductor substrate (SOI substrate), is weighted. A sensor substrate 1 having a sensor portion E1 provided in a movable portion composed of a portion 12 and a bending portion 13 and an IC portion E2 cooperating with the sensor portion E1, and a second semiconductor substrate (silicon substrate) are used. A through-hole wiring forming substrate 2 formed and bonded to one surface side of the sensor substrate 1 and having a plurality of pads 25 formed on the surface (mounting surface) opposite to the sensor substrate 1 side, and a third semiconductor substrate (silicon An acceleration sensor comprising a cover substrate 3 formed using a substrate) and bonded to the other surface side of the sensor substrate 1 is described. Here, in the acceleration sensor having the configuration shown in FIG. 10, on the mounting surface of the through-hole wiring forming substrate 2, as shown in FIG. Since the plurality of pads 25 are arranged in a two-dimensional array by being arranged at each lattice point, the planar size of the acceleration sensor can be reduced.

Further, a conventional semiconductor device in which a plurality of pads are arranged in a two-dimensional array on the mounting surface side of a semiconductor substrate, and two layers having different linear expansion coefficients on the surface side where the functional elements are formed on the semiconductor substrate. A stress relaxation layer made of a resin layer is provided, and a rewiring conductor pattern electrically connected to the functional element on the surface side of the semiconductor substrate and each pad are connected through a contact hole formed in the stress relaxation layer. A semiconductor device has been proposed (see Patent Document 2).
JP 2007-263762 A JP 2003-318326 A

  When the semiconductor device having the configuration shown in FIG. 10 is mounted on a mounting substrate (for example, a glass epoxy resin substrate) and used, the plurality of pads 25 of the semiconductor device and the mounting substrate are provided within the projection surface of the semiconductor device. Although it is necessary to electrically connect the plurality of conductor patterns thus formed through joints such as solder and bumps, the stress caused by the difference in linear expansion coefficient between the semiconductor device and the mounting substrate is caused by the sensor substrate 1 from the mounting substrate. It is conceivable that the characteristic of the sensor part E1 which is a functional element is deteriorated by being transmitted to the movable part.

  In addition, by providing a stress relaxation layer as in Patent Document 2, the stress generated at the joint between each pad and the mounting substrate due to the difference in linear expansion coefficient with the mounting substrate can be relaxed, and the connection between the two Although the reliability can be improved, it is difficult to eliminate the stress generated in the functional element, which may affect the characteristics of the functional element. Especially when the semiconductor device is a MEMS device, the characteristics of the functional element are affected. The effect becomes significant.

  The present invention has been made in view of the above-described reasons, and an object thereof is to provide a semiconductor device capable of further relaxing stress generated in a functional element due to a difference in linear expansion coefficient from a mounting substrate. It is in.

  According to the first aspect of the present invention, a functional element is formed in a package formed using a plurality of semiconductor substrates, and is electrically connected to the functional element on the mounting surface side of one of the plurality of semiconductor substrates. In addition, a semiconductor device having a plurality of pads, on the mounting surface side, an outer pad that is relatively far from an inner pad that is a pad that is relatively close to the center of a virtual circle that includes all the pads The pad has a low rigidity.

  According to the present invention, the rigidity of the outer pad, which is a relatively far pad, is lower than that of the inner pad, which is a pad that is relatively close to the center of the virtual circle containing all the pads on the mounting surface side. As a result, the stress on the outer pad, which is likely to generate a larger stress than the inner pad due to the difference in linear expansion coefficient with the mounting board, can be further relaxed, and the difference in linear expansion coefficient with the mounting board can be reduced. It is possible to further relax the stress generated in the functional element.

  The invention of claim 2 is characterized in that, in the invention of claim 1, the rigidity of the outer pad is lowered by using a material having a lower Young's modulus than the inner pad. .

  According to the present invention, the rigidity of the outer pad can be increased by changing the material of the inner pad and the outer pad without changing the shape of the inner pad and the outer pad and the structure of the base. It can be made lower than the rigidity.

  The invention of claim 3 is characterized in that, in the invention of claim 1, the rigidity of the outer pad is lowered by making the cross-sectional area of the outer pad smaller than that of the inner pad.

  According to the present invention, since the rigidity of the outer pad can be reduced only by making the cross-sectional areas of the inner pad and the outer pad different, it is possible to add a special process for reducing the rigidity of the outer pad. The rigidity of the outer pad can be made lower than the rigidity of the inner pad.

  According to a fourth aspect of the present invention, in the first to third aspects of the present invention, a stress buffer layer made of a resin is provided under the outer pad.

  According to this invention, the stress generated in the functional element can be further relaxed.

  The invention of claim 5 is characterized in that, in the invention of claim 4, a void is provided in the stress buffer layer.

  According to this invention, the stress generated in the functional element can be further relaxed.

  According to a sixth aspect of the present invention, in any of the first to fifth aspects of the present invention, the functional element includes a movable portion and a sensing portion that outputs an electrical signal corresponding to the amount of deformation of the movable portion. To do.

  According to this invention, the characteristic fluctuation | variation of the sensing part resulting from the linear expansion coefficient difference with the said mounting board | substrate can be suppressed.

  According to the first aspect of the present invention, there is an effect that it is possible to further relax the stress generated in the functional element due to the difference in linear expansion coefficient from the mounting substrate.

  Hereinafter, the semiconductor device of this embodiment will be described with reference to FIGS.

  In this embodiment, as a semiconductor device, a sensor unit E1 having a movable unit 15 formed using the first semiconductor substrate 10 and provided with a sensing unit described later and an IC unit E2 that cooperates with the sensor unit E1 are integrated. The sensor substrate 1 and the second semiconductor substrate 20 are used to form one surface side of the sensor substrate 1 having a through-hole wiring 24 electrically connected to the sensing portion of the sensor substrate 1 (FIG. 1A ) On the other surface side of the sensor substrate 1 (FIG. 1A) formed using the through-hole wiring forming substrate (first package substrate portion) 2 and the third semiconductor substrate 30 sealed on the upper surface side of FIG. An acceleration sensor provided with a cover substrate (second package substrate portion) 3 sealed on the lower surface side of FIG. Here, the outer peripheral shapes of the sensor substrate 1, the through-hole wiring formation substrate 2, and the cover substrate 3 are rectangular, and the through-hole wiring formation substrate 2 and the cover substrate 3 are formed to have the same outer dimensions as the sensor substrate 1.

  The sensor substrate 1 includes an n-type silicon layer (active layer) 10c on an insulating layer (buried oxide film) 10b made of a silicon oxide film on a support substrate 10a made of a silicon substrate as the first semiconductor substrate 10 described above. The through-hole wiring forming substrate 2 is a silicon wafer (hereinafter referred to as a first silicon wafer) as the second semiconductor substrate 20 described above. The cover substrate 3 employs a silicon wafer (hereinafter referred to as a second silicon wafer) as the above-described third semiconductor substrate 30, and the second silicon wafer is processed by processing the first silicon wafer. This silicon wafer is formed by processing. In this embodiment, the thickness of the support substrate 10a in the SOI wafer is about 300 μm to 500 μm, the thickness of the insulating layer 10b is about 0.3 μm to 1.5 μm, and the thickness of the silicon layer 10c is about 4 μm to 10 μm. The thickness of the first silicon wafer is about 200 μm to 300 μm, and the thickness of the second silicon wafer is about 100 to 300 μm. However, these numerical values are not particularly limited. The surface of the silicon layer 10c, which is the main surface of the SOI wafer, is a (100) plane.

  As shown in FIGS. 1 and 3, the sensor portion E <b> 1 in the sensor substrate 1 includes a frame portion 11 having a frame shape (in the present embodiment, a rectangular frame shape), and a weight portion 12 disposed inside the frame portion 11. Is supported on the frame portion 11 via four flexible strips 13 having flexibility on one surface side (the upper surface side in FIG. 3B). In other words, the sensor substrate 1 is swingably supported by the frame portion 11 via the four flexure portions 13 in which the weight portion 12 disposed inside the frame-shaped frame portion 11 extends from the weight portion 12 in four directions. Has been. Here, the frame portion 11 is formed using the above-described SOI wafer support substrate 10a, insulating layer 10b, and silicon layer 10c. On the other hand, the bending part 13 is formed using the silicon layer 10c in the above-described SOI wafer, and is sufficiently thinner than the frame part 11.

  The weight part 12 is continuously integrated with each of the rectangular parallelepiped core part 12a supported by the frame part 11 via the four flexure parts 13 and the four corners of the core part 12a when viewed from the one surface side of the sensor substrate 1. And four accompanying portions 12b having a rectangular parallelepiped shape connected to each other. In other words, the weight portion 12 is formed integrally with the core portion 12a and the core portion 12a in which the other end portion of each bending portion 13 whose one end portion is connected to the inner side surface of the frame portion 11 is connected to the outer surface. It has four accompanying parts 12b arranged in the space between the part 12a and the frame part 11. That is, each appendage portion 12b is disposed in a space surrounded by the frame portion 11 and the core portion 12a and the two bent portions 13 and 13 extending in a direction orthogonal to each other when viewed from the one surface side of the sensor substrate 1. In addition, a slit 14 is formed between each of the accompanying portions 12b and the frame portion 11, and the interval between the adjacent accompanying portions 12b with the bending portion 13 interposed therebetween is longer than the width dimension of the bending portion 13. Yes. Here, the core portion 12a is formed using the above-described SOI wafer support substrate 10a, the insulating layer 10b, and the silicon layer 10c, and each accompanying portion 12b is formed using the SOI wafer support substrate 10a. It is. Thus, on the one surface side of the sensor substrate 1, the surface of each associated portion 12b is separated from the plane including the surface of the core portion 12a to the other surface side of the sensor substrate 1 (the lower surface side in FIG. 3B). Is located. Note that the above-described frame portion 11, weight portion 12, and each bending portion 13 of the sensor substrate 1 may be formed using a lithography technique and an etching technique.

  By the way, as shown in the lower right of each of FIGS. 3A and 3B, one direction along one side of the frame portion 11 in the plane parallel to the one surface of the sensor substrate 1 is the positive direction of the x axis. If one direction along the side orthogonal to the one side is defined as the positive direction of the y-axis and one direction of the thickness direction of the sensor substrate 1 is defined as the positive direction of the z-axis, the weight portion 12 is extended in the x-axis direction. The pair of flexible portions 13 and 13 sandwiching the core portion 12a and the pair of flexible portions 13 and 13 extending in the y-axis direction and sandwiching the core portion 12a are supported by the frame portion 11. Will be. In the orthogonal coordinates defined by the three axes of the above-described x axis, y axis, and z axis, the center position of the weight portion 12 on the surface of the portion of the sensor substrate 1 formed by the silicon layer 10c is the origin.

  The bending portion 13 (the bending portion 13 on the right side of FIG. 3A) extending from the core portion 12a of the weight portion 12 in the positive direction of the x-axis is a pair of piezoresistors Rx2 and Rx4 in the vicinity of the core portion 12a. Is formed, and one piezoresistor Rz2 is formed in the vicinity of the frame portion 11. On the other hand, the bending portion 13 (the bending portion 13 on the left side of FIG. 3A) extending from the core portion 12a of the weight portion 12 in the negative direction of the x-axis is a pair of piezoresistors Rx1 in the vicinity of the core portion 12a. , Rx3 are formed, and one piezoresistor Rz3 is formed in the vicinity of the frame portion 11. Here, the four piezoresistors Rx1, Rx2, Rx3, and Rx4 formed in the vicinity of the core portion 12a are formed to detect acceleration in the x-axis direction, and the planar shape is an elongated rectangular shape. The wiring (not shown) (diffuse layer wiring, metal) formed on the sensor substrate 1 so as to constitute the left bridge circuit Bx in FIG. 5 is formed so that the longitudinal direction coincides with the longitudinal direction of the flexure 13. Connected by wiring). Note that the piezoresistors Rx1 to Rx4 are formed in a stress concentration region where stress is concentrated in the bent portion 13 when acceleration in the x-axis direction is applied.

  Further, the bending portion 13 (the upper bending portion 13 in FIG. 3A) extended from the core portion 12a of the weight portion 12 in the positive direction of the y-axis is a pair of piezoresistors Ry1, in the vicinity of the core portion 12a. Ry3 is formed, and one piezoresistor Rz1 is formed in the vicinity of the frame portion 11. On the other hand, the bending portion 13 (lower bending portion 13 in FIG. 3A) extending from the core portion 12a of the weight portion 12 in the negative direction of the y-axis is a pair of piezoresistors Ry2 in the vicinity of the core portion 12a. , Ry4 are formed, and one piezoresistor Rz4 is formed at the end on the frame part 11 side. Here, the four piezoresistors Ry1, Ry2, Ry3, and Ry4 formed in the vicinity of the core portion 12a are formed to detect acceleration in the y-axis direction, and the planar shape is an elongated rectangular shape. The wiring (not shown) (diffuse layer wiring, metal) formed on the sensor substrate 1 so as to form the central bridge circuit By in FIG. 5 is formed so that the longitudinal direction coincides with the longitudinal direction of the flexure 13. Connected by wiring). Note that the piezoresistors Ry1 to Ry4 are formed in a stress concentration region where stress is concentrated in the flexure 13 when acceleration in the y-axis direction is applied.

  Further, the four piezoresistors Rz1, Rz2, Rz3, and Rz4 formed in the vicinity of the frame portion 11 are formed to detect acceleration in the z-axis direction, and constitute the right bridge circuit Bz in FIG. In this manner, the sensor substrate 1 is connected by wiring (not shown) (diffusion layer wiring, metal wiring, etc.) formed on the sensor substrate 1. However, the piezoresistors Rz1 and Rz4 formed in one set of the bent portions 13 and 13 of the two bent portions 13 and 13 are formed so that the longitudinal direction thereof coincides with the longitudinal direction of the bent portions 13 and 13. On the other hand, the piezoresistors Rz2 and Rz3 formed in the other set of flexures 13 and 13 are formed such that the longitudinal direction coincides with the width direction (short direction) of the flexures 13 and 13. Yes.

  The piezoresistors Rx1 to Rx4, Ry1 to Ry4, Rz1 to Rz4, and the diffusion layer wirings described above are formed by doping p-type impurities with appropriate concentrations at respective formation sites in the silicon layer 10c. .

  Here, an example of operation | movement of the sensor part E1 in the sensor board | substrate 1 is demonstrated.

  Now, assuming that acceleration is applied to the sensor substrate 1 in the positive x-axis direction while no acceleration is applied to the sensor substrate 1, the frame portion 11 is caused by the inertial force of the weight 12 acting in the negative x-axis direction. Accordingly, the weight 12 is displaced, and as a result, the bending portions 13 and 13 whose longitudinal direction is the x-axis direction are bent, and the resistance values of the piezoresistors Rx1 to Rx4 formed in the bending portions 13 and 13 are changed. Will do. In this case, the piezoresistors Rx1 and Rx3 are subjected to tensile stress, and the piezoresistors Rx2 and Rx4 are subjected to compressive stress. In general, a piezoresistor has a characteristic that a resistance value (resistivity) increases when subjected to a tensile stress, and a resistance value (resistivity) decreases when subjected to a compressive stress. Therefore, the piezoresistors Rx1 and Rx3 are resistant. The value increases, and the resistance values of the piezoresistors Rx2 and Rx4 decrease. Therefore, if a constant DC voltage is applied from the external power supply between the pair of input terminals VDD and GND shown in FIG. 5, the potential difference between the output terminals X1 and X2 of the left bridge circuit Bx shown in FIG. It changes according to the magnitude of the acceleration in the x-axis direction. Similarly, when acceleration in the y-axis direction is applied, the potential difference between the output terminals Y1 and Y2 of the central bridge circuit By shown in FIG. 5 changes according to the magnitude of the acceleration in the y-axis direction, and the z-axis When the acceleration in the direction is applied, the potential difference between the output terminals Z1 and Z2 of the right bridge circuit Bz shown in FIG. 5 changes according to the magnitude of the acceleration in the z-axis direction. Thus, the above-described sensor substrate 1 detects the change in the output voltage of each of the bridge circuits Bx to Bz, so that the acceleration in the x-axis direction, the y-axis direction, and the z-axis direction that acted on the sensor substrate 1 is detected. Can be detected. In this embodiment, the weight part 12 and each bending part 13 comprise the movable part 15, and each piezoresistor Rx1-Rx4, Ry1-Ry4, Rz1-Rz4 comprises the sensing part in the sensor board | substrate 1. FIG. ing. In the present embodiment, each of the sensor unit E1 and the above-described IC unit E2 constitutes a functional element.

  The IC part E2 integrated on the sensor substrate 1 is an integrated circuit (CMOS IC) using CMOS and cooperates with the piezo resistors Rx1 to Rx4, Ry1 to Ry4, Rz1 to Rz4 which are the sensing parts. A working integrated circuit is formed. Here, the integrated circuit of the IC unit E2 includes a signal processing circuit that performs signal processing such as amplification, offset adjustment, and temperature compensation on the output signals of the bridge circuits Bx, By, and Bz, and a signal processing circuit. An EEPROM or the like that stores data used in is integrated.

  By the way, the sensor substrate 1 is formed so that the IC portion E2 surrounds the sensor portion E1, and further, a bonding region portion E3 is formed so as to surround the IC portion E2. In short, the sensor substrate 1 includes the sensor part E1, the IC part E2, and the bonding area part so that the IC part E2 surrounds the sensor part E1 located at the center part in plan view and the bonding part E3 surrounds the IC part E2. The layout of E3 is designed.

  Here, in the IC part E2 of the sensor substrate 1, the occupation area of the ICE2 in the sensor substrate 1 is reduced by using a multilayer wiring technique. Here, on the surface side of the silicon layer 10c of the sensor substrate 1, an insulating film 16 composed of a laminated film of a silicon oxide film and a silicon nitride film on the silicon oxide film is formed. On the surface side of the film 16, a multilayer structure portion 41 made of an interlayer insulating film, a passivation film, or the like is formed, and a plurality of pads 42 are exposed by removing appropriate portions of the passivation film.

  In addition, the sensor substrate 1 includes a plurality of first connecting metal layers 19 for connection to electrically connect the sensing unit and the plurality of through-hole wirings 24 of the through-hole wiring forming substrate 2 (see FIG. 2). ) Is formed on a portion of the insulating film 16 formed in the bonding region E3, and each pad 42 is connected to the first connection via a lead wiring 43 made of a metal material (for example, Au). It is electrically connected to the bonding metal layer 19 (see FIG. 4). Here, in this embodiment, the material of the lead-out wiring 43 and the material of the first connecting bonding metal layer 19 are the same, and the lead-out wiring 43 and the first connecting bonding metal layer 19 are formed in a continuous manner. Has been. The plurality of pads 42 formed in the IC part E2 are electrically connected to the sensing part through a signal processing circuit and electrically connected to the sensing part without passing through the signal processing circuit. In any case, in any case, the through-hole wiring 24 of the through-hole wiring forming substrate 2 and the sensing unit are electrically connected.

  Here, in the bonding region portion E3 of the sensor substrate 1, a frame-shaped (rectangular frame-shaped) first sealing bonding metal layer 18 is formed on the insulating film 16, and the plurality of the above-described first plurality of first bonding metal layers 18 are formed. The connecting bonding metal layer 19 is formed on the insulating film 16 inside the first sealing bonding metal layer 18. In short, the sensor substrate 1 has the first sealing bonding metal layer 18 and each connecting bonding metal layer 19 formed on the same plane. Here, the plurality of first connecting bonding metal layers 19 are arranged to be separated from each other in the circumferential direction of the bonding region E3.

  In the first sealing bonding metal layer 18 and the first connecting bonding metal layer 19, an adhesion improving Ti film is interposed between the bonding Au film and the insulating film 16. In other words, the first sealing bonding metal layer 18 and the first connecting bonding metal layer 19 are a laminated film of a Ti film formed on the insulating film 16 and an Au film formed on the Ti film. It is comprised by. In short, since the first connecting bonding metal layer 19 and the first sealing bonding metal layer 18 are formed of the same metal material, the first connecting bonding metal layer 19 and the first sealing metal layer 19 are formed. The bonding metal layer 18 can be formed at the same time, and the first bonding metal layer 19 for connection and the first bonding metal layer 18 for sealing can be formed to have substantially the same thickness. The first sealing bonding metal layer 18 and the first connecting bonding metal layer 19 have a Ti film thickness of 15 to 50 nm and an Au film thickness of 100 to 500 nm. These numerical values are examples and are not particularly limited. Here, the material of each Au film is not limited to pure gold, and may be added with impurities. In this embodiment, a Ti film is interposed as an adhesion layer for improving adhesion between each Au film and the insulating film 16. However, the material of the adhesion layer is not limited to Ti, and, for example, Cr, Nb Zr, TiN, TaN, etc. may be used.

  As shown in FIGS. 1A and 2, the through-hole wiring forming substrate 2 is formed on the surface of the sensor substrate 1 side (the lower surface side in FIG. 1A) on the surface of the sensor substrate 1 with the weight portion 12 and each bending portion. The displacement space forming concave portion 21 that secures the displacement space of the movable portion 15 is formed, and a plurality of through holes 22 penetrating in the thickness direction are formed in the formation region of the displacement space forming concave portion 21. An insulating film 23 made of a thermal insulating film (silicon oxide film) is formed across both surfaces in the thickness direction and the inner surface of the through hole 22, and the insulating film is formed between the through hole wiring 24 and the inner surface of the through hole 22. A part of 23 is interposed. Here, the through-hole wiring forming substrate 2 has an opening area of the displacement space forming recess 21 so that the sensor portion E1 and the IC portion E2 of the sensor substrate 1 are within the projection area of the opening surface of the displacement space forming recess 21. The multilayer structure portion 41 of the IC portion E2 is arranged in the displacement space forming recess 21 (see FIG. 1A). The plurality of through-hole wirings 24 of the through-hole wiring forming substrate 2 are formed apart from each other in the circumferential direction of the through-hole wiring forming substrate 2. Moreover, although Cu is adopted as the material of the through-hole wiring 24, it is not limited to Cu, and for example, Ni may be adopted.

  In addition, the through-hole wiring forming substrate 2 is disposed on each of the portions corresponding to the plurality of first connecting bonding metal layers 19 of the sensor substrate 1 in the peripheral portion of the displacement space forming recess 21 on the surface on the sensor substrate 1 side. A second connecting bonding metal layer 29 (see FIG. 2) is formed, and each connecting bonding metal layer 29 is routed through an intermediate wiring 26 routed along the inner surface of the displacement space forming recess 21. Each through-hole wiring 24 is electrically connected on a one-to-one basis. The through-hole wiring forming substrate 2 has a frame-shaped (rectangular frame-shaped) second sealing bonding metal layer 28 formed over the entire periphery of the surface portion on the sensor substrate 1 side. The plurality of second connecting bonding metal layers 29 are arranged on the inner side of the second sealing bonding metal layer 28 (here, the second sealing bonding metal layer 28 and each connection bonding layer). The metal layer 29 is formed on the same plane). Here, the second connecting bonding metal layer 29 is formed integrally with the intermediate wiring 26 having one end bonded to the through-hole wiring 24, but may be formed separately from the intermediate wiring 26.

  The second sealing bonding metal layer 28 and the second connecting bonding metal layer 29 have a Ti film for improving adhesion between the bonding Au film and the insulating film 23. In other words, the second sealing bonding metal layer 28 and the second connecting bonding metal layer 29 are a laminated film of a Ti film formed on the insulating film 23 and an Au film formed on the Ti film. It is comprised by. In short, since the second connecting bonding metal layer 29 and the second sealing bonding metal layer 28 are formed of the same metal material, the second connecting bonding metal layer 29 and the second sealing metal layer 29 are formed. The joint metal layer 28 can be formed at the same time, and the second joint metal layer 29 for connection and the second joint metal layer 28 for sealing can be formed to have substantially the same thickness. The second sealing bonding metal layer 28 and the second connecting bonding metal layer 29 have a Ti film thickness of 15 to 50 nm and an Au film thickness of 100 to 500 nm. These numerical values are examples and are not particularly limited. Here, the material of each Au film is not limited to pure gold, and may be added with impurities. In the present embodiment, a Ti film is interposed as an adhesion improving adhesive layer between each Au film and the insulating film 23. However, the material of the adhesion layer is not limited to Ti, and, for example, Cr, Nb Zr, TiN, TaN, etc. may be used.

  In addition, a plurality of pads electrically connected to each of the through-hole wirings 24 are provided on the surface of the through-hole wiring forming substrate 2 opposite to the sensor substrate 1 side (the mounting surface side of the second semiconductor substrate 20). (External connection electrode) 25 is formed. Each pad 25 has a rectangular outer shape (in this embodiment, a square shape), and is arranged on the surface of the through-hole wiring forming substrate 2 opposite to the sensor substrate 1 side at a substantially equal interval. Yes. In the example shown in FIG. 1, each pad 25 is arranged at each lattice point of a 4 × 4 virtual square lattice set on the surface of the through-hole wiring forming substrate 2. Here, in the present embodiment, each pad 25 constitutes a solder reflow pad, and the size of each pad 25 is designed so as not to fall below a size suitable for solder reflow (200 μm □ or more). In addition, the distance between adjacent pads 25 is designed not to be less than the distance suitable for solder reflow. Here, in the present embodiment, since the above-described intermediate wiring 26 is provided on the through-hole wiring forming substrate 2, the size of each pad 25 can be obtained without being restricted by the layout of the second connecting bonding metal layer 29. And placement can be determined. In addition, although the outer peripheral shape of each pad 25 is a rectangular shape, it is not limited to a rectangular shape, and may be a circular shape, for example.

  As shown in FIG. 6, the cover substrate 3 is formed with a recess 31 having a predetermined depth (for example, about 5 μm to 10 μm) that forms a displacement space of the weight 12 on the surface facing the sensor substrate 1. Here, the recess 31 is formed using a lithography technique and an etching technique. In the present embodiment, the concave portion 31 that forms the displacement space of the weight portion 12 is formed on the surface of the cover substrate 3 that faces the sensor substrate 1, but the core portion 12a and each associated portion 12b of the weight portion 12 are formed. The thickness of the portion formed using the support substrate 10a of the sensor substrate 1 is compared with the thickness of the portion formed using the support substrate 10a in the frame portion 11 in the thickness direction of the sensor substrate 1. If the weight 12 is made thinner by the allowable displacement amount, the weight portion in the direction intersecting the other surface is formed on the other surface side of the sensor substrate 1 without forming the recess 31 in the cover substrate 3. A gap that enables the displacement of 12 is formed between the weight portion 12 and the cover substrate 3.

  By the way, the sensor substrate 1 and the through-hole wiring forming substrate 2 in the above-described acceleration sensor are joined to the first sealing bonding metal layer 18 and the second sealing bonding metal layer 28 over the entire circumference. In addition, the first connecting bonding metal layer 19 and the second connecting bonding metal layer 29 are bonded together, and the sensor substrate 1 and the cover substrate 3 have the peripheral portions of the opposing surfaces extending over the entire circumference. Are joined. Further, the acceleration sensor of the present embodiment includes a sensor wafer in which a plurality of sensor substrates 1 are formed on the above-described SOI wafer, a first package wafer in which a plurality of through-hole wiring formation substrates 2 are formed on the above-described first silicon wafer, A wafer level package structure is formed by bonding at a wafer level a second package wafer in which a plurality of cover substrates 3 are formed on the second silicon wafer described above, and then divided into the size of the sensor substrate 1 by a dicing process. Has been. Therefore, the through-hole wiring forming substrate 2 and the cover substrate 3 have the same outer size as the sensor substrate 1, and a package PG composed of a small chip size package can be realized and manufacture is facilitated.

  Here, in the present embodiment, as a bonding method of the sensor wafer, the first package wafer, and the second package wafer, a room temperature bonding method that enables direct bonding at a lower temperature to reduce the residual stress of the sensor substrate 1 is used. Adopted. In the room temperature bonding method, each bonding surface is irradiated with argon plasma or ion beam or atomic beam in vacuum before bonding to clean and activate each bonding surface, and then the bonding surfaces are brought into contact with each other. Join directly at room temperature. In the present embodiment, the first sealing bonding metal layer 18 and the second sealing bonding metal layer 28 are directly bonded by applying an appropriate load at room temperature by the above-described normal temperature bonding method. At the same time, the first connection bonding metal layer 19 and the second connection bonding metal layer 29 are directly bonded, and the peripheral portion of the sensor substrate 1 and the cover are covered at room temperature by the above-described room temperature bonding method. The peripheral portion of the substrate 3 is directly joined.

  Therefore, in the wafer level package structure in the present embodiment, the bonding metal layers 18 and 28 for sealing and the bonding metal layers 19 and 29 for connection between the sensor wafer and the first package wafer are directly bonded, The sensor wafer and the second package wafer are directly bonded by a low temperature process such as a room temperature bonding method, and the sensor wafer and the first package wafer and the second package wafer are subjected to heat treatment such as solder reflow or anodic bonding. Compared with the case of joining by a required method, there is an advantage that the piezoresistors Rx1 to Rx4, Ry1 to Ry4, Rz1 to Rz4 constituting the sensing unit are less susceptible to thermal stress, and the process temperature is low. There is an advantage that the manufacturing process can be simplified and the manufacturing process can be simplified. In the wafer level package structure and the acceleration sensor in the present embodiment, the sensor wafer is formed using an SOI wafer, and the first package wafer and the second package wafer are each formed using a silicon wafer. The stress generated in the bending portion 13 due to the difference in linear expansion coefficient between the sensor wafer and each package wafer can be reduced, and the influence of the stress due to the difference in linear expansion coefficient on the output signals of the bridge circuits Bx, By, Bz. Since it can reduce, it becomes possible to make the temperature dependence of the output characteristic of the sensor part E1 small. In the present embodiment, an SOI wafer is employed as a semiconductor substrate serving as the basis of the sensor substrate 1, but the semiconductor substrate serving as the basis of the sensor substrate 1 is not limited to an SOI wafer, and may be, for example, a silicon wafer.

  By the way, since the above-mentioned sensor substrate 1 is formed so that the IC part E2 surrounds the sensor part E1, the balance of stresses generated in the respective bending parts 13 due to external stress from the IC part E2 side is balanced. Therefore, it is possible to suppress the deterioration of the output characteristics (sensor characteristics) of the sensor unit E1 due to the external stress from the IC unit E2 side.

  However, when the acceleration sensor according to the present embodiment is used by being mounted on a mounting substrate (for example, a glass epoxy resin substrate), each pad 25 and a plurality of conductor patterns provided in the projection surface of the acceleration sensor on the mounting substrate. Need to be electrically connected to each other through a joint such as solder or bump, but stress caused by the difference in linear expansion coefficient between the acceleration sensor and the mounting substrate is transmitted from the mounting substrate to the movable portion 15 of the sensor substrate 1. It is conceivable that the characteristics of the sensor unit E1 that is a functional element deteriorate.

  Therefore, in the acceleration sensor of this embodiment, as shown in FIG. 1B, all the pads 25 on the surface (opposite surface to the mounting substrate) on the opposite side to the sensor substrate 1 side of the through hole wiring formation substrate 2. The rigidity of the outer pad 25b, which is a relatively far pad 25, is lower than that of the inner pad 25a, which is a pad 25 that is relatively close to the center M of the virtual circle VC. In this embodiment, the inner pad 25a and the outer pad 25b are formed of materials having different Young's moduli, and the outer pad 25b is made of a material having a lower Young's modulus than the inner pad 25a. The rigidity of the pad 25b is lowered. Specifically, for example, Ni, Cu or the like may be adopted as the material of the inner pad 25a, and Au or the like may be adopted as the material of the outer pad 25b, but both the inner pad 25a and the outer pad 25b have improved adhesion. It is preferable to provide a Ti film or the like between the insulating film 23 as an adhesion layer for use. Here, the Young's modulus of Ni, Cu, and Au is 199 to 220 GPa, 130 GPa, and 78 GPa, respectively. In addition, the material of each pad 25 should just make the rigidity of the outer side pad 25b low by using the material of the outer side pad 25b as a material with a low Young's modulus compared with the inner side pad 25a, and is restricted to Ni, Cu, Au. Alternatively, other metals or alloys may be used.

  Thus, in the acceleration sensor of the present embodiment, relative to the center M of the virtual circle VC including all the pads 25 on the surface of the through-hole wiring forming substrate 2 (on the mounting surface side of the second semiconductor substrate 20). Since the rigidity of the outer pad 25b, which is a relatively far pad 25, is lower than that of the inner pad 25a, which is a closer pad 25, the rigidity is lower than that of the inner pad 25a due to the difference in linear expansion coefficient with the mounting board. The stress of the outer pad 25b, which is likely to generate a large stress, can be further relaxed, and the stress generated in the deflecting part 13 and the IC part E2 of the sensor part E1, which is a functional element, due to the difference in linear expansion coefficient with the mounting substrate. It becomes possible to relax more. In short, in the semiconductor device according to the present embodiment, the functional element outputs the electric signal corresponding to the movable portion 15 constituted by the weight portion 12 and the bending portions 13 and the deformation amount of the movable portion 15. Since it has a sensing part (piezoresistors Rx1 to Rx4, Ry1 to Ry4, Rz1 to Rz4), it is possible to suppress fluctuations in the characteristics of the sensing part due to a difference in linear expansion coefficient from the mounting substrate.

  In the acceleration sensor of the present embodiment, the outer pad 25b is made of a material having a lower Young's modulus than the inner pad 25a, so that the rigidity of the outer pad 25b is lowered. The rigidity of the outer pad 25b is changed to the rigidity of the inner pad 25a only by changing the material of the inner pad 25a and the outer pad 25b without changing the shape of the substrate and the structure of the base (such as the insulating film 23 and the adhesive layer). Compared to lower.

  In this embodiment, the shape and material of the inner pad 25a and the outer pad 25b are set assuming that the joint between the acceleration sensor and the mounting substrate is formed by solder. The pad 25 may be formed by a bump such as an Au bump. When the bonding portion is formed by an Au bump, the size of each pad 25 is made smaller than when the bonding portion is formed by solder. (For example, when it is formed by solder, it is desirable to set the size to 200 μm □ or more, but when it is formed from Au bumps, it is possible to set the size to 100 μm □ or less. ). Here, the bonding temperature when the bonding portion is formed of solder may be set to about 270 ° C., and the bonding temperature when the bonding portion is formed of Au bumps may be set to about 100 to 400 ° C.

  By the way, in the above-mentioned example, it is relatively compared with the inner pad 25a which is the pad 25 relatively close to the center M of the virtual circle VC including all the pads 25 on the surface of the through-hole wiring forming substrate 2. The outer pad 25b and the inner pad 25a are made of materials having different Young's moduli as means for lowering the rigidity of the outer pad 25b, which is a distant pad 25. The increase in the number of processes increases the cost, and the solder wettability differs between the outer pad 25b and the inner pad 25a.

  Therefore, the inner pad 25a and the outer pad 25b are formed of the same material, and as shown in FIG. 7, the sectional area of the outer pad 25b is smaller than that of the inner pad 25a (the plane size is reduced). The rigidity of the outer pad 25b may be lowered. In this case, the rigidity of the outer pad 25b can be reduced only by changing the cross-sectional areas of the inner pad 25a and the outer pad 25b. The rigidity of the outer pad 25b can be made lower than the rigidity of the inner pad 25a without adding a special step for reducing the rigidity. In the example shown in FIGS. 7A and 7B, an intermediate wiring 26 ′ that connects the through-hole wiring 24 and the pad 25 is formed on the insulating film 23 on the surface side of the through-hole wiring forming substrate 2. A protective layer 226 made of a silicon oxide film, a silicon nitride film, or the like that is formed and protects the intermediate wiring 26 'is provided.

  Further, in order to form the outer pad 25b and the inner pad 25a with the same material and with the same plane size, the inner pad 25a shown in FIG. 8A has the same configuration as FIG. As for the outer pad 25b shown in FIG. 8B, a stress buffer layer 27 made of a resin (for example, polyimide) may be provided under the outer pad 25b. In this case, the sensor unit E1 which is a functional element is also provided. In addition, the stress generated in the IC part E2 can be further relaxed.

  Further, as shown in FIG. 9 (a), the inner pad 25a is formed in the same manner as the outer pad 25b of FIG. 8 (b), and as shown in FIG. 9 (b), in the stress buffer layer 27 immediately below the outer pad 25b. In this case, the stress generated in the sensor part E1 and the IC part E2, which are functional elements, can be further relaxed.

  In the above-described embodiment, the piezoresistive acceleration sensor is exemplified as the semiconductor device. However, the technical idea of the present invention is not limited to the piezoresistive acceleration sensor. For example, a capacitive acceleration sensor or a gyro sensor may be used. It can also be applied to sensors, and in capacitive acceleration sensors and gyro sensors, a weight part provided with a movable electrode or a weight part that also serves as a movable electrode constitutes a movable part, and a sensing part comprises a fixed electrode and a movable electrode. It will be. Further, the number and arrangement of the pads 25 are not particularly limited to the above example, and may be appropriately changed according to the structure of the semiconductor device.

The semiconductor device of embodiment is shown, (a) is a schematic sectional drawing, (b) is a schematic plan view. It is a principal part schematic sectional drawing of a semiconductor device same as the above. The sensor board | substrate in the same as the above is shown, (a) is a schematic plan view, (b) is A-A 'schematic sectional drawing of (a). It is a principal part schematic sectional drawing of the sensor board | substrate in the same as the above. It is a circuit diagram of the sensor part of the sensor board | substrate in the same as the above. The cover board | substrate in the same is shown, (a) is a schematic plan view, (b) is a schematic sectional drawing. It is a principal part schematic sectional drawing of the other structural example same as the above. It is a principal part schematic sectional drawing of the other structural example same as the above. It is a principal part schematic sectional drawing of the other structural example same as the above. The semiconductor device of a prior art example is shown, (a) is a schematic sectional drawing, (b) is a schematic plan view.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Sensor substrate 2 Through-hole wiring formation board 3 Cover substrate 10 1st semiconductor substrate 12 Weight part 13 Bending part 15 Movable part 20 2nd semiconductor substrate 25 (25a) Pad (inner pad)
25 (25b) Pad (outside pad)
27 Stress buffer layer 27a Air gap 30 Third semiconductor substrate Rx1 to Rx4 Piezoresistor (sensing unit)
Ry1-Ry4 Piezoresistor (Sensing part)
Rz1-Rz4 Piezoresistor (Sensing part)
E1 Sensor part (functional element)
E2 IC part (functional element)
PG package VC Virtual circle M Center

Claims (6)

  A semiconductor having a plurality of pads electrically connected to a functional element on a mounting surface side of one of the plurality of semiconductor substrates, the functional element being formed in a package formed using the plurality of semiconductor substrates. The device has a lower rigidity of an outer pad which is a relatively far pad than an inner pad which is a pad relatively closer to the center of a virtual circle containing all the pads on the mounting surface side. There is a semiconductor device.   2. The semiconductor device according to claim 1, wherein the rigidity of the outer pad is lowered by using a material having a lower Young's modulus than the inner pad.   2. The semiconductor device according to claim 1, wherein the rigidity of the outer pad is reduced by making the cross-sectional area of the outer pad smaller than that of the inner pad.   4. The semiconductor device according to claim 1, wherein a stress buffer layer made of a resin is provided under the outer pad. 5.   The semiconductor device according to claim 4, wherein a gap is provided in the stress buffer layer.   6. The semiconductor device according to claim 1, wherein the functional element includes a movable part and a sensing part that outputs an electric signal corresponding to a deformation amount of the movable part. .

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