JP2009527808A - マイクロループコンピュータ命令 - Google Patents

マイクロループコンピュータ命令 Download PDF

Info

Publication number
JP2009527808A
JP2009527808A JP2008555353A JP2008555353A JP2009527808A JP 2009527808 A JP2009527808 A JP 2009527808A JP 2008555353 A JP2008555353 A JP 2008555353A JP 2008555353 A JP2008555353 A JP 2008555353A JP 2009527808 A JP2009527808 A JP 2009527808A
Authority
JP
Japan
Prior art keywords
computer
instructions
instruction
register
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008555353A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009527808A5 (enExample
Inventor
エイチ．ムーア チャールズ
アーサー フォックス ジェフリー
ダブリュ．リブル ジョン
Original Assignee
ブイエヌエス ポートフォリオ リミテッド ライアビリティ カンパニー
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/355,495 external-priority patent/US7904615B2/en
Priority claimed from US11/355,513 external-priority patent/US7904695B2/en
Priority claimed from US11/441,818 external-priority patent/US7934075B2/en
Priority claimed from US11/441,812 external-priority patent/US7913069B2/en
Priority claimed from US11/441,784 external-priority patent/US7752422B2/en
Application filed by ブイエヌエス ポートフォリオ リミテッド ライアビリティ カンパニー filed Critical ブイエヌエス ポートフォリオ リミテッド ライアビリティ カンパニー
Publication of JP2009527808A publication Critical patent/JP2009527808A/ja
Publication of JP2009527808A5 publication Critical patent/JP2009527808A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30134—Register stacks; shift registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/325—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for loops, e.g. loop detection or loop counter
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Multi Processors (AREA)
  • Executing Machine-Instructions (AREA)
  • Power Sources (AREA)
JP2008555353A 2006-02-16 2007-02-16 マイクロループコンピュータ命令 Pending JP2009527808A (ja)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
US11/355,495 US7904615B2 (en) 2006-02-16 2006-02-16 Asynchronous computer communication
US11/355,513 US7904695B2 (en) 2006-02-16 2006-02-16 Asynchronous power saving computer
US78826506P 2006-03-31 2006-03-31
US79734506P 2006-05-03 2006-05-03
US11/441,818 US7934075B2 (en) 2006-02-16 2006-05-26 Method and apparatus for monitoring inputs to an asyncrhonous, homogenous, reconfigurable computer array
US11/441,812 US7913069B2 (en) 2006-02-16 2006-05-26 Processor and method for executing a program loop within an instruction word
US11/441,784 US7752422B2 (en) 2006-02-16 2006-05-26 Execution of instructions directly from input source
PCT/US2007/004029 WO2007098005A2 (en) 2006-02-16 2007-02-16 Microloop computer instructions

Publications (2)

Publication Number Publication Date
JP2009527808A true JP2009527808A (ja) 2009-07-30
JP2009527808A5 JP2009527808A5 (enExample) 2010-04-08

Family

ID=38066677

Family Applications (3)

Application Number Title Priority Date Filing Date
JP2008555372A Pending JP2009527816A (ja) 2006-02-16 2007-02-16 コンピュータへの入力を監視する方法および装置
JP2008555353A Pending JP2009527808A (ja) 2006-02-16 2007-02-16 マイクロループコンピュータ命令
JP2008555354A Pending JP2009527809A (ja) 2006-02-16 2007-02-16 入力ソースから直接の命令の実行

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP2008555372A Pending JP2009527816A (ja) 2006-02-16 2007-02-16 コンピュータへの入力を監視する方法および装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2008555354A Pending JP2009527809A (ja) 2006-02-16 2007-02-16 入力ソースから直接の命令の実行

Country Status (7)

Country Link
EP (3) EP1821202B1 (enExample)
JP (3) JP2009527816A (enExample)
KR (3) KR20090004394A (enExample)
AT (2) ATE495491T1 (enExample)
DE (1) DE602007011841D1 (enExample)
TW (3) TW200809613A (enExample)
WO (3) WO2007098005A2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11841822B2 (en) * 2019-04-27 2023-12-12 Cambricon Technologies Corporation Limited Fractal calculating device and method, integrated circuit and board card
WO2020220935A1 (zh) * 2019-04-27 2020-11-05 中科寒武纪科技股份有限公司 运算装置
US11960438B2 (en) 2020-09-08 2024-04-16 Rambus Inc. Methods and circuits for streaming data to processing elements in stacked processor-plus-memory architecture
GB2609243B (en) * 2021-07-26 2024-03-06 Advanced Risc Mach Ltd A data processing apparatus and method for transmitting triggered instructions between processing elements

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03176757A (ja) * 1989-11-21 1991-07-31 Deutsche Itt Ind Gmbh アレイプロセッサ
JPH05502125A (ja) * 1989-08-03 1993-04-15 ムーア　チャールズ　エイチ 後入れ先出しスタックを備えるマイクロプロセッサ、マイクロプロセッサシステム、及び後入れ先出しスタックの動作方法
JPH08241291A (ja) * 1995-01-26 1996-09-17 Internatl Business Mach Corp <Ibm> プロセッサ
US5752259A (en) * 1996-03-26 1998-05-12 Advanced Micro Devices, Inc. Instruction cache configured to provide instructions to a microprocessor having a clock cycle time less than a cache access time of said instruction cache
JP2000276351A (ja) * 1998-10-06 2000-10-06 Texas Instr Inc <Ti> ローカル命令ルーピングを有するプロセッサ
JP2004030277A (ja) * 2002-06-26 2004-01-29 Oki Electric Ind Co Ltd ループ制御回路及びループ制御方法
JP2004525440A (ja) * 2000-12-19 2004-08-19 ピコチップ デザインズ リミテッド プロセッサアーキテクチャ
JP2005501332A (ja) * 2001-08-22 2005-01-13 アデランテ テクノロジーズ ベスローテン フェンノートシャップ パイプライン化されたプロセッサ及び命令ループ実行方法
JP2005284814A (ja) * 2004-03-30 2005-10-13 Nec Electronics Corp パイプライン方式の情報処理装置及び情報処理方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3757306A (en) * 1971-08-31 1973-09-04 Texas Instruments Inc Computing systems cpu
EP0227319A3 (en) * 1985-12-26 1989-11-02 Analog Devices, Inc. Instruction cache memory
JPS62180456A (ja) * 1986-02-03 1987-08-07 Nippon Telegr & Teleph Corp <Ntt> 並列計算機の信号バイパス方式
US4868745A (en) * 1986-05-30 1989-09-19 Hewlett-Packard Company Data processing system and method for the direct and indirect execution of uniformly structured object types
CA2019299C (en) * 1989-06-22 2002-01-15 Steven Frank Multiprocessor system with multiple instruction sources
US5390304A (en) * 1990-09-28 1995-02-14 Texas Instruments, Incorporated Method and apparatus for processing block instructions in a data processor
JP3102594B2 (ja) * 1991-02-19 2000-10-23 松下電器産業株式会社 キャッシュメモリ装置
US5434989A (en) * 1991-02-19 1995-07-18 Matsushita Electric Industrial Co., Ltd. Cache memory for efficient access with address selectors
JPH04367936A (ja) * 1991-06-17 1992-12-21 Mitsubishi Electric Corp スーパースカラープロセッサ
JPH0863355A (ja) * 1994-08-18 1996-03-08 Mitsubishi Electric Corp プログラム制御装置及びプログラム制御方法
US5727194A (en) 1995-06-07 1998-03-10 Hitachi America, Ltd. Repeat-bit based, compact system and method for implementing zero-overhead loops
JP3344345B2 (ja) * 1998-12-15 2002-11-11 日本電気株式会社 共有メモリ型ベクトル処理システムとその制御方法及びベクトル処理の制御プログラムを格納する記憶媒体
US6938253B2 (en) * 2001-05-02 2005-08-30 Portalplayer, Inc. Multiprocessor communication system and method

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05502125A (ja) * 1989-08-03 1993-04-15 ムーア　チャールズ　エイチ 後入れ先出しスタックを備えるマイクロプロセッサ、マイクロプロセッサシステム、及び後入れ先出しスタックの動作方法
JPH03176757A (ja) * 1989-11-21 1991-07-31 Deutsche Itt Ind Gmbh アレイプロセッサ
JPH08241291A (ja) * 1995-01-26 1996-09-17 Internatl Business Mach Corp <Ibm> プロセッサ
US5752259A (en) * 1996-03-26 1998-05-12 Advanced Micro Devices, Inc. Instruction cache configured to provide instructions to a microprocessor having a clock cycle time less than a cache access time of said instruction cache
JP2000276351A (ja) * 1998-10-06 2000-10-06 Texas Instr Inc <Ti> ローカル命令ルーピングを有するプロセッサ
JP2004525440A (ja) * 2000-12-19 2004-08-19 ピコチップ デザインズ リミテッド プロセッサアーキテクチャ
JP2005501332A (ja) * 2001-08-22 2005-01-13 アデランテ テクノロジーズ ベスローテン フェンノートシャップ パイプライン化されたプロセッサ及び命令ループ実行方法
JP2004030277A (ja) * 2002-06-26 2004-01-29 Oki Electric Ind Co Ltd ループ制御回路及びループ制御方法
JP2005284814A (ja) * 2004-03-30 2005-10-13 Nec Electronics Corp パイプライン方式の情報処理装置及び情報処理方法

Also Published As

Publication number Publication date
DE602007011841D1 (de) 2011-02-24
KR20090017390A (ko) 2009-02-18
WO2007098026A3 (en) 2009-04-09
ATE512400T1 (de) 2011-06-15
EP1821199A1 (en) 2007-08-22
WO2007098005A2 (en) 2007-08-30
JP2009527809A (ja) 2009-07-30
TW200809609A (en) 2008-02-16
EP1821199B1 (en) 2012-07-04
EP1821200B1 (en) 2011-06-08
WO2007098005A3 (en) 2008-10-09
JP2009527816A (ja) 2009-07-30
EP1821200A2 (en) 2007-08-22
TW200809613A (en) 2008-02-16
EP1821202B1 (en) 2011-01-12
EP1821200A3 (en) 2008-09-24
EP1821202A1 (en) 2007-08-22
ATE495491T1 (de) 2011-01-15
KR20090004394A (ko) 2009-01-12
WO2007098006A3 (en) 2009-01-08
WO2007098006A2 (en) 2007-08-30
WO2007098026A2 (en) 2007-08-30
KR20090016645A (ko) 2009-02-17
TW200809531A (en) 2008-02-16

Similar Documents

Publication Publication Date Title
CN101563679A (zh) 用于监控计算机的输入的方法和装置
EP1990718A1 (en) Method and apparatus for loading data and instructions into a computer
US20100281238A1 (en) Execution of instructions directly from input source
EP1840742A2 (en) Method and apparatus for operating a computer processor array
EP1821211A2 (en) Cooperative multitasking method in a multiprocessor system
US8468323B2 (en) Clockless computer using a pulse generator that is triggered by an event other than a read or write instruction in place of a clock
US7966481B2 (en) Computer system and method for executing port communications without interrupting the receiving computer
JP2009527808A (ja) マイクロループコンピュータ命令
US7904615B2 (en) Asynchronous computer communication
US7934075B2 (en) Method and apparatus for monitoring inputs to an asyncrhonous, homogenous, reconfigurable computer array
US20090300334A1 (en) Method and Apparatus for Loading Data and Instructions Into a Computer
EP1821174A1 (en) Asynchronous power saving computer

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100216

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100216

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120831

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20130308