JP2009283903A - Connection substrate and electronic device - Google Patents

Connection substrate and electronic device Download PDF

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JP2009283903A
JP2009283903A JP2009038793A JP2009038793A JP2009283903A JP 2009283903 A JP2009283903 A JP 2009283903A JP 2009038793 A JP2009038793 A JP 2009038793A JP 2009038793 A JP2009038793 A JP 2009038793A JP 2009283903 A JP2009283903 A JP 2009283903A
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Prior art keywords
connection
signal line
insulating substrate
substrate
conductor
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Michinobu Iino
道信 飯野
Tomoki Inoue
友喜 井上
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Kyocera Corp
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Kyocera Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a connection substrate for connecting a circuit board and a semiconductor element capable of satisfactorily propagating a signal by reducing the mismatching of impedance at a connection section even in a high-frequency signal of not less than 10 GHz. <P>SOLUTION: The connection substrate 1 connects lines for high frequencies via a bump 5 for connection in a combination of semiconductor element and circuit board. The connection substrate 1 has a signal line 3 formed on an insulating substrate 2, and ground lines 4, 4 formed at an interval along both sides of the signal line 3 on the insulating substrate 2. The insulating substrate 2 is the connection substrate 1 having a part 6 thinner than the other parts between parts to which the bumps 5 for connection at an edge of the same side of the signal line 3 and the ground line 4 are connected. A capacitive coupling between the signal line 3 of the part to which the bump 5 for connection is connected and the ground line 4 becomes small, so that an increase in the capacitive coupling is offset by the formation of the bump 5 for connection, thus restraining a change in the impedance at the connection section. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、光通信やマイクロ波通信，ミリ波通信等で使用される、特に10ＧＨｚ以上の高周波信号を伝送する回路基板や半導体素子を接続する接続基板、およびこの接続基板により回路基板や半導体素子が接続されている電子装置に関する。   The present invention is used in optical communication, microwave communication, millimeter wave communication, and the like, and in particular, a circuit board for transmitting a high frequency signal of 10 GHz or higher, a connection board for connecting a semiconductor element, and a circuit board or semiconductor element by using this connection board. The present invention relates to an electronic device to which is connected.

光通信や無線通信分野に用いられる従来の電子装置として、図９に断面図で示すような半導体装置がある。この半導体装置は、鉄（Ｆｅ）−ニッケル（Ｎｉ）−コバルト（Ｃｏ）合金や銅（Ｃｕ）−タングステン（Ｗ）合金等の金属から成る箱状の基体109の底部に、ＬＤ（Laser Diode：レーザダイオード）やＰＤ（Photo Diode：フォトダイオ−ド）等の半導体素子107および回路基板108が載置されている。また、基体109の側壁には貫通孔が形成されており、貫通孔内に同軸コネクタ110が嵌着接合されている。   As a conventional electronic device used in the fields of optical communication and wireless communication, there is a semiconductor device as shown in a sectional view in FIG. This semiconductor device has an LD (Laser Diode) on the bottom of a box-shaped substrate 109 made of a metal such as an iron (Fe) -nickel (Ni) -cobalt (Co) alloy or a copper (Cu) -tungsten (W) alloy. A semiconductor element 107 and a circuit board 108 such as a laser diode) and a PD (Photo Diode) are mounted. Further, a through hole is formed in the side wall of the base 109, and the coaxial connector 110 is fitted and joined in the through hole.

この同軸コネクタ110には、外部電気回路（図示せず）に接続された同軸ケーブル（図示せず）が装着され、同軸コネクタ110の中心導体110ａは半田等から成る導電性接着材を介して回路基板108の線路導体に電気的に接続される。半導体素子107と回路基板108とがボンディングワイヤ101を介して電気的に接続されることにより、基体109の内部に収納された半導体素子107と外部電気回路とが電気的に接続されることとなる。そして、基体109の側壁上面に蓋体111をろう付け法やシームウエルド法等の溶接法により接合し、内部を気密に封止することによって半導体装置となる（例えば、特許文献１を参照。）。   A coaxial cable (not shown) connected to an external electric circuit (not shown) is attached to the coaxial connector 110, and the central conductor 110a of the coaxial connector 110 is connected to the circuit via a conductive adhesive made of solder or the like. It is electrically connected to the line conductor of the substrate 108. The semiconductor element 107 and the circuit board 108 are electrically connected via the bonding wire 101, whereby the semiconductor element 107 housed in the base 109 and the external electric circuit are electrically connected. . Then, the lid 111 is joined to the upper surface of the side wall of the base body 109 by a welding method such as a brazing method or a seam weld method, and the inside is hermetically sealed to obtain a semiconductor device (see, for example, Patent Document 1). .

このような半導体装置においては、半導体素子107の高周波化が進むにつれ、ボンディングワイヤ101によるボンディング部においてインピーダンス不整合が生じ、ボンディング部での信号の反射損失および挿入損失が大きくなり、またインダクタンス成分が大きいため信号の減衰量が大きくなるという問題が生じる。   In such a semiconductor device, as the frequency of the semiconductor element 107 increases, impedance mismatching occurs at the bonding portion due to the bonding wire 101, signal reflection loss and insertion loss at the bonding portion increase, and an inductance component increases. A large signal causes a problem that the attenuation of the signal increases.

この問題を解決する一つの手法として、ワイヤボンディングに代えて、信号線路と接地線路とから成るコプレーナ線路等の平面導波路配線が形成された接続基板を用い、この配線基板の平面導波路配線と、半導体素子上の配線および回路基板上の配線とをバンプボンディングにより電気的に接続した半導体装置が提案されている（例えば、特許文献２を参照。）。   As one method for solving this problem, instead of wire bonding, a connection substrate on which a planar waveguide wiring such as a coplanar line composed of a signal line and a grounding line is formed is used. A semiconductor device in which wiring on a semiconductor element and wiring on a circuit board are electrically connected by bump bonding has been proposed (see, for example, Patent Document 2).

特開2003−115630号公報JP 2003-115630 A 特開2002−305263号公報JP 2002-305263 A

しかしながら、従来の半導体装置においては、ワイヤボンディングと比較するとインピーダンスの整合は取れるものの、ボンディング部においては信号線路および接地線路の上に接続用バンプが形成されることにより信号線路および接地線路の厚みが見かけ上厚くなることから、ボンディング部では隣り合う信号線路と接地線路との間の容量結合が大きくなってしまうので、インピーダンスの不整合が起きてしまうという問題があった。これは、より高い周波数の、特に10ＧＨｚ以上の信号を伝播させる場合に、より顕著であり、例えば高い周波数で作動する半導体素子を搭載する半導体装置においては、このインピーダンスの不整合により信号の反射が起きてしまい、信号を良好に伝播させることができなくなってしまうものであった。   However, in the conventional semiconductor device, although impedance matching can be obtained as compared with wire bonding, the thickness of the signal line and the ground line is reduced by forming a connection bump on the signal line and the ground line in the bonding part. Since it is apparently thick, the capacitive coupling between the adjacent signal line and the ground line becomes large in the bonding portion, and there is a problem that impedance mismatch occurs. This is more conspicuous when a signal having a higher frequency, particularly 10 GHz or more, is propagated. For example, in a semiconductor device equipped with a semiconductor element that operates at a higher frequency, the signal is reflected due to this impedance mismatch. It happened and the signal could not be propagated well.

本発明は上記問題点に鑑み完成されたものであり、その目的は、10ＧＨｚ以上の高周波信号においても、接続部でのインピーダンスの不整合を小さくして信号を良好に伝播させることができるような、回路基板や半導体素子の接続をするための接続基板を提供することにある。また、本発明の他の目的は、その接続基板を用いた高周波での作動が良好な電子装置を提供することにある。   The present invention has been completed in view of the above-mentioned problems, and the object thereof is to make it possible to propagate a signal satisfactorily even in a high-frequency signal of 10 GHz or higher by reducing impedance mismatch at the connection portion. Another object of the present invention is to provide a connection board for connecting circuit boards and semiconductor elements. Another object of the present invention is to provide an electronic device that uses the connection substrate and has a high frequency operation.

本発明の接続基板は、半導体素子および回路基板の組合せの間で高周波用線路同士を接続用バンプを介して接続するための接続基板であって、絶縁基板上に形成された信号線路と、前記絶縁基板上に前記信号線路の両側に沿って間隔を設けてそれぞれ形成された接地線路とを有し、前記絶縁基板は、前記信号線路および前記接地線路の同じ側の端部の前記接続用バンプが接続される部位間に、その他の部位における厚みより厚みの薄い部分を有することを特徴とするものである。   The connection board of the present invention is a connection board for connecting high-frequency lines via a connection bump between a combination of a semiconductor element and a circuit board, the signal line formed on an insulating substrate, A ground line formed on both sides of the signal line on the insulating substrate at intervals, and the insulating substrate has the connection bumps at the end portions on the same side of the signal line and the ground line. Between the parts connected to each other, there is a portion having a thickness smaller than the thickness in other parts.

本発明の電子装置は、半導体素子および回路基板の組合せの間で高周波用線路同士が上記構成のいずれかの本発明の接続基板により接続されていることを特徴とするものである。   The electronic device according to the present invention is characterized in that high-frequency lines are connected to each other by a connection substrate according to the present invention having the above-described configuration between a combination of a semiconductor element and a circuit board.

また、本発明の電子装置は、上記構成において、前記半導体素子および前記回路基板が金属から成る基体の上に搭載されており、前記回路基板は、第２の絶縁基板上に形成された信号線路導体と、前記第２の絶縁基板上に前記信号線路導体の両側に沿って間隔を設けてそれぞれ形成された接地線路導体とを有し、前記第２の絶縁基板は、前記接続用バンプが接続される部位間にその他の部位における厚みより厚みの薄い部分を有することを特徴とするものである。   In the electronic device according to the present invention, in the above configuration, the semiconductor element and the circuit board are mounted on a base made of metal, and the circuit board is a signal line formed on a second insulating substrate. A conductor and a ground line conductor formed on the second insulating substrate at intervals along both sides of the signal line conductor, and the second insulating substrate is connected to the connection bump. It is characterized by having a portion thinner than the thickness in other portions between the portions to be formed.

本発明の接続基板によれば、絶縁基板は、信号線路および接地線路の同じ側の端部の接続用バンプが接続される部位間に、その他の部位における厚みより厚みの薄い部分を有することから、接続用バンプが接続される部位の信号線路と接地線路との間において、誘電体である絶縁基板の一部がそれより比誘電率の小さい空間となり、これらの間の容量結合が小さくなるので、接続用バンプが形成されることで信号線路および接地線路の厚みが見かけ上厚くなって容量結合が大きくなるのと相殺されて、ボンディング接続部でのインピーダンスの変化が抑えられた接続基板となる。それによって良好な伝送特性を実現でき、10ＧＨｚ以上の高周波信号においても伝送損失が小さいので、接続基板により接続された半導体素子等を正常に作動させることができる。   According to the connection substrate of the present invention, the insulating substrate has a portion that is thinner than the thickness at the other portion between the portions to which the connection bumps on the same side of the signal line and the ground line are connected. Since a part of the insulating substrate, which is a dielectric, becomes a space having a smaller relative dielectric constant between the signal line and the ground line at the part where the connection bump is connected, the capacitive coupling between them becomes smaller. By forming the connection bump, the thickness of the signal line and the ground line is apparently increased and the capacitive coupling is offset, so that a connection substrate in which a change in impedance at the bonding connection portion is suppressed is obtained. . As a result, good transmission characteristics can be realized, and a transmission loss is small even for a high-frequency signal of 10 GHz or higher, so that a semiconductor element or the like connected by a connection substrate can be operated normally.

本発明の電子装置によれば、半導体素子および回路基板の組合せの間で高周波用線路同士が、上記構成のいずれかの本発明の接続基板により接続されていることから、半導体素子および回路基板の組合せの間で伝送損失の小さい接続がなされて、良好な高周波伝送特性を有する、例えば接続された半導体素子が高速で正常に作動する電子装置となる。   According to the electronic device of the present invention, since the high-frequency lines are connected to each other by the connection substrate of the present invention having the above-described configuration between the combination of the semiconductor element and the circuit board, A connection with a small transmission loss is made between the combinations, and an electronic device having good high-frequency transmission characteristics, for example, a connected semiconductor element operating normally at high speed is obtained.

本発明の電子装置によれば、上記構成において、回路基板の第２の絶縁基板が、接続用バンプが接続される部位間にその他の部位における厚みより厚みの薄い部分を有するときには、接続用バンプが接続される部位の信号線路導体と接地線路導体との間において、誘電体である第２の絶縁基板の一部がそれより比誘電率の小さい空間となり、これらの間の容量結合が小さくなるので、接続用バンプが形成されることで信号線路導体および接地線路導体の厚みが見かけ上厚くなって容量結合が大きくなるのと相殺されて、ボンディング接続部でのインピーダンスの変化が抑えられた回路基板となる。このような回路基板と半導体素子とを上記構成のいずれかの本発明の接続基板により接続することから、より良好な高周波伝送特性を有し、10ＧＨｚ以上の高周波信号においても伝送損失が小さく、半導体素子等を高速で正常に作動させることができる電子装置となる。   According to the electronic device of the present invention, in the above configuration, when the second insulating substrate of the circuit board has a portion thinner than the thickness of the other portion between the portions to which the connection bump is connected, the connection bump A part of the second insulating substrate, which is a dielectric, becomes a space having a smaller relative dielectric constant between the signal line conductor and the ground line conductor at the part to which is connected, and the capacitive coupling between them becomes small. Therefore, the formation of the connection bumps offsets the apparent increase in the thickness of the signal line conductor and the ground line conductor and the increase in capacitive coupling, thereby suppressing the impedance change at the bonding connection. It becomes a substrate. Since such a circuit board and a semiconductor element are connected by the connection board of the present invention having any of the above-described structures, the semiconductor device has better high-frequency transmission characteristics, and a transmission loss is small even for a high-frequency signal of 10 GHz or more. An electronic device capable of operating the elements and the like normally at high speed is obtained.

（ａ）は本発明の接続基板の実施の形態の一例を示す上面図であり、（ｂ）は（ａ）の側面図であり、（ｃ）は（ａ）のを下面図である。(A) is a top view which shows an example of embodiment of the connection board | substrate of this invention, (b) is a side view of (a), (c) is a bottom view of (a). 本発明の接続基板の実施の形態の一例を示す斜視図である。It is a perspective view which shows an example of embodiment of the connection board of this invention. （ａ）は本発明の接続基板の実施の形態の他の例を示す上面図であり、（ｂ）は（ａ）の側面図であり、（ｃ）は（ａ）の下面図である。(A) is a top view which shows the other example of embodiment of the connection board | substrate of this invention, (b) is a side view of (a), (c) is a bottom view of (a). （ａ）〜（ｅ）は、それぞれ本発明の接続基板の実施の形態のさらに他の例を示す側面図である。(A)-(e) is a side view which shows the further another example of embodiment of the connection board of this invention, respectively. （ａ）は本発明の接続基板の実施の形態のさらに他の例を示す上面図であり、（ｂ）は（ａ）のＡ−Ａ線での断面図であり、（ｃ）は（ａ）の下面図である。(A) is a top view which shows the further another example of embodiment of the connection board of this invention, (b) is sectional drawing in the AA of (a), (c) is (a) FIG. 本発明の電子装置の実施の形態の一例を示す断面図である。It is sectional drawing which shows an example of embodiment of the electronic device of this invention. （ａ）および（ｂ）は、それぞれ図10におけるＡ部を上面視した一例を示す平面図である。(A) And (b) is a top view which shows an example which looked at the A section in FIG. 10 from the top, respectively. （ａ）は本発明の電子装置の実施の形態の他の例の要部を拡大して示す平面図であり、（ｂ）は（ａ）のＡ−Ａ線での断面図である。(A) is a top view which expands and shows the principal part of the other example of embodiment of the electronic device of this invention, (b) is sectional drawing in the AA of (a). 従来の半導体装置の実施の形態の一例を示す断面図である。It is sectional drawing which shows an example of embodiment of the conventional semiconductor device.

本発明の接続基板について以下に詳細に説明する。図１（ａ）は本発明の接続基板の実施の形態の一例を示す上面図であり、図１（ｂ）は図１（ａ）の側面図であり、図１（ｃ）は図１（ａ）の下面図である。図２は、図１の接続基板を下方から見た斜視図であり、接続用バンプを接続した例を示している。図３（ａ）は本発明の接続基板の実施の形態の他の例を示す上面図であり、図３（ｂ）は図３（ａ）の側面図であり、図３（ｃ）は図３（ａ）の下面図である。図４（ａ）〜（ｅ）は、それぞれ本発明の接続基板の実施の形態のさらに他の例を示す側面図である。図５（ａ）は本発明の実施の形態のさらに他の例を示す上面図であり、図５（ｂ）は図５（ａ）のＡ−Ａ線での断面図であり、図５（ｃ）は図５（ａ）の下面図である。また、図６は本発明の電子装置の実施の形態の一例を示す断面図である。図７（ａ）および（ｂ）は、図６におけるＡ部を上面視した一例を示す平面図である。図８（ａ）は、図７と同様の、本発明の電子装置の実施の形態の他の例の要部を拡大して示す平面図であり、図８（ｂ）は図８（ａ）のＡ−Ａ線での断面図である。   The connection board of the present invention will be described in detail below. 1A is a top view showing an example of an embodiment of a connection board of the present invention, FIG. 1B is a side view of FIG. 1A, and FIG. 1C is FIG. It is a bottom view of a). FIG. 2 is a perspective view of the connection substrate of FIG. 1 as viewed from below, and shows an example in which connection bumps are connected. 3A is a top view showing another example of the embodiment of the connection substrate of the present invention, FIG. 3B is a side view of FIG. 3A, and FIG. It is a bottom view of 3 (a). 4A to 4E are side views showing still other examples of the embodiment of the connection board of the present invention. 5A is a top view showing still another example of the embodiment of the present invention, FIG. 5B is a cross-sectional view taken along the line AA of FIG. 5A, and FIG. c) is a bottom view of FIG. FIG. 6 is a cross-sectional view showing an example of an embodiment of the electronic device of the present invention. 7A and 7B are plan views showing an example of a top view of the portion A in FIG. FIG. 8A is a plan view showing the enlarged main part of another example of the embodiment of the electronic device of the present invention, similar to FIG. 7, and FIG. 8B is a plan view of FIG. It is sectional drawing in the AA line.

これらの図において、１は接続基板、２は接続基板１の絶縁基板、３は絶縁基板２の主面上に形成された信号線路、４は絶縁基板２の主面上に形成された接地線路、４ａは信号線路３や接地線路４が形成された主面と対向する主面上に形成された接地導体、４ｂは絶縁基板２を貫通して接地線路４と接地導体４ａとを接続する貫通導体、５は接続用バンプ、６は絶縁基板２の厚みの薄い部分、７は半導体素子、７ａは半導体素子７の信号線路導体、７ｂは半導体素子７の接地線路導体、８は回路基板、８ａは回路基板８の信号線路導体、８ｂは回路基板８の接地線路導体、８ｃは回路基板８の側面導体、８ｄは回路基板８の第２の絶縁基板、８ｅは第２の絶縁基板８ｄの厚みの薄い部分、９は半導体素子７や回路基板８が搭載される基体、10は同軸コネクタ、10ａは中心導体、11は蓋体である。   In these drawings, 1 is a connection substrate, 2 is an insulation substrate of the connection substrate 1, 3 is a signal line formed on the main surface of the insulation substrate 2, and 4 is a ground line formed on the main surface of the insulation substrate 2. 4a is a ground conductor formed on the main surface opposite to the main surface on which the signal line 3 and the ground line 4 are formed, and 4b is a through hole that penetrates the insulating substrate 2 and connects the ground line 4 and the ground conductor 4a. Conductors, 5 are bumps for connection, 6 is a thin portion of the insulating substrate 2, 7 is a semiconductor element, 7a is a signal line conductor of the semiconductor element 7, 7b is a ground line conductor of the semiconductor element 7, 8 is a circuit board, 8a Is a signal line conductor of the circuit board 8, 8b is a ground line conductor of the circuit board 8, 8c is a side conductor of the circuit board 8, 8d is a second insulating board of the circuit board 8, and 8e is a thickness of the second insulating board 8d. , 9 is a base on which the semiconductor element 7 and the circuit board 8 are mounted, 10 Coaxial connector, 10a is the center conductor, 11 is a lid.

本発明の接続基板１は、図６および図７に示す例のように、例えば、半導体素子７と回路基板８とを電気的に接続するためのものであり、特に高周波用線路同士を接続するためのものである。接続基板１の半導体素子７や回路基板８に向かい合う面（接続面）には、信号線路３と接地線路４とが形成され、これら信号線路３と接地線路４とでコプレーナ型の伝送線路を構成している。接続基板１の信号線路３は、その一端が回路基板８の信号線路導体８ａに、他端が半導体素子７の信号線路導体７ａに、それぞれ導電性の接続用バンプ５を介して接続される。また、接続基板１の接地線路４・４は、同じくその一端が回路基板８の接地線路導体８ｂに、他端が半導体素子７の接地線路導体７ｂに、それぞれ導電性の接続用バンプ５を介して接続される。   The connection board 1 of the present invention is for electrically connecting, for example, the semiconductor element 7 and the circuit board 8 as in the examples shown in FIGS. 6 and 7, and particularly for connecting the high-frequency lines. Is for. A signal line 3 and a ground line 4 are formed on a surface (connection surface) facing the semiconductor element 7 and the circuit board 8 of the connection substrate 1, and the signal line 3 and the ground line 4 constitute a coplanar transmission line. is doing. One end of the signal line 3 of the connection substrate 1 is connected to the signal line conductor 8 a of the circuit substrate 8 and the other end of the signal line 3 to the signal line conductor 7 a of the semiconductor element 7 via the conductive connection bumps 5. Similarly, the ground lines 4 and 4 of the connection board 1 have one end connected to the ground line conductor 8b of the circuit board 8 and the other end connected to the ground line conductor 7b of the semiconductor element 7 via conductive connection bumps 5, respectively. Connected.

本発明の接続基板１は、図１および図２に示す例のように、半導体素子７および回路基板８の組合せの間で高周波用線路同士を接続用バンプ５を介して接続するための接続基板１であって、絶縁基板２上に形成された信号線路３と、絶縁基板２上に信号線路３の両側に沿って間隔を設けてそれぞれ形成された接地線路４・４とを有し、絶縁基板２は、信号線路３および接地線路４・４の同じ側の端部の接続用バンプ５が接続される部位間に、その他の部位における厚みより厚みの薄い部分６を有することを特徴とするものである。   The connection board 1 of the present invention is a connection board for connecting high-frequency lines via connection bumps 5 between a combination of a semiconductor element 7 and a circuit board 8 as in the example shown in FIGS. 1 and 2. 1, the signal line 3 formed on the insulating substrate 2, and the ground lines 4 and 4 formed on the insulating substrate 2 at intervals along both sides of the signal line 3. The substrate 2 has a portion 6 having a thickness smaller than the thickness at other portions, between the portions to which the connection bumps 5 at the end portions on the same side of the signal line 3 and the ground lines 4 and 4 are connected. Is.

本発明の接続基板１によれば、絶縁基板２は、信号線路３および接地線路４・４の同じ側の端部の接続用バンプ５が接続される部位間に、その他の部位における厚みより厚みの薄い部分６を有することから、接続用バンプ５が接続される部位の信号線路３と接地線路４との間において、誘電体である絶縁基板２の一部がそれより比誘電率の小さい空間となり、これらの間の容量結合が小さくなるので、接続用バンプ５が形成されることで信号線路３および接地線路４の厚みが見かけ上厚くなって容量結合が大きくなるのと相殺されて、ボンディング接続部でのインピーダンスの変化が抑えられた接続基板１となる。   According to the connection substrate 1 of the present invention, the insulating substrate 2 is thicker than the thickness at other portions between the portions where the connection bumps 5 at the ends of the signal line 3 and the ground lines 4 and 4 are connected. A portion of the insulating substrate 2, which is a dielectric material, has a smaller relative dielectric constant between the signal line 3 and the ground line 4 at the part to which the connection bump 5 is connected. Since the capacitive coupling between them becomes smaller, the thickness of the signal line 3 and the ground line 4 is apparently increased due to the formation of the connection bumps 5, which cancels out the capacitive coupling. The connection substrate 1 is obtained in which the change in impedance at the connection portion is suppressed.

接続基板１は、図１および図２に示す例では、接続用バンプ５が接続される部位の信号線路３と接地線路４・４との容量結合を小さくするために、信号線路３および接地線路４・４の両端部の接続用バンプ５が接続される部位より外側の絶縁基板２の厚みを、それより内側の厚みより薄くすることで厚みの薄い部分６を設けている。これにより絶縁基板２の厚みが一様な従来の接続基板に対して、２点鎖線で示す部分が空間になる。通常、空間には空気が存在し、空気の比誘電率は１程度であるため、それ以上の比誘電率を有する絶縁基板２との比誘電率の違いに応じて信号線路３と接地線路４・４との間の容量結合が小さくなる。信号線路３および接地線路４・４の同じ側の端部の接続用バンプ５が接続される部位間の絶縁基板２の厚み（厚みの薄い部分６の厚み）により信号線路３と接地線路４・４との間の容量結合の大きさを調整することができる。   In the example shown in FIGS. 1 and 2, the connection substrate 1 includes the signal line 3 and the ground line in order to reduce the capacitive coupling between the signal line 3 and the ground lines 4 and 4 at the part to which the connection bump 5 is connected. The thin portion 6 is provided by making the thickness of the insulating substrate 2 outside the portion where the connecting bumps 5 at both ends of 4 and 4 are connected to be thinner than the thickness inside. Thereby, a portion indicated by a two-dot chain line becomes a space with respect to a conventional connection substrate having a uniform thickness of the insulating substrate 2. Usually, air exists in the space, and the relative permittivity of air is about 1. Therefore, the signal line 3 and the ground line 4 according to the difference in relative permittivity with the insulating substrate 2 having a relative permittivity higher than that.・ Capacitive coupling with 4 is reduced. Depending on the thickness of the insulating substrate 2 (thickness of the thin portion 6) between the portions to which the connection bumps 5 at the ends of the signal line 3 and the ground lines 4 and 4 are connected are connected. 4 can be adjusted.

図８に示すような従来の半導体装置に対して、このような接続基板１により半導体素子７と回路基板８とを接続した半導体装置の例が、図６に示す本発明の電子装置の一例である。   An example of a semiconductor device in which the semiconductor element 7 and the circuit board 8 are connected by the connection substrate 1 to the conventional semiconductor device as shown in FIG. 8 is an example of the electronic device of the present invention shown in FIG. is there.

すなわち、本発明の電子装置は、半導体素子７および回路基板８の組合せの間で高周波用線路同士が、上記本発明の接続基板１により接続されていることを特徴とするものである。このような本発明の電子装置によれば、半導体素子７および回路基板８の組合せの間で本発明の接続基板１によって伝送損失の小さい接続がなされて、良好な高周波伝送特性を有する、例えば接続された半導体素子７が正常に作動する電子装置となる。   That is, the electronic device of the present invention is characterized in that high-frequency lines are connected by the connection substrate 1 of the present invention between the combination of the semiconductor element 7 and the circuit board 8. According to such an electronic device of the present invention, a connection with a small transmission loss is made between the combination of the semiconductor element 7 and the circuit board 8 by the connection substrate 1 of the present invention, and has good high frequency transmission characteristics, for example, connection The formed semiconductor element 7 is an electronic device that operates normally.

また、本発明の電子装置は、上記構成において、図８に示す例のように、半導体素子７および回路基板８が金属から成る基体９の上に搭載されており、回路基板８は、第２の絶縁基板８ｄ上に形成された信号線路導体８ａと、第２の絶縁基板８ｄ上に信号線路導体８ａの両側に沿って間隔を設けてそれぞれ形成された接地線路導体８ｂとを有し、第２の絶縁基板８ｄは、接続用バンプ５が接続される部位間にその他の部位における厚みより厚みの薄い部分８ｅを有することが好ましい。   In the electronic device according to the present invention, the semiconductor element 7 and the circuit board 8 are mounted on the base 9 made of metal as in the example shown in FIG. A signal line conductor 8a formed on the second insulating substrate 8d, and a ground line conductor 8b formed on the second insulating substrate 8d at intervals along both sides of the signal line conductor 8a. The second insulating substrate 8d preferably has a portion 8e having a thickness smaller than the thickness at other portions between the portions to which the connection bumps 5 are connected.

本発明の電子装置によれば、回路基板８の第２の絶縁基板８ｄは、接続用バンプ５が接続される部位間にその他の部位における厚みより厚みの薄い部分８ｅを有するときには、接続用バンプ５が接続される部位の信号線路導体８ａと接地線路導体８ｂとの間において、誘電体である第２の絶縁基板８ｄの一部がそれより比誘電率の小さい空間となり、これらの間の容量結合が小さくなるので、接続用バンプ５が接続されることで信号線路導体８ａおよび接地線路導体８ｂの厚みが見かけ上厚くなって容量結合が大きくなるのと相殺されて、ボンディング接続部でのインピーダンスの変化が抑えられた回路基板８となる。このような回路基板８と半導体素子７とを上記構成のいずれかの本発明の接続基板１により接続することから、より良好な高周波伝送特性を有し、10ＧＨｚ以上の高周波信号においても伝送損失が小さく、半導体素子７を高速で正常に作動させることができる電子装置となる。   According to the electronic device of the present invention, when the second insulating substrate 8d of the circuit board 8 has the portion 8e having a thickness smaller than the thickness at the other portion between the portions to which the connection bump 5 is connected, the connection bump. 5 between the signal line conductor 8a and the ground line conductor 8b at the part to which the line 5 is connected, a part of the second insulating substrate 8d, which is a dielectric, becomes a space having a smaller relative dielectric constant, and the capacitance therebetween Since the coupling is reduced, the connection bumps 5 are connected, so that the thickness of the signal line conductor 8a and the ground line conductor 8b is apparently increased and the capacitive coupling is increased. Thus, the circuit board 8 is suppressed. Since such a circuit board 8 and the semiconductor element 7 are connected by the connection board 1 of the present invention having any of the above-described configurations, the circuit board 8 and the semiconductor element 7 have better high-frequency transmission characteristics and transmission loss even in high-frequency signals of 10 GHz or higher. The electronic device is small and can operate the semiconductor element 7 normally at high speed.

接続基板１における、絶縁基板２の信号線路３および接地線路４・４の同じ側の端部の接続用バンプ５が接続される部位間の厚み（厚みの薄い部分６の厚み）により信号線路３と接地線路４との間の容量結合の大きさを調整するので、厚みの薄い部分６は、信号線路３や接地線路４・４の大きさや配置、また絶縁基板２の比誘電率に応じてその厚みが設定される。   The signal line 3 depends on the thickness (the thickness of the thin part 6) between the parts of the connection substrate 1 to which the connection bumps 5 on the same side of the signal line 3 and the ground lines 4 and 4 of the insulating substrate 2 are connected. Since the size of the capacitive coupling between the ground line 4 and the ground line 4 is adjusted, the thin portion 6 is determined according to the size and arrangement of the signal line 3 and the ground lines 4 and 4 and the relative dielectric constant of the insulating substrate 2. The thickness is set.

絶縁基板２の厚みの薄い部分６の位置は、接続基板１における信号線路３および接地線路４・４の同じ側の端部の接続用バンプ５が接続される部位間である。信号線路３と接地線路４との間の容量結合を小さくするのが目的であるので、信号線路３および接地線路４・４の同じ側の端部の接続用バンプ５が接続される部位間には、接続用バンプ５が接続される部位も含まれる。すなわち、厚みの薄い部分６は、図３に示す例のような位置に設ければよい。   The position of the thin portion 6 of the insulating substrate 2 is between the portions of the connection substrate 1 to which the connection bumps 5 at the ends of the signal line 3 and the ground lines 4 and 4 on the same side are connected. Since the purpose is to reduce the capacitive coupling between the signal line 3 and the ground line 4, the signal line 3 and the connection bump 5 at the end on the same side of the ground line 4. Includes a portion to which the connection bump 5 is connected. That is, the thin portion 6 may be provided at a position as in the example shown in FIG.

また、厚みの薄い部分６の位置は、厳密に上記のような接続用バンプ５が接続される部位間でなくても、接続用バンプ５が接続される部位より絶縁基板２の外辺側や内側まで伸びていても、信号線路３と接地線路４との間の容量結合の大きさの調整に寄与するので構わない。図１に示す例は、厚みの薄い部分６を接続用バンプ５が接続される部位より絶縁基板２の内側まで、また絶縁基板２の外辺まで拡げた例である。厚みの薄い部分６が、接続用バンプ５が接続される部位の内側の端部を大きく越えて内側にまで設けられると、接続用バンプ５が形成されることにより容量結合が大きくなっていない部分まで信号線路３と接地線路４との間の容量結合が小さくなってしまい、インピーダンスが合わなくなってしまう傾向がある。このことから、絶縁基板２の薄い部分６は、この接続用バンプ５が接続される部位の内側の端部より外側に設けるのが好ましい。   Further, the position of the thin part 6 is not strictly between the parts to which the connection bumps 5 are connected as described above, but the outer side of the insulating substrate 2 or the part where the connection bumps 5 are connected. Even if it extends to the inside, it may contribute to the adjustment of the magnitude of capacitive coupling between the signal line 3 and the ground line 4. The example shown in FIG. 1 is an example in which the thin portion 6 is extended from the portion where the connection bump 5 is connected to the inside of the insulating substrate 2 and to the outer side of the insulating substrate 2. When the thin portion 6 is provided far beyond the inner end of the portion where the connection bump 5 is connected to the inside, the portion where the capacitive coupling is not increased due to the formation of the connection bump 5 Until then, the capacitive coupling between the signal line 3 and the ground line 4 becomes small, and the impedance tends not to match. For this reason, it is preferable that the thin portion 6 of the insulating substrate 2 is provided outside the inner end of the portion to which the connection bump 5 is connected.

絶縁基板２の厚みの薄い部分６の形状は、図１に示す例では、信号線路３および接地線路４・４の両端部の接続用バンプ５が接続される部位より外側の絶縁基板２の厚みを、それより内側の厚みより薄くして段差状にしている。このような形状は、厚みの薄い部分６を平板状の絶縁基板２を研削加工することにより作製するのが容易であるので好ましい。これに対して、図４（ａ）に示す例のような段差の角部が丸まった形状とすると、角部を起点とした割れが発生し難くなるのでより好ましい。また、厚みの薄い部分６は、図１に示す例のように一様な厚みでなくてもよく、例えば、図４（ｂ）や図４（ｃ）に示す例のように、接続用バンプ５が接続される部位から絶縁基板２の外辺にかけて厚みが薄くなるようにしてもよい。この場合も、図４（ｂ）に示す例のように、接続用バンプ５が接続される部位から絶縁基板２の外辺にかけて直線的に厚みが薄くなる傾斜面を形成してもよく、この傾斜面を図４（ｃ）に示すような、絶縁基板２の端に近づくに連れて傾斜が緩くなるような曲面にしてもよい。また、このような場合は、図１に示す例に比べて、絶縁基板２の薄い部分６で割れが発生し難くなり、図４（ｃ）のようにすると、容量結合をより小さくすることができる。また、厚みの薄い部分６が一様な厚みであっても、図４（ｄ）に示す例のように、厚みの薄い部分６が、絶縁基板２の端部を残した溝状であると、絶縁基板２の強度低下がより小さいので好ましい。さらに図４（ｅ）に示すように、絶縁基板２の端部を全周残して厚みの薄い部分６を凹部状とすると、絶縁基板２の強度低下をさらに小さくすることができるので、より好ましい。   In the example shown in FIG. 1, the shape of the thin portion 6 of the insulating substrate 2 is the thickness of the insulating substrate 2 outside the portion where the connection bumps 5 at both ends of the signal line 3 and the ground lines 4 and 4 are connected. Is stepped by making it thinner than the inner thickness. Such a shape is preferable because it is easy to produce the thin portion 6 by grinding the flat insulating substrate 2. On the other hand, a shape with rounded corners as in the example shown in FIG. 4A is more preferable because cracks starting from the corners are less likely to occur. Further, the thin portion 6 does not have to have a uniform thickness as in the example shown in FIG. 1. For example, as shown in FIG. 4B or FIG. The thickness may be reduced from the portion where 5 is connected to the outer side of the insulating substrate 2. Also in this case, as in the example shown in FIG. 4B, an inclined surface that linearly decreases in thickness from a portion where the connection bump 5 is connected to the outer side of the insulating substrate 2 may be formed. As shown in FIG. 4C, the inclined surface may be a curved surface that becomes gradually inclined toward the end of the insulating substrate 2. In such a case, cracks are less likely to occur in the thin portion 6 of the insulating substrate 2 than in the example shown in FIG. 1, and capacitive coupling can be made smaller as shown in FIG. 4C. it can. Further, even if the thin portion 6 has a uniform thickness, the thin portion 6 has a groove shape that leaves the end portion of the insulating substrate 2 as in the example shown in FIG. It is preferable because the strength reduction of the insulating substrate 2 is smaller. Further, as shown in FIG. 4 (e), it is more preferable to leave the end portion of the insulating substrate 2 all around the periphery and to make the thin portion 6 into a concave shape, since the strength reduction of the insulating substrate 2 can be further reduced. .

また、接続基板１は、図５に示す例のように、絶縁基板２の信号線路３および接地線路４・４が形成された主面と対向する主面に接地導体４ａが形成され、絶縁基板２を貫通して接地線路４・４と接地導体４とを接続する貫通導体４ｂが形成されたものでもよい。この場合、厚みの薄い部分６にも接地導体４ａを形成すると、厚みの薄い部分６とその他の部分とでは、接地導体４ａと信号線路３との距離が異なるので、インピーダンスが大きくずれてしまうことから、厚みの薄い部分６には接地導体４ａを形成しない。このような接続基板１とすると、疑似同軸の構造となり、高周波の信号をより良好に伝播させることができるようになる。接地線路４・４と接地導体４ａとを接続する導体としては、図５に示す例のような貫通導体４ｂでなくてもよく、絶縁基板２の側面に形成した側面導体や、絶縁基板２の側面に形成した切欠きの内面に導体層を形成したいわゆるキャステレーション導体であってもよい。   Further, as shown in the example shown in FIG. 5, the connection substrate 1 has a ground conductor 4a formed on the main surface of the insulating substrate 2 opposite to the main surface on which the signal lines 3 and the ground lines 4 and 4 are formed. 2 may be formed, and a through conductor 4b that connects the ground lines 4 and 4 and the ground conductor 4 may be formed. In this case, if the ground conductor 4a is also formed in the thin portion 6, the impedance is greatly shifted in the thin portion 6 and other portions because the distance between the ground conductor 4a and the signal line 3 is different. Therefore, the ground conductor 4a is not formed in the thin portion 6. When such a connection substrate 1 is used, a pseudo-coaxial structure is provided, and a high-frequency signal can be propagated better. The conductor that connects the ground lines 4 and 4 and the ground conductor 4a may not be the through conductor 4b as shown in the example of FIG. 5, but the side conductor formed on the side surface of the insulating substrate 2 or the insulating substrate 2 It may be a so-called castellation conductor in which a conductor layer is formed on the inner surface of a notch formed on the side surface.

このときの貫通導体４ｂは、接地線路４・４の信号線路３側の外辺に沿って配列すると、接地線路４・４の信号線路３側の外辺から貫通導体４ｂまでの距離が同程度になり、接地線路４・４と接地導体４ａとの間の電位差が、信号線路３側において同程度になるので好ましい。また、接地線路４・４の幅方向における電位差が生じないように、貫通導体４ｂの径に対して接地線路４・４の幅は小さい方が好ましい。図５に示す例のように、貫通導体４ｂの径に対して接地線路４・４の幅は大きい場合は、貫通導体４ｂを接地線路４・４の幅方向に複数列配置すると接地線路４・４の幅方向における電位差を小さくすることができる。このようなことから、接地線路４・４の幅方向の片側だけに形成される側面導体やキャステレーション導体よりも貫通導体４ｂの方がより好ましい。   When the through conductors 4b are arranged along the outer sides of the ground lines 4 and 4 on the signal line 3 side, the distances from the outer sides of the ground lines 4 and 4 on the signal line 3 side to the through conductors 4b are approximately the same. This is preferable because the potential difference between the ground lines 4 and 4 and the ground conductor 4a is approximately the same on the signal line 3 side. Further, it is preferable that the width of the ground lines 4 and 4 is smaller than the diameter of the through conductor 4b so that a potential difference in the width direction of the ground lines 4 and 4 does not occur. As in the example shown in FIG. 5, when the width of the ground line 4 · 4 is larger than the diameter of the through conductor 4 b, if a plurality of through conductors 4 b are arranged in the width direction of the ground line 4 · 4, The potential difference in the width direction of 4 can be reduced. For this reason, the through conductor 4b is more preferable than the side conductors and castellation conductors formed only on one side in the width direction of the ground lines 4 and 4.

接続基板１は、例えば、比誘電率が9.5の酸化アルミニウム質焼結体から成り、厚みが0.2ｍｍである絶縁基板２を用いた場合であれば、信号線路３の幅を0.1ｍｍ、厚みを0.002ｍｍとし、その両側に0.05ｍｍの間隔を設けて同じ厚みで幅が0.4ｍｍの接地線路４・４を形成することにより、信号線路３を50Ωにインピーダンス整合させたコプレーナ線路とすることができる。そして、直径0.1ｍｍで高さ0.02ｍｍの円柱状のバンプを、信号線路３および接地線路４・４の両端部（絶縁基板２の外辺に同じ）から0.1ｍｍの位置に接続用バンプ５の中央を配して設ける場合は、例えば、絶縁基板２の端面から0.15ｍｍまでの厚みを0.02ｍｍとした、図１に示す例のような厚みの薄い部分６を形成することによって、接続用バンプ５が接続される両端部においてもインピーダンスを約50Ωに近づけることができる。   For example, when the insulating substrate 2 made of an aluminum oxide sintered body having a relative dielectric constant of 9.5 and having a thickness of 0.2 mm is used as the connecting substrate 1, the width of the signal line 3 is 0.1 mm and the thickness is increased. By forming ground lines 4 and 4 having the same thickness and width of 0.4 mm by providing an interval of 0.05 mm on both sides of the gap, the signal line 3 can be a coplanar line impedance matched to 50Ω. . A cylindrical bump having a diameter of 0.1 mm and a height of 0.02 mm is formed on the connection bump 5 at a position 0.1 mm from both ends of the signal line 3 and the ground lines 4 and 4 (same as the outer side of the insulating substrate 2). In the case where the center is provided, for example, a bump 6 for connection is formed by forming a thin portion 6 as in the example shown in FIG. 1 in which the thickness from the end face of the insulating substrate 2 to 0.15 mm is 0.02 mm. The impedance can be brought close to about 50Ω at both ends to which 5 is connected.

接続基板１は、酸化アルミニウム（アルミナ：Ａｌ２Ｏ３）質焼結体，窒化アルミニウム（ＡｌＮ）質焼結体，ガラスセラミック焼結体等のセラミックスや、エポキシ，ポリイミド，テトラフルオロエチレン，液晶ポリマー等の樹脂から成る絶縁基板２に、信号線路３および接地線路４・４が形成されたものである。 The connection substrate 1 is made of ceramic such as aluminum oxide (alumina: Al 2 O 3 ) sintered body, aluminum nitride (AlN) sintered body, glass ceramic sintered body, epoxy, polyimide, tetrafluoroethylene, liquid crystal polymer, etc. A signal line 3 and ground lines 4 and 4 are formed on an insulating substrate 2 made of a resin such as.

絶縁基板２は、例えば酸化アルミニウム質焼結体から成る場合であれば、まずアルミナ（Ａｌ２Ｏ３）やシリカ（ＳｉＯ２），カルシア（ＣａＯ），マグネシア（ＭｇＯ）等の原料粉末に適当な有機溶剤，溶媒および有機バインダーを添加混合して泥漿状とし、これを周知のドクターブレード法やカレンダーロール法等によりシート状に成形してセラミックグリーンシート（以下、グリーンシートともいう。）を得る。その後、グリーンシートを所定形状に打ち抜き加工するとともに必要に応じて複数枚積層して積層体を作製し、これを約1600℃の温度で焼成することにより製作される。または、Ａｌ２Ｏ３，ＳｉＯ２，ＣａＯ，ＭｇＯ等の原料粉末に必要に応じて有機バインダーを加えたものを金型に充填しプレス成型することによって所定の形状に成形して、この成形体を約1600度の温度で焼成することによって製作される。 If the insulating substrate 2 is made of, for example, an aluminum oxide sintered body, it is suitable for a raw material powder such as alumina (Al 2 O 3 ), silica (SiO 2 ), calcia (CaO), and magnesia (MgO). An organic solvent, a solvent and an organic binder are added and mixed to form a slurry, which is formed into a sheet by a known doctor blade method, calendar roll method or the like to obtain a ceramic green sheet (hereinafter also referred to as a green sheet). Thereafter, the green sheet is punched into a predetermined shape, and a plurality of laminated sheets are produced as necessary to produce a laminate, which is then fired at a temperature of about 1600 ° C. Alternatively, a raw material powder such as Al 2 O 3 , SiO 2 , CaO, MgO or the like, which is added with an organic binder as necessary, is filled into a mold and press-molded to form a predetermined shape, and this molded body Is fired at a temperature of about 1600 degrees.

絶縁基板２の厚みの薄い部分６は、上記のようにして作製した平板状の絶縁基板２を、研削加工等より形成することができる。信号線路３および接地線路４・４等を形成した後に形成してもよい。グリーンシートの積層体を作製した後に同様の加工を施してもよい。また、図１に示す例の場合は、大きさの異なるグリーンシートを積層して積層体を作製しておく、あるいは、図３に示す例の場合であれば、貫通孔を有するグリーンシートを用いて積層体を作製しておくことでも作製することができる。   The thin part 6 of the insulating substrate 2 can be formed by grinding the flat insulating substrate 2 produced as described above. It may be formed after the signal line 3 and the ground lines 4 and 4 are formed. You may perform the same process after producing the laminated body of a green sheet. In the case of the example shown in FIG. 1, green sheets having different sizes are laminated to prepare a laminate, or in the case of the example shown in FIG. 3, a green sheet having a through hole is used. It can also be produced by preparing a laminate.

信号線路３および接地線路４・４の形成は、例えば、絶縁基板２が酸化アルミニウム質焼結体から成る場合であれば、タングステン（Ｗ），モリブデン（Ｍｏ），マンガン（Ｍｎ）等の高融点金属粉末に適当な有機バインダーや溶剤を添加混合してペースト状にしたものを、従来周知のスクリーン印刷法により、セラミックグリーンシートまたはその積層体、あるいはセラミックスの成形体に所定形状に印刷塗布しておき、これらと同時焼成することにより形成される。絶縁基板２を作製した後に、絶縁基板２上に同様のペーストを印刷塗布して焼成することにより、メタライズ層を焼き付けてもよい。   For example, when the insulating substrate 2 is made of an aluminum oxide sintered body, the signal line 3 and the ground lines 4 and 4 are formed of a high melting point such as tungsten (W), molybdenum (Mo), manganese (Mn), etc. A paste prepared by adding an appropriate organic binder or solvent to metal powder is printed and applied in a predetermined shape to a ceramic green sheet or laminate thereof, or a ceramic molded body by a conventionally known screen printing method. It is formed by firing together with these. After the insulating substrate 2 is manufactured, the metallized layer may be baked by printing and applying the same paste on the insulating substrate 2 and baking it.

絶縁基板２が有機樹脂からなる場合は、銅（Ｃｕ）等の金属箔をエッチング加工により信号線路３および接地線路４・４の形状に加工したものを転写する方法がある。   When the insulating substrate 2 is made of an organic resin, there is a method of transferring a metal foil such as copper (Cu) processed into the shape of the signal line 3 and the ground lines 4 and 4 by etching.

また、信号線路３および接地線路４・４を形成する方法としては、絶縁基板２を作製した後に蒸着法やフォトリソグラフィ法により形成する方法がある。電子装置が小型である場合は、それに搭載される接続基板１はさらに小さく、信号線路３および接地線路４・４は微細なものとなるため、接続基板１の信号線路３および接地線路４・４が接続される半導体素子７や回路基板８の高周波用線路との位置合わせ精度を高めるためには、蒸着法やフォトリソグラフィ法により形成する方法が好ましい。この場合は、信号線路３および接地線路４・４の形成前に、必要に応じて絶縁基板２の主面に研磨加工を施す場合もある。   As a method of forming the signal line 3 and the ground lines 4 and 4, there is a method of forming the insulating substrate 2 by a vapor deposition method or a photolithography method after the insulating substrate 2 is manufactured. When the electronic device is small, the connection board 1 mounted on the electronic device is even smaller, and the signal line 3 and the ground lines 4 and 4 are finer. Therefore, the signal line 3 and the ground lines 4 and 4 of the connection board 1 are small. In order to improve the alignment accuracy with the high frequency line of the semiconductor element 7 or the circuit board 8 to which the circuit board 8 is connected, a method of forming by vapor deposition or photolithography is preferable. In this case, there is a case where the main surface of the insulating substrate 2 is polished as necessary before the formation of the signal line 3 and the ground lines 4 and 4.

以下、信号線路３および接地線路４・４となる配線導体を蒸着法やフォトリソグラフィ法により形成する場合について詳細に説明する。配線導体は、例えば密着金属層，拡散防止層および主導体層が順次積層された３層構造の導体層から成る。   Hereinafter, the case where the wiring conductors to be the signal line 3 and the ground lines 4 and 4 are formed by vapor deposition or photolithography will be described in detail. The wiring conductor is composed of a conductor layer having a three-layer structure in which, for example, an adhesion metal layer, a diffusion prevention layer, and a main conductor layer are sequentially laminated.

密着金属層は、セラミックス等から成る絶縁基板２との密着性を良好とするという観点からは、チタン（Ｔｉ），クロム（Ｃｒ），タンタル（Ｔａ），ニオブ（Ｎｂ），ニッケル−クロム（Ｎｉ−Ｃｒ）合金，窒化タンタル（Ｔａ２Ｎ）等の熱膨張率がセラミックスと近い金属のうちの少なくとも１種より成るのが好ましく、その厚みは0.01〜0.2μｍ程度が好ましい。密着金属層の厚みが0.01μｍ未満では、密着金属層を絶縁基板２に強固に密着させることが困難となる傾向がある。一方、密着金属層の厚みが0.2μｍを超えると、成膜時の内部応力によって密着金属層が絶縁基板２から剥離し易くなる傾向がある。 From the viewpoint of improving the adhesion with the insulating substrate 2 made of ceramics or the like, the adhesion metal layer is made of titanium (Ti), chromium (Cr), tantalum (Ta), niobium (Nb), nickel-chromium (Ni —Cr) alloy, tantalum nitride (Ta 2 N), etc., are preferably made of at least one metal having a thermal expansion coefficient close to that of ceramics, and the thickness is preferably about 0.01 to 0.2 μm. If the thickness of the adhesion metal layer is less than 0.01 μm, it tends to be difficult to firmly adhere the adhesion metal layer to the insulating substrate 2. On the other hand, when the thickness of the adhesion metal layer exceeds 0.2 μm, the adhesion metal layer tends to be peeled off from the insulating substrate 2 due to internal stress during film formation.

拡散防止層は、密着金属層と主導体層との相互拡散を防ぐという観点からは、白金（Ｐｔ），パラジウム（Ｐｄ），ロジウム（Ｒｈ），ニッケル（Ｎｉ），Ｎｉ−Ｃｒ合金，Ｔｉ−Ｗ合金等の熱伝導性の良好な金属のうち少なくとも１種より成ることが好ましく、その厚みは0.05〜１μｍ程度が好ましい。拡散防止層の厚みが0.05μｍ未満では、ピンホール等の欠陥が発生して拡散防止層としての機能を果たしにくくなる傾向があり、１μｍを超えると、成膜時の内部応力により拡散防止層が密着金属層から剥離し易く成る傾向がある。なお、拡散防止層にＮｉ−Ｃｒ合金を用いる場合は、Ｎｉ−Ｃｒ合金は絶縁基板２との密着性が良好なため、密着金属層を省くことも可能である。   From the viewpoint of preventing mutual diffusion between the adhesion metal layer and the main conductor layer, the diffusion prevention layer is platinum (Pt), palladium (Pd), rhodium (Rh), nickel (Ni), Ni—Cr alloy, Ti— It is preferably made of at least one metal having good thermal conductivity such as W alloy, and the thickness is preferably about 0.05 to 1 μm. If the thickness of the diffusion prevention layer is less than 0.05 μm, defects such as pinholes tend to be generated, making it difficult to perform the function as the diffusion prevention layer. If the thickness exceeds 1 μm, the diffusion prevention layer is caused by internal stress during film formation. There is a tendency to easily peel from the adhesion metal layer. In the case where a Ni—Cr alloy is used for the diffusion prevention layer, the adhesion metal layer can be omitted because the Ni—Cr alloy has good adhesion to the insulating substrate 2.

主導体層は、電気抵抗の小さい金（Ａｕ），Ｃｕ，Ｎｉ，銀（Ａｇ）の少なくとも１種より成ることが好ましく、その厚みは0.1〜５μｍ程度が好ましい。主導体層の厚みが0.1μｍ未満では、電気抵抗が大きなものとなって接続基板１の信号線路３および接地線路４・４となる配線導体に要求される電気抵抗を満足できなくなる傾向があり、５μｍを超えると、成膜時の内部応力により主導体層が拡散防止層から剥離し易く成る傾向がある。また、Ｃｕは酸化し易いので、その上にＮｉおよびＡｕからなる保護層を被覆してもよい。   The main conductor layer is preferably made of at least one of gold (Au), Cu, Ni, and silver (Ag) having a low electric resistance, and the thickness is preferably about 0.1 to 5 μm. If the thickness of the main conductor layer is less than 0.1 μm, the electric resistance tends to be large and the electric resistance required for the wiring conductor to be the signal line 3 and the ground lines 4 and 4 of the connection substrate 1 tends to be not satisfied. If it exceeds 5 μm, the main conductor layer tends to be peeled off from the diffusion preventing layer due to internal stress during film formation. Further, since Cu is easily oxidized, a protective layer made of Ni and Au may be coated thereon.

本発明の電子装置としては、例えば、図６および図７に示すような半導体装置がある。この半導体装置は、箱型の基体９の底面上に半導体素子７と回路基板８が搭載され、側壁には貫通孔が形成されており、貫通孔内に同軸コネクタ10が嵌着接合されている。同軸コネクタ10の中心導体10ａは回路基板８上の信号線路導体８ａにろう材等により接続され、半導体素子７の高周波用線路と回路基板８の高周波用線路とが、半導体素子７および回路基板８の上にまたがるように配置され、接続用バンプ５を介して接続された接続基板１により機械的および電気的に接続されている。そして、基体９の側壁上面に蓋体11を接合し、容器内部を気密に封止することによって、半導体装置が構成されている。   Examples of the electronic device of the present invention include a semiconductor device as shown in FIGS. In this semiconductor device, a semiconductor element 7 and a circuit board 8 are mounted on the bottom surface of a box-shaped substrate 9, a through hole is formed in a side wall, and a coaxial connector 10 is fitted and joined in the through hole. . The central conductor 10a of the coaxial connector 10 is connected to the signal line conductor 8a on the circuit board 8 by a brazing material or the like, and the high frequency line of the semiconductor element 7 and the high frequency line of the circuit board 8 are connected to the semiconductor element 7 and the circuit board 8. And mechanically and electrically connected by the connection substrate 1 connected via the bumps 5 for connection. Then, a lid 11 is joined to the upper surface of the side wall of the base 9, and the interior of the container is hermetically sealed to constitute a semiconductor device.

接続用バンプ５は、導電性の金属からなるものであり、従来からフリップチップ実装等で用いられているものを用いればよい。例えば、ワイヤボンディング装置を用いて形成する、いわゆる金（Ａｕ）スタッドバンプや半田ペーストを溶融させて固化させた半田バンプ、高温半田や銅（Ｃｕ）等の金属ボールを低温半田で接合したボールバンプ、あるいは蒸着法により形成したバンプ等を用いればよい。   The connection bumps 5 are made of a conductive metal, and those conventionally used for flip chip mounting or the like may be used. For example, a so-called gold (Au) stud bump formed using a wire bonding apparatus, a solder bump obtained by melting and solidifying a solder paste, or a ball bump obtained by bonding a metal ball such as high-temperature solder or copper (Cu) with low-temperature solder Alternatively, bumps formed by vapor deposition may be used.

このような接続用バンプ５は、図１〜図７に示す例では各接続箇所につき１つずつ配置しているが、各接続箇所につき複数配置してもよい。   In the example shown in FIGS. 1 to 7, one such connection bump 5 is arranged for each connection location, but a plurality of connection bumps 5 may be arranged for each connection location.

半導体素子７は、例えば、ＬＤやＰＤ等の光半導体素子や、ＩＣ（Integrated Circuit）やＬＳＩ等の半導体集積回路素子を含む半導体素子である。   The semiconductor element 7 is a semiconductor element including, for example, an optical semiconductor element such as an LD or PD, or a semiconductor integrated circuit element such as an IC (Integrated Circuit) or LSI.

回路基板８は、図７（ａ）に示す例では、上面に信号線路導体８ａと接地線路導体８ｂ・８ｂとが形成され、これらによってコプレーナ型の伝送線路が構成されて、高周波信号を良好に伝送することができる。この場合の接地線路導体８ｂ・８ｂは、その接続基板１が接続されるのとは反対側の端部で図示しない貫通導体により下面の接地導体に接続され、基体９に接地される。あるいは、図５に示す接続基板１と同様に、下面に形成された接地導体と接地線路導体８ｂ・８ｂとを貫通導体で接続した構造としてもよい。また、図７（ｂ）に示す例では、上面に形成された信号線路導体８ａと下面に形成された接地導体（図示せず）とによってマイクロストリップ線路型の伝送線路が構成されている。接続基板１の接地線路４・４は、回路基板８の上面に形成された接地導体８ｂ・８ｂに接続され、回路基板８の上面の接地導体８ｂと下面の接地導体（図示せず）とは、回路基板８の側面に形成した切欠きの内面に導体層を形成した、いわゆるキャステレーション導体８ｃにより接続される。キャステレーション導体８ｃに代えて貫通導体により接続してもよい。   In the example shown in FIG. 7A, the circuit board 8 is formed with a signal line conductor 8a and ground line conductors 8b and 8b on the upper surface, thereby forming a coplanar type transmission line, which makes high-frequency signals favorable. Can be transmitted. In this case, the ground line conductors 8b and 8b are connected to the ground conductor on the lower surface by a through conductor (not shown) at the end opposite to the connection substrate 1, and are grounded to the base 9. Or similarly to the connection board | substrate 1 shown in FIG. 5, it is good also as a structure which connected the grounding conductor formed in the lower surface, and the grounding line conductors 8b * 8b with the penetration conductor. In the example shown in FIG. 7B, a signal line conductor 8a formed on the upper surface and a ground conductor (not shown) formed on the lower surface constitute a microstrip line type transmission line. The ground lines 4 and 4 of the connection board 1 are connected to the ground conductors 8b and 8b formed on the upper surface of the circuit board 8, and the ground conductor 8b on the upper surface of the circuit board 8 and the ground conductor (not shown) on the lower surface. They are connected by a so-called castellation conductor 8c in which a conductor layer is formed on the inner surface of the notch formed on the side surface of the circuit board 8. Instead of the castellation conductor 8c, a through conductor may be connected.

回路基板８は、図８に示す例のように、第２の絶縁基板８ｄ上に形成された信号線路導体８ａと、第２の絶縁基板８ｄ上に信号線路導体８ａの両側に沿って間隔を設けてそれぞれ形成された接地線路導体８ｂとを有し、第２の絶縁基板８ｄは、接続用バンプ５が接続される部位間にその他の部位における厚みより厚みの薄い部分８ｅを有することが好ましい。このときの厚みの薄い部分８ｅの形状は、図３および図４に示す接続基板１の絶縁基板２の厚みの薄い部分６の形状と同様のものでよい。   As shown in the example shown in FIG. 8, the circuit board 8 is spaced apart from the signal line conductor 8a formed on the second insulating board 8d along both sides of the signal line conductor 8a on the second insulating board 8d. It is preferable that the second insulating substrate 8d has a portion 8e having a thickness smaller than the thickness at other portions between the portions to which the connection bumps 5 are connected. . The shape of the thin portion 8e at this time may be the same as the shape of the thin portion 6 of the insulating substrate 2 of the connection substrate 1 shown in FIGS.

また、回路基板８は、図４に示す接続基板１と同様に、第２の絶縁基板８ｄの信号線路導体８ａおよび接地線路導体８ｂが形成された主面と対向する主面に接地導体が形成され、第２の絶縁基板８ｄを貫通して接地線路導体８ｂと接地導体とを接続する貫通導体が形成されたものであってもよい。このようにすると、疑似同軸の構造となり、高周波の信号をより良好に伝播させることができるようになる。   Similarly to the connection substrate 1 shown in FIG. 4, the circuit board 8 has a ground conductor formed on the main surface of the second insulating substrate 8d opposite to the main surface on which the signal line conductor 8a and the ground line conductor 8b are formed. In addition, a through conductor that penetrates through the second insulating substrate 8d and connects the ground line conductor 8b and the ground conductor may be formed. If it does in this way, it will become a pseudo-coaxial structure and will be able to propagate a high frequency signal better.

このような回路基板８は、接続基板１と同様にして作製することができる。   Such a circuit board 8 can be manufactured in the same manner as the connection board 1.

半導体素子７や回路基板８は、基体９の載置部に、例えば銀（Ａｇ）ろう，Ａｇ−Ｃｕろう等のろう材や半田、あるいは樹脂接着剤といった接合材によって強固に接着固定される。図６に示す例では半導体素子７は基体９の搭載部に直接搭載されているが、これは半導体素子７で発生した熱を金属製の基体９の搭載部を通して外部へ放熱するためである。半導体素子７の発熱が大きい場合は、半導体素子７と基体９の搭載部との間にペルチェ素子等を搭載して、半導体素子７を冷却するようにしてもよい。   The semiconductor element 7 and the circuit board 8 are firmly bonded and fixed to the mounting portion of the base 9 by a brazing material such as silver (Ag) brazing or Ag—Cu brazing, solder, or a bonding material such as a resin adhesive. In the example shown in FIG. 6, the semiconductor element 7 is directly mounted on the mounting portion of the base 9, which is for radiating the heat generated in the semiconductor element 7 to the outside through the mounting portion of the metal base 9. When the semiconductor element 7 generates a large amount of heat, a Peltier element or the like may be mounted between the semiconductor element 7 and the mounting portion of the base 9 to cool the semiconductor element 7.

接続基板１は、半導体素子７や回路基板８を基体９の載置部に搭載した後に、これらをまたぐように載置して接続される。接続基板１と半導体素子７や回路基板８との接続は、導電性の接着剤や半田バンプや半田ボールより融点の低い半田を用いて接続すればよい。接続用バンプ５が半田バンプである場合は、加熱することによりこの半田を溶融させて接合してもよい。このときの接着剤の硬化温度や半田の融点は、先に行なわれる半導体素子７や回路基板８の基体９への搭載時に用いられる接合材が溶融したり分解したりすることのない温度であることが好ましい。   The connection board 1 is mounted and connected so as to straddle the semiconductor element 7 and the circuit board 8 after they are mounted on the mounting portion of the base 9. The connection substrate 1 may be connected to the semiconductor element 7 or the circuit substrate 8 by using a conductive adhesive, solder bump, or solder having a melting point lower than that of the solder ball. When the connection bump 5 is a solder bump, the solder may be melted and joined by heating. The curing temperature of the adhesive and the melting point of the solder at this time are temperatures at which the bonding material used when the semiconductor element 7 or the circuit board 8 is mounted on the base 9 is not melted or decomposed. It is preferable.

基体９は鉄（Ｆｅ）−ニッケル（Ｎｉ）−コバルト（Ｃｏ）合金や銅（Ｃｕ）−タングステン（Ｗ）合金等の金属から成る容器であり、搭載された半導体素子７が発生する熱をパッケージの外部に放散する機能を有する。このため、基体９は、熱伝導性の良い金属から成り、搭載される半導体素子７やセラミック製の回路基板８の熱膨張係数に近い、上に挙げた金属から成るものが好ましい。例えば基体９がＦｅ−Ｎｉ−Ｃｏ合金から成る場合は、Ｆｅ−Ｎｉ−Ｃｏ合金のインゴット（塊）に圧延加工，打ち抜き加工，切削加工，プレス加工等の周知の金属加工方法を施すことによって、所定形状に製作された底板となる底部と、同様の金属加工法を用いて作製した側壁となる枠部とを銀ろう等の接合材で接合することによって形成される。側壁の貫通孔はドリル加工や金型による打ち抜き加工により形成される。また、例えばメタル・インジェクション・モールド法等によって底部と枠部とを一体的に形成してもよい。   The substrate 9 is a container made of a metal such as iron (Fe) -nickel (Ni) -cobalt (Co) alloy or copper (Cu) -tungsten (W) alloy, and the heat generated by the mounted semiconductor element 7 is packaged. It has the function to dissipate outside. For this reason, the base 9 is preferably made of a metal having good thermal conductivity, and is made of the above-mentioned metals that are close to the thermal expansion coefficient of the mounted semiconductor element 7 or ceramic circuit board 8. For example, when the substrate 9 is made of an Fe—Ni—Co alloy, by applying a known metal working method such as rolling, punching, cutting, pressing to the ingot of the Fe—Ni—Co alloy, It is formed by joining a bottom part to be a bottom plate manufactured in a predetermined shape and a frame part to be a side wall produced by using a similar metal working method with a joining material such as silver solder. The through hole in the side wall is formed by drilling or punching with a mold. Further, for example, the bottom portion and the frame portion may be integrally formed by a metal injection molding method or the like.

また、外部より半導体素子７に駆動信号等を入力させる入出力端子としては、例えば同軸コネクタ10が用いられ、以下のようにして基体９の側壁に設置される。基体９の側壁に形成された貫通孔内に同軸コネクタ10を嵌め込むとともにＡｕ−Ｓｎ半田やＰｂ−Ｓｎ半田等の封着材を貫通孔との隙間に挿入する。しかる後、加熱して封着材を溶融させ、溶融した封着材を毛細管現象により同軸コネクタ10と貫通孔の内面との隙間に充填することによって、同軸コネクタ10が貫通孔内に半田等の封着材を介して嵌着接合される。   For example, a coaxial connector 10 is used as an input / output terminal for inputting a drive signal or the like to the semiconductor element 7 from the outside, and is installed on the side wall of the base 9 as follows. The coaxial connector 10 is fitted into a through hole formed in the side wall of the base 9, and a sealing material such as Au-Sn solder or Pb-Sn solder is inserted into the gap with the through hole. Thereafter, the sealing material is heated to melt, and the melted sealing material is filled into the gap between the coaxial connector 10 and the inner surface of the through hole by capillary action, so that the coaxial connector 10 is soldered into the through hole. It is fitted and joined via a sealing material.

同軸コネクタ10は、Ｆｅ−Ｎｉ−Ｃｏ合金等の金属から成る円筒形等の筒状の外周導体にホウケイ酸ガラス等の絶縁体が充填され、その中心を貫通してＦｅ−Ｎｉ−Ｃｏ合金等の金属から成る線状の中心導体10ａが固定されて成るものである。   The coaxial connector 10 has a cylindrical outer peripheral conductor made of a metal such as an Fe—Ni—Co alloy filled with an insulator such as borosilicate glass and penetrates through the center thereof to form an Fe—Ni—Co alloy or the like. A linear central conductor 10a made of the above metal is fixed.

この同軸コネクタ10には、外部電気回路（図示せず）に接続された同軸ケーブル（図示せず）が装着されることによって、内部に収納された半導体素子７が同軸コネクタ10の中心導体10ａを介して外部電気回路に電気的に接続されることとなる。   A coaxial cable (not shown) connected to an external electric circuit (not shown) is attached to the coaxial connector 10, so that the semiconductor element 7 accommodated therein can connect the central conductor 10 a of the coaxial connector 10. Through the external electric circuit.

半導体素子７がＬＤやＰＤのような光半導体素子である場合は、基体９の貫通孔が形成された壁と対向する壁の、半導体素子７に対向する内面から外面にかけて貫通孔を設けるものもある。そしてその外面にこの貫通孔と内部がつながった筒状部材を設置して、この筒状部材内に、ホウ珪酸ガラスや鉛系ガラス等の非晶質ガラスやサファイアから成る、球状，半球状，凸レンズ状，ロッドレンズ状等の透光性部材を固定する。筒状部材は、基体９と同様の金属からなる筒状体を銀ろう等の接合材で固定すればよい。   In the case where the semiconductor element 7 is an optical semiconductor element such as an LD or PD, there may be provided a through hole from the inner surface facing the semiconductor element 7 to the outer surface of the wall facing the wall of the base 9 where the through hole is formed. is there. A cylindrical member connected to the through hole and the inside is installed on the outer surface, and the cylindrical member is made of amorphous glass such as borosilicate glass or lead-based glass or sapphire, spherical, hemispherical, A translucent member such as a convex lens shape or a rod lens shape is fixed. The cylindrical member may be formed by fixing a cylindrical body made of the same metal as the base 9 with a bonding material such as silver solder.

最後に、基体９の側壁上面に蓋体11を接合し、容器内部を気密に封止することによって半導体装置となる。基体９への蓋体11の接合は、シーム溶接やＹＡＧレーザ溶接等の溶接またはＡｕ−Ｓｎろう材等のろう材によるろう付け等のろう接により行なわれる。   Finally, a lid 11 is joined to the upper surface of the side wall of the base 9, and the interior of the container is hermetically sealed to obtain a semiconductor device. The lid 11 is joined to the base body 9 by welding such as seam welding or YAG laser welding or brazing using a brazing material such as an Au-Sn brazing material.

なお、本発明は、上述の実施の形態の一例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。例えば、他の電子装置の例としては、ＬｉＮｂＯ３（ニオブ酸リチウム：ＬＮ）の単結晶基板を用いたＬＮ光変調器がある。例えば、外部からの電気信号を入力するためのコネクタがＬＮ光強度変調器の基体に接続され、基体内でコネクタの端子と上記と同様の回路基板とがろう材等で接続され、この回路基板とＬＮ基板とが本発明の接続基板で接続されたものである。ＬＮ基板には接続基板が接続される進行波型電極と、この電極に近接してＴｉ（チタン）金属の熱拡散あるいはプロトン交換法と呼ばれる方法で形成されるＹ分岐型の光導波路が形成され、この光導波路の両端にはそれぞれ光ファイバーが接続される。光ファイバーは基体の側壁に形成された貫通孔を通して外部に引き出され、それぞれの先端には他の電子機器等に接続するためのコネクタが接続される。これによれば、回路基板とＬＮ基板との接続部でのインピーダンスの変化が抑えられ、伝送損失が小さくなるので、入力された電気信号を正確に光信号に変換させることができる。 Note that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. For example, as another example of the electronic device, there is an LN optical modulator using a single crystal substrate of LiNbO 3 (lithium niobate: LN). For example, a connector for inputting an electric signal from the outside is connected to the base of the LN light intensity modulator, and the terminal of the connector and the circuit board similar to the above are connected by a brazing material or the like in the base. And the LN substrate are connected by the connection substrate of the present invention. The LN substrate is formed with a traveling wave type electrode to which a connection substrate is connected, and a Y-branch type optical waveguide formed by a method called thermal diffusion of Ti (titanium) metal or a proton exchange method in the vicinity of this electrode. Optical fibers are connected to both ends of the optical waveguide. The optical fiber is drawn out through a through hole formed in the side wall of the base, and a connector for connecting to another electronic device or the like is connected to each tip. According to this, since the change in impedance at the connection portion between the circuit board and the LN board is suppressed and the transmission loss is reduced, the input electric signal can be accurately converted into an optical signal.

１・・・・・・・接続基板
２・・・・・・・絶縁基板
３・・・・・・・信号線路
４・・・・・・・接地線路
４ａ・・・・・・接地導体
４ｂ・・・・・・貫通導体
５・・・・・・・接続用バンプ
６・・・・・・・厚みの薄い部分
７・・・・・・・半導体素子
７ａ・・・・・・信号線路導体
７ｂ・・・・・・接地線路導体
８・・・・・・・回路基板
８ａ・・・・・・信号線路導体
８ｂ・・・・・・接地線路導体
８ｃ・・・・・・側面導体
８ｄ・・・・・・回路基板８の第２の絶縁基板
８ｅ・・・・・・第２の絶縁基板の厚みの薄い部分
９・・・・・・・基体
10・・・・・・・同軸コネクタ
10ａ・・・・・・中心導体
11・・・・・・・蓋体 1 .... Connecting board 2 .... Insulating board 3 .... Signal line 4 .... Ground line 4a ... Ground conductor 4b・ ・ ・ ・ ・ ・ Through conductor 5 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Bump for connection 6 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Thin part 7 ・ ・ ・ ・ ・ ・ ・ Semiconductor element 7a ・ ・ ・ ・ ・ ・ Signal line Conductor 7b ... Ground line conductor 8 .... Circuit board 8a ... Signal line conductor 8b ... Ground line conductor 8c ... Side conductor 8d... Second insulating substrate of circuit board 8 8e... Thin portion of second insulating substrate 9.
10 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Coaxial connector
10a ・ ・ ・ ・ ・ ・ Center conductor
11 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Cover body

Claims (3)

半導体素子および回路基板の組合せの間で高周波用線路同士を接続用バンプを介して接続するための接続基板であって、絶縁基板上に形成された信号線路と、前記絶縁基板上に前記信号線路の両側に沿って間隔を設けてそれぞれ形成された接地線路とを有し、前記絶縁基板は、前記信号線路および前記接地線路の同じ側の端部の前記接続用バンプが接続される部位間に、その他の部位における厚みより厚みの薄い部分を有することを特徴とする接続基板。 A connection substrate for connecting high-frequency lines through a bump for connection between a combination of a semiconductor element and a circuit board, the signal line formed on an insulating substrate, and the signal line on the insulating substrate A ground line formed at intervals along both sides of the signal line, and the insulating substrate is connected between the signal line and the connection bump at the end on the same side of the ground line. A connection substrate having a portion thinner than the thickness at other portions. 半導体素子および回路基板の組合せの間で高周波用線路同士が請求項１に記載の接続基板により接続されていることを特徴とする電子装置。 An electronic device, wherein high-frequency lines are connected to each other by a connection board according to claim 1 between a combination of a semiconductor element and a circuit board. 前記半導体素子および前記回路基板が金属から成る基体の上に搭載されており、前記回路基板は、第２の絶縁基板上に形成された信号線路導体と、前記第２の絶縁基板上に前記信号線路導体の両側に沿って間隔を設けてそれぞれ形成された接地線路導体とを有し、前記第２の絶縁基板は、前記接続用バンプが接続される部位間にその他の部位における厚みより厚みの薄い部分を有することを特徴とする請求項２に記載の電子装置。 The semiconductor element and the circuit board are mounted on a base made of metal, and the circuit board includes a signal line conductor formed on a second insulating substrate and the signal on the second insulating substrate. A ground line conductor formed at intervals along both sides of the line conductor, and the second insulating substrate is thicker than the thickness at other parts between the parts to which the connection bumps are connected. The electronic device according to claim 2, further comprising a thin portion.
JP2009038793A 2008-04-24 2009-02-23 Connection substrate and electronic device Pending JP2009283903A (en)

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JP2008113486 2008-04-24
JP2009038793A JP2009283903A (en) 2008-04-24 2009-02-23 Connection substrate and electronic device

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