JP2009188022A - Method for manufacturing wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a wiring board including a columnar electrode connected with a wire, by which reliability in electric connection between the columnar electrode and the wire is fully secured and a width of the wire is prevented from being narrower than a predetermined wire width. <P>SOLUTION: The columnar electrode 16 made of a first conductive material is formed. Then, a metallic layer 58 made of a second conductive material different from the first conductive material is formed to cover a surface 16A of the electrode 16. Thereafter, an insulation layer 17 is formed to cover a side face of the electrode 16, an upper surface 58A and a side face of the metallic layer 58. Then, the insulation layer 17 is removed from a side of a surface 17B of the insulation layer 17 until the upper surface 58A of the metallic layer 58 is exposed. Thereafter, the metallic layer 58 is removed by an etchant which does not etch the first conductive material to expose, from the insulation layer 17, the surface 16A of the columnar electrode 16 at a part connected with the wire 18. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method of manufacturing a wiring board having columnar electrodes connected to wiring.

  A conventional wiring board is provided with a columnar electrode (also referred to as a “metal post”) instead of a via, and a wiring board (see FIG. 1) for electrically connecting wirings arranged vertically by the columnar electrode. is there.

  FIG. 1 is a cross-sectional view of a conventional wiring board.

  Referring to FIG. 1, a conventional wiring board 200 includes an insulating substrate 201, wirings 202 and 206, an insulating resin layer 203, and a columnar electrode 205.

  The wiring 202 is provided on the upper surface 201 </ b> A of the insulating substrate 201. The insulating resin layer 203 is provided so as to cover the wiring 202 and the side surface of the columnar electrode 205. The upper surface 203A of the insulating resin layer 203 is substantially flush with the upper surface of the columnar electrode 205.

  The columnar electrode 205 is provided on the wiring 202. The columnar electrode 205 has an upper end connected to the wiring 206 and a lower end connected to the wiring 202. The wiring 206 is provided on the upper surface 203 A of the insulating resin layer 203 and the upper end of the columnar electrode 205. The wiring 206 is electrically connected to the wiring 202 through the columnar electrode 205.

  2 to 8 are views showing a manufacturing process of a conventional wiring board. 2-8, the same code | symbol is attached | subjected to the same component as the conventional wiring board 200. FIG.

  With reference to FIGS. 2 to 8, a conventional method for manufacturing the wiring substrate 200 will be described. First, in the process illustrated in FIG. 2, the wiring 202 is formed on the upper surface 201 </ b> A of the insulating substrate 201 by a well-known method, and then the columnar electrode 205 is formed on the wiring 202.

  Next, in the step shown in FIG. 3, an insulating resin layer 203 is formed by applying an insulating resin to the upper surface side of the structure shown in FIG. 2 and then curing the resin. At this time, the upper surface of the columnar electrode 205 is covered with the insulating resin layer 203.

  Next, in the step shown in FIG. 4, the insulating resin layer 203 formed on the upper surface of the columnar electrode 205 is removed by grinding the upper surface 203 </ b> A side of the insulating resin layer 203 by sandblasting. Thereafter, a roughening process (specifically, for example, a desmear process) of the insulating resin layer 203 is performed to roughen the upper surface 203A of the insulating resin layer 203. The roughening process of the insulating resin layer 203 is a process for improving adhesion between a seed layer 211 (described later) formed on the insulating resin layer 203 and the insulating resin layer 203.

  Next, in the step shown in FIG. 5, a seed layer 211 (for example, a Cu layer) is formed by electroless plating so as to cover the upper surface 203A of the roughened insulating resin layer 203 and the upper surface of the columnar electrode 205. Then, a resist film 212 having an opening 212A is formed on the seed layer 211. At this time, the opening 212 </ b> A is formed so as to expose the upper surface of the seed layer 211 corresponding to the formation region of the wiring 206.

  Next, in the step shown in FIG. 6, a Cu plating film 214 is deposited and grown on the portion of the seed layer 211 exposed to the opening 212A by an electrolytic plating method using the seed layer 211 as a power feeding layer.

Next, in a step shown in FIG. 7, the resist film 212 shown in FIG. 6 is removed. Next, in the step shown in FIG. 8, an unnecessary seed layer 211 that is not covered with the Cu plating film 214 is removed using an etching solution, and a wiring 206 is formed (semi-additive method). By this. A conventional wiring board 200 is manufactured (see, for example, Patent Document 1).
Japanese Patent Laid-Open No. 5-110259

  9 and 10 are diagrams for explaining the problems of the conventional method of manufacturing a wiring board. FIG. 9 is an enlarged cross-sectional view of the upper surface 203A of the roughened insulating resin layer 203 shown in FIG. FIG. 10 is an enlarged cross-sectional view of the upper surface 203A of the insulating resin layer 203 on which the seed layer 211 is provided.

  However, in the conventional method of manufacturing the wiring substrate 200, the insulating resin layer 203 is slightly formed on the upper surface of the columnar electrode 205 after the sandblasting due to variations in the height of the columnar electrode 205 or variations in the sandblasting in the surface of the insulating substrate 201. Therefore, there is a problem that the resistance between the columnar electrode 205 and the wiring 206 is increased, and the reliability of electrical connection between the columnar electrode 205 and the wiring 206 is lowered.

  Further, in order to sufficiently ensure the reliability of electrical connection between the columnar electrode 205 and the wiring 206, a roughening process (for example, a desmear process) of the insulating resin layer 203 is performed to roughen the upper surface 203A of the insulating resin layer 203. It can be considered that the insulating resin layer 203 remaining on the upper surface of the columnar electrode 205 is removed for a time considerably longer than the time sufficient for this. In this case, as shown in FIG. A concave portion 221 having a complicated shape (in other words, a complicated shape) is formed on the upper surface 203A side.

  When the seed layer 211 is formed on the upper surface 203A of the insulating resin layer 203 having such a recess 221 by electroless plating, the seed layer 211 is formed so as to fill the recess 221 as shown in FIG. Therefore, it is necessary to lengthen the etching processing time for removing the unnecessary seed layer 211 performed after the Cu plating film 214 is formed. As a result, the wiring 206 is etched together with the unnecessary seed layer 211, so that the width of the wiring 206 becomes narrower than a predetermined wiring width.

  Therefore, the present invention has been made in view of the above-described problems, and can sufficiently ensure the reliability of electrical connection between the columnar electrode and the wiring, and the width of the wiring becomes narrower than a predetermined wiring width. An object of the present invention is to provide a method of manufacturing a wiring board capable of suppressing the above-described problem.

  According to one aspect of the present invention, there is provided a method of manufacturing a wiring board comprising a columnar electrode provided in an insulating layer and a wiring connected to the columnar electrode, the first electrode being made of a first conductive material. A columnar electrode forming step for forming the columnar electrode; and a metal layer forming step for forming a metal layer made of a second conductive material different from the first conductive material on the upper surface of the columnar electrode; An insulating layer forming step of forming an insulating layer covering the side surface of the columnar electrode and the upper surface and side surface of the metal layer; and the insulating layer is formed from the upper surface side of the insulating layer until the upper surface of the metal layer is exposed. Insulating layer removing step to be removed, and after the insulating layer removing step, the metal layer is removed by an etchant that does not etch the first conductive material, and the columnar electrode in a portion connected to the wiring is insulated. Metal exposed from layer Method for manufacturing a wiring board, which comprises a removal step, is provided.

  According to the present invention, after forming the columnar electrode composed of the first conductive material and forming the metal layer composed of the second conductive material different from the first conductive material on the upper surface of the columnar electrode, An insulating layer is formed to cover the side surface of the columnar electrode, the upper surface and the side surface of the metal layer, and then the insulating layer is removed from the upper surface side of the insulating layer until the upper surface of the metal layer is exposed. Using an etchant that does not etch the material, the metal layer is removed, and the columnar electrode connected to the wiring is exposed from the insulating layer. It can be removed together with the metal layer. Thereby, since an insulating layer is not interposed between the columnar electrode and the wiring, the electrical connection reliability between the columnar electrode and the wiring can be sufficiently ensured.

  In addition, since the insulating layer can be roughened in a short time before the wiring is formed, for example, when the wiring is formed using a semi-additive method, an unnecessary seed layer is removed. The etching time can be shortened. As a result, the wiring is less likely to be etched in the unnecessary seed layer removal step, so that the width of the wiring can be suppressed from becoming narrower than a predetermined wiring width.

  ADVANTAGE OF THE INVENTION According to this invention, while being able to fully ensure the electrical connection reliability between a columnar electrode and wiring, it can suppress that the width | variety of wiring becomes narrower than predetermined wiring width.

  Next, embodiments of the present invention will be described with reference to the drawings.

(Embodiment)
FIG. 11 is a cross-sectional view of the wiring board according to the embodiment of the present invention.

  Referring to FIG. 11, the wiring board 10 of the present embodiment includes an electronic component mounting pad 15, columnar electrodes 16, 19, 24 (also referred to as “metal posts”), insulating layers 17, 21, 25, , Wirings 18 and 23, external connection pads 26, and solder bumps 28 and 29.

  The electronic component mounting pad 15 has a structure in which an Au layer 31 (for example, a thickness of 0.01 μm to 0.3 μm) and a Ni layer 32 (for example, a thickness of 5 μm) are laminated, and the insulating layer 17. Is installed inside. The side surfaces of the Au layer 31 and the Ni layer 32 are covered with the insulating layer 17. The surface 31A of the Au layer 31 (the surface opposite to the surface of the Au layer 31 on which the Ni layer 32 is formed) is the surface 17A of the insulating layer 17 (the surface of the insulating layer 17 on the side where the electronic component 11 is mounted). Surface). The electronic component mounting pad 15 is a pad for mounting the electronic component 11. As the electronic component 11 mounted on the electronic component mounting pad 15, a semiconductor chip or a chip component (for example, a chip capacitor, a chip resistor, a chip inductor, or the like) can be used.

  The columnar electrode 16 is provided in the insulating layer 17. The columnar electrode 16 is disposed on the surface 32A of the Ni layer 32 (the surface opposite to the surface of the Ni layer 32 on which the Au layer 31 is formed). The columnar electrode 16 has one end connected to the electronic component mounting pad 15 and the other end connected to the wiring 18. The columnar electrode 16 is an electrode for electrically connecting the electronic component mounting pad 15 and the wiring 18. The columnar electrode 16 is made of a first conductive material. As the first conductive material, for example, Cu or a Cu alloy (for example, Cu—Co, Cu—Sn) can be used. The height of the columnar electrode 16 can be set to 30 μm, for example.

  The insulating layer 17 is provided so as to cover the electronic component mounting pad 15 and the side surface of the columnar electrode 16. The surface 17A of the insulating layer 17 is substantially flush with the surface 31A of the Au layer 31. The insulating layer 17 has an opening 34 exposing the surface 16A of the columnar electrode 16 (the surface opposite to the surface of the columnar electrode 16 in contact with the Ni layer 32). For example, an insulating resin layer can be used as the insulating layer 17. As a material for the insulating resin layer, for example, an epoxy resin or a polyimide resin can be used.

  The wiring 18 is configured to include a seed layer 36 and a conductive film 37. The seed layer 36 includes the surface 16A of the columnar electrode 16, the surface of the insulating layer 17 corresponding to the side surface of the opening 34, and the surface 17B of the insulating layer 17 (the surface of the insulating layer 17 located on the opposite side of the surface 17A). It is provided in a part of. Thereby, the wiring 18 is connected to the columnar electrode 16. The seed layer 36 is a power feeding layer when the conductive film 37 is formed using an electrolytic plating method. As the seed layer 36, for example, a Cu layer can be used. When a Cu layer is used as the seed layer 36, the thickness of the seed layer 36 can be set to 0.5 μm to 1 μm, for example.

  The conductive film 37 is provided so as to cover the surface 36A of the seed layer 36 (the surface of the seed layer 36 opposite to the surface in contact with the insulating layer 17). As the conductive film 37, for example, a Cu film can be used. When a Cu film is used as the conductive film 37, the thickness of the conductive film 37 can be set to, for example, 10 μm to 20 μm. The wiring 18 having the above configuration is electrically connected to the electronic component mounting pad 15 via the columnar electrode 16.

  The columnar electrode 19 is provided in the insulating layer 21. The columnar electrode 19 is provided on the surface 37A of the conductive film 37 (the surface of the conductive film 37 on the side where the seed layer 36 is not formed). The columnar electrode 19 has one end connected to the wiring 18 and the other end connected to the wiring 23. The columnar electrode 19 is an electrode for electrically connecting the wiring 18 and the wiring 23. The columnar electrode 19 is made of a first conductive material. As the first conductive material, for example, Cu or a Cu alloy (for example, Cu—Co, Cu—Sn) can be used. The height of the columnar electrode 19 can be set to 30 μm, for example.

  The insulating layer 21 is provided on the surface 17B of the insulating layer 17 so as to cover the wiring 18 and the side surface of the columnar electrode 19. The insulating layer 21 has an opening 39 that exposes the surface 19A of the columnar electrode 19 (the surface opposite to the surface of the columnar electrode 19 that contacts the conductive film 37). As the insulating layer 21, for example, an insulating resin layer can be used. As a material for the insulating resin layer, for example, an epoxy resin or a polyimide resin can be used.

  The wiring 23 is configured to include a seed layer 41 and a conductive film 42. The seed layer 41 is opposite to the surface 19A of the columnar electrode 19, the surface of the insulating layer 21 corresponding to the side surface of the opening 39, and the surface 21A of the insulating layer 21 (opposite the surface of the insulating layer 21 in contact with the insulating layer 17). Side surface). Thereby, the wiring 23 is connected to the columnar electrode 19. The seed layer 41 is a power feeding layer when the conductive film 42 is formed using an electrolytic plating method. As the seed layer 41, for example, a Cu layer can be used. When a Cu layer is used as the seed layer 41, the thickness of the seed layer 41 can be set to 0.5 μm to 1 μm, for example.

  The conductive film 42 is provided so as to cover the surface 41A of the seed layer 41 (the surface of the seed layer 41 opposite to the surface in contact with the insulating layer 21). As the conductive film 42, for example, a Cu film can be used. When a Cu film is used as the conductive film 42, the thickness of the conductive film 42 can be set to, for example, 10 μm to 20 μm. The wiring 23 configured as described above is electrically connected to the wiring 18 via the columnar electrode 19.

  The columnar electrode 24 is provided in the insulating layer 25. The columnar electrode 24 is provided on the surface 42A of the conductive film 42 (the surface opposite to the surface of the conductive film 42 on which the seed layer 41 is formed). The columnar electrode 24 has one end connected to the wiring 23 and the other end connected to the external connection pad 26. The columnar electrode 24 is an electrode for electrically connecting the wiring 23 and the external connection pad 26. The columnar electrode 24 is made of a first conductive material. As the first conductive material, for example, Cu or a Cu alloy (for example, Cu—Co, Cu—Sn) can be used. The height of the columnar electrode 24 can be set to 30 μm, for example.

  The insulating layer 25 is provided on the surface 21 </ b> A of the insulating layer 21 so as to cover the wiring 23 and the side surface of the columnar electrode 24. The insulating layer 25 has an opening 45 that exposes the surface 24A of the columnar electrode 24 (the surface opposite to the surface of the columnar electrode 24 that contacts the conductive film 42). As the insulating layer 25, for example, an insulating resin layer can be used. As a material for the insulating resin layer, for example, an epoxy resin or a polyimide resin can be used.

  The external connection pad 26 is provided on the surface 24 </ b> A of the columnar electrode 24 exposed at the opening 45. The external connection pad 26 includes a Ni layer 47 (for example, a thickness of 5 μm) formed on the surface 24 </ b> A of the columnar electrode 24, and an Au layer 48 (for example, a thickness of 0.01 μm to 0.00 μm) stacked on the Ni layer 47. 3 μm). The side surfaces of the Ni layer 47 and the Au layer 48 are covered with the insulating layer 25. The surface 48A of the Au layer 48 (the surface opposite to the surface of the Au layer 48 on which the Ni layer 47 is formed) is, for example, a surface 25A of the insulating layer 25 (a mounting substrate (not shown) such as a mother board). You may comprise so that it may become substantially flush | planar with the surface of the insulating layer 25 of the side to be connected.

  The external connection pad 26 is a pad to which a mounting board (not shown) such as a mother board is connected. The solder bump 28 is provided on the surface 31 </ b> A of the Au layer 31. The solder bump 28 is a terminal connected to the pad 11 </ b> A of the electronic component 11. The solder bump 29 is provided on the surface 48 </ b> A of the Au layer 48. The solder bumps 29 are terminals connected to pads (not shown) provided on a mounting board such as a mother board.

  12 to 35 are diagrams showing manufacturing steps of the wiring board according to the embodiment of the present invention. 12 to 35, the same components as those of the wiring board 10 of the present embodiment are denoted by the same reference numerals.

  With reference to FIGS. 12-35, the manufacturing method of the wiring board 10 of this Embodiment is demonstrated. First, in the step shown in FIG. 12, a resist film 56 having an opening 56A is formed on the upper surface 55A of the support 55 having conductivity. As a material of the support 55, for example, Cu can be used. The opening 56 </ b> A is formed so as to expose the upper surface 55 </ b> A of the support body 55 corresponding to the formation region of the electronic component mounting pad 15.

  Next, in the step shown in FIG. 13, the Au layer 31 (for example, 0.01 μm in thickness) is formed on the upper surface 55A of the support 55 in the portion exposed to the opening 56A by electrolytic plating using the support 55 as a power feeding layer. To 0.3 μm) and a Ni layer 32 (for example, 5 μm in thickness) are sequentially laminated to form the electronic component mounting pad 15. Thereafter, a plating film made of the first conductive material is deposited and grown on the surface 32A of the Ni layer 32 by an electrolytic plating method using the support 55 as a power feeding layer to form the columnar electrode 16 (columnar electrode formation). Process). As the first conductive material, for example, Cu, Cu alloy, or the like can be used. The height of the columnar electrode 16 can be set to 30 μm, for example. Next, a second conductive material different from the first conductive material is used so as to cover the surface 16A of the columnar electrode 16 (in this case, the upper surface of the columnar electrode 16) by electrolytic plating using the support 55 as a power feeding layer. The configured metal layer 58 is formed (metal layer forming step). The thickness of the metal layer 58 can be set to 5 μm, for example. When Cu or Cu alloy is used as the first conductive material, for example, at least one material of the group consisting of Ni, Sn, and solder may be used as the second conductive material.

  Thus, when using Cu or Cu alloy as the first conductive material, the metal layer 58 is removed by using at least one material of the group consisting of Ni, Sn, and solder as the second conductive material. It is possible to prevent the columnar electrode 16 from being etched by the etching solution used at the time.

  Next, in a step shown in FIG. 14, the resist film 56 shown in FIG. 13 is removed. Next, in the process shown in FIG. 15, the insulating layer 17 is formed on the upper surface 55A of the support 55 so as to cover the side surface of the electronic component mounting pad 15, the side surface of the columnar electrode 16, and the upper surface 58A and the side surface of the metal layer 58. (Insulating layer forming step). For example, an insulating resin layer can be used as the insulating layer 17. In the case of using an insulating resin layer as the insulating layer 17, the insulating layer 17 is obtained by laminating (pasting) a semi-cured resin film on the structure shown in FIG. 14, and then completely curing the resin film. By forming. As the material of the resin film, for example, an epoxy resin or a polyimide resin can be used.

  Next, in the step shown in FIG. 16, the insulating layer 17 is removed from the surface 17B (in this case, the upper surface of the insulating layer 17) side of the insulating layer 17 until the upper surface 58A of the metal layer 58 is exposed (insulating layer removing step). . The insulating layer 17 is removed until the surface 17B of the insulating layer is substantially flush with the upper surface 58A of the metal layer 58. Thereby, most of the insulating layer 17 is removed from the insulating layer 17 formed on the upper surface 58A of the metal layer 58. As a method for removing the insulating layer 17, for example, sand blasting or polishing (for example, buffing) can be used.

  Next, in the step shown in FIG. 17, the metal layer 58 is removed with an etchant that does not etch the first conductive material, and the columnar electrode 16 (specifically, the columnar electrode 16 of the columnar electrode 16 is connected to the wiring 18). The surface 16A) is exposed from the insulating layer 17 (metal layer removing step). Thereby, an opening 34 exposing the surface 16A of the columnar electrode 16 is formed in the insulating layer 17. When Cu or a Cu alloy is used as the first conductive material and Ni is used as the second conductive material, an etching solution that does not etch the first conductive material may be, for example, Meckle Mover NH-1865 (MEC Corporation). Can be used. Mekkuma Remover NH-1865 is an etchant that selectively etches Ni without etching Cu. In addition, when Cu or Cu alloy is used as the first conductive material and solder is used as the second conductive material, for example, Enstrip TL-106 (Meltex) is used as an etchant that does not etch the first conductive material. (Meltex) can be used.

  As described above, the metal layer 58 formed on the columnar electrode 16 is removed by using an etching solution that does not etch the first conductive material that forms the columnar electrode 16, so that the metal layer 58 and the metal layer 58 are formed. The insulating layer 17 remaining on the upper surface 58A can be removed, and the surface 16A of the columnar electrode 16 where the insulating layer 17 does not exist can be exposed from the insulating layer 17. Thereby, since the insulating layer 17 is not interposed between the wiring 18 formed on the surface 16A of the columnar electrode 16 and the columnar electrode 16, the electrical connection reliability between the wiring 18 and the columnar electrode 16 is improved. It can be secured sufficiently.

  Next, in the process shown in FIG. 18, the surface of the insulating layer 17 corresponding to the side surface of the opening 34 and the surface 17B of the insulating layer 17 are roughened by a roughening process. Since the insulating layer 17 is not present on the surface 16A of the columnar electrode 16 where the wiring 18 is formed, the roughening treatment of the insulating layer 17 is performed on the insulating resin layer 203 (see FIG. 4) provided on the conventional wiring substrate 200. It becomes possible to carry out in a shorter time than the time of the crystallization treatment (specifically, a treatment time enough to form the seed layer 36 on the insulating layer 17). Therefore, a recess (not shown) formed in the surface 17B of the insulating layer 17 is shallower than a recess 221 (see FIG. 9) formed in the insulating resin layer 203.

  This makes it possible to remove the seed layer 36 in a short time when the unnecessary seed layer 36 is removed by etching in the step shown in FIG. 22 described later. As a result, it is possible to suppress etching of the conductive film 37 (one of the constituent elements of the wiring 18) when the seed layer 36 is removed, so that the wiring 18 connected to the columnar electrode 16 can be prevented. Can be suppressed from becoming narrower than a predetermined wiring width.

  Next, after roughening the insulating layer 17, seeds covering the surface 16 A of the columnar electrode 16, the surface of the insulating layer 17 corresponding to the side surface of the opening 34, and the surface 17 B of the insulating layer 17 by electroless plating. Layer 36 is formed. As the seed layer 36, for example, a Cu layer can be used. When a Cu layer is used as the seed layer 36, the thickness of the seed layer 36 can be set to 0.5 μm to 1 μm, for example.

  Next, in a step shown in FIG. 19, a resist film 61 having an opening 61A is formed on the surface 36A of the seed layer 36. At this time, the opening 61A is formed so as to expose the surface 36A of the seed layer 36 corresponding to the formation region of the conductive film 37.

  Next, in the step shown in FIG. 20, a conductive film 37 is formed on the surface 36A of the seed layer 36 exposed at the opening 61A by an electrolytic plating method using the seed layer 36 as a power feeding layer. As the conductive film 37, for example, a Cu film can be used. When a Cu film is used as the conductive film 37, the thickness of the conductive film 37 can be set to, for example, 10 μm to 20 μm.

  Next, in a step shown in FIG. 21, the resist film 61 shown in FIG. 20 is removed. Next, in the step shown in FIG. 22, a portion of the seed layer 36 provided in the structure shown in FIG. 21 where the conductive film 37 is not formed (unnecessary seed layer 36) is removed. Specifically, for example, the unnecessary seed layer 36 is removed using an etching solution. Thereby, the wiring 18 including the seed layer 36 and the conductive film 37 is formed. The process shown in FIGS. 18 to 22 is a wiring formation process. Further, the wiring 18 is formed by a semi-additive method as shown in FIGS.

  Next, in a step shown in FIG. 23, a resist film 63 having an opening 63A is formed on the structure shown in FIG. At this time, the opening 63A is formed so as to expose the surface 37A of the conductive film 37 corresponding to the formation region of the columnar electrode 19.

  Next, in the step shown in FIG. 24, the plating film made of the first conductive material on the surface 37A of the conductive film 37 exposed from the opening 63A by the electrolytic plating method using the support 55 as the power feeding layer. Is deposited and grown to form the columnar electrode 19 (columnar electrode forming step). As the first conductive material, for example, Cu, Cu alloy, or the like can be used. The height of the columnar electrode 19 can be set to 30 μm, for example. Next, a metal layer 64 made of a second conductive material different from the first conductive material is formed on the surface 19A of the columnar electrode 19 (upper surface of the columnar electrode 19) by electrolytic plating using the support 55 as a power feeding layer. (Metal layer forming step). The thickness of the metal layer 64 can be set to 5 μm, for example. When Cu or Cu alloy is used as the first conductive material, for example, at least one material of the group consisting of Ni, Sn, and solder may be used as the second conductive material.

  Thus, when using Cu or Cu alloy as the first conductive material, the metal layer 64 is removed by using at least one material of the group consisting of Ni, Sn, and solder as the second conductive material. The columnar electrode 19 can be prevented from being etched by the etching solution used at the time.

  When there is a wiring 18 that is not electrically connected to the support body 55, a first conductor pattern that electrically connects the wiring 18 and the support body 55 is formed, so that It becomes possible to form the columnar electrode 19 and the metal layer 64. Further, when the first conductor pattern is formed on the insulating layer 17 in the portion located between the wiring 18 and the support body 55, the first conductor pattern includes, for example, the electronic component mounting pad 15 and the columnar electrode 16. When forming, the electronic component mounting pad 15 and the columnar electrode 16 can be formed simultaneously.

  Next, in a step shown in FIG. 25, the resist film 63 shown in FIG. 24 is removed. Next, in the process shown in FIG. 26, the insulating layer 21 is formed on the structure shown in FIG. 25 to cover the wiring 18, the side surfaces of the columnar electrodes 19, and the upper surface 64A and the side surfaces of the metal layer 64 (insulating layer formation). Process). As the insulating layer 21, for example, an insulating resin layer can be used. When an insulating resin layer is used as the insulating layer 21, the insulating layer 21 is laminated (attached) on a semi-cured resin film on the structure shown in FIG. 25, and then the resin film is completely cured. By forming. As a material of the resin film, for example, an epoxy resin or a polyimide resin can be used.

  Next, in the step shown in FIG. 27, from the surface 21 </ b> A (upper surface of the insulating layer 21) side of the insulating layer 21 until the upper surface 64 </ b> A of the metal layer 64 is exposed by the same method as the step shown in FIG. 16 described above. The insulating layer 21 is removed (insulating layer removing step). The insulating layer 21 is removed until the surface 21A of the insulating layer 21 is substantially flush with the upper surface 64A of the metal layer 64. Thereby, most of the insulating layer 21 is removed from the insulating layer 21 formed on the upper surface 64 </ b> A of the metal layer 64.

  Next, in the step shown in FIG. 28, the metal layer 64 is removed with an etchant that does not etch the first conductive material, and the columnar electrode 19 (specifically, the columnar electrode 19 of the columnar electrode 19 is connected to the wiring 23). The surface 19A) is exposed from the insulating layer 21 (metal layer removing step). Thereby, an opening 39 exposing the surface 19A of the columnar electrode 19 is formed in the insulating layer 21. When Cu or Cu alloy is used as the first conductive material and Ni is used as the second conductive material, as an etchant that does not etch the first conductive material, for example, Mekku Mover NH-1865 (manufactured by MEC Co., Ltd.) ) Can be used. Mekkuma Remover NH-1865 is an etchant that selectively etches Ni without etching Cu. In addition, when Cu or Cu alloy is used as the first conductive material and solder is used as the second conductive material, for example, Enstrip TL-106 (Meltex) is used as an etchant that does not etch the first conductive material. (Meltex) can be used.

  In this way, the metal layer 64 formed on the columnar electrode 19 is removed by using an etchant that does not etch the first conductive material constituting the columnar electrode 19, thereby forming the metal layer 64 together with the metal layer 64. The insulating layer 21 remaining on the upper surface 64A can be removed, and the surface 19A of the columnar electrode 19 where the insulating layer 21 does not exist can be exposed from the insulating layer 21. Thereby, since the insulating layer 21 is not interposed between the wiring 23 formed on the surface 19A of the columnar electrode 19 and the columnar electrode 19, the electrical connection reliability between the wiring 23 and the columnar electrode 19 is improved. It can be secured sufficiently.

  Next, in the step shown in FIG. 29, the surface 21 </ b> A (in this case, the insulating layer 21) of the insulating layer 21 is performed by the same method (specifically, semi-additive method) as the steps shown in FIGS. 18 to 21 described above. The wiring 23 including the seed layer 41 and the conductive film 42 is formed on the surface of the insulating layer 21 corresponding to the side surface of the opening 39 and the surface 19A of the columnar electrode 19 (wiring forming step). As the seed layer 41, for example, a Cu layer can be used. When a Cu layer is used as the seed layer 41, the thickness of the seed layer 41 can be set to 0.5 μm to 1 μm, for example. As the conductive film 42, for example, a Cu film can be used. When a Cu film is used as the conductive film 42, the thickness of the conductive film 42 can be set to, for example, 10 μm to 20 μm.

  Next, in the step shown in FIG. 30, a plating film made of the first conductive material is deposited and grown on the surface 42A of the conductive film 42 by the same method as the steps shown in FIGS. 23 and 24 described above. The columnar electrode 24 is formed (columnar electrode forming step), and then the metal layer 66 is formed on the surface 24A of the columnar electrode 24 (metal layer forming step). As the first conductive material, for example, Cu, Cu alloy, or the like can be used. The height of the columnar electrode 24 can be set to 30 μm, for example. Further, the thickness of the metal layer 66 can be set to 10 μm, for example. When Cu or Cu alloy is used as the first conductive material, for example, at least one material of the group consisting of Ni, Sn, and solder may be used as the second conductive material.

  Thus, when using Cu or Cu alloy as the first conductive material, the metal layer 66 is removed by using at least one material of the group consisting of Ni, Sn, and solder as the second conductive material. It is possible to prevent the columnar electrode 24 from being etched by the etching solution used at the time.

  When there is a wiring 23 that is not electrically connected to the support body 55, a second conductor pattern that electrically connects the wiring 23 and the support body 55 is formed, thereby forming a wiring pattern 23 on the wiring pattern 23. It becomes possible to form the columnar electrode 24 and the metal layer 66. When the second conductor pattern is formed on the insulating layers 17 and 21 located between the wiring 23 and the support body 55, the second conductor pattern includes, for example, the electronic component mounting pad 15, the columnar electrode. The electronic component mounting pad 15, the columnar electrodes 16, 19, and the wiring 18 can be formed at the same time when the 16, 19 and wiring 18 are formed.

  Next, in the process shown in FIG. 31, the metal layer 66 formed on the columnar electrode 24 is formed by performing the same process as the process shown in FIGS. 26 to 28 (including the metal layer removing process) described above. The insulating layer 25 having the opening 45 is formed while being removed. At this time, the opening 45 is formed so as to expose the surface 24 </ b> A of the columnar electrode 24.

  Next, in the step shown in FIG. 32, the Ni layer 47 is formed on the surface 24A of the columnar electrode 24 by electrolytic plating using the support 55 as a power feeding layer. The thickness of the Ni layer 47 can be set to 5 μm to 9 μm, for example.

  Next, in a step shown in FIG. 33, an Au layer 48 is formed on the Ni layer 47 by an electrolytic plating method using the support 55 as a power feeding layer. Thus, the external connection pad 26 constituted by the Ni layer 47 and the Au layer 48 is formed. The thickness of the Au layer 48 can be set to 0.01 μm to 0.3 μm, for example. 32 and 33, the thickness of the Ni layer 47 and the Au layer 48 may be adjusted so that the surface 48A of the Au layer 48 is substantially equal to the surface 25A of the insulating layer 25.

  Next, in the step shown in FIG. 34, the support body 55 is removed. Specifically, for example, the support body 55 is removed by wet etching.

  Next, in the step shown in FIG. 35, the solder bumps 28 are formed on the surface 31A of the Au layer 31, and the solder bumps 29 are formed on the surface 48A of the Au layer 48. Thereby, the wiring board 10 is manufactured. In FIG. 35, the structure shown in FIG. 34 is shown upside down.

  According to the method of manufacturing the wiring board of the present embodiment, the columnar electrodes 16 and 19 made of the first conductive material are formed, and the metal made of the second conductive material different from the first conductive material. After the layers 58 and 64 are formed on the upper surfaces 16A and 19A of the columnar electrodes 16 and 19, the insulating layers 17 and 21 covering the side surfaces of the columnar electrodes 16 and 19 and the upper surfaces 58A and 64A and the side surfaces of the metal layers 58 and 64 are formed. After that, the insulating layers 17 and 21 are removed from the upper surface side of the insulating layers 17 and 21 until the upper surfaces 58A and 64A of the metal layers 58 and 64 are exposed, and then an etching solution that does not etch the first conductive material Is used to remove the metal layers 58 and 64, exposing the portions of the columnar electrodes 16 and 19 connected to the wirings 18 and 23 from the insulating layers 17 and 21, thereby removing the metal layers after removing the insulating layers 17 and 21. 58,6 Since it becomes possible to remove the insulating layers 17 and 21 remaining on the metal layers 58 and 64 together, the insulating layers 17 and 21 are not interposed between the columnar electrodes 16 and 21 and the wirings 18 and 23. The electrical connection reliability between the columnar electrodes 16 and 21 and the wirings 18 and 23 can be sufficiently ensured.

  In addition, since the roughening treatment of the insulating layers 17 and 23 performed before the wirings 18 and 23 are formed can be performed in a short time, for example, when the wirings 18 and 23 are formed using a semi-additive method, The time for removing the seed layers 36 and 41 by etching can be shortened. As a result, the etching time for removing the unnecessary seed layers 36 and 41 can be shortened. Thereby, in the process of removing the unnecessary seed layers 36 and 41, the wirings 18 and 23 are difficult to be etched, so that the width of the wirings 18 and 23 can be suppressed from being narrower than a predetermined wiring width.

  In the wiring board manufacturing method of the present embodiment, the case where the electronic component mounting pad 15 is formed on the support 55 has been described as an example. However, the external connection terminal 26 is formed on the support 55. Thereafter, the electronic component mounting pad 15 may be formed.

  Further, in the present embodiment, the coreless substrate has been described as an example of the wiring substrate 10, but the manufacturing method of the wiring substrate 10 of the present embodiment is performed when a build-up substrate with a core having a core substrate is manufactured. It is also applicable to. In this case, an effect similar to that of the method for manufacturing the wiring board 10 of the present embodiment can be obtained.

  36 to 38 are diagrams showing another manufacturing process of the wiring board according to the embodiment of the present invention.

  Further, when there is a wiring that is not electrically connected to the support body 55, even if the columnar electrode 19 and the metal layer 64 are formed on the wiring 18 by performing the processes shown in FIGS. 36 to 38. Good. Specifically, after the step shown in FIG. 21 described above, a resist film 63 is formed on the seed layer 36 without removing the seed layer 36 in the step shown in FIG. In the illustrated process, the columnar electrode 19 and the metal layer 64 are formed on the wiring 18 by electrolytic plating using the seed layer 36 as a power feeding layer. Thereafter, in the step shown in FIG. 38, the resist film 63 is removed, and then the unnecessary portion of the seed layer 36 is removed to form the structure shown in FIG. The wiring substrate 10 may be manufactured by performing the same process as the process shown in FIGS.

  The preferred embodiments of the present invention have been described in detail above, but the present invention is not limited to such specific embodiments, and within the scope of the present invention described in the claims, Various modifications and changes are possible.

  The present invention can be applied to a wiring board provided with a columnar electrode connected to a wiring and a manufacturing method thereof.

It is sectional drawing of the conventional wiring board. It is FIG. (1) which shows the manufacturing process of the conventional wiring board. It is FIG. (2) which shows the manufacturing process of the conventional wiring board. It is FIG. (3) which shows the manufacturing process of the conventional wiring board. It is FIG. (4) which shows the manufacturing process of the conventional wiring board. It is FIG. (5) which shows the manufacturing process of the conventional wiring board. It is FIG. (6) which shows the manufacturing process of the conventional wiring board. It is a figure (the 7) which shows the manufacturing process of the conventional wiring board. It is FIG. (1) for demonstrating the problem of the manufacturing method of the conventional wiring board. It is FIG. (2) for demonstrating the problem of the manufacturing method of the conventional wiring board. It is sectional drawing of the wiring board which concerns on embodiment of this invention. It is FIG. (The 1) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (2) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (The 3) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (4) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (5) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (6) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (7) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (The 8) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (9) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (10) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (11) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (12) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (13) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (14) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (15) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (16) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (17) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (18) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (19) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (20) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (21) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (22) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (23) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (The 24) which shows the manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (1) which shows the other manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (2) which shows the other manufacturing process of the wiring board which concerns on embodiment of this invention. It is FIG. (3) which shows the other manufacturing process of the wiring board which concerns on embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Wiring board 11 Electronic component 11A Pad 15 Electronic component mounting pad 16, 19, 24 Columnar electrode 16A, 17A, 17B, 19A, 21A, 24A, 25A, 31A, 32A, 36A, 37A, 41A, 42A, 48A Surface 17 , 21, 25 Insulating layer 18, 23 Wiring 26 External connection pad 28, 29 Solder bump 31, 48 Au layer 32, 47 Ni layer 34, 39, 45, 56A, 61A, 63A Opening 36, 41 Seed layer 37, 42 conductive film 55 support 55A, 58A, 64A upper surface 56, 61, 63 resist film 58, 64 metal layer

Claims (3)

A method of manufacturing a wiring board comprising a columnar electrode provided in an insulating layer, and a wiring connected to the columnar electrode, the first electrode being composed of a first conductive material,
A columnar electrode forming step of forming the columnar electrode;
A metal layer forming step of forming a metal layer made of a second conductive material different from the first conductive material on an upper surface of the columnar electrode;
An insulating layer forming step of forming an insulating layer covering the side surface of the columnar electrode and the upper surface and side surface of the metal layer;
An insulating layer removing step of removing the insulating layer from the upper surface side of the insulating layer until the upper surface of the metal layer is exposed;
After the insulating layer removing step, the metal layer is removed by an etching solution that does not etch the first conductive material, and the columnar electrode connected to the wiring is exposed from the insulating layer. A method for manufacturing a wiring board, comprising:   2. The method according to claim 1, wherein when Cu or a Cu alloy is used as the first conductive material, the second conductive material is at least one material selected from the group consisting of Ni, Sn, and solder. A method for manufacturing a wiring board.   2. The wiring formation step of forming the wiring on the upper surface of the insulating layer and the columnar electrode exposed from the insulating layer by a semi-additive method after the metal layer removing step is further provided. Or the manufacturing method of the wiring board of 2.

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