JP2009158622A5 - - Google Patents
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- Publication number
- JP2009158622A5 JP2009158622A5 JP2007333306A JP2007333306A JP2009158622A5 JP 2009158622 A5 JP2009158622 A5 JP 2009158622A5 JP 2007333306 A JP2007333306 A JP 2007333306A JP 2007333306 A JP2007333306 A JP 2007333306A JP 2009158622 A5 JP2009158622 A5 JP 2009158622A5
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- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007333306A JP2009158622A (ja) | 2007-12-25 | 2007-12-25 | 半導体記憶装置及びその製造方法 |
| US12/338,417 US8159019B2 (en) | 2007-12-25 | 2008-12-18 | Semiconductor memory device with stacked gate including charge storage layer and control gate and method of manufacturing the same |
| US13/426,664 US8394689B2 (en) | 2007-12-25 | 2012-03-22 | Semiconductor memory device with stacked gate including charge storage layer and control gate and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007333306A JP2009158622A (ja) | 2007-12-25 | 2007-12-25 | 半導体記憶装置及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2009158622A JP2009158622A (ja) | 2009-07-16 |
| JP2009158622A5 true JP2009158622A5 (enExample) | 2011-06-16 |
Family
ID=40787564
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007333306A Pending JP2009158622A (ja) | 2007-12-25 | 2007-12-25 | 半導体記憶装置及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US8159019B2 (enExample) |
| JP (1) | JP2009158622A (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011003614A (ja) | 2009-06-16 | 2011-01-06 | Toshiba Corp | 半導体記憶装置及びその製造方法 |
| JP2011100946A (ja) * | 2009-11-09 | 2011-05-19 | Toshiba Corp | 半導体記憶装置 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH104137A (ja) | 1996-06-17 | 1998-01-06 | Matsushita Electron Corp | 半導体装置の製造方法 |
| JP3559723B2 (ja) * | 1999-05-28 | 2004-09-02 | Necエレクトロニクス株式会社 | 半導体装置の製造方法 |
| US6835987B2 (en) | 2001-01-31 | 2004-12-28 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device in which selection gate transistors and memory cells have different structures |
| DE10131704A1 (de) * | 2001-06-29 | 2003-01-16 | Atmel Germany Gmbh | Verfahren zur Dotierung eines Halbleiterkörpers |
| JP2003060073A (ja) * | 2001-08-10 | 2003-02-28 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| US6855985B2 (en) * | 2002-09-29 | 2005-02-15 | Advanced Analogic Technologies, Inc. | Modular bipolar-CMOS-DMOS analog integrated circuit & power transistor technology |
| JP4578785B2 (ja) * | 2003-05-21 | 2010-11-10 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| JP2007027622A (ja) * | 2005-07-21 | 2007-02-01 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
| US7550355B2 (en) * | 2005-08-29 | 2009-06-23 | Toshiba America Electronic Components, Inc. | Low-leakage transistor and manufacturing method thereof |
| JP4959990B2 (ja) | 2006-03-01 | 2012-06-27 | 株式会社東芝 | 半導体装置 |
| TWI302355B (en) * | 2006-04-20 | 2008-10-21 | Promos Technologies Inc | Method of fabricating a recess channel array transistor |
| JP2011003614A (ja) | 2009-06-16 | 2011-01-06 | Toshiba Corp | 半導体記憶装置及びその製造方法 |
| JP2011100946A (ja) | 2009-11-09 | 2011-05-19 | Toshiba Corp | 半導体記憶装置 |
-
2007
- 2007-12-25 JP JP2007333306A patent/JP2009158622A/ja active Pending
-
2008
- 2008-12-18 US US12/338,417 patent/US8159019B2/en active Active
-
2012
- 2012-03-22 US US13/426,664 patent/US8394689B2/en active Active
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