JP2009111043A - Electric connection body, and manufacturing method thereof - Google Patents

Electric connection body, and manufacturing method thereof Download PDF

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Publication number
JP2009111043A
JP2009111043A JP2007279941A JP2007279941A JP2009111043A JP 2009111043 A JP2009111043 A JP 2009111043A JP 2007279941 A JP2007279941 A JP 2007279941A JP 2007279941 A JP2007279941 A JP 2007279941A JP 2009111043 A JP2009111043 A JP 2009111043A
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JP
Japan
Prior art keywords
electrical connection
connection body
bump
conductive particles
protruding electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2007279941A
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Japanese (ja)
Other versions
JP5622137B2 (en
Inventor
Misao Konishi
美佐夫 小西
Yoshihito Tanaka
芳人 田中
Etsuko Ishikawa
悦子 石川
Naotake Saito
尚武 齋藤
Shinya Kawahara
伸也 河原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dexerials Corp
EEJA Ltd
Original Assignee
Electroplating Engineers of Japan Ltd
Sony Chemical and Information Device Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Electroplating Engineers of Japan Ltd, Sony Chemical and Information Device Corp filed Critical Electroplating Engineers of Japan Ltd
Priority to JP2007279941A priority Critical patent/JP5622137B2/en
Priority to KR1020097022670A priority patent/KR101505214B1/en
Priority to PCT/JP2008/069514 priority patent/WO2009057582A1/en
Priority to TW097141683A priority patent/TWI443762B/en
Publication of JP2009111043A publication Critical patent/JP2009111043A/en
Application granted granted Critical
Publication of JP5622137B2 publication Critical patent/JP5622137B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

<P>PROBLEM TO BE SOLVED: To provide an electric connection body, wherein conductive particles contained in an anisotropic conductive film can be uniformly crushed even when the sizes of conductive particles are small, and excellent conduction characteristics can be obtained. <P>SOLUTION: The electric connection body is constituted by electrically connecting a semiconductor element 1 as a first electronic member and a wiring board 3 as a second electronic member through the anisotropic conductive film 5. Bumps (projection electrode) 2 are formed on one of the electronic members (the semiconductor element 1 in this case), and a top portion of each bump 2 is formed to have a flat surface having a surface roughness Ra of ≤0.05 μm. An average particle size of conductive particles 6 contained in the anisotropic conductive film 5 is ≤4 μm. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、半導体素子や電子基板等の電子部材同士が電気的に接続された電気的接続体に関し、特に、突起電極(バンプ)及び異方性導電膜を利用して電気的な接続を行った電気的接続体に関する。   The present invention relates to an electrical connection body in which electronic members such as a semiconductor element and an electronic substrate are electrically connected to each other, and in particular, electrical connection is performed using a protruding electrode (bump) and an anisotropic conductive film. Related to the electrical connection.

従来から、例えば半導体素子等の電子部材を配線基板に実装する場合には、ワイヤボンディングによって半導体素子の端子電極と配線基板の電極とを電気的に接続することが広く行われている。ただし、この種のワイヤボンディングによる接続では、電極間を1つ1つボンディングワイヤで接続しなければならず接続工程が煩雑であること、高密度実装にともなう端子電極の微細化、狭いピッチ化等への対応が困難であること等の問題があり、その改善が望まれている。   2. Description of the Related Art Conventionally, when an electronic member such as a semiconductor element is mounted on a wiring board, for example, the terminal electrode of the semiconductor element and the electrode of the wiring board are electrically connected by wire bonding. However, in this type of wire bonding, the electrodes must be connected to each other with bonding wires, and the connection process is complicated, and the terminal electrodes are miniaturized and the pitch is reduced due to high-density mounting. There is a problem that it is difficult to cope with the problem, and the improvement is desired.

このような状況から、半導体素子をいわゆるフェースダウン状態で配線基板上に実装するフリップチップ実装法が提案されている。このフリップチップ実装法は、半導体素子の端子電極、あるいは配線基板の電極のいずれか一方に、バンプと称される突起電極を形成し、この突起電極が他方の電極と対向するように配置し、一括して電気的に接続する方法である。突起電極は、AuやCu、半田等をメッキすることによって形成され、その高さは数μm〜数十μm程度である。   Under such circumstances, a flip chip mounting method has been proposed in which a semiconductor element is mounted on a wiring board in a so-called face-down state. In this flip chip mounting method, a bump electrode called a bump is formed on one of a terminal electrode of a semiconductor element or an electrode of a wiring board, and the bump electrode is disposed so as to face the other electrode. This is a method of electrical connection in a lump. The protruding electrode is formed by plating Au, Cu, solder or the like, and its height is about several μm to several tens of μm.

このようなフリップチップ実装法においては、接続信頼性を高めること等を目的に、異方性導電膜が用いられている。異方性導電膜は、接着剤として機能する絶縁性の樹脂中に導電性粒子を分散したものであり、突起電極と対向する電極間にこれを挟み込み、加熱、加圧すると導電性粒子が電極間で押し潰され、電気的な接続が図られる。突起電極のない部分では、導電性粒子は絶縁性の樹脂中に分散した状態が維持され、電気的に絶縁された状態が保たれるので、突起電極のある部分でのみ電気的導通が図られることになる。   In such a flip chip mounting method, an anisotropic conductive film is used for the purpose of improving connection reliability. An anisotropic conductive film is a conductive particle dispersed in an insulating resin that functions as an adhesive. When this is sandwiched between electrodes facing a protruding electrode, and heated and pressurized, the conductive particle is an electrode. They are crushed between them to make an electrical connection. In the portion without the protruding electrode, the conductive particles are maintained dispersed in the insulating resin and kept in an electrically insulated state, so that electrical conduction is achieved only in the portion with the protruding electrode. It will be.

異方性導電膜を用いたフリップチップ実装法によれば、上述したように、多数の電極間を一括して電気的に接続することが可能であり、ワイヤボンディングのように電極間を1つ1つボンディングワイヤで接続する必要はなく、また高密度実装にともなう端子電極の微細化、狭いピッチ化等への対応も比較的容易である。   According to the flip chip mounting method using an anisotropic conductive film, as described above, a large number of electrodes can be electrically connected together, and one electrode can be connected as in wire bonding. It is not necessary to connect with one bonding wire, and it is relatively easy to cope with the miniaturization of terminal electrodes and the narrow pitch associated with high-density mounting.

このような異方性導電膜を用いたフリップチップ実装法では、電気的接続の信頼性の確保のため、突起電極上における導電性粒子の捕捉性を高めることが必要であり、各方面で検討が進められている。例えば、突起電極の高さが不均一であると接続に問題が生じるため、突起電極の高さを均一にする技術が提案されている(例えば、特許文献1乃至特許文献6等参照。)。   In the flip chip mounting method using such an anisotropic conductive film, it is necessary to improve the trapping property of the conductive particles on the protruding electrode in order to ensure the reliability of the electrical connection. Is underway. For example, when the height of the protruding electrode is not uniform, a problem occurs in connection. Therefore, a technique for making the height of the protruding electrode uniform has been proposed (see, for example, Patent Document 1 to Patent Document 6).

具体的には、特許文献1には、電極部を有する半導体素子を、電極パターンを有する基板上に実装する方法が開示されている。特に、この実装方法においては、半導体素子の電極部に半導体素子表面よりも突出した導電性の突出部を設け、この突出部を剛体表面に一旦押しつけ、基板若しくは半導体素子の少なくとも一方に接着用樹脂を塗布し、突出部と電極パターンとが接触するように半導体素子と基板とを加圧して接合させた後、接着用樹脂を硬化させるようにしている。   Specifically, Patent Document 1 discloses a method of mounting a semiconductor element having an electrode portion on a substrate having an electrode pattern. In particular, in this mounting method, a conductive protrusion that protrudes from the surface of the semiconductor element is provided on the electrode portion of the semiconductor element, and the protrusion is temporarily pressed against the surface of the rigid body, and the adhesive resin is applied to at least one of the substrate and the semiconductor element. The semiconductor element and the substrate are pressed and bonded so that the protrusion and the electrode pattern are in contact with each other, and then the adhesive resin is cured.

また、特許文献2には、基板表面に形成された多数の電路の上に半導体素子の電極との接合に用いるバンプを形成する方法であって、バンプが加圧によって高さの揃ったものとされていることを特徴とするバンプの製法が開示されている。   Patent Document 2 discloses a method of forming bumps used for bonding with electrodes of a semiconductor element on a large number of electric circuits formed on the surface of a substrate, and the bumps have a uniform height by pressurization. A method for producing a bump characterized by the above is disclosed.

さらに、特許文献3には、内部に導体が充填されたスルーホールを有するセラミック回路基板の少なくともバンプ形成面を研磨し、表面に露出したスルーホール導体上に金属小片をろう付けすることを特徴とするバンプ付き基板の製造方法が開示されている。   Further, Patent Document 3 is characterized in that at least a bump forming surface of a ceramic circuit board having a through hole filled with a conductor is polished, and a metal piece is brazed onto the through hole conductor exposed on the surface. A method of manufacturing a bumped substrate is disclosed.

さらにまた、特許文献4には、下層に銀メッキ層を設けるとともに、その上層にニッケルメッキ層を設け、さらにその上層に金メッキ層を設けた構成を有するリード表面において、フェースダウンボンディングによって搭載される半導体装置の電極パッドと対向する部分に金メッキによって柱状の突起電極を形成し、且つ、この突起電極を半導体装置実装基板の上方向から平板によって押圧して、半導体装置の電極パッドとの接触面となる複数個の突起電極の表面を、同一平面内に一致させるように平坦化する技術が開示されている。   Further, Patent Document 4 is mounted by face-down bonding on a lead surface having a structure in which a silver plating layer is provided as a lower layer, a nickel plating layer is provided as an upper layer, and a gold plating layer is further provided as an upper layer. A columnar protruding electrode is formed by gold plating on a portion facing the electrode pad of the semiconductor device, and the protruding electrode is pressed by a flat plate from above the semiconductor device mounting substrate, and a contact surface with the electrode pad of the semiconductor device A technique for flattening the surfaces of a plurality of protruding electrodes so as to coincide with each other in the same plane is disclosed.

また、特許文献5には、はんだ突起電極の高さを揃えることにより実装不良を低減し、電気接続抵抗を低減するとともに接続強度を向上させることを目的として、はんだ突起電極に対して接触することによって電気特性検査を行った後に、はんだ突起電極の少なくとも頂部を研磨処理する技術が開示されている。   Further, in Patent Document 5, contact is made with a solder bump electrode for the purpose of reducing mounting defects by aligning the height of the solder bump electrode, reducing electrical connection resistance and improving connection strength. Discloses a technique of polishing at least a top portion of a solder bump electrode after performing an electrical property test.

さらに、特許文献6には、バンプの高さを効率よく揃えることを目的として、撮像手段がバンプの頂部に焦点を合わせるとともに、そのときの切削手段の位置を原点とし、その原点を基準として切削手段を駆動してバンプの切削を行う技術が開示されている。   Further, in Patent Document 6, for the purpose of efficiently aligning the height of the bump, the imaging means focuses on the top of the bump, and the position of the cutting means at that time is the origin, and the cutting is performed with the origin as a reference. A technique for cutting a bump by driving means is disclosed.

また、これら特許文献1乃至特許文献6に記載された技術の他、突起電極と接続端子との間において、導電性粒子の捕捉性を高めるために、突起電極に凹凸を形成することも試みられている(例えば、特許文献7乃至特許文献10等参照。)。   In addition to the techniques described in Patent Documents 1 to 6, it is also attempted to form irregularities on the protruding electrode in order to improve the trapping property of the conductive particles between the protruding electrode and the connection terminal. (For example, see Patent Document 7 to Patent Document 10).

例えば、特許文献7には、液晶セルの電極とフレキシブル基板の電極とを接続してなる液晶表示装置において、フレキシブル基板の電極は、粗面化した表面を有することを特徴とする液晶表示装置が開示されている。   For example, Patent Document 7 discloses a liquid crystal display device in which an electrode of a liquid crystal cell and an electrode of a flexible substrate are connected, and the electrode of the flexible substrate has a roughened surface. It is disclosed.

また、特許文献8には、砥粒を有する研磨シートを備えた平面土台の上に、バンプが研磨シートに当接するように、半導体装置(IC基板)をフェースダウンで設置し、半導体装置を平面土台に押圧しながら、押圧する方向に垂直な平面内で平面土台を超音波振動させることによってバンプの先端面に凹凸面を形成することが開示されている。   Further, in Patent Document 8, a semiconductor device (IC substrate) is placed face down on a flat base including a polishing sheet having abrasive grains so that bumps come into contact with the polishing sheet. It is disclosed that an uneven surface is formed on the front end surface of a bump by ultrasonically vibrating the flat base in a plane perpendicular to the pressing direction while pressing the base.

さらに、特許文献9には、半導体装置の電極上に金バンプを形成する工程と、回路基板上に異方性導電膜を貼り付ける工程と、金バンプよりも硬い材料からなり異方性導電膜の導電粒子の径よりも小さい凹凸が形成された押圧用基板を、半導体装置の金バンプの先端面に押圧することにより、金バンプの先端面に凹凸部を形成する工程と、金バンプと回路基板の電極とを位置合わせした後、半導体装置を異方性導電膜を貼り付けた回路基板に押圧して加熱する工程とを備える半導体装置の実装方法が開示されている。   Further, Patent Document 9 discloses a step of forming a gold bump on an electrode of a semiconductor device, a step of attaching an anisotropic conductive film on a circuit board, and an anisotropic conductive film made of a material harder than the gold bump. Forming a concavo-convex portion on the front end surface of the gold bump by pressing a pressing substrate having a concavo-convex smaller than the diameter of the conductive particles on the front end surface of the gold bump of the semiconductor device; A method of mounting a semiconductor device is disclosed, which includes a step of pressing and heating a semiconductor device against a circuit substrate on which an anisotropic conductive film is attached after aligning the electrodes of the substrate.

さらにまた、特許文献10には、バンプ電極の形成に際して、配線電極上に予めパッシベーション膜からなる錐状あるいは台形状の凸部を複数設け、この状態でバンプ下地金属層を堆積し、さらにその上にメッキ成長によって金電極を形成してバンプ電極とする技術が開示されている。これにより、バンプ電極の電極表面には、配線電極上に設けた凹凸部に対応して、凹凸部が形成されることになる。   Furthermore, in Patent Document 10, when the bump electrode is formed, a plurality of conical or trapezoidal convex portions made of a passivation film are provided on the wiring electrode in advance, and a bump base metal layer is deposited in this state, Discloses a technique for forming a gold electrode by plating growth to form a bump electrode. As a result, an uneven portion corresponding to the uneven portion provided on the wiring electrode is formed on the electrode surface of the bump electrode.

特開平1−278034号公報Japanese Patent Laid-Open No. 1-278034 特開平1−295433号公報JP-A-1-295433 特開平4−33395号公報JP-A-4-33395 特開平5−291262号公報Japanese Patent Laid-Open No. 5-291262 特開2000−114313号公報JP 2000-114313 A 特開2006−324397号公報JP 2006-324397 A 実開昭63−174328号公報Japanese Utility Model Publication No. 63-174328 特開平6−283537号公報JP-A-6-283537 特開平11−16946号公報Japanese Patent Laid-Open No. 11-16946 特開2004−14778号公報JP 2004-14778 A

ところで、上述したフリップチップ実装に用いられる異方性導電膜において、導電性粒子の粒径は、通常5μm〜10μmの範囲とされているが、近年のファインピッチの要請に対応するため、導電性粒子の割合を少なくするか、導電性粒子の粒子径を小さくすることが求められている。例えば、導電性粒子の割合が多く、また、導電性粒子の粒子径が大きいと、ファインピッチのフリップチップ実装において、突起電極間に導電性粒子が詰まり、電気的な短絡(ショート)が発生するという問題が生じる。   By the way, in the anisotropic conductive film used for the flip chip mounting described above, the particle size of the conductive particles is usually in the range of 5 μm to 10 μm. It is required to reduce the proportion of particles or to reduce the particle size of conductive particles. For example, when the proportion of conductive particles is large and the particle size of the conductive particles is large, the conductive particles are clogged between the protruding electrodes in a fine pitch flip chip mounting, and an electrical short circuit occurs. The problem arises.

この場合、導電性粒子の割合を少なくすることは、導電性粒子の捕捉性に直結するため、導電性粒子の粒子径を小さくすることが妥当である。導電性粒子の粒子径を小さくすれば、突起電極間の隙間の導電性粒子は、絶縁性の樹脂(接着剤)中に分散された状態となり、突起電極間で導電性粒子同士が接触することによるショートの問題は回避される。   In this case, reducing the proportion of the conductive particles is directly related to the trapping property of the conductive particles, so it is appropriate to reduce the particle size of the conductive particles. If the particle size of the conductive particles is reduced, the conductive particles in the gaps between the protruding electrodes are dispersed in the insulating resin (adhesive), and the conductive particles are in contact with each other between the protruding electrodes. The short-circuit problem due to is avoided.

しかしながら、導電性粒子の粒子径を小さくした場合には、突起電極の高さのバラツキや実装精度等により、導電性粒子が均一に潰れず、導通抵抗が不安定になる現象が発生しやすいという問題が新たに発生する。各突起電極の表面の高さには±2μm程度のバラツキがあり(従来の突起電極の表面粗さRaは0.3μm程度であり)、例えば導電性粒子の平均粒子径が4μm以下になると、均一に押し潰すことは困難である。   However, when the particle size of the conductive particles is reduced, the conductive particles are not crushed uniformly due to variations in the height of the protruding electrodes, mounting accuracy, etc. A new problem arises. The surface height of each protruding electrode has a variation of about ± 2 μm (the surface roughness Ra of the conventional protruding electrode is about 0.3 μm). For example, when the average particle diameter of the conductive particles is 4 μm or less, It is difficult to crush uniformly.

このような導電性粒子の小径化を考えた場合、上述した特許文献1乃至特許文献6に記載された技術のような、突起電極の高さを均一にする技術では対応することができない。これら特許文献1乃至特許文献6に記載された技術においては、突起電極間の高さのバラツキを小さくすることはできるものの、突起電極頂部(先端平面部)の表面粗さに起因する高さのバラツキは解消することができず、突起電極頂部には表面粗さによるバラツキが存在することになる。したがって、導電性粒子の粒子径が小さくなると、突起電極上の導電性粒子が均一に潰れないという問題は解決されないままである。   When considering such a reduction in the diameter of the conductive particles, a technique for making the heights of the protruding electrodes uniform, such as the techniques described in Patent Documents 1 to 6 described above, cannot cope. In the techniques described in Patent Document 1 to Patent Document 6, although the variation in height between the protruding electrodes can be reduced, the height due to the surface roughness of the protruding electrode top portion (tip flat portion) is reduced. The variation cannot be eliminated, and the variation due to the surface roughness exists at the top of the protruding electrode. Therefore, the problem that the conductive particles on the protruding electrodes are not uniformly crushed when the particle diameter of the conductive particles is reduced remains unsolved.

一方、上述した特許文献7乃至特許文献10に記載された技術のように、導電性粒子の捕捉性を高めるために突起電極に凹凸を形成する技術では、突起電極の表面粗さを大きくする方向であり、この場合、捕捉した導電性粒子が凹凸内に入り込むため均一に潰すことができず、導電性粒子の小径化に対応することは困難である。   On the other hand, in the technique of forming irregularities on the protruding electrode in order to improve the trapping property of the conductive particles like the techniques described in Patent Documents 7 to 10, the surface roughness of the protruding electrode is increased. In this case, since the trapped conductive particles enter the irregularities, they cannot be uniformly crushed, and it is difficult to cope with the reduction in the diameter of the conductive particles.

また、半導体素子等を実装する際には、突起電極の硬度が均一となるように調整する目的でアニール処理を行うことが通常である。しかしながら、突起電極は、その頂部を切削等の処理を行うことによって表面粗さを低減できたとしても、アニール処理を行うことによって表面粗さが大幅に増大してしまうという問題もあった。   Moreover, when mounting a semiconductor element etc., it is normal to perform an annealing process for the purpose of adjusting so that the hardness of a protruding electrode may become uniform. However, even if the surface roughness of the protruding electrode can be reduced by performing a process such as cutting on the top, there is a problem that the surface roughness is greatly increased by performing the annealing process.

本発明は、このような実情に鑑みてなされたものであり、異方性導電膜に含まれる導電性粒子の粒子径が小さい場合であっても、これを均一に潰すことが可能であり、アニール処理を行うか否かにかかわらず、良好な導通特性を得ることが可能な電気的接続体及びその製造方法を提供することを目的とする。   The present invention has been made in view of such circumstances, and even when the particle size of the conductive particles contained in the anisotropic conductive film is small, it is possible to uniformly crush it. It is an object of the present invention to provide an electrical connection body capable of obtaining good conduction characteristics regardless of whether or not annealing is performed, and a method for manufacturing the electrical connection body.

本願発明者は、上述した目的を達成するために、長期に亘り鋭意検討を重ねてきた。その結果、突起電極の表面に凹凸を形成した場合、導電性粒子の捕捉性については向上するケースもあるが、むしろ凹凸によって突起電極の周囲に位置する部分の導電性粒子に十分な圧力が伝わらず、突起電極上の導電性粒子が均一に潰れないこと、逆に突起電極の表面を格別平滑にすることで、導電性粒子の粒径が小さい場合に、潰れによって有効に作用する導電性粒子の割合が増え、捕捉性についてもほとんど問題がないことを見出すに至った。   The inventor of the present application has made extensive studies over a long period of time in order to achieve the above-described object. As a result, when unevenness is formed on the surface of the protruding electrode, the trapping property of the conductive particles may be improved. However, sufficient pressure is transmitted to the conductive particles in the portion located around the protruding electrode by the unevenness. Therefore, when the conductive particles on the protruding electrode are not uniformly crushed, and conversely, the surface of the protruding electrode is exceptionally smooth, so that the conductive particles that act effectively when crushed are small. As a result, the number of slag increased, and it was found that there was almost no problem with the trapping property.

本発明は、このような知見に基づいて完成されたものである。すなわち、上述した目的を達成する本発明にかかる電気的接続体は、第1の電子部材と第2の電子部材とが異方性導電膜を介して電気的に接続されてなる電気的接続体であって、いずれか一方の電子部材には突起電極が形成されており、前記突起電極の頂部は、アニール処理後の表面粗さRaが0.05μm以下の平坦面とされていることを特徴としている。   The present invention has been completed based on such findings. That is, the electrical connection body according to the present invention that achieves the above-described object is an electrical connection body in which the first electronic member and the second electronic member are electrically connected via an anisotropic conductive film. A bump electrode is formed on any one of the electronic members, and the top of the bump electrode is a flat surface having a surface roughness Ra of 0.05 μm or less after annealing. It is said.

また、上述した目的を達成する本発明にかかる電気的接続体の製造方法は、第1の電子部材と第2の電子部材とのいずれか一方に、メッキによって頂部の表面粗さRaが0.05μm以下の平坦面とされた突起電極を形成する工程と、前記第1の電子部材と前記第2の電子部材との間に異方性導電膜を介在させる工程と、押圧によって前記突起電極と対向する異方性導電膜の導電性粒子を押し潰し、前記第1の電子部材と前記第2の電子部材とを電気的に接続する工程とを備えることを特徴としている。   Further, in the method of manufacturing the electrical connection body according to the present invention that achieves the above-described object, the surface roughness Ra of the top portion is set to 0. 0 by plating on either one of the first electronic member and the second electronic member. A step of forming a protruding electrode having a flat surface of 05 μm or less, a step of interposing an anisotropic conductive film between the first electronic member and the second electronic member, and the protruding electrode by pressing And crushing conductive particles of the opposite anisotropic conductive film to electrically connect the first electronic member and the second electronic member.

粒径の小さな導電性粒子が分散された異方性導電膜を用いた場合、突起電極の表面粗さRaが大きく、表面に凹凸が形成されていると、第1の電子部材と第2の電子部材との間に異方性導電膜を挟み込んで、前記突起電極と対向する電極の間で前記異方性導電膜を押圧した際に、突起電極の表面の例えば凹部に入り込んだ導電性粒子に圧力が十分に伝わらず、十分に潰れない。導電性粒子が十分に潰れないと、電気的な接触面積等が不足して、導通信頼性を確保することは難しい。   When an anisotropic conductive film in which conductive particles having a small particle diameter are dispersed is used, if the surface roughness Ra of the protruding electrode is large and the surface is uneven, the first electronic member and the second electronic member When an anisotropic conductive film is sandwiched between the electronic member and the anisotropic conductive film is pressed between the electrodes facing the protruding electrode, conductive particles that have entered, for example, a recess on the surface of the protruding electrode The pressure is not sufficiently transmitted to and does not collapse sufficiently. If the conductive particles are not sufficiently crushed, the electrical contact area is insufficient, and it is difficult to ensure conduction reliability.

これに対して、本発明においては、突起電極の表面粗さRaが0.05μm以下とされ、極めて平滑な状態とされている。特に、本発明においては、アニール処理後においても表面粗さRaが0.05μm以下とされ、アニール処理を行うか否かにかかわらず、突起電極の頂部が極めて平滑な状態を維持することができる。したがって、導電性粒子の粒径が小さくても各導電性粒子に均一に圧力が加わり、均一な粒子変形が実現される。   On the other hand, in the present invention, the surface roughness Ra of the protruding electrode is set to 0.05 μm or less and is in an extremely smooth state. In particular, in the present invention, the surface roughness Ra is set to 0.05 μm or less even after the annealing treatment, and the top of the protruding electrode can be maintained in an extremely smooth state regardless of whether or not the annealing treatment is performed. . Therefore, even when the particle size of the conductive particles is small, pressure is uniformly applied to each conductive particle, and uniform particle deformation is realized.

本発明によれば、異方性導電膜に含まれる導電性粒子の粒子径が小さい場合にも、これを均一に潰すことが可能で、良好な導通特性を得ることが可能である。したがって、本発明によれば、導通信頼性に優れた電気的接続体を提供することが可能である。   According to the present invention, even when the particle size of the conductive particles contained in the anisotropic conductive film is small, it can be uniformly crushed and good conduction characteristics can be obtained. Therefore, according to this invention, it is possible to provide the electrical connection body excellent in conduction | electrical_connection reliability.

以下、本発明を適用した具体的な実施の形態について図面を参照しながら詳細に説明する。なお、本明細書においては、バンプと突起電極とは同義として取り扱うものとする。   Hereinafter, specific embodiments to which the present invention is applied will be described in detail with reference to the drawings. In the present specification, bumps and bump electrodes are treated as synonymous.

図1は、電気的接続体の一例を示すものである。電気的接続体は、例えば半導体素子等の電子部材を、配線基板等の電子部材と電気的及び機械的に接続固定したものである。ここでは、第1の電子部材が半導体素子(ICチップ)であり、第2の電子部材が配線基板である場合を例にして説明する。   FIG. 1 shows an example of an electrical connection body. The electrical connection body is obtained by electrically and mechanically connecting and fixing an electronic member such as a semiconductor element to an electronic member such as a wiring board. Here, a case where the first electronic member is a semiconductor element (IC chip) and the second electronic member is a wiring board will be described as an example.

図1において、第1の電子部材である半導体素子1には、接続端子としてバンプ(突起電極)2が形成されている。一方、第2の電子部材である配線基板3には、バンプ2と対向する位置に電極4が形成されている。半導体素子1と配線基板3との間には、異方性導電膜5が介在され、バンプ2と電極4とが対向する部分では、この異方性導電膜5に含まれる導電性粒子6が押し潰され、電気的な導通が図られている。   In FIG. 1, a bump (projection electrode) 2 is formed as a connection terminal on a semiconductor element 1 which is a first electronic member. On the other hand, an electrode 4 is formed at a position facing the bump 2 on the wiring board 3 as the second electronic member. An anisotropic conductive film 5 is interposed between the semiconductor element 1 and the wiring substrate 3, and the conductive particles 6 included in the anisotropic conductive film 5 are present at the portion where the bump 2 and the electrode 4 face each other. It is crushed to achieve electrical continuity.

バンプ2は、例えばAuやCu、半田等の導電性金属によって形成され、その高さは、5μmから50μm程度である。バンプ2は、メッキ等によって形成することができ、例えば表面のみを金メッキとすることも可能である。バンプ2は、後述するように、表面平滑性が要求され、このような観点からも金メッキとすることが好ましい。   The bump 2 is formed of a conductive metal such as Au, Cu, or solder, for example, and its height is about 5 μm to 50 μm. The bump 2 can be formed by plating or the like. For example, only the surface can be gold-plated. As will be described later, the bump 2 is required to have surface smoothness, and from this point of view, it is preferable to use gold plating.

このような構造の電気的接続体においては、半導体素子1に形成されたバンプ2の表面粗さが重要である。バンプ2の表面粗さが大きいと、例えば図2に模式的に示すように、一部の導電性粒子6がバンプ2の接続面の凹部2a内に入り込み、加圧しても圧力が加わらず、潰れない状態となって導通抵抗が不安定になる現象が発生しやすい。これに対して、バンプ2の接続面が平坦であれば、バンプ2と電極4との間に捕捉された全ての導電性粒子6が均一に押し潰され、導通信頼性が安定に確保される。   In the electrical connection body having such a structure, the surface roughness of the bumps 2 formed on the semiconductor element 1 is important. When the surface roughness of the bump 2 is large, for example, as schematically shown in FIG. 2, a part of the conductive particles 6 enters the concave portion 2a of the connection surface of the bump 2, and no pressure is applied even when pressed. A phenomenon in which the conductive resistance becomes unstable due to the unsmashed state is likely to occur. On the other hand, if the connection surface of the bump 2 is flat, all the conductive particles 6 captured between the bump 2 and the electrode 4 are uniformly crushed, and the conduction reliability is stably secured. .

このような観点から、本発明においては、バンプ2の表面粗さを、中心線平均粗さRaで0.05μm以下とする。電気的接続体においては、この表面粗さRaを0.05μm以下とすることにより、例えば導電性粒子6の平均粒径が4μm以下であるような場合であっても、均一な粒子変形を実現することが可能となる。なお、バンプ2の表面粗さRaは、導電性粒子6の平均粒子径を考慮して設定することが好ましく、特に0.02μm以下であるのが好ましい。   From such a viewpoint, in the present invention, the surface roughness of the bump 2 is set to 0.05 μm or less in terms of the center line average roughness Ra. In the electrical connection body, by setting the surface roughness Ra to 0.05 μm or less, uniform particle deformation is realized even when the average particle diameter of the conductive particles 6 is 4 μm or less, for example. It becomes possible to do. Note that the surface roughness Ra of the bump 2 is preferably set in consideration of the average particle diameter of the conductive particles 6, and particularly preferably 0.02 μm or less.

バンプ2の表面粗さRaは、例えばTencor社製サーフェースプロファイラー等の接触式測定器を用いることによって測定することができる。   The surface roughness Ra of the bump 2 can be measured by using a contact-type measuring instrument such as a surface profiler manufactured by Tencor.

ここで、電気的接続体においては、後の工程でアニール処理を行う場合には、仮にアニール処理前の表面粗さRaを0.05μm以下に形成できたとした場合であっても、アニール処理後に、表面粗さRaが大幅に増大してしまうのが通常である。これに対して、本発明にかかる電気的接続体においては、バンプ2の形成時に、メッキの結晶状態を制御することにより、アニール処理前後にわたって、その表面粗さRaを0.05μm以下、より好ましくは0.02μm以下に保つことを可能としている。   Here, in the electrical connection body, when the annealing process is performed in a later step, even if the surface roughness Ra before the annealing process can be formed to 0.05 μm or less, the annealing process is performed after the annealing process. Usually, the surface roughness Ra is greatly increased. On the other hand, in the electrical connection body according to the present invention, the surface roughness Ra is more preferably 0.05 μm or less before and after the annealing process by controlling the crystal state of the plating when the bump 2 is formed. Can be kept below 0.02 μm.

また、バンプ2は、表面粗さRaの他、その硬度についても適正に設定することが好ましい。バンプ2の硬度は、バンプ2に使用する導電性材料の種類や、例えばメッキ形成する際の形成条件等に応じて設計することが可能であるが、導電性粒子6の均一な粒子変形を実現するためには、ビッカース硬度Hvで40〜150とすることが好ましい。電気的接続体においては、バンプ2のビッカース硬度Hvを、この値の範囲内に設定することにより、導電性粒子6を押し潰す際に、加圧力が適正に導電性粒子6に伝わり、均一に押し潰すことが可能となる。   In addition to the surface roughness Ra, the bump 2 is preferably set appropriately for its hardness. The hardness of the bumps 2 can be designed according to the type of conductive material used for the bumps 2 and, for example, the formation conditions when plating is formed, but uniform particle deformation of the conductive particles 6 is realized. In order to achieve this, the Vickers hardness Hv is preferably 40 to 150. In the electrical connection body, by setting the Vickers hardness Hv of the bump 2 within the range of this value, when the conductive particles 6 are crushed, the applied pressure is properly transmitted to the conductive particles 6 and uniformly. It can be crushed.

一方、電気的接続体において、バンプ2と電極4との間の電気的接続及び機械的固定を図るために用いられる異方性導電膜5は、絶縁性樹脂中に導電性粒子6を分散したものである。絶縁性樹脂としては、例えば、ウレタン樹脂やポリエステル樹脂、クロロプレン等の熱可塑性のホットメルト樹脂や、エポキシ樹脂等の熱硬化性樹脂等を使用することができる。また、例えばエポキシ樹脂としては、BPA型エポキシ樹脂、BPF型エポキシ樹脂、ノボラック型エポキシ樹脂や、ゴムやウレタン等の各種変成エポキシ樹脂等が例示され、これらを単独で用いても2種以上を混合して用いてもよい。   On the other hand, in the electrical connection body, the anisotropic conductive film 5 used for electrical connection and mechanical fixation between the bump 2 and the electrode 4 has conductive particles 6 dispersed in an insulating resin. Is. As the insulating resin, for example, a thermoplastic hot melt resin such as a urethane resin, a polyester resin, or chloroprene, a thermosetting resin such as an epoxy resin, or the like can be used. Examples of the epoxy resin include BPA type epoxy resin, BPF type epoxy resin, novolac type epoxy resin, various modified epoxy resins such as rubber and urethane, etc. Even if these are used alone, two or more types are mixed. May be used.

また、異方性導電膜5中に潜在性硬化剤を添加し、加熱を行って硬化剤を活性化するようにしてもよい。異方性導電膜5に潜在性硬化剤を添加することにより、起爆反応性を付与することが可能であり、接続の際の加熱操作により確実且つ速やかに硬化させることが可能となる。この場合、潜在性硬化剤としては、イミダゾール系の潜在性硬化剤等が使用可能であり、例えば表面処理されてマイクロカプセル化された商品名ノバキュアHX3741(旭化成社製)、商品名ノバキュアHX3921HP(旭化成社製)、商品名アミキュアPN−23(味の素社製)、商品名ACRハードナーH−3615(ACR社製)等を挙げることができる。   Further, a latent curing agent may be added to the anisotropic conductive film 5 and heated to activate the curing agent. By adding a latent curing agent to the anisotropic conductive film 5, it is possible to impart initiation reactivity, and it is possible to reliably and quickly cure by a heating operation at the time of connection. In this case, as the latent curing agent, an imidazole-based latent curing agent or the like can be used. A trade name) Amicure PN-23 (manufactured by Ajinomoto Co., Inc.), and a trade name ACR Hardener H-3615 (manufactured by ACR).

異方性導電膜5に含まれる絶縁性樹脂の粘度が高いと、導通させるべき電極間から絶縁性樹脂を十分に排除できなくなり、導通信頼性が低下するおそれがある。また、異方性導電膜5に含まれる絶縁性樹脂の粘度が高くなった場合、接続すべき電極間の絶縁性樹脂を十分に排除するために熱硬化時のプレス圧力を高めることが必要となり、導電性粒子6のバンプ2や電極4へのあたりが強くなって、クラック等が発生するおそれもある。したがって、絶縁性樹脂は、異方性導電膜5の熱圧着温度における溶融粘度が10mPa・s以下であることが好ましく、10mPa・s以下であることがより好ましい。 If the viscosity of the insulating resin contained in the anisotropic conductive film 5 is high, the insulating resin cannot be sufficiently removed from between the electrodes to be conducted, and the conduction reliability may be reduced. Moreover, when the viscosity of the insulating resin contained in the anisotropic conductive film 5 becomes high, it is necessary to increase the press pressure at the time of thermosetting in order to sufficiently exclude the insulating resin between the electrodes to be connected. Further, the contact of the conductive particles 6 with the bumps 2 and the electrodes 4 becomes strong, and there is a possibility that cracks and the like are generated. Therefore, the insulating resin preferably has a melt viscosity at the thermocompression bonding temperature of the anisotropic conductive film 5 of 10 8 mPa · s or less, and more preferably 10 7 mPa · s or less.

一方、絶縁性樹脂の熱圧着時の溶融粘度が低くなりすぎると、導電性粒子6が導通させるべき電極間が逃げやすくなり、捕捉性の点で問題が生じるおそれがある。したがって、絶縁性樹脂は、異方性導電膜5の熱圧着温度における溶融粘度が10mPa・s以上であることが好ましい。   On the other hand, if the melt viscosity at the time of thermocompression bonding of the insulating resin is too low, the electrodes to which the conductive particles 6 are to be conducted can easily escape, which may cause a problem in terms of trapping properties. Therefore, the insulating resin preferably has a melt viscosity of 10 mPa · s or more at the thermocompression bonding temperature of the anisotropic conductive film 5.

異方性導電膜5を構成する導電性粒子6としては、この種の異方性導電膜において使用されている公知の導電性粒子をいずれも使用することができる。例えば、ニッケル、鉄、銅、アルミニウム、錫、鉛、クロム、コバルト、銀、金など各種金属や金属合金の粒子、金属酸化物、カーボン、グラファイト、ガラスやセラミック、プラスチック等の粒子の表面に金属をコートしたもの、あるいはこれらの粒子の表面にさらに絶縁薄膜をコートしたもの等を使用することができる。   As the conductive particles 6 constituting the anisotropic conductive film 5, any known conductive particles used in this kind of anisotropic conductive film can be used. For example, nickel, iron, copper, aluminum, tin, lead, chromium, cobalt, silver, gold and other metals and metal alloy particles, metal oxides, carbon, graphite, glass, ceramics, plastics and other metal particles Or those obtained by further coating the surface of these particles with an insulating thin film.

ただし、本発明にかかる電気的接続体においては、導電性粒子6が電極間で押し潰されることが必要であるため、樹脂粒子の表面に金属をコートしたものが好適である。この場合、樹脂粒子としては、20%圧縮変形時の圧縮硬さが、100〜1000kgf/mm(1kgf/mm=9.80665MPa)のものを用いることが好ましい。樹脂粒子の20%圧縮変形時のK値が1000kgf/mmよりも大きいと、樹脂粒子が適度に潰れないため電極表面の高さのバラツキを吸収することができず、また、加圧の際に高い圧力が必要になるとともに、導電性粒子6の反発力が大きくなり界面剥離を起こす等の不都合が生じるおそれもある。 However, in the electrical connection body according to the present invention, it is necessary that the conductive particles 6 be crushed between the electrodes, and therefore, the resin particles whose surface is coated with metal are suitable. In this case, as the resin particles, compressive hardness at 20% compression deformation, it is preferable to use those 100~1000kgf / mm 2 (1kgf / mm 2 = 9.80665MPa). If the K value at 20% compression deformation of the resin particles is larger than 1000 kgf / mm 2 , the resin particles are not properly crushed, so that variations in the height of the electrode surface cannot be absorbed. In addition, a high pressure is required, and the repulsive force of the conductive particles 6 may increase, causing inconveniences such as interfacial peeling.

このような要求を満たす樹脂粒子としては、例えばエポキシ樹脂、フェノール樹脂、アクリル樹脂、アクリロニトリル・スチレン(AS)樹脂、ベンゾグアナミン樹脂、ジビニルベンゼン系樹脂、スチレン系樹脂等の粒子を挙げることができる。   Examples of the resin particles that satisfy such requirements include particles of epoxy resin, phenol resin, acrylic resin, acrylonitrile / styrene (AS) resin, benzoguanamine resin, divinylbenzene resin, styrene resin, and the like.

導電性粒子6の平均粒径は任意であるが、平均粒径が4μm以下の導電性粒子6を用いた場合に本発明の効果が大きい。したがって、導電性粒子6の平均粒径は、1μm〜4μmとするのが好適である。また、突起電極の頂部の平坦化にともない、導電性粒子の粒子径のバラツキが、導電性粒子の硬度によっては影響を受ける場合がある。本発明の場合、導電性粒子の平均粒子径の±1μmの範囲に全粒子の90%以上が含まれているのが好適である。   The average particle diameter of the conductive particles 6 is arbitrary, but the effect of the present invention is great when the conductive particles 6 having an average particle diameter of 4 μm or less are used. Therefore, the average particle diameter of the conductive particles 6 is preferably 1 μm to 4 μm. Further, as the top of the protruding electrode is flattened, the variation in the particle diameter of the conductive particles may be affected depending on the hardness of the conductive particles. In the case of the present invention, it is preferable that 90% or more of all particles are contained in the range of ± 1 μm of the average particle diameter of the conductive particles.

以上のような構成を備える電気的接続体においては、異方性導電膜5に含まれる導電性粒子6の粒子径が例えば4μm以下と小さい場合であっても、均一に押し潰すことが可能であり、良好な導通特性を得ることが可能である。したがって、導通信頼性に優れた電気的接続体を実現することができる。   In the electrical connection body having the above configuration, even when the particle diameter of the conductive particles 6 included in the anisotropic conductive film 5 is as small as 4 μm or less, it can be uniformly crushed. Yes, it is possible to obtain good conduction characteristics. Therefore, an electrical connection body excellent in conduction reliability can be realized.

つぎに、上述した電気的接続体の製造方法について説明する。上述した構成の電気的接続体を作製するには、まず、半導体素子1の電極上にバンプ2を形成する必要がある。このバンプ2は、メッキ等の手法によって形成するが、アニール処理前後における表面粗さRaを0.05μmとするためには、金メッキとすることが好ましく、また、メッキ条件を選定することにより、形成されるバンプ2の表面が平滑になるようにする必要がある。   Next, a method for manufacturing the above-described electrical connection body will be described. In order to produce the electrical connection body having the above-described configuration, first, it is necessary to form bumps 2 on the electrodes of the semiconductor element 1. The bump 2 is formed by a method such as plating. In order to set the surface roughness Ra before and after the annealing treatment to 0.05 μm, it is preferable to use gold plating, and by selecting the plating conditions, It is necessary to make the surface of the bump 2 to be smoothed.

ここで、金メッキにおいては、結晶状態を制御し、形成されるバンプ2の表面を平滑にするために、以下のような金メッキ液が使用される。   Here, in gold plating, the following gold plating solution is used in order to control the crystal state and smooth the surface of the bump 2 to be formed.

金メッキ液は、
a)金化合物
b)伝導塩・緩衝剤
c)結晶成長剤
d)有機光沢剤
等を基本的な組成として構成される。金化合物としては、例えば、亜硫酸金塩やシアン化金塩等がある。また、伝導塩・緩衝剤としては、亜硫酸塩、リン酸塩、クエン酸塩、蓚酸塩、硫酸塩、ホウ酸塩、塩酸塩、アミン塩、キレート剤等がある。さらに、結晶成長剤としては、Tl、Pb、As、Bi、Co、Ni、Fe、Sb等がある。さらにまた、有機光沢剤としては、NH基を有する高分子、すなわち、エトキシ化ポリエチレンイミン(PEIE)、ポリアルキルイミン(PAI)、ポリエチレンイミン(PEI)等がある。これらの液組成から得られた金メッキは、析出物が緻密で光沢性があり、本発明にて形成されるバンプ2の表面を平滑にする用途に極めて適している。
Gold plating solution
a) Gold compound b) Conductive salt / buffer c) Crystal growth agent d) Organic brightener and the like as a basic composition. Examples of the gold compound include gold sulfite and gold cyanide. Conductive salts / buffering agents include sulfites, phosphates, citrates, oxalates, sulfates, borates, hydrochlorides, amine salts, chelating agents, and the like. Further, examples of the crystal growth agent include Tl, Pb, As, Bi, Co, Ni, Fe, and Sb. Furthermore, as the organic brightener, there are polymers having NH groups, that is, ethoxylated polyethyleneimine (PEIE), polyalkylimine (PAI), polyethyleneimine (PEI) and the like. The gold plating obtained from these liquid compositions has a dense deposit and gloss, and is extremely suitable for applications in which the surface of the bump 2 formed in the present invention is smooth.

バンプ2の形成の後、半導体素子1のバンプ2と配線基板3の電極4との間の接続を行うが、この場合には、例えば、配線基板3の表面に異方性導電膜5を貼付し、位置合わせ及び仮接続を行った後に、所定の温度及び圧力で熱圧着を行うことによって導電性粒子6を押し潰し、半導体素子1のバンプ2と配線基板3の電極4とを電気的に接続させた状態で異方性導電膜5を構成する絶縁性樹脂を硬化させる。熱圧着の際の温度及び圧力は、使用する異方性導電膜5の種類等によっても異なるが、例えば温度180℃〜220℃、圧力30MPa〜120MPaとすることが好ましい。   After the formation of the bump 2, the connection between the bump 2 of the semiconductor element 1 and the electrode 4 of the wiring board 3 is performed. In this case, for example, an anisotropic conductive film 5 is pasted on the surface of the wiring board 3. After the alignment and temporary connection, the conductive particles 6 are crushed by thermocompression bonding at a predetermined temperature and pressure, and the bumps 2 of the semiconductor element 1 and the electrodes 4 of the wiring board 3 are electrically connected. The insulating resin constituting the anisotropic conductive film 5 is cured in the connected state. Although the temperature and pressure at the time of thermocompression bonding vary depending on the type of the anisotropic conductive film 5 to be used, for example, the temperature is preferably 180 ° C. to 220 ° C. and the pressure is preferably 30 MPa to 120 MPa.

以上の工程を経ることにより、異方性導電膜5に含まれる導電性粒子6の粒子径が小さい場合であっても、これを均一に潰すことが可能であり、作製される電気的接続体において、良好な導通特性を得ることが可能である。   By passing through the above process, even if the particle diameter of the conductive particles 6 contained in the anisotropic conductive film 5 is small, it is possible to uniformly crush the conductive particles 6 to be produced. Thus, it is possible to obtain good conduction characteristics.

[実施例]
つぎに、本発明を適用した電気的接続体の具体的な実施について、実験結果に基づいて説明する。
[Example]
Next, specific implementation of the electrical connection body to which the present invention is applied will be described based on experimental results.

(実施例1)
バンプの表面粗さRaの相違による導電性粒子の捕捉性及び潰れ状態を評価するために、異方性導電膜を介してバンプ付きICをガラスに実装した。異方性導電膜は、バインダー成分に導電性粒子を約300万個/mmとなるように配合し、これをフィルム化して形成した。各成分の内訳は以下のとおりである。
エポキシ樹脂 : ジャパンエポキシレジン社製、商品名EP828 30重量部
フェノキシ樹脂: InChem社製、商品名PKHH 40重量部
エポキシ硬化剤: 旭化成社製、商品名HX3941HP 30重量部
導電性粒子 : Ni/Auメッキ樹脂粒子
なお、導電性粒子として平均粒径4μmの導電性粒子と平均粒径2μmの導電性粒子を用い、2種類の異方性導電膜(異方性導電膜A及び異方性導電膜B)を作製した。
Example 1
In order to evaluate the trapping property and crushing state of the conductive particles due to the difference in the surface roughness Ra of the bump, the IC with the bump was mounted on glass through an anisotropic conductive film. The anisotropic conductive film was formed by blending conductive particles into the binder component so as to be about 3 million particles / mm 3 and forming this into a film. The breakdown of each component is as follows.
Epoxy resin: Japan Epoxy Resin, trade name EP828 30 parts by weight Phenoxy resin: InChem, trade name PKHH 40 parts by weight Epoxy curing agent: Asahi Kasei Corporation, trade name HX3941HP 30 parts by weight Conductive particles: Ni / Au plating Resin Particles In addition, conductive particles having an average particle diameter of 4 μm and conductive particles having an average particle diameter of 2 μm are used as the conductive particles, and two types of anisotropic conductive films (an anisotropic conductive film A and an anisotropic conductive film B) are used. ) Was produced.

バンプ付きICのバンプは、金メッキによって形成した。この金メッキは、日本エレクトロプレイテイング・エンジニヤース社製、商品名ミクロファブAu310を金メッキ液として用い、メッキ温度50℃、電流密度0.4A/dmの条件で行った。この結果得られたバンプの接続面の表面粗さRaは、0.0105μmであった。実装の際の圧着条件は、到達温度200℃、圧力40MPa、時間5秒とした。 The bump of the bumped IC was formed by gold plating. This gold plating was performed under the conditions of a plating temperature of 50 ° C. and a current density of 0.4 A / dm 2 using a product name Microfab Au310 manufactured by Nippon Electroplating Engineering Co., Ltd. as a gold plating solution. As a result, the surface roughness Ra of the connection surface of the bump obtained was 0.0105 μm. The pressure bonding conditions at the time of mounting were an ultimate temperature of 200 ° C., a pressure of 40 MPa, and a time of 5 seconds.

(実施例2)
実施例1の金メッキ液及びメッキ条件を変更してバンプ付きICを作製した。金メッキは、日本エレクトロプレイテイング・エンジニヤース社製、商品名ニュートロネクス240を金メッキ液として用い、メッキ温度65℃、電流密度0.5A/dmの条件で行った。この結果得られたバンプの接続面の表面粗さRaは、0.004μmであった。他は実施例1と同様の条件で、異方性導電膜を介してバンプ付きICをガラスに実装した。
(Example 2)
A bumped IC was manufactured by changing the gold plating solution and plating conditions of Example 1. Gold plating was performed under the conditions of a plating temperature of 65 ° C. and a current density of 0.5 A / dm 2 using a product name Neutronex 240 manufactured by Nippon Electroplating Engineers Co., Ltd. as a gold plating solution. The surface roughness Ra of the connection surface of the bump obtained as a result was 0.004 μm. The other conditions were the same as in Example 1, and the bumped IC was mounted on glass via an anisotropic conductive film.

(比較例1)
実施例1及び実施例2の金メッキ液及びメッキ条件を変更してバンプ付きICを作製した。金メッキは、日本エレクトロプレイテイング・エンジニヤース社製、商品名ミクロファブAu100を金メッキ液として用い、メッキ温度60℃、電流密度0.5A/dmの条件で行った。この結果得られたバンプの接続面の表面粗さRaは、0.298μmであった。他は実施例1と同様の条件で、異方性導電膜を介してバンプ付きICをガラスに実装した。
(Comparative Example 1)
A bumped IC was manufactured by changing the gold plating solution and plating conditions of Example 1 and Example 2. Gold plating was performed under the conditions of a plating temperature of 60 ° C. and a current density of 0.5 A / dm 2 using a trade name Microfab Au100 manufactured by Nippon Electroplating Engineering Co., Ltd. as a gold plating solution. As a result, the surface roughness Ra of the connection surface of the obtained bump was 0.298 μm. The other conditions were the same as in Example 1, and the bumped IC was mounted on glass via an anisotropic conductive film.

(比較例2)
実施例1及び実施例2並びに比較例1の金メッキ液及びメッキ条件を変更してバンプ付きICを作製した。金メッキは、日本エレクトロプレイテイング・エンジニヤース社製、商品名ミクロファブAu660を金メッキ液として用い、メッキ温度60℃、電流密度0.8A/dmの条件で行った。この結果得られたバンプの接続面の表面粗さRaは、0.130μmであった。他は実施例1と同様の条件で、異方性導電膜を介してバンプ付きICをガラスに実装した。
(Comparative Example 2)
ICs with bumps were produced by changing the gold plating solutions and plating conditions of Examples 1 and 2 and Comparative Example 1. Gold plating was performed under the conditions of a plating temperature of 60 ° C. and a current density of 0.8 A / dm 2 using a product name Microfab Au660 manufactured by Nippon Electroplating Engineering Co., Ltd. as a gold plating solution. As a result, the surface roughness Ra of the connection surface of the bump obtained was 0.130 μm. The other conditions were the same as in Example 1, and the bumped IC was mounted on glass via an anisotropic conductive film.

評価
各実施例及び各比較例として作製した異方性導電膜A,Bについて、バンプ上に捕捉された導電性粒子をガラスの裏面から光学顕微鏡を用いて観察し、粒子捕捉数をカウントして総粒子捕捉数を求め、さらに粒子の潰れ状態が合格のものをカウントして有効粒子捕捉数を求めた(範囲2000μm)。この結果を次表1及び次表2に示す。なお、次表1は、異方性導電膜Aについての結果を示し、次表2は、異方性導電膜Bについての結果を示している。
For the anisotropic conductive films A and B prepared as evaluation examples and comparative examples, the conductive particles captured on the bumps are observed from the back of the glass using an optical microscope, and the number of captured particles is counted. The total number of trapped particles was determined, and the number of particles having passed the collapsed state was counted to determine the number of trapped effective particles (range 2000 μm 2 ). The results are shown in the following Tables 1 and 2. The following table 1 shows the results for the anisotropic conductive film A, and the following table 2 shows the results for the anisotropic conductive film B.

これら上表1及び上表2から明らかなように、バンプの表面粗さRaを0.05μm以下とすることにより、電気的接続に寄与する有効導電粒子数が大きく増加していることがわかる。また、総粒子捕捉数についても、比較例と同等以上の数値となっている。   As is apparent from Table 1 and Table 2, it can be seen that the number of effective conductive particles contributing to electrical connection is greatly increased by setting the bump surface roughness Ra to 0.05 μm or less. Further, the total number of particles captured is also equal to or greater than that of the comparative example.

また、図3に、実施例1(異方性導電膜A)におけるバンプ近傍の光学顕微鏡像を示し、図4に、比較例1(異方性導電膜B)におけるバンプ近傍の光学顕微鏡像を示す。これら図面を比較すると、実施例1では、バンプの頂部が極めて平滑な状態とされていることが明白であるのに対して、比較例1では、バンプの頂部が粗い様子がわかる。   FIG. 3 shows an optical microscope image near the bump in Example 1 (anisotropic conductive film A), and FIG. 4 shows an optical microscope image near the bump in Comparative Example 1 (anisotropic conductive film B). Show. Comparing these drawings, it is clear that the top of the bump is very smooth in Example 1, whereas the top of the bump is rough in Comparative Example 1.

さらに、図5に、実施例1(異方性導電膜A)におけるバンプ近傍の他の光学顕微鏡像を示し、図6に、比較例1(異方性導電膜B)におけるバンプ近傍の他の光学顕微鏡像を示す。いずれの図面(写真)も、バンプ周辺部の光学顕微鏡像である。これら図面を比較すると、実施例1では、バンプの周辺部を含めてバンプ全体で導電性粒子が均一に押し潰されていることがわかる。これに対して、比較例1では、特にバンプ周辺部において導電性粒子の潰れ方が不足している。   Further, FIG. 5 shows another optical microscopic image in the vicinity of the bump in Example 1 (anisotropic conductive film A), and FIG. 6 shows another optical microscopic image in the vicinity of the bump in Comparative Example 1 (anisotropic conductive film B). An optical microscope image is shown. Each drawing (photograph) is an optical microscopic image of the periphery of the bump. Comparing these drawings, in Example 1, it can be seen that the conductive particles are uniformly crushed in the entire bump including the peripheral portion of the bump. On the other hand, in Comparative Example 1, the method of crushing the conductive particles is insufficient particularly in the peripheral portion of the bump.

アニール処理の影響の評価
つぎに、バンプの表面粗さRaに対するアニール処理の影響を評価するために、実施例1として作製したバンプ付きICに対してアニール処理を施し、アニール処理前後における表面粗さRaを測定した。この結果を次表3に示す。
Evaluation of influence of annealing treatment Next, in order to evaluate the influence of the annealing treatment on the surface roughness Ra of the bump, the bumped IC produced as Example 1 was subjected to the annealing treatment, and the surface roughness before and after the annealing treatment. Ra was measured. The results are shown in Table 3 below.

上表3から明らかなように、実施例1として作製したバンプ付きICに対してアニール処理を施した場合には、アニール処理後におけるバンプの表面粗さRaが0.0179μmとなり、例えば頂部を切削することによって平滑にしたバンプに対してアニール処理を施す等の従来の手法とは異なり、0.05μm以下の値に保たれている。   As is apparent from Table 3 above, when the bumped IC manufactured as Example 1 was annealed, the bump surface roughness Ra after the annealing treatment was 0.0179 μm, for example, the top portion was cut Unlike conventional methods such as annealing the smoothed bumps, the value is kept at 0.05 μm or less.

これは以下の理由による。すなわち、実施例1として作製したバンプは、金メッキ液の粒塊(結晶粒)が積み上がって形成されたものであるが、頂部を平滑にするために、結晶粒が小さくなるように結晶状態を制御した金メッキ液を使用している。具体的には、実施例1として作製したバンプにおいては、アニール処理前におけるバンプ断面の結晶粒の様子を測定すると、図7中左側の分布図に示すように、きめ細かい結晶粒が集合しており、図7中右側に示すように、その平均粒径が0.08μmであった。すなわち、実施例1として作製したバンプは、アニール処理前における平均粒径が0.1μm以下と小さい結晶粒がきめ細かく積み上がって形成されたものであり、これにより、アニール処理を施してもメッキ液の結晶粒が大きくならず、アニール処理前後にわたって、結晶粒の大きさの変化を抑制することができ、バンプの表面粗さRaが0.05μm以下に保たれるのである。   This is due to the following reason. That is, the bump produced as Example 1 is formed by accumulating agglomerates (crystal grains) of a gold plating solution, but in order to smooth the top, the crystal state is reduced so that the crystal grains become smaller. A controlled gold plating solution is used. Specifically, in the bump manufactured as Example 1, when the state of the crystal grain of the bump cross section before the annealing treatment is measured, fine crystal grains are gathered as shown in the distribution diagram on the left side in FIG. As shown on the right side in FIG. 7, the average particle size was 0.08 μm. That is, the bump produced as Example 1 was formed by finely stacking small crystal grains having an average grain size of 0.1 μm or less before the annealing treatment. Thus, the crystal grain size is not increased, and the change in the crystal grain size can be suppressed before and after the annealing treatment, and the bump surface roughness Ra is maintained at 0.05 μm or less.

このように、本発明は、アニール処理前後にわたってバンプの表面粗さRaを0.05μmとすることができ、異方性導電膜に含まれる導電性粒子の粒子径が小さい場合であっても、これを均一に潰すことが可能であり、作製される電気的接続体において、良好な導通特性を得ることが可能であることが示された。   Thus, in the present invention, the surface roughness Ra of the bump can be 0.05 μm before and after the annealing treatment, and even when the particle diameter of the conductive particles contained in the anisotropic conductive film is small, It was shown that this can be uniformly crushed, and good electrical conduction characteristics can be obtained in the manufactured electrical connection body.

電気的接続体の一構成例を示す概略断面図である。It is a schematic sectional drawing which shows the example of 1 structure of an electrical connection body. バンプの表面に凹凸がある場合の導電性粒子の潰れ方を模式的に示す概略断面図である。It is a schematic sectional drawing which shows typically how to crush the electroconductive particle when the bump surface has unevenness. 実施例1におけるバンプ近傍の光学顕微鏡像である。2 is an optical microscope image in the vicinity of a bump in Example 1. FIG. 比較例1におけるバンプ近傍の光学顕微鏡像である。3 is an optical microscope image in the vicinity of a bump in Comparative Example 1. 実施例1におけるバンプ近傍の他の光学顕微鏡像である。6 is another optical microscope image in the vicinity of the bump in Example 1. FIG. 比較例1におけるバンプ近傍の他の光学顕微鏡像である。10 is another optical microscope image in the vicinity of the bump in Comparative Example 1. 実施例1におけるバンプ断面の結晶粒の様子を示す図である。FIG. 3 is a diagram illustrating a state of crystal grains of a bump cross section in Example 1.

符号の説明Explanation of symbols

1 半導体素子(第1の電子部材)
2 バンプ
3 配線基板(第2の電子部材)
4 電極
5 異方性導電膜
6 導電性粒子
1 Semiconductor element (first electronic member)
2 Bump 3 Wiring board (second electronic member)
4 Electrode 5 Anisotropic conductive film 6 Conductive particles

Claims (11)

第1の電子部材と第2の電子部材とが異方性導電膜を介して電気的に接続されてなる電気的接続体であって、
いずれか一方の電子部材には突起電極が形成されており、
前記突起電極の頂部は、アニール処理後の表面粗さRaが0.05μm以下の平坦面とされていること
を特徴とする電気的接続体。
An electrical connection body in which the first electronic member and the second electronic member are electrically connected via an anisotropic conductive film,
A protruding electrode is formed on any one of the electronic members,
The electrical connection body, wherein the top portion of the protruding electrode is a flat surface having a surface roughness Ra after annealing of 0.05 μm or less.
前記突起電極の頂部は、アニール処理後の表面粗さRaが0.02μm以下の平坦面とされていること
を特徴とする請求項1記載の電気的接続体。
2. The electrical connection body according to claim 1, wherein the top portion of the protruding electrode is a flat surface having a surface roughness Ra of 0.02 μm or less after annealing.
前記突起電極の頂部は、金メッキによって形成されていること
を特徴とする請求項1記載の電気的接続体。
The electrical connection body according to claim 1, wherein a top portion of the protruding electrode is formed by gold plating.
前記異方性導電膜に含まれる導電性粒子の平均粒径が4μm以下であること
を特徴とする請求項1乃至請求項3のうちいずれか1項記載の電気的接続体。
4. The electrical connection body according to claim 1, wherein an average particle diameter of the conductive particles contained in the anisotropic conductive film is 4 μm or less. 5.
前記導電性粒子は、樹脂粒子を芯材とし、その表面に導電層が形成されていること
を特徴とする請求項4記載の電気的接続体。
The electrical connection body according to claim 4, wherein the conductive particles have resin particles as a core material, and a conductive layer is formed on a surface thereof.
前記樹脂粒子は、20%圧縮変形時の圧縮硬さが100〜1000kgf/mmであること
を特徴とする請求項4記載の電気的接続体。
The electrical connection body according to claim 4, wherein the resin particles have a compression hardness at 20% compression deformation of 100 to 1000 kgf / mm 2 .
第1の電子部材と第2の電子部材とのいずれか一方に、メッキによって頂部の表面粗さRaが0.05μm以下の平坦面とされた突起電極を形成する工程と、
前記第1の電子部材と前記第2の電子部材との間に異方性導電膜を介在させる工程と、
押圧によって前記突起電極と対向する異方性導電膜の導電性粒子を押し潰し、前記第1の電子部材と前記第2の電子部材とを電気的に接続する工程とを備えること
を特徴とする電気的接続体の製造方法。
A step of forming a protruding electrode having a top surface roughness Ra of 0.05 μm or less by plating on either one of the first electronic member and the second electronic member;
Interposing an anisotropic conductive film between the first electronic member and the second electronic member;
And crushing the conductive particles of the anisotropic conductive film facing the protruding electrode by pressing to electrically connect the first electronic member and the second electronic member. Manufacturing method of electrical connection body.
前記突起電極の頂部は、前記表面粗さRaが0.02μm以下の平坦面とされること
を特徴とする請求項7記載の電気的接続体の製造方法。
The method for manufacturing an electrical connection body according to claim 7, wherein the top portion of the protruding electrode is a flat surface having a surface roughness Ra of 0.02 μm or less.
前記突起電極の頂部は、金メッキによって形成すること
を特徴とする請求項7記載の電気的接続体の製造方法。
The method for manufacturing an electrical connection body according to claim 7, wherein a top portion of the protruding electrode is formed by gold plating.
前記突起電極の頂部は、アニール処理後の前記表面粗さRaが0.02μm以下の平坦面とされること
を特徴とする請求項7乃至請求項9のうちいずれか1項記載の電気的接続体の製造方法。
10. The electrical connection according to claim 7, wherein the top portion of the protruding electrode is a flat surface having a surface roughness Ra of 0.02 μm or less after the annealing process. Body manufacturing method.
前記突起電極を形成する際に使用されるメッキ液の結晶粒は、アニール処理前における平均粒径が0.1μm以下であること
を特徴とする請求項7乃至請求項10のうちいずれか1項記載の電気的接続体の製造方法。
11. The crystal grain of the plating solution used when forming the protruding electrode has an average grain size before annealing of 0.1 μm or less. 11. The manufacturing method of the electrical connection body of description.
JP2007279941A 2007-10-29 2007-10-29 Electrical connection body and manufacturing method thereof Expired - Fee Related JP5622137B2 (en)

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