JP2009105138A - ダイボンドペースト及び該ダイボンドペーストを用いた蛍光表示管 - Google Patents

ダイボンドペースト及び該ダイボンドペーストを用いた蛍光表示管 Download PDF

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Publication number
JP2009105138A
JP2009105138A JP2007274003A JP2007274003A JP2009105138A JP 2009105138 A JP2009105138 A JP 2009105138A JP 2007274003 A JP2007274003 A JP 2007274003A JP 2007274003 A JP2007274003 A JP 2007274003A JP 2009105138 A JP2009105138 A JP 2009105138A
Authority
JP
Japan
Prior art keywords
die bond
chip
bond paste
fluorescent display
display tube
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007274003A
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English (en)
Japanese (ja)
Other versions
JP2009105138A5 (enExample
Inventor
Masahiro Kato
雅弘 加藤
Toshiyuki Misonoo
敏行 御園生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Futaba Corp
Original Assignee
Futaba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Futaba Corp filed Critical Futaba Corp
Priority to JP2007274003A priority Critical patent/JP2009105138A/ja
Publication of JP2009105138A publication Critical patent/JP2009105138A/ja
Publication of JP2009105138A5 publication Critical patent/JP2009105138A5/ja
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Cathode-Ray Tubes And Fluorescent Screens For Display (AREA)
  • Die Bonding (AREA)
  • Adhesives Or Adhesive Processes (AREA)
JP2007274003A 2007-10-22 2007-10-22 ダイボンドペースト及び該ダイボンドペーストを用いた蛍光表示管 Pending JP2009105138A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007274003A JP2009105138A (ja) 2007-10-22 2007-10-22 ダイボンドペースト及び該ダイボンドペーストを用いた蛍光表示管

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007274003A JP2009105138A (ja) 2007-10-22 2007-10-22 ダイボンドペースト及び該ダイボンドペーストを用いた蛍光表示管

Publications (2)

Publication Number Publication Date
JP2009105138A true JP2009105138A (ja) 2009-05-14
JP2009105138A5 JP2009105138A5 (enExample) 2009-06-25

Family

ID=40706554

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007274003A Pending JP2009105138A (ja) 2007-10-22 2007-10-22 ダイボンドペースト及び該ダイボンドペーストを用いた蛍光表示管

Country Status (1)

Country Link
JP (1) JP2009105138A (enExample)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6155847A (ja) * 1984-08-28 1986-03-20 Nec Corp 螢光表示管
JPS63108731A (ja) * 1986-10-24 1988-05-13 Nitto Electric Ind Co Ltd ダイボンデイング法
JPS63196044A (ja) * 1987-02-10 1988-08-15 Futaba Corp 半導体チツプ付基板及びその製造方法
JPH01157538A (ja) * 1987-09-19 1989-06-20 Narumi China Corp セラミックパッケージ用ダイアタッチ材料
JPH0620627A (ja) * 1992-07-02 1994-01-28 Noritake Co Ltd 蛍光表示管
JPH06152102A (ja) * 1992-11-09 1994-05-31 Noritake Co Ltd 配線ガラス基板の製造方法
JP2003101175A (ja) * 2001-09-25 2003-04-04 Hitachi Chem Co Ltd 半導体搭載用基板および半導体パッケージ
JP2006269887A (ja) * 2005-03-25 2006-10-05 Sumitomo Bakelite Co Ltd 半導体用接着フィルム及びこれを用いた半導体装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6155847A (ja) * 1984-08-28 1986-03-20 Nec Corp 螢光表示管
JPS63108731A (ja) * 1986-10-24 1988-05-13 Nitto Electric Ind Co Ltd ダイボンデイング法
JPS63196044A (ja) * 1987-02-10 1988-08-15 Futaba Corp 半導体チツプ付基板及びその製造方法
JPH01157538A (ja) * 1987-09-19 1989-06-20 Narumi China Corp セラミックパッケージ用ダイアタッチ材料
JPH0620627A (ja) * 1992-07-02 1994-01-28 Noritake Co Ltd 蛍光表示管
JPH06152102A (ja) * 1992-11-09 1994-05-31 Noritake Co Ltd 配線ガラス基板の製造方法
JP2003101175A (ja) * 2001-09-25 2003-04-04 Hitachi Chem Co Ltd 半導体搭載用基板および半導体パッケージ
JP2006269887A (ja) * 2005-03-25 2006-10-05 Sumitomo Bakelite Co Ltd 半導体用接着フィルム及びこれを用いた半導体装置

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