JP2009099139A5 - - Google Patents

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Publication number
JP2009099139A5
JP2009099139A5 JP2008246780A JP2008246780A JP2009099139A5 JP 2009099139 A5 JP2009099139 A5 JP 2009099139A5 JP 2008246780 A JP2008246780 A JP 2008246780A JP 2008246780 A JP2008246780 A JP 2008246780A JP 2009099139 A5 JP2009099139 A5 JP 2009099139A5
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JP
Japan
Prior art keywords
specifying
connection member
interlayer connection
region
conductive
Prior art date
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Application number
JP2008246780A
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English (en)
Japanese (ja)
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JP5264388B2 (ja
JP2009099139A (ja
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Priority to JP2008246780A priority Critical patent/JP5264388B2/ja
Priority claimed from JP2008246780A external-priority patent/JP5264388B2/ja
Publication of JP2009099139A publication Critical patent/JP2009099139A/ja
Publication of JP2009099139A5 publication Critical patent/JP2009099139A5/ja
Application granted granted Critical
Publication of JP5264388B2 publication Critical patent/JP5264388B2/ja
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Anticipated expiration legal-status Critical

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JP2008246780A 2007-09-26 2008-09-25 プログラム及びプリント基板設計支援方法 Active JP5264388B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008246780A JP5264388B2 (ja) 2007-09-26 2008-09-25 プログラム及びプリント基板設計支援方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007249748 2007-09-26
JP2007249748 2007-09-26
JP2008246780A JP5264388B2 (ja) 2007-09-26 2008-09-25 プログラム及びプリント基板設計支援方法

Publications (3)

Publication Number Publication Date
JP2009099139A JP2009099139A (ja) 2009-05-07
JP2009099139A5 true JP2009099139A5 (enExample) 2011-11-10
JP5264388B2 JP5264388B2 (ja) 2013-08-14

Family

ID=40473061

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008246780A Active JP5264388B2 (ja) 2007-09-26 2008-09-25 プログラム及びプリント基板設計支援方法

Country Status (2)

Country Link
US (1) US8132145B2 (enExample)
JP (1) JP5264388B2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9036365B2 (en) * 2009-10-20 2015-05-19 Nec Corporation Interconnection substrate design supporting device, method of designing interconnection substrate, program, and interconnection substrate
JP2012053726A (ja) * 2010-09-02 2012-03-15 Hitachi Ltd プリント基板設計支援装置、プリント基板ビア配置方法、プログラムおよびプリント基板
TW201310267A (zh) * 2011-08-30 2013-03-01 Hon Hai Prec Ind Co Ltd 佈線檢查系統及方法
JP6136420B2 (ja) 2013-03-21 2017-05-31 富士通株式会社 設計支援装置、ビア追加方法、及びプログラム

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08227428A (ja) * 1995-02-20 1996-09-03 Matsushita Electric Ind Co Ltd プリント基板cad装置
JP2735060B2 (ja) * 1995-12-27 1998-04-02 日本電気株式会社 プリント回路基板およびプリント回路基板の設計方法およびプリント回路基板作製装置
US6691296B1 (en) * 1998-02-02 2004-02-10 Matsushita Electric Industrial Co., Ltd. Circuit board design aiding
US6937480B2 (en) 2001-05-14 2005-08-30 Fuji Xerox Co., Ltd. Printed wiring board
JP2003163467A (ja) * 2001-05-14 2003-06-06 Fuji Xerox Co Ltd プリント配線基板及びプリント配線基板設計支援装置
US7047628B2 (en) * 2003-01-31 2006-05-23 Brocade Communications Systems, Inc. Impedance matching of differential pair signal traces on printed wiring boards
JP4633666B2 (ja) * 2006-03-30 2011-02-16 富士通株式会社 基板設計支援装置及び基板設計支援プログラム
JP2008059308A (ja) * 2006-08-31 2008-03-13 Elpida Memory Inc 半導体装置の設計装置及び設計方法
US7594207B2 (en) * 2006-09-13 2009-09-22 Cadence Design Systems, Inc. Computationally efficient design rule checking for circuit interconnect routing design

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