JP2009065037A - Semiconductor integrated circuit and inspecting device therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of accurately measuring the resistance of a wiring element, and to provide an inspecting device therefor. <P>SOLUTION: In the semiconductor integrated circuit which comprises a semiconductor package 40 having terminals 14 to 16, 41, and 42 and a semiconductor chip 50 contained in the semiconductor package 40 and having an IO pad 25 and is configured to connect the IO pad 25 to a corresponding terminal using a connection element, the resistance value of the connection element can be accurately measured by: varying a current flowing to the IO pad 25; and measuring the current voltage and current of the IO pad 25. A joining defect of a flip-chip bump and a shape defect of fine wiring, which do not cause a disconnection, can be detected, so stress during secondary mounting and a disconnection resulting from long-period use can be detected in advance. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor integrated circuit capable of inspecting the resistance of a connecting element between a pad of a semiconductor chip and a terminal of a semiconductor package with high accuracy, and an inspection apparatus therefor.

  FIG. 2 shows the configuration of the semiconductor integrated circuit. In FIG. 2, reference numeral 10 denotes a semiconductor package, which includes terminals 14 to 16 and houses a semiconductor chip 20. The semiconductor chip 20 is formed with a positive power supply pad 24 for supplying a positive power supply, an IO pad 25 for inputting / outputting a signal, and a negative power supply pad 26 for supplying a negative power supply. Has been.

  In a general BGA (Ball Grid Array) package, wiring, vias, flip chip bumps, and bonding wires are used as connection elements. Reference numerals 11 to 13 denote resistances of these connection elements. In a normally manufactured semiconductor integrated circuit, the resistors 11 to 13 have very small values.

  The semiconductor chip 20 includes an internal circuit 21, a positive protection element 22, a negative protection element 23, and pads 24 to 26. The positive protection element 22 and the negative protection element 23 serve to protect the internal circuit 21 from the excessive voltage when an excessive voltage is applied to the IO pad, and a normal MOSFET is used. Normally, there are a plurality of IO pads 25, but only one is shown in FIG. 2 for simplification.

  The positive power supply pad 24, the IO pad 25, and the negative power supply pad 26 are connected to the internal circuit 21. In addition, a positive protection element 22 is connected between the positive power supply pad 24 and the IO pad 25, and a negative protection element 23 is connected between the negative power supply pad 26 and the IO pad 25.

The connection between the pads 24 to 26 and the terminals 14 to 16 of such a semiconductor integrated circuit has been inspected using an open test method. In the open test method, as shown in FIG. 2, the terminal 14 to which the positive power supply pad 24 is connected and the terminal 16 to which the negative power supply pad 26 is connected are grounded, and the positive protection element 22 and the negative protection element 23 are used as diodes. It is operated by applying a current I _S to the terminal 15 by the current source 30 to measure the voltage between the common potential point and the terminal 15 by the voltmeter 31.

When the current I _S is drawn from the terminal 15 by the current source 30, the current flows along the dotted line 32. When the semiconductor integrated circuit 10 is normally manufactured, the resistance values of the resistors 12 and 13 are small, so that a voltage drop due to these resistors can be ignored. For this reason, the voltmeter 31 indicates the forward voltage of the negative protection element 23. If there is an abnormality in the connection element between the terminals 15 and 16 and the pads 25 and 26, the voltage indicated by the voltmeter 31 becomes larger than the forward voltage, which indicates that there is an abnormality.

When the current I _S is injected from the current source 30 to the terminal 15, the current flows through the path of the dotted line 33. By measuring the voltage at the terminal 15 using the voltmeter 31, it is possible to inspect whether there is an abnormality in the connection element between the terminal 15 -pad 25 and the terminal 14 -pad 24.

JP 2002-313859 A JP 2006-058075 A JP 2006-084191 A

  However, such a semiconductor integrated circuit inspection method has the following problems. Recent semiconductor integrated circuits have been increased in pin count and density, and the internal structure has been miniaturized and complicated. For this reason, failure modes of connection elements inside the semiconductor integrated circuit are diversified. For example, in the case of failure due to defective bonding of flip chip bumps or defective formation of fine wiring, even if the resistance value of the connection element is small at the initial stage, disconnection may occur due to stress or long-term operation during secondary mounting. . In order to detect these defective products at the time of packaging, the resistance value of the connection element must be measured with high accuracy.

  However, in the inspection method described with reference to FIG. 2, the voltage measured by the voltmeter 31 is a value obtained by adding a voltage drop corresponding to the resistance of the connection element to the forward voltage of the positive and negative protection elements 22 and 23, and the resistance value is accurately determined. There was a problem that could not be asked.

The current value drawn by the current source 30 is I _S , the forward voltage of the negative protection element 23 is V _F , the wiring resistance between the terminal 15 and the IO pad 25 is R _IO , and the wiring resistance between the terminal 16 and the negative power supply pad 26 is R _SS When the measurement voltage of the voltmeter 31 is V _S ,
V _S = − (R _IO + R _SS ) · I _S −V _F
become. From this equation:
R _IO = − (V _F + V _S ) / I _S −R _SS
Thus, the resistance between the terminal 15 and the IO pad 25 can be obtained from the measured value Vs of the voltmeter 31. However, the forward voltage V _F because there are variations of several tens of mV depending on the state of the semiconductor process, it can not be measured only by 1Ω accuracy of about even tens mA to I _S. In addition, since the resistance value R _SS between the terminal 16 and the negative power supply pad 26 is included in the above equation, there is a problem that it is impossible to measure the resistance component of only _RIO .

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a semiconductor integrated circuit capable of accurately measuring the resistance of a wiring element and an inspection apparatus therefor.

In order to solve such a problem, the invention according to claim 1 of the present invention,
In a semiconductor integrated circuit comprising a semiconductor package having terminals and an IO pad, comprising a semiconductor chip built in the semiconductor package, and connecting a terminal of the semiconductor package to a corresponding IO pad using a connection element,
Current switching means for changing the current flowing through the IO pad;
A buffer amplifier for extracting the voltage of the IO pad to the outside of the semiconductor package;
Is provided. The resistance value of the connecting element can be measured accurately.

The invention according to claim 2 is the invention according to claim 1 according to claim 1,
The current switching means includes a protection element that protects the semiconductor chip from overvoltage and a control means that controls on / off of the protection element. Since an existing protection element is used, the configuration is simplified.

The invention according to claim 3 is the invention according to claim 1,
As the current switching means, a three-state buffer or a high impedance output buffer is used. Buffers often used in integrated circuits can be used.

The invention according to claim 4 is the invention according to any one of claims 1 to 3,
Switching means for switching the voltage of a plurality of IO pads and inputting it to the buffer amplifier is provided. Since the buffer amplifier can also be used, the configuration is simplified.
The invention according to claim 5
An inspection apparatus for inspecting the semiconductor integrated circuit according to claim 1,
A voltage measuring unit for measuring the output voltage of the buffer amplifier;
A constant voltage source for supplying power to the semiconductor chip;
A variable voltage source for supplying a predetermined voltage to the IO pad and capable of varying an output voltage;
A current measuring unit for measuring a current flowing through the IO pad;
A voltage control unit for controlling the current switching means;
Is provided. The resistance of the connecting element can be measured accurately.

As is apparent from the above description, the present invention has the following effects.
According to the first, second, third, fourth and fifth aspects of the present invention, the current flowing through the IO pad is changed, and the voltage and current of the IO pad at this time are measured. Was measured.

  Since the resistance value of the connection element can be accurately measured, it is possible to detect a defective bonding of the flip chip bump and a defective formation of the fine wiring. Therefore, there is an effect that it is possible to detect in advance the stress at the time of secondary mounting and the disconnection that occurs due to long-term use.

  Further, when a protective element is used as means for changing the current flowing through the IO pad, there is an effect that the configuration can be greatly simplified.

  Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a semiconductor integrated circuit and its inspection apparatus according to the present invention. In addition, the same code | symbol is attached | subjected to the same element as FIG. 2, and description is abbreviate | omitted. In FIG. 1, reference numeral 40 denotes a semiconductor package having terminals 14 to 16, 41, and 42, in which a semiconductor chip 50 is accommodated. The semiconductor package 40 and the semiconductor chip 50 constitute a semiconductor integrated circuit.

  The semiconductor chip 50 includes an internal circuit 21, a positive protection element 22, a negative protection element 23, a positive power supply pad 24, an IO pad 25, a negative power supply pad 26, a buffer amplifier 51 to which the voltage of the IO pad 25 is input, and the buffer amplifier 51. The test pad 53 for outputting the output of the semiconductor chip to the outside of the semiconductor chip, the switch unit 52 for connecting the gate of the negative protection element 23 to the positive power source or the negative power source, and the control pad 54 for receiving a control signal of the switch unit 52 Has been. It is assumed that the gain of the buffer amplifier 51 is 1.

  In the conventional example of FIG. 2, the gate of the negative protection element 23 is connected to a negative power source. However, in this embodiment, by operating the switch unit 52, it can be connected to either a positive power source or a negative power source. Yes. The switch unit 52 includes two switches 52a and 52b connected in series. One end of the switch 52a is connected to the positive power supply side, and one end of the switch 52b is connected to the negative power supply side. The common connection point of the switches 52 a and 52 b is connected to the gate of the negative protection element 23. The switch 52 and the negative protection element 23 constitute current switching means.

  Terminals 41 and 42 are added to the semiconductor package 40. The terminal 41 is connected to the test pad 53, and the terminal 42 is connected to the control pad 54.

  The inspection device 60 includes a voltage measuring unit 61 that measures the voltage of the terminal 41, a variable voltage source 64 that applies a predetermined voltage to the terminal 14, a current measuring unit 63 that measures the current flowing through the terminal 15, and a control voltage applied to the terminal 42. The voltage control unit 65 is configured to be applied. Note that the terminal 16 is connected to a common potential point.

  Next, the operation of this embodiment will be described. Since power is supplied from the constant voltage source 62, the internal circuit 21 is in an operating state. First, the switch 52a is turned off and the switch 52b is turned on by the voltage controller 65. For this reason, the negative protection element 23 is turned off. The variable voltage source 64 is adjusted to supply the terminal 15 with a voltage that does not damage the semiconductor chip. The current flowing through the terminal 15 at this time is measured by the current measuring unit 63, and the voltage at the terminal 41, that is, the output voltage of the buffer amplifier 51 is measured by the voltage measuring unit 61.

When the voltage applied to the terminal 15 by the variable voltage source 64 is V _S , the current measured by the current measuring unit 63 is I ₁ , the input voltage of the buffer amplifier 51 is V ₁ , and the resistance value of the wiring resistor 12 is R _IO. Since the protective element 23 is off, the following equation (1) is established.
V _S −V ₁ = I ₁ · R _IO (1)

When the offset voltage of the buffer amplifier 51 is V _OFS and the measurement voltage of the voltage measurement unit 61 is V _M1 , the following equation (2) is established.
V _M1 = V ₁ + V _OFS (2)
Substituting the formula (2) into the formula (1) and rearranging the formula, the following formula (3) is obtained.
_{V S = I 1 · R IO} + V M1 -V OFS ······ (3)

Next, the switch 52a is turned on and the switch 52b is turned off. Since a negative power supply is applied to the gate of the negative protection element 23, the negative protection element 23 is turned on. When the variable voltage source 64 is adjusted so that the V _S voltage is applied to the terminal 15, the voltage measured by the voltage measuring unit 61 at this time is V _M2 , and the current measured by the current measuring unit 63 is I _2. The following equation (4) is obtained in the same manner as equations (1) to (3).
V _S = I ₂ · R _IO + VM ₂ −V _OFS (4)

When the offset voltage V _OFS is eliminated from the equations (3) and (4), the following equation (5) is obtained, and the wiring resistance R _IO can be accurately measured. As described above, when the wiring resistance is accurately measured, it is possible to detect the formation failure of the fine wiring, and it is possible to predict in advance the disconnection that occurs during secondary mounting or long-term use.
_{R IO = (V M1 -V M2} ) / (I 2 -I 1) ······ (5)

If the internal impedance of the internal circuit 21 is very high, the current flowing into the internal circuit 21 can be ignored. Therefore, when the negative protection element 23 is off, no current flows through the path of the terminal 15 and the right side of the equation (1) becomes zero. For this reason, the measurement which turns off the negative power supply element 23 is omissible. The wiring resistance _RIO is set to I ₁ = 0 in the above equation (5).
_{R IO = (V M1 -V M2} ) / I 2 = (V S -V M2) / I 2
Can be obtained. In this case, a power supply with high output voltage accuracy may be used as the variable power supply 64, or the output voltage V _S of the variable voltage source 64 may be measured separately.

  In this embodiment, the negative protection element 23 is turned on / off using the switch 52, but it may be turned on / off by changing the gate voltage using a driver amplifier or the like. In short, any control means capable of turning on and off the negative protection element 23 may be used. In the embodiment of FIG. 1, the negative protection element 23 is turned on and off, but the positive protection element 22 may be turned on and off.

Further, in this embodiment, the protection element 22 or 23 and the switch 52 are used as the current switching means, but other elements may be used as the current switching means without using the protection elements 22 and 23. For example, a three-state buffer or a high-impedance output buffer may be used, or a resistor and a switch may be connected in series, the switch may be turned on / off, and a part of the internal circuit 21 may be disconnected to change the current. Good. In short, by changing the current flowing through the wiring resistance R _IO, it is sufficient to measure the output voltage of the current and the buffer amplifier 51 at that time.

  Furthermore, if a switching means such as a multiplexer is provided on the input side of the buffer amplifier 51 so that signals input to the buffer amplifier 51 can be switched, the wiring resistance of a plurality of IO terminals can be measured with one buffer amplifier. .

It is a block diagram which shows one Example of this invention. It is a block diagram of the conventional semiconductor integrated circuit.

Explanation of symbols

11 to 13 Wiring resistors 14 to 16, 41, 42 Terminal 21 Internal circuit 22 Positive protection element 23 Negative protection element 24 Positive power supply pad 25 IO pad 26 Negative power supply pad 40 Semiconductor package 50 Semiconductor chip 51 Buffer amplifier 52 Switch units 52a and 52b Switch 53 Test pad 54 Control pad 60 Inspection device 61 Voltage measurement unit 62 Constant voltage source 63 Current measurement unit 64 Variable voltage source 65 Voltage control unit

Claims (5)

In a semiconductor integrated circuit comprising a semiconductor package having terminals and an IO pad, comprising a semiconductor chip built in the semiconductor package, and connecting a terminal of the semiconductor package to a corresponding IO pad using a connection element,
Current switching means for changing the current flowing through the IO pad;
A buffer amplifier for extracting the voltage of the IO pad to the outside of the semiconductor package;
A semiconductor integrated circuit comprising:   2. The semiconductor integrated circuit according to claim 1, wherein the current switching means includes a protection element for protecting the semiconductor chip from overvoltage, and control means for controlling on / off of the protection element.   2. The semiconductor integrated circuit according to claim 1, wherein the current switching means is a three-state buffer or an output buffer with high impedance.   4. The semiconductor integrated circuit according to claim 1, further comprising switching means for switching voltages of a plurality of IO pads and inputting the voltages to the buffer amplifier. An inspection apparatus for inspecting the semiconductor integrated circuit according to claim 1,
A voltage measuring unit for measuring the output voltage of the buffer amplifier;
A constant voltage source for supplying power to the semiconductor chip;
A variable voltage source for supplying a predetermined voltage to the IO pad and capable of varying an output voltage;
A current measuring unit for measuring a current flowing through the IO pad;
A voltage control unit for controlling the current switching means;
An inspection apparatus comprising:

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