JP2009054740A - Solid-state imaging device and manufacturing method for solid-state imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To manufacture a solid-state imaging device with stable properties and stable yield by reducing damage received in the manufacturing process on an insulating film under a light shielding film in a pixel array region. <P>SOLUTION: A thin film region in which the film thickness of an insulating film existing between a silicon substrate 101 and the light shielding film 109 is smaller than that in the pixel array region is formed outside the pixel array region. Alternatively, if the contact depth to the light shielding film 109 is formed at the deepest location within the element, damage caused by charge-up and the like will be concentrated on the insulating film outside the pixel array region. As a result, concerning the damage in the manufacturing process such as charge-up and the like to the insulating film under the light shielding film 109, which is received through the light shielding film 109 in the manufacturing process, the damage to the insulating film under the light shielding film 109 inside the pixel array region can be reduced and the breakage of the insulating film under the light shielding film 109 inside the pixel array region can be prevented. For this reason, the solid-state imaging device with stable properties as to white blemishes and the like can be manufactured at stable yield. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device having a conductive light-shielding film and a method for manufacturing the same.

  A solid-state imaging device used for a digital camera or the like has photodetection elements arranged in a matrix and has a vertical transfer unit (vertical CCD) that reads signal charges generated in the photodetection element array between the photodetection element arrays. is doing. The solid-state imaging device further includes a horizontal transfer unit (horizontal CCD) that transfers the signal charge from the vertical transfer unit, and an output unit that converts the signal charge from the horizontal transfer unit into a charge-voltage converter and outputs it. In such a solid-state imaging device, the vertical transfer unit, the horizontal transfer unit, and the output unit are covered with a light-shielding film made of a metal material such as aluminum or tungsten, and the light-shielding film has an opening on each photodetecting element. Is formed.

  In general, the following problems occur when manufacturing a solid-state imaging device. That is, in a semiconductor process, a conductor film grown by a vapor deposition method or a CVD (chemical vapor deposition) method is formed as a separate electrode by dry etching using plasma after a patterning process using a photoresist. At this time, the insulating film under the electrode is charged by static electricity generated during dry etching, and this charging causes a problem that the voltage value applied to each gate electrode varies from device to device.

  In order to solve such a problem, a technique for disposing a fuse that blows when a predetermined voltage is applied to an electrode between an electrode that is easily charged and a portion that can flow charged static electricity. Is disclosed (for example, see Patent Document 1).

Hereinafter, a conventional solid-state imaging device that uses a fuse to reduce the amount of charge on the under-electrode insulating film will be described with reference to FIG.
FIG. 21 is a cross-sectional view showing the structure of a solid-state imaging device having a conventional fuse.

  As shown in FIG. 21, a diffusion layer for accumulating charges converted from an optical signal, a p-type diffusion layer 25 of an opposite conductivity type for isolating the diffusion layer, and an insulating layer 12 are provided on the semiconductor substrate 18. A fuse 13 having various electrodes 26 and 28 is provided between the p-type diffusion layer 25 or the ground and the electrodes 26 and 28. The fuse 13 is blown when a predetermined voltage is applied to the electrodes 26 and 28. Has been.

  For this reason, since the static electricity charged in the insulating film 12 under the electrodes 26 and 28 flows through the fuse 13 to the p-type diffusion layer 25 or the ground, the charge amount to the insulating film 12 under the electrodes 26 and 28 is reduced. This makes it difficult to cause a problem that the voltage value applied to the gate electrode varies from element to element. When used as a solid-state imaging device, the fuse can be blown by applying a predetermined voltage to the electrodes 26 and 28, so that the solid-state imaging device can be used thereafter.

Next, a general solid-state imaging device and its manufacturing method in the prior art will be described with reference to FIGS.
FIG. 22 is a diagram showing a structure of a conventional solid-state imaging device, FIG. 22A is a schematic view from a plane of a general solid-state imaging device, and FIG. 22B is a cross-sectional view showing the structure. FIG. 23 is a process cross-sectional view for explaining the p-type diffusion layer region forming process in the conventional solid-state imaging device, FIG. 24 is a process cross-sectional view for explaining the polysilicon electrode forming process in the conventional solid-state imaging device, and FIG. (A)-(c) is process sectional drawing for demonstrating the manufacturing process of the conventional solid-state imaging device.

  As shown in FIG. 22, a general solid-state imaging device includes a pixel array region in which photodetecting elements and vertical transfer units are arranged in a matrix and other regions (hereinafter referred to as a region outside the pixel array). .

  Further, in the pixel array region, a p-type diffusion layer region 52 is formed as a well in an n-type silicon substrate 51, and an n-type diffusion layer for accumulating charges converted from an optical signal in a predetermined region on the surface thereof. A p-type diffusion layer region 54 that isolates the region 53 from the n-type diffusion layer region 53 is formed. On the surface of the silicon substrate 51, an electrode 56 formed in a desired pattern is formed via an insulating film 57, and an insulating film 58a, an insulating film 58b, and an insulating film are formed so as to cover the electrode 56 and the insulating film 57. 58c is formed, and a conductive light shielding film 59 opens at least a part of the insulating film 58 on the n-type diffusion layer region 53 and covers all other pixel array regions. It is formed in a pattern in which a light shielding film overlap region is provided in a region outside the pixel array.

  On the other hand, in the region outside the pixel array including the light shielding film overlap region, a p-type diffusion layer region 52 is formed as a well on an n-type silicon substrate 51, and an n-type diffusion layer region is formed on a predetermined surface thereof. Has been. On the surface of the silicon substrate 51, a conductive light shielding film 59 is formed in a desired pattern via an insulating film 57 and an insulating film 58c which is a part of the insulating film 58. As described above, since the insulating film under the light shielding film is the same in the pixel array area and the outside area of the pixel array, the damage such as charge-up received by the insulating film and the substrate through the light shielding film is affected by the pixel array area and the outside area of the pixel array. Are equivalent.

Next, a general method for manufacturing a solid-state imaging device will be described with reference to FIGS. 23 (a) to 23 (c), FIGS. 24 (a) to 24 (c) and FIGS. 25 (a) to 25 (c).
First, as shown in FIG. 23 (a), boron is ion-implanted into an n-type silicon substrate 51 to form a p-type diffusion layer region 52 as a well, and a photoresist film 80 is formed in a desired region. As a mask, arsenic ions are implanted to form the n-type diffusion layer region 53 and the photoresist film 80 is removed.

  Next, as shown in FIG. 23B, in order to form a mark for using the n-type diffusion layer region 53 as a reference for alignment, an alignment mark portion (not shown) is used with the photoresist film 81 as a mask. Only the silicon substrate 51 is etched and the photoresist film 81 is removed.

  Next, as shown in FIG. 23C, boron is ion-implanted into the desired region using the photoresist film 82 as a mask to form a p-type diffusion layer region 54, and the photoresist film 82 is removed. To do.

Next, as shown in FIG. 24A, an insulating film 57 and a polysilicon electrode 56 which is a conductive film are sequentially formed.
Next, as shown in FIG. 24B, using the photoresist film 83 formed in a desired pattern as a mask, only the polysilicon electrode 56 is selectively etched, and the photoresist film 83 is removed.

  Next, as shown in FIG. 24C, the polysilicon electrode 56 is oxidized to form an insulating film 58a which is a silicon oxide film, and arsenic ions are implanted into a desired region using the photoresist film 84 as a mask. As a result, n-type diffusion layers serving as the source / drain of the transistor in the amplifier section and the transistor (not shown) in the protection circuit section in the region outside the pixel array are formed, and the photoresist film 84 is removed.

  Next, as shown in FIG. 25A, a silicon nitride film 58b as an antireflection film is formed by CVD, and then a silicon nitride film is formed using the photoresist film 85 formed in a desired pattern as a mask. Only 58b is selectively etched, and the photoresist film 85 is removed.

Next, as shown in FIG. 25B, an insulating film 58c is formed by CVD, and a light shielding film 59, which is a conductive film, is further formed by CVD.
Next, as shown in FIG. 25C, by using the photoresist film 86 formed in a desired pattern as a mask, only the light shielding film 59 is selectively etched, and the photoresist film 86 is removed. A general solid-state imaging device having the structure shown in FIG.

Further, a configuration of a solid-state imaging device in which a contact is formed on the light shielding film by dry etching will be described with reference to FIG.
FIG. 26 is a cross-sectional view showing the structure of a conventional solid-state imaging device in which contacts are formed on a light shielding film. The right side in FIG. 26 shows a pixel array region limited to the light receiving pixel part, and the left side shows a pixel. The area outside the array is shown. Further, (a) shows a light receiving pixel portion, and (b) shows an OB pixel portion.

  In FIG. 26, an n-type impurity diffusion region 503, a vertical register 504, and a p-type channel stopper region 505 are formed in a first p-type well region 502 on an n-type silicon substrate 501, and on the n-type impurity diffusion region 503. A p-type positive charge storage region 506 and a second p-type well 507 are formed immediately below the vertical register 504, respectively.

  Here, in both (a) the light receiving pixel portion and (b) the OB pixel portion, a light receiving portion (photoelectric conversion portion) is formed by a photodiode having a PN junction between the n-type impurity diffusion region 503 and the first p-type well region 502. 508 is configured. The light receiving portion 508 is formed corresponding to the pixel.

  Then, a gate insulating film 509 is formed on the entire surface of the first p-type well region 502 including the channel stopper region 505, the vertical register 504, and the positive charge storage region 506. Further, a first gate electrode 510, a second gate electrode 511, and a silicon oxide film 512 are formed on the gate insulating film 509 on the first p-type well 502. Thereafter, a contact 520 is formed on the n-type silicon substrate 501, and a conductive light-shielding film 513 is deposited so as to be in direct contact with the n-type silicon substrate 501. Thereafter, a conductive light shielding film 513 is selectively formed, and a BPSG film 514 is further formed by a low pressure CVD apparatus, an atmospheric pressure CVD apparatus, or the like. Further, a metal wiring 516 is formed on the conductive light shielding film 513 through a contact 515.

Note that the gate insulating film 509 made of SiO ₂ film, a SiO ₂ film 509, _Si 3 _{N 4} film 517 and the SiO ₂ film 518 as shown in FIG. 19 is composed of three layers gate insulating film 519 having a three-layer structure It doesn't matter.

Further, in the conductive light shielding film 513, the conductive light shielding film 513 that shields the OB pixel portion does not have a light receiving opening, and the conductive light shielding film 513 that shields the light receiving pixel portion has a light receiving opening.
JP 2000-138364 A

  However, the prior art shown in FIG. 21 is limited only to the prevention of electrification of the insulating film under the electrode, and further, an area for disposing a fuse is necessary to realize this. There is a first problem of increasing the area.

  In the general solid-state imaging device shown in FIGS. 22 to 25, a conductive light-shielding film is used so as to cover the entire pixel array region occupying most of the solid-state imaging device. For this reason, there is a second problem that damage to the insulating film under the light shielding film in the pixel array region during the manufacturing process leads to deterioration in characteristics such as white scratches in the solid-state imaging device, reduction in reliability, and the like.

In particular, as shown in FIG. 26, when the contact hole is formed on the light shielding film by dry etching, the conductive light shielding film on which the conductive light shielding film 513 is selectively formed is applied to the BPSG by a low pressure CVD apparatus, an atmospheric pressure CVD apparatus or the like. In the solid-state imaging device in which the film 514 is formed, when a contact hole is formed in the conductive light-shielding film 513 by dry etching, both the (a) light receiving pixel portion and (b) OB pixel portion in the region outside the pixel array are dry etching devices. In
CHF ₃ → CHF ₂ + F + e- (charge)
Electric charges are generated by the plasma reaction.

  Then, the electric charge in the plasma is charged to the conductive light shielding film 513. When the electric charge charged in the conductive light shielding film 513 increases, there is a problem that dielectric breakdown occurs between the conductive light shielding film 513 and the n-type silicon substrate 501 through the insulating film under the conductive light shielding film 513. In addition, since the area of the light shielding film is formed large as described above, a very large electric field is applied to the insulating film underneath, and the insulating film may be destroyed. In manufacturing a solid-state imaging device, this is a third problem that greatly reduces the yield. This phenomenon becomes more prominent when the contact size becomes smaller as the miniaturization progresses in the future. Therefore, this phenomenon becomes a more important issue in stabilizing the characteristics and yield of the solid-state imaging device.

  In view of the above problems, the present invention reduces the damage received during the manufacturing process to the insulating film under the light shielding film in the pixel array region, and manufactures a solid-state imaging device having stable characteristics with a stable yield. Objective.

  In order to achieve the above object, a solid-state imaging device according to claim 1 of the present invention is a solid-state imaging device in which a plurality of elements each having a pixel array region and a region outside the pixel array are arranged in a matrix on a semiconductor substrate. A first diffusion layer region of the first conductivity type that is formed in the pixel array region of the semiconductor substrate and accumulates electric charges converted from an optical signal, and a second conductivity that separates the first diffusion layer region from each other. Type second diffusion layer region, the first diffusion layer region, the second diffusion layer region, the first insulating film formed on the region outside the pixel array, and the second diffusion layer region An electrode formed thereon via the first insulating film, a second insulating film formed on the first insulating film on the first diffusion layer region and on the electrode, and the first The pixel array region is opened by opening a part of one diffusion layer region. And the first insulating film on the first diffusion layer region and the first insulating layer formed under the light shielding film and having a light shielding film formed so as to overlap the region outside the pixel array. The film thickness of the first insulating film in the region outside the pixel array is thinner than the total film thickness with two insulating films.

  The solid-state imaging device according to claim 2 is the solid-state imaging device according to claim 1, wherein a third diffusion layer region of the first conductivity type is formed in the uppermost layer of the semiconductor substrate in the region outside the pixel array. And

  The solid-state imaging device according to claim 3, wherein the second insulating film in the pixel array region includes a silicon nitride film in the solid-state imaging device according to claim 1 or 2. And

  The solid-state imaging device according to claim 4 is the solid-state imaging device according to claim 3, wherein the second insulating film is an ONO film having a laminated structure of silicon oxide film / silicon nitride film / silicon oxide film. Features.

  The solid-state imaging device according to claim 5 is the solid-state imaging device according to claim 3 or 4, wherein the silicon nitride film formed on the first diffusion layer region is focused on light. It is used as an antireflection film for improving the performance.

  7. The solid-state imaging device according to claim 6, wherein a plurality of elements each having a pixel array region and a region outside the pixel array are arranged in a matrix on a semiconductor substrate, and formed in the pixel array region of the semiconductor substrate. A first conductivity type first diffusion layer region that accumulates electric charges converted into an optical signal, a second conductivity type second diffusion layer region that isolates the first diffusion layer region, and A third diffusion layer region of a first conductivity type formed in a region outside the pixel array on a semiconductor substrate, the first diffusion layer region, the second diffusion layer region, and the third diffusion layer region; A first insulating film formed on the second diffusion layer region, an electrode formed on the second diffusion layer region via the first insulating film, and the first insulating film on the first diffusion layer region. All over the top and on the electrode as well as on the area outside the pixel array. A second insulating film formed on the first diffusion layer area, and a light shielding film formed on the first diffusion layer area so as to cover the pixel array area and overlap the outer area of the pixel array An interlayer insulating film formed on the second insulating film and the light-shielding film, a conductor film arbitrarily formed on the interlayer insulating film in the region outside the pixel array, and the conductor film and the electric And the contact formed on the interlayer insulating film, and lowering the substrate surface below the light shielding film in the region outside the pixel array as compared with the substrate surface in other regions, The contact formed on the light shielding film in the outer region is deeper than the contact formed in another region.

  The solid-state imaging device according to claim 7 is a solid-state imaging device in which a plurality of elements including a pixel array region and a region outside the pixel array are arranged in a matrix on a semiconductor substrate, and is formed in the pixel array region of the semiconductor substrate. A first conductivity type first diffusion layer region that accumulates electric charges converted into an optical signal, a second conductivity type second diffusion layer region that isolates the first diffusion layer region, and A third diffusion layer region of a first conductivity type formed in a region outside the pixel array on a semiconductor substrate, the first diffusion layer region, the second diffusion layer region, and the third diffusion layer region; A first insulating film formed on the second diffusion layer region, an electrode formed on the second diffusion layer region via the first insulating film, and the first insulating film on the first diffusion layer region. A second insulating film formed on and on the electrode; and A light-shielding film formed by opening a part on the scattering layer area to cover the pixel array area and overlapping the area outside the pixel array, and formed on the second insulating film and the light-shielding film An interlayer insulating film to be formed; a conductor film arbitrarily formed on the interlayer insulating film outside the pixel array; a contact electrically connected to the conductor film and formed on the interlayer insulating film; The contact formed on the light shielding film in the region outside the pixel array is made different from the substrate surface in the region outside the pixel array by making the substrate surface below the light shielding film lower than the substrate surface in the other region. It is characterized by being deeper than the contact formed in the region.

  The method for manufacturing a solid-state imaging device according to claim 8 is a method for manufacturing a solid-state imaging device in which a plurality of elements each having a pixel array region and a region outside the pixel array are arranged in a matrix on a semiconductor substrate. A first step of forming a first conductivity type first diffusion layer region for accumulating charges in a predetermined region; and a second conductivity type second diffusion layer region for isolating the first diffusion layer region. A second step of forming, a third step of forming a first insulating film on the surface of the semiconductor substrate, a first conductive film formed on the surface of the first insulating film, and then the first conductive film. And a second step of forming a second insulating film having a different etching selectivity compared to the first insulating film so as to cover the surface of the semiconductor substrate and the electrode. Step 5 and a desired region outside the pixel array Etching a surface of the second insulating film to a predetermined depth to form a thin film region having a thickness smaller than that of the second insulating film in the pixel array region; And a seventh step of forming a light-shielding film having a desired pattern by etching the second conductive film after forming the second conductive film on the surface of the second insulating film.

  The solid-state imaging device according to claim 9 is a solid-state imaging device in which a plurality of elements including a pixel array region including a light-receiving pixel portion and an OB pixel portion and a region outside the pixel array are arranged in a matrix on a semiconductor substrate. A substrate, a photoelectric conversion unit formed on the semiconductor substrate, a gate insulating film formed on the semiconductor substrate so as to cover the photoelectric conversion unit, and a vertical direction for transferring charges generated in the photoelectric conversion unit in a vertical direction A transfer gate electrode for transferring charges of the vertical transfer unit, a conductive light-shielding film deposited on the entire surface of the light-receiving pixel unit by opening the photoelectric conversion unit, and an entire surface on the conductive light-shielding film. An interlayer insulating film to be formed; a metal wiring formed on the interlayer insulating film; one or a plurality of contact holes connecting the metal wiring and the conductive light shielding film; the light shielding film and the semiconductor substrate; And having a contact for connecting and.

  The solid-state imaging device according to claim 10 is the solid-state imaging device according to claim 9, wherein the contact includes a first contact connecting the light shielding film and the transfer gate electrode, the transfer gate electrode, and the semiconductor substrate. And a second contact that connects the two.

  The solid-state imaging device according to an eleventh aspect is the solid-state imaging device according to the tenth aspect, wherein the transfer gate electrode between the first contact and the second contact is cut.

  13. The solid-state imaging device according to claim 12, wherein a plurality of elements each including a pixel array region including a light-receiving pixel portion and an OB pixel portion and a region outside the pixel array are arranged in a matrix on a semiconductor substrate. A substrate, a photoelectric conversion unit formed on the semiconductor substrate, a gate insulating film formed on the semiconductor substrate so as to cover the photoelectric conversion unit, and a vertical direction for transferring charges generated in the photoelectric conversion unit in a vertical direction A transfer gate electrode for transferring charges of the vertical transfer unit, a conductive light-shielding film deposited on the entire surface of the light-receiving pixel unit by opening the photoelectric conversion unit, and an entire surface on the conductive light-shielding film. An interlayer insulating film to be formed; a metal wiring formed on the interlayer insulating film; and one or a plurality of contact holes for connecting the metal wiring and the conductive light shielding film. Characterized in that Le is formed only on the light-receiving pixel portion.

  The solid-state imaging device according to claim 13 is the solid-state imaging device according to claim 12, wherein the conductive light-shielding film that shields the OB pixel portion and the conductive light-shielding film that shields the light-receiving pixel portion are formed of the same conductive light-shielding film. It is characterized by that.

  The solid-state imaging device according to claim 14 is the solid-state imaging device according to claim 12, wherein the conductive light-shielding film that shields the OB pixel portion and the conductive light-shielding film that shields the light-receiving pixel portion are formed separately. It is characterized by.

  16. The solid-state imaging device according to claim 15, wherein a plurality of elements each including a pixel array region including a light-receiving pixel portion and an OB pixel portion and a region outside the pixel array are arranged in a matrix on a semiconductor substrate. A substrate, a photoelectric conversion unit formed on the semiconductor substrate, a gate insulating film formed on the semiconductor substrate so as to cover the photoelectric conversion unit, and a vertical direction for transferring charges generated in the photoelectric conversion unit in a vertical direction A transfer gate electrode for transferring charges of the vertical transfer unit, a conductive light-shielding film deposited on the entire surface of the light-receiving pixel unit by opening the photoelectric conversion unit, and an entire surface on the conductive light-shielding film. An interlayer insulating film to be formed; a metal wiring formed on the interlayer insulating film; and one or a plurality of contact holes for connecting the metal wiring and the conductive light-shielding film; And forming a light receiving region that opens the conductive light shielding film to the fine the OB pixel portions.

  17. The solid-state imaging device according to claim 16, wherein a plurality of elements each including a pixel array region including a light-receiving pixel portion and an OB pixel portion and a region outside the pixel array are arranged in a matrix on a semiconductor substrate. A substrate, a photoelectric conversion unit formed on the semiconductor substrate, a gate insulating film formed on the semiconductor substrate so as to cover the photoelectric conversion unit, and a vertical direction for transferring charges generated in the photoelectric conversion unit in a vertical direction A transfer gate electrode for transferring charges of the vertical transfer unit, a conductive light-shielding film deposited on the entire surface of the light-receiving pixel unit by opening the photoelectric conversion unit, and an entire surface on the conductive light-shielding film. An interlayer insulating film to be formed; a metal wiring formed on the interlayer insulating film; and one or a plurality of contact holes connecting the metal wiring and the conductive light-shielding film; Serial gate insulating film is equal to or thinner than the gate insulating film of the OB pixel portions.

  As described above, damage to the insulating film under the light shielding film in the pixel array region during the manufacturing process can be reduced, and a solid-state imaging device having stable characteristics can be manufactured with a stable yield.

  According to the solid-state imaging device and the manufacturing method thereof according to the present invention, the thin film region in which the film thickness of the insulating film existing between the semiconductor substrate and the light shielding film is formed thinner than the film thickness in the pixel array region is formed in the pixel array. By providing the contact depth to the outside of the region or forming the deepest contact depth on the light shielding film in the element, damage due to charge-up and the like is concentrated on the insulating film in the region outside the pixel array. With respect to damage in the manufacturing process such as charge-up to the insulating film under the light shielding film received through the light shielding film, the damage received by the insulating film under the light shielding film in the pixel array region is reduced and the destruction of the insulating film under the light shielding film is prevented. can do. For this reason, a solid-state imaging device with stable characteristics such as white scratches can be manufactured with a stable yield.

  In addition, by forming a contact so that the light shielding film is electrically connected to the semiconductor substrate, charges charged in the light shielding film can be discharged to the semiconductor substrate, so that the insulating film under the light shielding film can be prevented from being broken. For this reason, a solid-state imaging device with stable characteristics such as white scratches can be manufactured with a stable yield.

  The present invention provides a thin film region outside the pixel array region in which the film thickness of the insulating film existing between the semiconductor substrate and the light shielding film is made thinner than the film thickness in the pixel array region. The contact depth on the film is the deepest in the device.

Hereinafter, each embodiment will be described in detail.
(First embodiment)
Hereinafter, a solid-state imaging device and a manufacturing method thereof according to a first embodiment of the present invention will be described with reference to FIGS.

  FIG. 1 is a diagram illustrating the structure of a solid-state imaging device according to the first embodiment. FIG. 1A is a schematic view from the plane of the solid-state imaging device according to this embodiment, and FIG. It is sectional drawing which shows the structure of the solid-state imaging device concerning. FIG. 2 is a process cross-sectional view for explaining a polysilicon electrode forming process in the solid-state imaging device of the first embodiment, and FIG. 3 is a process for explaining a manufacturing process of the solid-state imaging device in the first embodiment. It is sectional drawing.

As shown in FIG. 1, the solid-state imaging device according to the present embodiment includes a region outside the pixel array.
Further, in the pixel array region, a p-type diffusion layer region 102 is formed as a well on an n-type silicon substrate 101, and an n-type diffusion layer that accumulates charges converted from an optical signal in a predetermined region on the surface thereof. A p-type diffusion layer region 104 that isolates the region 103 from the n-type diffusion layer region 103 is formed. On the surface of the silicon substrate 101, an electrode 106 having a desired pattern is formed via an insulating film 107, and an insulating film 108 is formed so as to cover the electrode 106 and the insulating film 107 in the pixel array region. Yes. Further, the conductive light shielding film 109 opens a part of the insulating film 108 on the n-type diffusion layer region 103 and covers the entire pixel array region other than the opening, and further covers the light shielding film overlapping region in the region outside the pixel array. It is formed in the pattern which provided. In FIG. 1A, the light shielding film 109 and the insulating film 108 exist as a repetitive pattern in the pixel array region, but the illustration is omitted.

  On the other hand, in the insulating film thin film region outside the pixel array including the light shielding film overlapping region, a p-type diffusion layer region 102 is formed as a well on the n-type silicon substrate 101, and the surface thereof is used to function as a protection element. An n-type diffusion layer region 105 is formed in a predetermined region. On the surface of the silicon substrate 101, a conductive light shielding film 109 is formed in a desired pattern via an insulating film 107.

  That is, as shown in FIG. 1, the solid-state imaging device according to the first embodiment of the present invention has a thickness X1 of the insulating film between the silicon substrate 101 and the light shielding film 109 in the pixel array region. The insulating film thickness X2 between the silicon substrate 101 and the light shielding film 109 in the insulating film thin film region is formed to be thinner by the thickness of the insulating film 108. Therefore, the charging to the insulating film under the light shielding film received through the light shielding film in the manufacturing process is concentrated on the insulating film under the light shielding film in the insulating film thin film region outside the pixel array, and the damage received by the insulating film under the light shielding film in the pixel array region. Is reduced.

Next, a method for manufacturing the solid-state imaging device according to the first embodiment of the present invention will be described with reference to FIGS. 2 (a) to 2 (c) and FIGS. 3 (a) to 3 (b).
First, as shown in FIG. 2A, boron is ion-implanted into an n-type silicon substrate region 101 to form a p-type diffusion layer region 102 as a well, and a photoresist film is formed in a desired region. As a mask (not shown), arsenic ions are implanted to form the n-type diffusion layer region 103. After removing the photoresist film, boron is ion-implanted into the desired region using the photoresist film as a mask (not shown) to form the p-type diffusion layer region 104, and the photoresist film is removed.

Next, as shown in FIG. 2B, an insulating film 107 and an electrode 106 which is a conductive film are sequentially formed.
Next, as shown in FIG. 2C, only the electrode 106 is selectively etched using a photoresist film formed in a desired pattern as a mask (not shown). After removing the photoresist film, n-type diffusion layer region 105 is formed by ion-implanting arsenic using the photoresist film as a mask (not shown) in a desired region, and the photoresist film is removed. At this time, the n-type diffusion layer region 105 is formed without adding any special process by simultaneously performing the source / drain formation of the transistor, which is the process of FIG. It is possible. Thereafter, the insulating film 108 is formed by CVD.

Next, as shown in FIG. 3A, only the insulating film 108 in the region outside the image array is selectively etched using the photoresist film 154 formed in a desired pattern as a mask.
In this process, in the pixel array region, in the subsequent steps, at least the insulating film 108 in the region where the light shielding film is not etched is not etched, and in the insulating film thin film region outside the pixel array, the light shielding film is not etched in the subsequent steps. In this case, an insulating film thin film region in which the insulating film is as thin as the insulating film 108 in the region outside the pixel array is formed in the region outside the pixel array. This is a feature of the embodiment. Here, a silicon nitride film is used as the insulating film 108, and this is the same as the silicon nitride film as an antireflection film generally used as a solid-state imaging device for the purpose of improving the light collecting property. The etching of the insulating film 108 is shared with the etching for forming the antireflection film, which is the process of FIG. 19A described in the manufacturing method of the prior art, without adding a special process. The insulating film 108 can be etched. Also, at this time, in the insulating film thin film region outside the pixel array, in a subsequent process, the film thickness of the insulating film 107 in the region where the light shielding film is not etched is etched so that the electron tunneling is performed. Also good.

Next, as shown in FIG. 3B, after removing the photoresist film 154, a light shielding film 109, which is a conductive film, is formed by CVD.
Next, as shown in FIG. 3C, only the light-shielding film 109 formed in the region where the electrode of the pixel array region is not formed using the photoresist film formed in a desired pattern as a mask (not shown). Is selectively etched and the photoresist film is removed to form a solid-state imaging device having the structure shown in FIG.

  As described above with reference to FIGS. 2 and 3, in the solid-state imaging device and the manufacturing method thereof according to the first embodiment of the present invention, the insulation film thickness X1 between the silicon substrate and the light shielding film in the pixel array region is set. On the other hand, it is possible to thinly form the insulating film thickness X2 between the silicon substrate and the light shielding film in the insulating film thin film area outside the pixel array without adding a special process to the manufacturing method of the conventional solid-state imaging device. Become.

  Therefore, there is no cost burden due to the additional process, and the insulating film thickness between the silicon substrate and the light shielding film in the insulating film thin film region outside the pixel array is thinner than the insulating film thickness between the silicon substrate and the light shielding film in the pixel array region. As a result, the charge to the insulating film under the light shielding film received through the light shielding film in the manufacturing process is concentrated on the insulating film under the light shielding film in the insulating film thin film area outside the pixel array, and the insulating film under the light shielding film in the pixel array area Therefore, a solid-state imaging device with high reliability and stable characteristics can be manufactured with a stable yield.

  In summary, what has been described above is that the solid-state imaging device and the manufacturing method thereof according to the first embodiment of the present invention are pixels that exist in the general prior-art solid-state imaging device shown in FIG. By utilizing the light shielding film overlapping area outside the array, it is not necessary to add a special area to the solid-state imaging device of the prior art, and charging to the insulating film can be suppressed. An increase in the area of the imaging device can be prevented.

  Furthermore, in the solid-state imaging device and the manufacturing method thereof according to the first embodiment of the present invention, the insulating film thin film region in the region outside the pixel array is compared with the film thickness of the insulating film between the silicon substrate in the pixel array region and the light shielding film. Since the thickness of the insulating film between the silicon substrate and the light shielding film is smaller, damage such as charge-up to the insulating film under the light shielding film that is received through the light shielding film in the manufacturing process is caused in the insulating film thin film region outside the pixel array. Concentrating on the insulating film under the light shielding film, thereby reducing the damage received by the insulating film under the light shielding film in the pixel array region with respect to damage such as charge-up to the insulating film under the light shielding film that is received through the light shielding film in the manufacturing process. I can do it.

  Furthermore, in the solid-state imaging device and the manufacturing method thereof according to the first embodiment of the present invention, the insulating film thin film region in the region outside the pixel array is compared with the film thickness of the insulating film between the silicon substrate in the pixel array region and the light shielding film. The thickness of the insulating film between the silicon substrate and the light shielding film is thinner, and this film thickness is reduced to the extent that electrons tunnel, thereby charging up the insulating film under the light shielding film received through the light shielding film in the manufacturing process. Is concentrated on the insulating film under the light shielding film in the insulating film thin film region outside the pixel array, and further tunneling is performed, thereby causing damage such as charge-up to the insulating film under the light shielding film that is received through the light shielding film in the manufacturing process. It can be greatly reduced.

In the solid-state imaging device and the manufacturing method thereof according to the first embodiment of the present invention, since the light shielding film is used at the ground potential, the n-type diffusion layer region 105 is used as the diffusion layer used at the ground potential. By providing it, the insulating film 107 under the light shielding film in the insulating film thin film region outside the pixel array may not exist. In addition, although the n-type diffusion layer region 105 is used here, it may not be an n-type diffusion layer.
(Second Embodiment)
Hereinafter, a solid-state imaging device and a manufacturing method thereof according to the second embodiment of the present invention will be described with reference to FIGS.

  4A and 4B are diagrams illustrating the structure of the solid-state imaging device according to the second embodiment. FIG. 4A is a schematic view from the plane of the solid-state imaging device according to the present embodiment, and FIG. It is sectional drawing which shows the structure of the solid-state imaging device concerning. FIG. 5 is a process cross-sectional view for explaining a p-type diffusion layer region forming step in the solid-state imaging device of the second embodiment, and FIG. 6 is a diagram for explaining a manufacturing process of the solid-state imaging device in the second embodiment. It is process sectional drawing, and is sectional drawing which shows the manufacturing process for implement | achieving the structure of the solid-state imaging device shown in FIG.

  As shown in FIG. 4, in the pixel array region, a p-type diffusion layer region 202 is formed as a well in an n-type silicon substrate 201, and charges obtained by converting an optical signal are accumulated in a predetermined region on the surface. An n-type diffusion layer region 203 and a p-type diffusion layer region 204 that isolates the n-type diffusion layer region 203 are formed. On the surface of the silicon substrate 201, an electrode 206 formed in a desired pattern is formed via an insulating film 207. The insulating film 208a, the insulating film 208a and the insulating film 208a are formed so as to cover the side wall and the surface of the electrode 206. An insulating film 208b is formed so as to cover the film 207, and an insulating film 208c is formed over the insulating film 208b. Further, a conductive light shielding film 209 is formed in a desired pattern.

  On the other hand, in the insulating film thin film region outside the pixel array, a p-type diffusion layer region 202 is formed as a well on an n-type silicon substrate 201, and an n-type surface is formed on a predetermined region of the surface in order to function as a protection element. A diffusion layer region 205 is formed. On the surface of the silicon substrate 201, a conductive light shielding film 209 is formed in a desired pattern via an insulating film 208c.

  That is, as shown in FIG. 4, in the solid-state imaging device according to the second embodiment of the present invention, the region outside the pixel array with respect to the film thickness X3 of the insulating film between the silicon substrate 201 and the light shielding film 209 in the pixel array region. The thickness of the insulating film between the silicon substrate 201 and the light-shielding film 209 in the insulating film thin film region is formed thinner by the insulating film 207 and the insulating film 208b.

Next, with reference to FIGS. 5A to 5C and FIGS. 6A to 6C, a method for manufacturing a solid-state imaging device according to the second embodiment of the present invention will be described.
First, as shown in FIG. 5A, boron is ion-implanted into an n-type silicon substrate 201 to form a p-type diffusion layer region 202 as a well, and a photoresist film is formed in a desired region. As a mask (not shown), n-type diffusion layer region 203 is formed by ion implantation of arsenic. After removing the photoresist film, boron is ion-implanted into the desired region using the photoresist film as a mask (not shown) to form a p-type diffusion layer region 204, and the photoresist film is removed.

Next, as shown in FIG. 5B, an insulating film 207 and a polysilicon electrode 206 which is a conductive film are sequentially formed.
Next, as shown in FIG. 5C, only the polysilicon electrode 206 is selectively etched using a photoresist film formed in a desired pattern as a mask (not shown). After removing the photoresist film, the polysilicon electrode 206 is oxidized to form an insulating film 208a, which is a silicon oxide film, and arsenic is ion-implanted in a desired region using the photoresist film as a mask (not shown). As a result, an n-type diffusion layer region 205 is formed, and the photoresist film is removed.

  At this time, the n-type diffusion layer region 205 is formed without adding any special process by simultaneously performing the source / drain formation of the transistor, which is the process of FIG. I can do it.

Thereafter, an insulating film 208b which is a silicon nitride film is formed by CVD.
Next, as shown in FIG. 6A, only the insulating film 208b on the region outside the pixel array is selectively etched using the photoresist film 254 formed in a desired pattern as a mask.

  In this step, in the pixel array region, the insulating film 208b in the region where the light shielding film is not etched is not etched in the subsequent steps, and in the region where the light shielding film is not etched in the subsequent steps in the insulating film thin film region outside the pixel array. A feature of this embodiment is that there is a region where at least a part of the insulating film 208b is etched.

  Here, a silicon nitride film is used as the insulating film 208b, and this is used as a silicon nitride film as an antireflection film, which is generally used as a solid-state imaging device for the purpose of improving light collection. The insulating film 208b is formed without adding a special process by using the same film and sharing with the etching for forming the antireflection film which is the process of FIG. 19A described in the manufacturing method of the prior art. Is possible.

  Next, as shown in FIG. 6B, after removing the photoresist film 254, the insulating film 207 on the region outside the pixel array is etched using the insulating film 208b as a mask. Thereafter, an insulating film 208c which is a silicon oxide film and a light shielding film 209 which is a conductive film are sequentially formed by CVD. At this time, the insulating film 208c is formed so as to have a film thickness that allows electrons to tunnel.

  Next, as shown in FIG. 6C, only the light-shielding film 209 formed in the region where the electrode of the pixel array region is not formed using the photoresist film formed in a desired pattern as a mask (not shown). Is selectively etched and the photoresist film is removed to form a solid-state imaging device having the structure shown in FIG.

  As described above with reference to FIGS. 5 and 6, in the solid-state imaging device and the manufacturing method thereof according to the second embodiment of the present invention, the insulating film thickness X3 between the silicon substrate and the light shielding film in the pixel array region is set. On the other hand, forming a thin insulating film thickness X4 between the silicon substrate and the light shielding film in the insulating film thin film area outside the pixel array adds a new mask alignment process to the manufacturing method of the solid-state imaging device of the prior art. Can be realized.

Therefore, there is no cost burden due to the addition of processes, and a solid-state imaging device with high reliability and stable characteristics can be manufactured with a stable yield.
To summarize the above description, in the solid-state imaging device and the manufacturing method thereof according to the second embodiment of the present invention, pixels existing in the general prior-art solid-state imaging device shown in FIG. By utilizing the light shielding film overlapping area outside the array, it is not necessary to add a special area to the solid-state imaging device of the prior art, and charging to the insulating film can be suppressed. An increase in the area of the imaging device can be prevented.

  Furthermore, in the solid-state imaging device and the manufacturing method thereof according to the second embodiment of the present invention, the insulating film thin film region in the region outside the pixel array is compared with the film thickness of the insulating film between the silicon substrate in the pixel array region and the light shielding film. Since the thickness of the insulating film between the silicon substrate and the light shielding film is smaller, damage such as charge-up to the insulating film under the light shielding film that is received through the light shielding film in the manufacturing process is caused in the insulating film thin film region outside the pixel array. Concentrating on the insulating film under the light shielding film, thereby reducing the damage received by the insulating film under the light shielding film in the pixel array region with respect to damage such as charge-up to the insulating film under the light shielding film that is received through the light shielding film in the manufacturing process. I can do it.

  Furthermore, in the solid-state imaging device and the manufacturing method thereof according to the second embodiment of the present invention, the insulating film thin film region in the region outside the pixel array is compared with the film thickness of the insulating film between the silicon substrate in the pixel array region and the light shielding film. The thickness of the insulating film between the silicon substrate and the light shielding film is thinner, and this film thickness is reduced to the extent that electrons tunnel, thereby charging up the insulating film under the light shielding film received through the light shielding film in the manufacturing process. Is concentrated on the insulating film under the light shielding film in the insulating film thin film region outside the pixel array, and further tunneling is performed, thereby causing damage such as charge-up to the insulating film under the light shielding film that is received through the light shielding film in the manufacturing process. It can be greatly reduced.

  Further, since the insulating film between the electrode in the pixel array region and the light shielding film has an ONO structure (a laminated structure of silicon oxide film / silicon nitride film / silicon oxide film), when this insulating film is formed only of the silicon oxide film, In comparison, when compared with the same physical film thickness, the breakdown voltage between the electrode and the light shielding film can be improved. For this reason, by using an ONO structure for the insulating film between the electrode and the light shielding film, the insulating film thickness between the silicon substrate and the light shielding film can be made thinner than that of an insulating film structure having only a silicon oxide film. Thus, a solid-state imaging device having good light shielding characteristics can also be realized.

  Note that in the solid-state imaging device and the manufacturing method thereof according to the second embodiment of the present invention, since the light shielding film is used at the ground potential, the pixel array can be obtained if the diffusion layer 205 is a diffusion layer used at the ground potential. The insulating film 208c under the light shielding film in the outer insulating film thin film region may not exist. In this case, the diffusion layer 205 may not be an n-type diffusion layer.

(Third embodiment)
Hereinafter, a solid-state imaging device and a manufacturing method thereof according to a third embodiment of the present invention will be described with reference to FIGS.

  FIG. 7 is a diagram illustrating a structure of the solid-state imaging device according to the third embodiment. FIG. 7A is a schematic view from the plane of the solid-state imaging device according to the present embodiment, and FIG. It is sectional drawing which shows the structure of the solid-state imaging device which concerns on embodiment. FIG. 8 is a process cross-sectional view for explaining the p-type diffusion layer region forming step in the solid-state imaging device of the third embodiment, and FIG. 9 is for explaining the electrode forming step in the solid-state imaging device of the third embodiment. FIG. 10 is a process cross-sectional view for explaining the manufacturing process of the solid-state imaging device according to the third embodiment, and is a cross-sectional view showing the manufacturing process for realizing the structure of the solid-state imaging device shown in FIG. FIG.

  In the pixel array region of FIG. 7, a p-type diffusion layer region 302 is formed as a well in an n-type silicon substrate 301, and an n-type diffusion for accumulating charges converted from an optical signal in a predetermined region on the surface thereof. A layer region 303 and a p-type diffusion layer region 304 for isolating the layer region 303 are formed. An electrode 306 formed in a desired pattern is formed on the surface of the silicon substrate 301 via an insulating film 307, and an insulating film 308 is formed so as to cover the electrode 306 and the insulating film 307. Further, a conductive light shielding film 309 is formed in a desired pattern. Further, an insulating film 310 serving as an interlayer insulating film is formed so as to cover the light shielding film 309 and the insulating film 307.

  On the other hand, in the contact formation region on the light shielding film disposed in the region outside the pixel array in FIG. 7, a p-type diffusion layer region 302 is formed as a well in the n-type silicon substrate 301, and the p-type diffusion layer region 302 serves as a protection element. An n-type diffusion layer region 305 is formed in a predetermined region on the surface. On the surface of the silicon substrate 301, a conductive light shielding film 309 is formed in a desired pattern via an insulating film 307 and an insulating film 308 on the surface. Further, an insulating film 310 is formed on the surface of the light shielding film 309, a conductive film 312 is formed on the surface, and a contact 311 for electrically connecting the light shielding film 309 and the conductive film 312 is formed. ing.

  Here, as a feature of the present embodiment, the contact depth Y1 of the contact formed on the light shielding film is other than the contact formed on the light shielding film in the element composed of a pair of pixel array region and the pixel array outer region. The contact depth Y2 of the deepest contact is at least the same as or deeper than the contact depth Y2.

Next, referring to FIGS. 8A to 8C, FIGS. 9A to 9C, and FIGS. 10A to 10C, the solid-state imaging device according to the third embodiment of the present invention. The manufacturing method will be described.
First, as shown in FIG. 8A, boron is ion-implanted into an n-type silicon substrate 301 to form a p-type diffusion layer region 302 as a well, and a photoresist film 350 is formed in a desired region. As a mask, arsenic ions are implanted to form an n-type diffusion layer region 303.

  Next, as shown in FIG. 8B, after removing the photoresist film 350, a photoresist film 351 is formed so as to open a contact formation region on the light shielding film, and using this as a mask, the silicon substrate 301 is formed. Is etched to the desired depth.

  Here, in a general method for manufacturing a solid-state imaging device, as described in the conventional manufacturing method, as shown in FIG. 17B, a mark is formed for using the diffusion layer 53 as a reference. In addition, the silicon substrate is etched. If this silicon substrate etching and the silicon substrate etching of the contact formation region on the light shielding film are performed at the same time, it can be formed without adding a special process. That is, at this time, it is a feature of this embodiment that the silicon substrate is etched so that the contact depth on the light shielding film becomes the deepest in the element.

  Next, as shown in FIG. 8C, after removing the photoresist film 351, boron is ion-implanted into the desired region using the photoresist film as a mask (not shown), thereby p-type diffusion. A layer region 304 is formed and the photoresist film is removed. After that, an insulating film 307 and an electrode 306 which is a conductive film are sequentially formed on the surface of the silicon substrate 301.

  Next, as shown in FIG. 9A, only the electrode 306 is selectively etched using a photoresist film formed in a desired pattern as a mask (not shown). After removing the photoresist film, n-type diffusion layer region 305 is formed by ion-implanting arsenic using the photoresist film as a mask (not shown) in a desired region, and the photoresist film is removed. At this time, if the source / drain formation of the transistor, which is the process of FIG. 18C described in the manufacturing method of the prior art, is performed at the same time, the n-type diffusion layer region 305 can be formed without adding a special process. Is possible. Thereafter, an insulating film 308 is formed by CVD.

Next, as shown in FIG. 9B, a light shielding film 309 which is a conductive film is formed by CVD.
Next, as shown in FIG. 9C, using only the photoresist film 355 formed in a desired pattern as a mask, only the light shielding film 309 formed in the region where the electrode of the pixel array region is not formed is selectively selected. Etch.

Next, as shown in FIG. 10A, after removing the photoresist film 355, an insulating film 310 is formed by CVD.
Next, as shown in FIG. 10B, the contact 311 is formed at a desired location by selectively etching only the insulating film 310 using the photoresist film 356 formed in a desired pattern as a mask. .

  Next, as shown in FIG. 10C, after removing the photoresist film 356, a conductive film is embedded in the contact 311, and a conductive film 312 to be a wiring is formed on the surface of the insulating film 310 by sputtering. Using a photoresist film formed in a desired pattern as a mask (not shown), only the conductive film 312 in the pixel array region is selectively etched to form a wiring layer connected to the contact, and the photoresist film is removed. Thus, a solid-state imaging device having the structure shown in FIG. 7 is formed.

  As described above, according to the third embodiment, the contact depth Y1 of the contact on the light shielding film is at least equal to or greater than the contact depth Y2 of the deepest contact other than the contact on the light shielding film in the element. The

  Here, the contact dry etching conditions are set so that etching is performed until the deepest contact in all the elements formed on the same substrate is formed. For this reason, in the shallow contact portion, the contact formation is completed and the surface of the conductive film is exposed, and the etching is continued, and a large number of charges are accumulated in the conductive film due to the electron shading effect at the time of contact dry etching. Become. Since the depth of the contact on the light shielding film is the deepest contact in all the elements formed on the same substrate, the surface of the light shielding film is not exposed and is not continuously etched. The amount of charge accumulated in the light shielding film due to the electronic shading effect can be minimized.

  As described above with reference to FIGS. 8 to 10, in the solid-state imaging device and the manufacturing method thereof according to the third embodiment of the present invention, the contact depth Y1 of the contact on the light shielding film in the region outside the pixel array is Solid-state imaging according to the prior art is to form at least the same depth as or deeper than the contact depth Y2 of the deepest contact other than the contact on the light shielding film in the region outside the pixel array in all elements formed on the same substrate. This can be realized without adding a special process to the device manufacturing method.

Therefore, there is no cost burden due to the addition of processes, and a solid-state imaging device with high reliability and stable characteristics can be manufactured with a stable yield.
In summary, the solid-state imaging device and the manufacturing method thereof according to the third embodiment of the present invention are the pixels that exist in the general prior-art solid-state imaging device shown in FIG. By utilizing the light shielding film overlap area outside the array, it is possible to obtain the effect that there is no need to add a special area to the solid-state imaging device of the prior art, thereby preventing an increase in the area of the solid-state imaging device. I can do it.

Furthermore, in the solid-state imaging device and the manufacturing method thereof according to the third embodiment of the present invention, the contact depth of the contact on the light shielding film is at least the same as the contact depth of the deepest contact other than the contact on the light shielding film in the element. Because it is deeper than that, the surface of the light-shielding film is exposed during contact dry etching, so that etching is not continued, and the amount of charge accumulated in the light-shielding film due to the electron shading effect during contact dry etching is minimized. As a result, it is possible to reduce damage to the insulating film under the light-shielding film that is received through the light-shielding film due to the electronic shading effect during contact dry etching in the manufacturing process.
(Fourth embodiment)
Hereinafter, a solid-state imaging device and a method for manufacturing the same according to a fourth embodiment of the present invention will be described with reference to FIGS.

  FIG. 11 is a diagram illustrating a structure of a solid-state imaging device according to the fourth embodiment. FIG. 11A is a schematic view from the plane of the solid-state imaging device according to the present embodiment, and FIG. It is sectional drawing which shows the structure of the solid-state imaging device which concerns on embodiment. FIG. 12 is a process cross-sectional view for explaining a p-type diffusion layer region forming step in the solid-state imaging device according to the fourth embodiment, and FIG. 13 is a light-shielding film forming step in the solid-state imaging device according to the fourth embodiment. FIG. 14 is a process sectional view for explaining a manufacturing process of the solid-state imaging device according to the fourth embodiment, and shows a manufacturing process for realizing the structure of the solid-state imaging device shown in FIG. It is sectional drawing.

  In the pixel array region of FIG. 11, a p-type diffusion layer region 402 is formed as a well in an n-type silicon substrate 401, and an n-type diffusion for accumulating charges converted from an optical signal in a predetermined region on the surface thereof. A layer region 403 and a p-type diffusion layer region 404 that isolates the layer region 403 are formed. An electrode 406 formed in a desired pattern is formed on the surface of the silicon substrate 401 via an insulating film 407, and an insulating film 408 is formed so as to cover the electrode 406 and the insulating film 407. Further, a conductive light shielding film 409 is formed in a desired pattern. Further, an insulating film 410 is formed so as to cover the light shielding film 409 and the insulating film 407.

  On the other hand, in the contact formation region on the light shielding film arranged in the region outside the pixel array in FIG. 11, a p-type diffusion layer region 402 is formed as a well in an n-type silicon substrate 401, and an n-type is formed in a predetermined region on the surface thereof. The diffusion layer region 405 is formed. An insulating film 407 is formed on the surface of the silicon substrate 401, and a conductive light shielding film 409 is formed in a desired pattern on the surface. Further, an insulating film 410 is formed on the surface of the light shielding film 409, a conductive film 412 is formed on the surface as a wiring, and a contact 411 for electrically connecting the light shielding film 409 and the conductive film 412 is formed. ing.

  Here, as a feature of this embodiment, in the region outside the pixel array, the contact depth Y3 of the contact on the light shielding film is the contact of the deepest contact other than the contact on the light shielding film in all the elements formed on the same substrate. It is formed at least as deep as the depth Y4 or deeper than it. In addition, the insulating film between the silicon substrate 401 and the light shielding film 409 in the contact formation region on the light shielding film in the region outside the pixel array is compared with the film thickness X1 of the insulating film between the silicon substrate 401 and the light shielding film 409 in the pixel array region. The thickness X2 is formed thinner by the thickness of the insulating film 408.

Next, referring to FIGS. 12A to 12C, FIGS. 13A to 13C, and FIGS. 14A to 14C, the solid-state imaging device according to the fourth embodiment of the present invention. The manufacturing method will be described.
First, as shown in FIG. 12A, boron is ion-implanted into an n-type silicon substrate 401 to form a p-type diffusion layer 402 as a well, and a photoresist film 450 is formed in a desired region. As a mask, n-type diffusion layer 403 is formed by ion implantation of arsenic.

  Next, as shown in FIG. 12B, after removing the photoresist film 450, a photoresist film 451 is formed so as to open the contact formation region on the light shielding film, and this is used as a mask to form the silicon substrate 401. Is etched to the desired depth.

  Here, in a general method for manufacturing a solid-state imaging device, as described in the conventional manufacturing method, as shown in FIG. 17B, a mark is formed for using the diffusion layer 53 as a reference. In addition, the silicon substrate is etched. If this silicon substrate etching and the silicon substrate etching of the contact formation region on the light shielding film are performed at the same time, it can be formed without adding a special process.

That is, at this time, the first feature of the present embodiment is that the silicon substrate is etched so that the contact depth on the light shielding film is deepest in the device.
Next, as shown in FIG. 12C, after removing the photoresist film 451, boron ions are implanted into a desired region using the photoresist film as a mask (not shown), thereby p-type diffusion. Layer 404 is formed and the photoresist film is removed. After that, an insulating film 407 and an electrode 406 that is a conductive film are sequentially formed on the surface of the silicon substrate 401.

  Next, as shown in FIG. 13A, only the electrode 406 is selectively etched using a photoresist film formed in a desired pattern as a mask (not shown). After removing the photoresist film, an n-type diffusion layer region 405 is formed by ion-implanting arsenic using the photoresist film as a mask (not shown) in a desired region, and the photoresist film is removed. At this time, if the source / drain formation of the transistor, which is the process of FIG. 18C described in the manufacturing method of the prior art, is performed at the same time, the n-type diffusion layer region 405 can be formed without adding a special process. Is possible. Thereafter, an insulating film 408 is formed by CVD.

  Next, as shown in FIG. 13B, using only the photoresist film 454 formed in a desired pattern as a mask, only the insulating film 408 in the region where the contact on the light shielding film in the region outside the pixel array is formed is selectively selected. Etch.

  In this step, in the pixel array region, the insulating film 408 in the region where the light shielding film is not etched is not etched in the subsequent steps, and the light shielding film is not etched in the subsequent steps in the contact formation region on the light shielding film outside the pixel array. The second feature of this embodiment is that there is a region where at least a part of the insulating film 408 in the region is etched.

  Here, a silicon nitride film is used as the insulating film 408, and this is used as a silicon nitride film as an antireflection film, which is generally used as a solid-state imaging device for the purpose of improving the light collecting property. Since the same film is used, the etching of the insulating film 408 is shared with the etching for forming the antireflection film, which is the process of FIG. Can be formed. Further, at this time, in the insulating film thin film region outside the pixel array, the film thickness of the insulating film 407 in the region where the light shielding film is not etched may be etched in a subsequent process so that the film thickness is such that electrons are tunneled. .

  Next, as shown in FIG. 13C, after removing the photoresist film 454, a light shielding film 409, which is a conductive film, is formed by CVD, and the photoresist film 455 formed in a desired pattern is used as a mask. Then, only the light shielding film 409 is selectively etched.

Next, as shown in FIG. 14A, after the photoresist film 455 is removed, an insulating film 410 is formed by CVD.
Next, as shown in FIG. 14B, using the photoresist film 456 formed in a desired pattern as a mask, only the insulating film 410 is selectively etched to form a contact 411 at a desired location. .

  Next, as shown in FIG. 14C, after removing the photoresist film 456, a conductive film is embedded in the contact 411, and further, a conductive film 412 serving as a wiring is formed on the surface of the insulating film 410 by sputtering. Using a photoresist film formed in a desired pattern as a mask (not shown), only the conductive film 412 is selectively etched, and the photoresist film is removed, whereby the solid-state imaging device having the structure shown in FIG. It is formed.

  As described above with reference to FIGS. 12 to 14, in the solid-state imaging device and the manufacturing method thereof according to the fourth embodiment of the present invention, the contact depth Y3 of the contact on the light-shielding film is set in the region outside the pixel array. Since the contact depth Y4 of the deepest contact other than the contact on the light shielding film in the element is at least equal to or greater than the contact depth Y4, the surface of the light shielding film may be continuously exposed during contact dry etching. The amount of charge accumulated in the light shielding film due to the electronic shading effect during contact dry etching is minimized. As a result, damage to the insulating film under the light-shielding film due to this electric field can be greatly reduced, which leads to stabilization of characteristics such as white scratches in the solid-state imaging device and the insulating film during the diffusion manufacturing process. By preventing pattern defects due to destruction, the yield can be stabilized.

  Furthermore, the insulating film thickness X2 between the silicon substrate and the light shielding film in the contact formation region on the light shielding film outside the pixel array may be formed thinner than the insulating film thickness X1 between the silicon substrate and the light shielding film in the pixel array region. This is possible without increasing the device area and without adding any special process, and the damage between the silicon substrate in the pixel array region and the light-shielding film during the process is damaged during various processes other than the electronic shading effect. Can also be reduced at the same time.

Therefore, there is no cost burden due to the addition of processes, and a solid-state imaging device with high reliability and stable characteristics can be manufactured with a stable yield.
As described above, the solid-state imaging device and the manufacturing method thereof according to the fourth embodiment of the present invention can be summarized as the solid-state imaging device according to the first, second, and third embodiments of the present invention described above. Since the same features and effects as those of the manufacturing method are provided, all the first to third problems can be solved.
(Fifth embodiment)
A solid-state imaging device according to a fifth embodiment of the present invention will be described with reference to FIGS.

  FIG. 15 is a diagram illustrating the structure of the solid-state imaging device according to the fifth embodiment, and FIG. 16 is a diagram illustrating the structure of the solid-state imaging device in which the gate electrode is formed between the light shielding film and the insulating film according to the fifth embodiment. Yes, the right side shows the pixel array area limited to the light receiving pixel part, and the left side shows the area outside the pixel array. Further, (a) and (b) are cross-sectional views of the manufacturing process of the pixel array region and the region outside the pixel array, respectively.

  In the light receiving pixel portion shown in FIG. 15, first, an n-type impurity diffusion region 503, a vertical register 504, and a p-type channel stopper region 505 are formed in a first p-type well region 502 on an n-type silicon substrate 501. A p-type positive charge accumulation region 506 is formed on the type impurity diffusion region 503, and a second p-type well 507 is formed immediately below the vertical register 504.

  Here, a light receiving unit (photoelectric conversion unit) 508 is configured by a photodiode having a PN junction between the n-type impurity diffusion region 503 and the first p-type well region 502. The light receiving portion 508 is formed corresponding to the pixel.

  Then, a three-layer gate insulating film 519 is formed on the entire surface of the first p-type well region 502 including the channel stopper region 505, the vertical register 504, and the positive charge storage region 506. Further, a first transfer gate electrode 510, a second transfer gate electrode 511, and a silicon oxide film 512 are formed on the three-layer gate insulating film 519 on the first p-type well 502. Thereafter, a contact 520 is formed on the n-type silicon substrate 501, and a conductive light-shielding film 513 is deposited so as to be in direct contact with the n-type silicon substrate 501. Thereafter, a conductive light shielding film 513 is selectively formed (FIG. 15A), and a BPSG film 514 is further formed by a low pressure CVD apparatus, a normal pressure CVD apparatus, or the like. Further, a metal wiring 516 is formed on the conductive light shielding film 513 through a contact 515 (FIG. 15B).

  As shown in the light receiving pixel portion of FIG. 16, first, a contact 521 is formed so that the first gate electrode 510 and the second gate electrode 511 are grounded to the n-type silicon substrate 501, and further, a conductive light shielding film 513 is formed. A contact 522 is formed so as to be grounded to the first gate electrode 510 and the second gate electrode 511, a conductive light shielding film 513 is deposited, and then the conductive light shielding film 513 is selectively formed (FIG. 16A). Furthermore, a configuration in which the BPSG film 514 is formed by a low pressure CVD apparatus, a normal pressure CVD apparatus, or the like can be employed (FIG. 16B).

In FIG. 16, the right side shows a pixel array region limited to the light receiving pixel portion, and FIGS. 16A and 16B are cross-sectional views illustrating the manufacturing process of the pixel array region and the region outside the pixel array, respectively.
16 differs from FIG. 15 in that the first gate electrode 510 and the second gate electrode 5 are formed in the region outside the pixel array on the left side. In the course of the manufacturing process, the electric charge charged in the conductive light-shielding film 513 is directly grounded to the n-type silicon substrate 501 through the contact 522, so that no charge is generated in the conductive light-shielding film 513, and the electrically charged conductive material is charged. Dielectric breakdown occurring between the light shielding film 513 and the n-type silicon substrate 501 through the insulating film under the conductive light shielding film 513 can be prevented. However, an arbitrary voltage cannot be applied to the conductive light-shielding film 513 from the metal wiring 516 through the contact 515 after the manufacturing process is completed. After the manufacturing process is completed, the first gate electrode 510 and the second gate electrode 511 are formed on the conductive light-shielding film 513 as a measure for applying an arbitrary voltage from the metal wiring 516 through the contact 515 to manufacture. The first gate electrode 510 and the second gate electrode 511 are fuse cut 523 by laser irradiation after the process is completed, thereby preventing the conductive light shielding film 513 and the n-type silicon substrate 1 from being grounded.

Further, a metal wiring 516 is formed on the conductive light shielding film 513 through a contact 515.
Alternatively, the first gate electrode 510 or the second gate electrode 511 may be irradiated with laser to cut the fuse 523, and the first gate electrode 510 or the second gate electrode 511 may be disconnected from the n-type silicon substrate 501. As a result, the first gate electrode 510 and the second gate electrode 511 can be prevented from short-circuiting with the n-type silicon substrate 501.

As described above, even if the contact hole is formed in the conductive light shielding film 513 by dry etching, the conductive light shielding film 513 is grounded to the n-type silicon substrate 501, and therefore, the electric charge charged in the conductive light shielding film 513 is reduced to the n-type silicon substrate. 501 is grounded. Therefore, it is possible to prevent dielectric breakdown occurring between the conductive light-shielding film 513 charged with electric charge and the n-type silicon substrate 501 through the insulating film under the conductive light-shielding film 513.
(Sixth embodiment)
A solid-state imaging device according to a sixth embodiment of the present invention will be described with reference to FIG.

FIG. 17 is a diagram illustrating a structure of a solid-state imaging device according to the sixth embodiment.
In FIG. 17, an n-type impurity diffusion region 503, a vertical register 504, and a p-type channel stopper region 505 are formed in the first p-type well region 502 on the n-type silicon substrate 501, and on the n-type impurity diffusion region 503. A p-type positive charge storage region 506 and a second p-type well 507 are formed immediately below the vertical register 504, respectively.

  Here, a light receiving unit (photoelectric conversion unit) 508 is configured by a photodiode having a PN junction between the n-type impurity diffusion region 503 and the first p-type well region 502. The light receiving portion 508 is formed corresponding to the pixel.

  Then, a gate insulating film 509 is formed on the entire surface of the first p-type well region 502 including the channel stopper region 505, the vertical register 504, and the positive charge storage region 506. Further, a first gate electrode 510, a second gate electrode 511, and a silicon oxide film 512 are formed on the gate insulating film 509 on the first p-type well 502. Thereafter, a conductive light shielding film 513 is selectively formed on the first gate electrode 510, the second gate electrode 511, and the silicon oxide film 512. Further, a BPSG film 514 is formed by a low pressure CVD apparatus, a normal pressure CVD apparatus, or the like. Further, the contact 515 is formed only in the light receiving pixel portion, and the metal wiring 516 is formed in the OB pixel portion without forming the contact on the conductive light shielding film 513.

  As a result, the conductive light-shielding film 513 does not have a contact hole in the OB pixel portion, and thus the conductive light-shielding film 513 is not charged. Therefore, it is possible to prevent dielectric breakdown occurring between the conductive light-shielding film 513 charged with electric charge and the n-type silicon substrate 501 through the insulating film under the conductive light-shielding film 513.

The conductive light-shielding film 513 is formed as shown in FIGS.
(1) The conductive light-shielding film 524 that shields the OB pixel portion and the conductive light-shielding film 525 that shields the light-receiving pixel portion are independently formed. (Fig. 17 (b))
(2) The conductive light shielding film 524 that shields the OB pixel portion and the conductive light shielding film 525 that shields the light receiving pixel portion are formed in the same manner. (Fig. 17 (c))
Either is good. A contact is not formed on the conductive light shielding film 524 that shields at least the OB pixel portion.

That is, the conductive light-shielding film 513 includes the conductive light-shielding film 524 that shields light from the OB pixel portion and the conductive light-shielding film 525 that shields light from the light-receiving pixel portion, or the conductive light-shielding film 524 that shields the OB pixel portion from light. The conductive light-shielding film 525 that shields the light-receiving pixel portion is formed in the same manner, and further, the contact 515 is not formed on at least the conductive light-shielding film 524 that shields the OB pixel portion. The conductive light shielding film 524 that shields the pixel portion is not charged with electric charges, and the dielectric breakdown that occurs between the conductive light shielding film 524 and the n-type silicon substrate 1 through the insulating film under the conductive light shielding film 524 can be prevented.
(Seventh embodiment)
A solid-state imaging device according to a seventh embodiment of the present invention will be described with reference to FIG.

FIG. 18 is a diagram illustrating a structure of a solid-state imaging device according to the seventh embodiment.
In FIG. 18, an n-type impurity diffusion region 503, a vertical register 504, and a p-type channel stopper region 505 are formed in a first p-type well region 502 on an n-type silicon substrate 501, and on the n-type impurity diffusion region 503. A p-type positive charge storage region 506 and a second p-type well 507 are formed immediately below the vertical register 504, respectively.

  Here, a light receiving unit (photoelectric conversion unit) 508 is configured by a photodiode having a PN junction between the n-type impurity diffusion region 503 and the first p-type well region 502. The light receiving portion 508 is formed corresponding to the pixel.

  Then, a gate insulating film 509 is formed on the entire surface of the first p-type well region 502 including the channel stopper region 505, the vertical register 504, and the positive charge storage region 506. Further, a first gate electrode 510, a second gate electrode 511, and a silicon oxide film 512 are formed on the gate insulating film 509 on the first p-type well 502. Thereafter, a conductive light shielding film 513 is selectively formed on the first gate electrode 510, the second gate electrode 511, and the silicon oxide film 512. Further, a BPSG film 514 is formed by a low pressure CVD apparatus, a normal pressure CVD apparatus, or the like. Further, a metal wiring 516 is formed on the conductive light shielding film 513 through the contact 15.

The conductive light-shielding film 513 that shields the OB pixel portion and the conductive light-shielding film 513 that shields the light-receiving pixel portion are both formed with light-receiving openings.
That is, the conductive light-shielding film 513 includes both the conductive light-shielding film 513 that shields the OB pixel portion and the conductive light-shielding film 513 that shields the light-receiving pixel portion. Since the first gate electrode 510, the second gate electrode 511, and the silicon oxide film 512 are interposed, a thin portion of the insulating film does not exist, and the dielectric breakdown occurring between the n-type silicon substrate 501 can be prevented.
(Eighth embodiment)
A solid-state imaging device according to an eighth embodiment of the present invention will be described with reference to FIG.

FIG. 19 is a diagram illustrating a structure of a solid-state imaging device according to the eighth embodiment.
In FIG. 19, an n-type impurity diffusion region 503, a vertical register 504, and a p-type channel stopper region 505 are formed in the first p-type well region 502 on the n-type silicon substrate 501, and the n-type impurity diffusion region 503 is formed on the n-type impurity diffusion region 503. A p-type positive charge storage region 506 and a second p-type well 507 are formed immediately below the vertical register 504, respectively.

  Here, a light receiving unit (photoelectric conversion unit) 508 is configured by a photodiode having a PN junction between the n-type impurity diffusion region 503 and the first p-type well region 502. The light receiving portion 508 is formed corresponding to the pixel.

  Then, a gate insulating film 509 is formed on the entire surface of the first p-type well region 502 including the channel stopper region 505, the vertical register 504, and the positive charge storage region 506. Further, a first gate electrode 510, a second gate electrode 511, and a silicon oxide film 512 are formed on the gate insulating film 509 on the first p-type well 502. Thereafter, a conductive light shielding film 513 is selectively formed on the first gate electrode 510, the second gate electrode 511, and the silicon oxide film 512. Further, a BPSG film 514 is formed by a low pressure CVD apparatus, a normal pressure CVD apparatus, or the like. Further, a metal wiring 516 is formed on the conductive light shielding film 513 through a contact 515.

Here, the insulating film 526 under the conductive light shielding film 513 that shields the OB pixel portion is formed thicker than the insulating film 527 under the conductive light shielding film 513 that shields the light receiving pixel portion.
That is, by forming the insulating film 526 under the conductive light-shielding film 513 that shields the OB pixel portion thicker than the insulating film 527 under the conductive light-shielding film 513 that shields the light-receiving pixel portion, the thin portion of the insulating film 526 is formed. The dielectric breakdown that occurs between the n-type silicon substrate 501 and the n-type silicon substrate 501 can be prevented.
(Ninth embodiment)
A solid-state imaging device according to a ninth embodiment of the present invention will be described with reference to FIG.

FIG. 20 is a diagram illustrating the structure of the solid-state imaging device according to the ninth embodiment.
In FIG. 20, an n-type impurity diffusion region 503, a vertical register 504, and a p-type channel stopper region 505 are formed in the first p-type well region 502 on the n-type silicon substrate 501, and on the n-type impurity diffusion region 503. A p-type positive charge storage region 506 and a second p-type well 507 are formed immediately below the vertical register 504, respectively.

  Here, a light receiving unit (photoelectric conversion unit) 508 is configured by a photodiode having a PN junction between the n-type impurity diffusion region 503 and the first p-type well region 502. The light receiving portion 508 is formed corresponding to the pixel.

  Then, a gate insulating film 509 is formed on the entire surface of the first p-type well region 502 including the channel stopper region 505, the vertical register 504, and the positive charge storage region 506. Further, a first gate electrode 510, a second gate electrode 511, and a silicon oxide film 512 are formed on the gate insulating film 509 on the first p-type well 502. Thereafter, a conductive light shielding film 513 is selectively formed on the first gate electrode 510, the second gate electrode 511, and the silicon oxide film 512. Further, a BPSG film 514 is formed by a low pressure CVD apparatus, a normal pressure CVD apparatus, or the like. Further, a metal wiring 516 is formed on the conductive light shielding film 513 through a contact 515.

In the present embodiment, the total area of the contacts 515 on the conductive light shielding film 513 is 1000 μm ² or less.
That is, by setting the contact area on the conductive light shielding film 513 to 1000 μm ² or less, the amount of charge in the plasma charged to the conductive light shielding film 513 when the contact hole is formed in the conductive light shielding film 513 by dry etching. Therefore, the amount of charge charged by contact hole dry etching can be suppressed, and the generated charge can be suppressed between the electrically conductive light shielding film 513 charged and the n-type silicon substrate 501 through the insulating film under the electrically conductive light shielding film 513. Can prevent breakdown.

For example, when the conductive light-shielding film 513 is made of a material having a sheet resistance of 0.5 to 1.0 Ω / □, an upper power 2700 W / lower power 1300 W / pressure 5.5 Mtorr / C ₂ H ₆ 5 using a parallel plate type plasma dry etcher. When the total contact area is 1000 um ² or less at ₅ sccm / O _{2 2} sccm, the dielectric breakdown probability can be suppressed to 10% or less.

  INDUSTRIAL APPLICABILITY The present invention stabilizes characteristics such as white scratches and can be manufactured with a stable yield, and is useful for a solid-state imaging device having a conductive light-shielding film, a method for manufacturing the solid-state imaging device, and the like.

The figure which shows the structure of the solid-state imaging device in 1st Embodiment. Process sectional drawing for demonstrating the polysilicon electrode formation process in the solid-state imaging device of 1st Embodiment Process sectional drawing for demonstrating the manufacturing process of the solid-state imaging device in 1st Embodiment The figure which shows the structure of the solid-state imaging device in 2nd Embodiment. Process sectional drawing for demonstrating the p type diffused layer area | region formation process in the solid-state imaging device of 2nd Embodiment Process sectional drawing for demonstrating the manufacturing process of the solid-state imaging device in 2nd Embodiment The figure which shows the structure of the solid-state imaging device in 3rd Embodiment. Process sectional drawing for demonstrating the p type diffused layer area | region formation process in the solid-state imaging device of 3rd Embodiment Process sectional drawing for demonstrating the electrode formation process in the solid-state imaging device of 3rd Embodiment Process sectional drawing for demonstrating the manufacturing process of the solid-state imaging device in 3rd Embodiment The figure which shows the structure of the solid-state imaging device in 4th Embodiment Process sectional drawing for demonstrating the p type diffused layer area | region formation process in the solid-state imaging device of 4th Embodiment Process sectional drawing for demonstrating the light shielding film formation process in the solid-state imaging device of 4th Embodiment Process sectional drawing for demonstrating the manufacturing process of the solid-state imaging device in 4th Embodiment The figure which shows the structure of the solid-state imaging device in 5th Embodiment The figure which shows the structure of the solid-state imaging device in which the gate electrode was formed between the light shielding film and insulating film in 5th Embodiment The figure which shows the structure of the solid-state imaging device in 6th Embodiment The figure which shows the structure of the solid-state imaging device in 7th Embodiment The figure which shows the structure of the solid-state imaging device in 8th Embodiment The figure which shows the structure of the solid-state imaging device in 9th Embodiment Sectional drawing which shows the structure of the solid-state imaging device provided with the conventional fuse The figure which shows the structure of the conventional solid-state imaging device Process sectional drawing for demonstrating the p-type diffused layer area | region formation process in the conventional solid-state imaging device Process sectional drawing for demonstrating the polysilicon electrode formation process in the conventional solid-state imaging device Process sectional drawing for demonstrating the manufacturing process of the conventional solid-state imaging device Sectional drawing which shows the structure of the solid-state imaging device by which the contact was formed on the conventional light shielding film

Explanation of symbols

12 Insulating film 18 Semiconductor substrate 25 P-type diffusion layers 26, 28 Electrodes 101, 201, 301, 401, 51 Silicon substrates 102, 202, 302, 402, 52 P-type diffusion layer regions 103, 203, 303, 403, 53 n-type diffusion layer regions 104, 204, 304, 404, 54 p-type diffusion layer regions 105, 205, 305, 405 n-type diffusion layer regions 106, 206, 306, 406, 56 electrodes 107, 207, 307, 407, 57, 58 Insulating film 108, 308, 408 Insulating film 208a, 58a Insulating film 208b, 58b Insulating film 208c, 58c Insulating film 109, 209, 309, 409, 59 Light shielding film 310, 410 Insulating film 311, 411 Contact part 312, 412 conductive film 154 photoresist film 254 photoresist film 350 351, 55 Photoresist film 356 Photoresist film 450, 451, 454, 455 Photoresist film 456, 457 Photoresist film 80, 81, 82, 83, 84, 85, 86 Photoresist film 501 N-type silicon substrate 502 First p Type well 503 N-type impurity diffusion region 504 Vertical register 505 p-type channel stopper region 506 p-type positive charge storage region 507 Second p-type well 508 Light receiving portion (photoelectric conversion portion)
509 Gate insulating film (SiO ₂ film)
510 Gate electrode 511 Gate electrode 512 Silicon oxide film 513 Conductive light shielding film 514 BPSG film 515 Contact 516 Metal wiring 517 Si ₃ N ₄ film 518 SiO ₂ film 519 Three-layer gate insulating film 520 Contact 521 Contact 522 Contact 523 Fuse cut 524 OB pixel Conductive light-shielding film 525 that shields the light-receiving portion Conductive light-shielding film 526 that shields the light-receiving pixel portion.

Claims (16)

A solid-state imaging device in which a plurality of elements having a pixel array region and a region outside the pixel array are arranged in a matrix on a semiconductor substrate,
A first diffusion layer region of a first conductivity type, which is formed in the pixel array region of the semiconductor substrate and stores an electric charge converted from an optical signal;
A second conductivity type second diffusion layer region for isolating the first diffusion layer region;
A first insulating film formed on the first diffusion layer region, the second diffusion layer region, and the region outside the pixel array;
An electrode formed on the second diffusion layer region via the first insulating film;
A second insulating film formed on the first insulating film on the first diffusion layer region and on the electrode;
A light-shielding film that is partially open on the first diffusion layer region to cover the pixel array region and overlaps the region outside the pixel array, and is formed below the light-shielding film. The thickness of the first insulating film in the region outside the pixel array is smaller than the total thickness of the first insulating film and the second insulating film on the first diffusion layer region. A solid-state imaging device.   2. The solid-state imaging device according to claim 1, wherein a third diffusion layer region of the first conductivity type is formed in the uppermost layer of the semiconductor substrate in the region outside the pixel array.   The solid-state imaging device according to claim 1, wherein the second insulating film in the pixel array region includes a silicon nitride film.   4. The solid-state imaging device according to claim 3, wherein the second insulating film is an ONO film having a laminated structure of silicon oxide film / silicon nitride film / silicon oxide film.   The said silicon nitride film formed on the said 1st diffused layer area | region is used as an antireflection film for improving the light condensing property, Either of Claim 3 or Claim 4 characterized by the above-mentioned. Solid-state imaging device. A solid-state imaging device in which a plurality of elements having a pixel array region and a region outside the pixel array are arranged in a matrix on a semiconductor substrate,
A first diffusion layer region of a first conductivity type, which is formed in the pixel array region of the semiconductor substrate and stores an electric charge converted from an optical signal;
A second conductivity type second diffusion layer region for isolating the first diffusion layer region;
A third diffusion layer region of the first conductivity type formed in the region outside the pixel array on the semiconductor substrate;
A first insulating film formed on the first diffusion layer region, the second diffusion layer region, and the third diffusion layer region;
An electrode formed on the second diffusion layer region via the first insulating film;
A second insulating film formed on the entire surface including the first insulating film on the first diffusion layer region, the electrode, and the region outside the pixel array;
A light-shielding film formed by opening a part on the first diffusion layer region to cover the pixel array region and overlapping the region outside the pixel array;
An interlayer insulating film formed on the second insulating film and the light shielding film;
A conductor film arbitrarily formed on the interlayer insulating film in the region outside the pixel array;
A contact formed on the interlayer insulating film by being electrically connected to the conductive film, and lowering a substrate surface under the light-shielding film in a region outside the pixel array as compared with a substrate surface in another region Thereby, the contact formed on the light shielding film in the region outside the pixel array is deeper than the contact formed in another region. A solid-state imaging device in which a plurality of elements having a pixel array region and a region outside the pixel array are arranged in a matrix on a semiconductor substrate,
A first diffusion layer region of a first conductivity type, which is formed in the pixel array region of the semiconductor substrate and stores an electric charge converted from an optical signal;
A second conductivity type second diffusion layer region for isolating the first diffusion layer region;
A third diffusion layer region of the first conductivity type formed in the region outside the pixel array on the semiconductor substrate;
A first insulating film formed on the first diffusion layer region, the second diffusion layer region, and the third diffusion layer region;
An electrode formed on the second diffusion layer region via the first insulating film;
A second insulating film formed on the first insulating film on the first diffusion layer region and on the electrode;
A light-shielding film formed by opening a part on the first diffusion layer region to cover the pixel array region and overlapping the region outside the pixel array;
An interlayer insulating film formed on the second insulating film and the light shielding film;
A conductor film arbitrarily formed on the interlayer insulating film in the region outside the pixel array;
A contact formed on the interlayer insulating film by being electrically connected to the conductive film, and lowering a substrate surface under the light-shielding film in a region outside the pixel array as compared with a substrate surface in another region Thereby, the contact formed on the light shielding film in the region outside the pixel array is deeper than the contact formed in another region. A method of manufacturing a solid-state imaging device in which elements having a pixel array region and a region outside a pixel array are arranged in a matrix on a semiconductor substrate,
A first step of forming a first conductivity type first diffusion layer region for accumulating charges in a predetermined region of the semiconductor substrate;
A second step of forming a second conductivity type second diffusion layer region for isolating the first diffusion layer region;
A third step of forming a first insulating film on the surface of the semiconductor substrate;
A fourth step of forming a desired electrode by etching the first conductive film after forming the first conductive film on the surface of the first insulating film;
A fifth step of forming a second insulating film having an etching selectivity different from that of the first insulating film so as to cover the surface of the semiconductor substrate and the electrode;
Etching the surface of the second insulating film in a desired region outside the pixel array to a predetermined depth to form a thin film region having a thickness smaller than that of the second insulating film in the pixel array region A sixth step of forming;
And a seventh step of forming a light-shielding film having a desired pattern by etching the second conductive film after forming a second conductive film on the surface of the second insulating film. Device manufacturing method. A solid-state imaging device in which elements having a pixel array region composed of a light receiving pixel portion and an OB pixel portion and a region outside the pixel array are arranged in a matrix on a semiconductor substrate,
A semiconductor substrate;
A photoelectric conversion part formed on the semiconductor substrate;
A gate insulating film that covers the photoelectric conversion portion and is formed on the semiconductor substrate;
A vertical transfer unit that transfers charges generated in the photoelectric conversion unit in a vertical direction;
A transfer gate electrode for transferring the charge of the vertical transfer unit;
A conductive light-shielding film deposited on the entire surface opening the photoelectric conversion unit of the light-receiving pixel unit;
An interlayer insulating film formed on the entire surface of the conductive light shielding film;
Metal wiring formed on the interlayer insulating film;
One or more contact holes connecting the metal wiring and the conductive light-shielding film;
A solid-state imaging device having a contact connecting the light shielding film and the semiconductor substrate.   The contact includes a first contact that connects the light shielding film and the transfer gate electrode, and a second contact that connects the transfer gate electrode and the semiconductor substrate. 9. The solid-state imaging device according to 9.   The solid-state imaging device according to claim 10, wherein the transfer gate electrode between the first contact and the second contact is cut. A solid-state imaging device in which elements having a pixel array region composed of a light receiving pixel portion and an OB pixel portion and a region outside the pixel array are arranged in a matrix on a semiconductor substrate,
A semiconductor substrate;
A photoelectric conversion part formed on the semiconductor substrate;
A gate insulating film that covers the photoelectric conversion portion and is formed on the semiconductor substrate;
A vertical transfer unit that transfers charges generated in the photoelectric conversion unit in a vertical direction;
A transfer gate electrode for transferring the charge of the vertical transfer unit;
A conductive light-shielding film deposited on the entire surface opening the photoelectric conversion unit of the light-receiving pixel unit;
An interlayer insulating film formed on the entire surface of the conductive light shielding film;
Metal wiring formed on the interlayer insulating film;
A solid-state imaging device having one or a plurality of contact holes for connecting the metal wiring and the conductive light-shielding film, wherein the contact holes are formed only in the light receiving pixel portion.   13. The solid-state imaging device according to claim 12, wherein the conductive light-shielding film that shields light from the OB pixel portion and the conductive light-shielding film that shields from the light-receiving pixel portion are formed of the same conductive light-shielding film.   The solid-state imaging device according to claim 12, wherein the conductive light-shielding film that shields light from the OB pixel portion and the conductive light-shielding film that shields the light-receiving pixel portion are formed separately. A solid-state imaging device in which elements having a pixel array region composed of a light receiving pixel portion and an OB pixel portion and a region outside the pixel array are arranged in a matrix on a semiconductor substrate,
A semiconductor substrate;
A photoelectric conversion part formed on the semiconductor substrate;
A gate insulating film that covers the photoelectric conversion portion and is formed on the semiconductor substrate;
A vertical transfer unit that transfers charges generated in the photoelectric conversion unit in a vertical direction;
A transfer gate electrode for transferring the charge of the vertical transfer unit;
A conductive light-shielding film deposited on the entire surface opening the photoelectric conversion unit of the light-receiving pixel unit;
An interlayer insulating film formed on the entire surface of the conductive light shielding film;
Metal wiring formed on the interlayer insulating film;
It has one or a plurality of contact holes for connecting the metal wiring and the conductive light shielding film, and a light receiving region for opening the conductive light shielding film is formed in the light receiving pixel portion and the OB pixel portion. Solid-state imaging device. A solid-state imaging device in which elements having a pixel array region composed of a light receiving pixel portion and an OB pixel portion and a region outside the pixel array are arranged in a matrix on a semiconductor substrate,
A semiconductor substrate;
A photoelectric conversion part formed on the semiconductor substrate;
A gate insulating film that covers the photoelectric conversion portion and is formed on the semiconductor substrate;
A vertical transfer unit that transfers charges generated in the photoelectric conversion unit in a vertical direction;
A transfer gate electrode for transferring the charge of the vertical transfer unit;
A conductive light-shielding film deposited on the entire surface opening the photoelectric conversion unit of the light-receiving pixel unit;
An interlayer insulating film formed on the entire surface of the conductive light shielding film;
Metal wiring formed on the interlayer insulating film;
A solid having one or a plurality of contact holes connecting the metal wiring and the conductive light shielding film, wherein the gate insulating film of the light receiving pixel portion is thinner than the gate insulating film of the OB pixel portion Imaging device.

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