JP2009011369A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To eliminate an increase in the data memory capacity in a control means for controlling a light emitting means while achieving a higher effect of game performance by the light emitting means. <P>SOLUTION: The factor of (maximum degree of brightness-minimum degree of brightness+1) for each of periods is calculated to be defined as switching frequency, wherein the maximum degree of brightness is the target degree of brightness and the minimum degree of brightness is the target degree of brightness during the most preceding period. When the target degree of brightness is lower than the target degree of brightness during the most preceding period, the minimum degree of brightness is switched to the target degree of brightness and instead, and the maximum degree of brightness is shifted to the target degree of brightness during the most preceding period. The factor of (time of period/switching frequency) is calculated to be defined as switching time in switching to the subsequent degree of brightness after the moment of the shift to a certain degree of brightness. The lighting time of a lamp per unit time is so gradually altered as to make the degree of brightness rise or lower for each switching time. A top frame lamp unit mounted on the game frame comprises LEDs of the top frame lamps and drive parts such as a drive motor, a gear and a shaft for driving the LEDs of the top frame lamps. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a gaming machine that allows a player to play a predetermined game using a game medium.

  As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a prize area such as a prize opening provided in the game area, a predetermined number of prize balls are paid out to the player. There is something to be done. Further, a variable display device capable of variably displaying the identification information (also referred to as “variation”) is provided on the game board, and the player when the display result of the variable display of the identification information in the variable display device becomes the specific display result. Some are configured to be controllable to a specific gaming state advantageous to the user.

  The specific game state means a state advantageous for a player who is given a predetermined game value. Specifically, the specific game state is, for example, a state in which a special variable winning device is advantageous for a player who is likely to win a ball (a big hit game state), or a state in which a right to be advantageous for a player has occurred. In this state, a predetermined game value such as a state where conditions for paying out premium game media are easily established is given.

  In such a gaming machine, the fact that the display result of the variable display device that displays the symbol as the identification information becomes a combination of specific display modes (specific display result) determined in advance is generally referred to as “big hit”. When a big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the game shifts to a big hit gaming state in which a hit ball is easy to win. And in each open period, if there is a prize for a predetermined number (for example, 10) of the big prize opening, the big prize opening is closed. And the number of times of opening the special winning opening is fixed to a predetermined number (for example, 15 rounds). An opening time (for example, 29.5 seconds) is determined for each opening, and even if the number of winnings does not reach a predetermined number, the big winning opening is closed when the opening time elapses. Further, when a predetermined condition (for example, winning in the V zone provided in the big prize opening) is not established at the time when the big prize opening is closed, the big hit gaming state is ended. Some are also available.

  In addition, the gaming machine is provided with light emitters such as a large number of lamps and LEDs. Among these light emitters, the gaming state at that time (for example, reach state, big hit game state, big hit occurs). To the player (high probability state that the probability of being improved) is notified to the player, the result of variable display of identification information (symbol variation result) and reach state There is a illuminant for notice. By making these light emitters emit light or blinking, it is possible to realize a game effect of informing a game state or giving a notice.

  However, there is a problem that the game effect by causing the light emitter to emit light or blinking is monotonous and easily bored by the player. In other words, it is monotonous to notify the change of the gaming state by changing the light emitter from the unlit state to the lit state, and even if it is changed from the unlit state to the blinking state, it will perform an effective game effect. It ’s hard to say.

  Therefore, it is provided with brightness change control means for performing brightness change control for changing the brightness of the light emitter in a plurality of stages by changing the on period and the off period of the drive signal output to the light emitter, and the brightness change control means includes a plurality of brightness change control means. Proposed gaming machines configured to perform brightness change control with reference to a drive signal pattern table in which data corresponding to the ON period or OFF period of the drive signal output corresponding to the brightness of each stage is stored (For example, refer to Patent Document 1).

JP 2003-825 A (paragraphs 0200-0208, FIG. 37)

  The gaming machine is provided with a large number of light emitters. When it is configured to perform brightness change control with reference to a drive signal pattern table in which data corresponding to the ON period or OFF period of the drive signal output corresponding to the brightness of each of the plurality of stages is stored Increases the size of the drive signal pattern table. In general, each data in the drive signal pattern table is stored in a ROM. Then, as the size of the drive signal pattern table increases, the required ROM capacity increases. In order to make the production more effective, it is preferable to increase the number of lightness levels or the number of types of lightness change patterns, but when increasing the number of lightness levels or the number of types of lightness change patterns, Furthermore, the required ROM capacity increases.

  Therefore, an object of the present invention is to provide a gaming machine that can enhance the effect of the game effect by the light emitting means and can prevent the data storage capacity in the control means for controlling the light emitting means from being increased. To do.

  A gaming machine according to the present invention is a gaming machine in which a player can perform a predetermined game using a game medium (for example, a game ball), and is installed in a game frame that can be opened and closed with respect to an outer frame. Electric parts for production (for example, LEDs 281a to 281c, 282a to 282f, 283a to 283f, 82a to 82d, 83 of lamps) are provided, and light emitting means (LEDs 281a to 281c as ceiling lamps) that emit light according to a drive signal. LEDs 282a to 282f as left frame lamps, LEDs 283a to 283f as right frame lamps, LEDs 126a to 126f as stage lamps, LEDs 127a, 127b, and 127c), and light emitting means by outputting a drive signal to the light emitting means Emission control means (for example, a production control microcomputer 100, and Serial-parallel conversion ICs 610, 613-615, 617-619, etc.), and the electrical components provided in the game frame are light-emitting components as light-emitting means (for example, LEDs 281a-281c of the top frame lamp) and light-emitting components Drive parts (for example, a lamp vertical drive motor 90, lamp right and left drive motors 91a and 91b, a lamp rotation drive motor 92, a shaft 93, gears 95 and 98, and a drive part 96). The brightness change control means (for example, the production control microcomputer 100 for controlling the brightness level of the light emitting means by controlling the length of the ON period (see FIG. 53) of the drive signal output in a predetermined unit time (for example, 15 ms). In steps S861 to S865, the switching time / switching number calculation process and step S9 1 to S996 (parts for executing the lightness control process (especially the process of step S984)), and the lightness change control means is a lightness level when starting control to change the lightness of the light emitting means (for example, shown in FIG. 54) A value (specifically, a value of the immediately preceding period) indicated as data of the periods (1) to (11)) and a predetermined time (for example, each time of the periods (1) to (11) shown in FIG. ) Based on the target brightness level after elapse (for example, the values shown as data in the periods (1) to (11) shown in FIG. 54), the brightness level for each predetermined unit time in the predetermined time is calculated. Lightness level calculation means to be determined (for example, the part for executing the switching time / switching number calculation process of steps S861 to S865 in the production control microcomputer 100) and the lightness level calculation operator Lightness change execution means for controlling the length of the ON period of the drive signal output in accordance with each lightness level obtained by the calculation by the stage (for example, the part for executing the processing of step S984 in the production control microcomputer 100). It is characterized by including.

  Another aspect of the gaming machine according to the present invention is a gaming machine in which a player can play a predetermined game using a game medium (for example, a game ball), and is installed to be openable and closable with respect to an outer frame. The game frame is provided with electric parts for production (for example, LED lamps 281a to 281c, 282a to 282f, 283a to 283f, 82a to 82d, 83) and emits light in accordance with the drive signal (as a ceiling frame lamp) LED 281a to 281c, LEDs 282a to 282f as left frame lamps, LEDs 283a to 283f as right frame lamps, LEDs 126a to 126f as stage lamps, LEDs 127a, 127b, and 127c), and a driving signal is output to the light emitting means. The light emission control means for controlling the light emission means by this (for example, the production control microcomputer 1 0, and serial-parallel conversion ICs 610, 613 to 615, 617 to 619, etc.), and the electric parts provided in the game frame are light emitting parts as light emitting means (for example, LEDs 281a to 281c of the top frame lamp). Drive members (for example, nine mirror drive motors including mirror drive motors 86a, 86b, 86c) for moving change members (for example, optical mirrors 85a to 85i) that change the irradiation direction of light emitted from the light emitting component The light emission control means controls the lightness change control means for controlling the lightness level of the light emission means by controlling the length of the ON period (see FIG. 53) of the drive signal output in a predetermined unit time (for example, 15 ms). For example, in the production control microcomputer 100, the switching time / number of times of switching in steps S861 to S865 is calculated. And the brightness change control means of steps S981 to S996 (particularly the part that executes the process of step S984), and the brightness change control means starts the brightness level when starting the control to change the brightness of the light emitting means (for example, FIG. 54 (specifically the value of the immediately preceding period)) and a predetermined time (for example, the periods (1) to (11) shown in FIG. 54) Based on the target lightness level after the elapse of each time (for example, values shown as data of the periods (1) to (11) shown in FIG. 54), the lightness level for each predetermined unit time in the predetermined time. Brightness level calculating means (for example, a part for executing the switching time / switching number calculation process of steps S861 to S865 in the microcomputer 100 for effect control) ) And brightness change execution means for controlling the length of the ON period of the drive signal output according to each brightness level obtained by the brightness level calculation means (for example, in the production control microcomputer 100, the process of step S984 is performed). A portion to be executed).

  The brightness change control means is a non-calculated brightness level determination means (for example, the processing of steps S861 and S865 in the production control microcomputer 100) that determines the brightness level for each predetermined unit time in the predetermined time as the target brightness level without performing calculation. In the case where information of “constant brightness” is stored in the RAM, a value corresponding to the constant brightness (set in the lamp control table) in the process of step S984 (see FIG. 66). Control for setting a drive signal to the LED according to the value) is performed.

  A gaming machine includes a game frame (for example, a game frame 11) installed to be openable and closable with respect to an outer frame, a predetermined plate-like body, and various components attached to the plate-like body. A game machine having a board (for example, game board 6), and a light emitting means (for example, LED LEDs 281a to 281c, 282a to 282f, 283a to 283f, 82a to 82d, 83, 125a to 125f, 126a to 126f, LEDs 127a, 127b, and 127c), a game control means for executing a game control process for controlling the progress of the game (for example, a microcomputer 560 for game control), and a game control means for transmission Effect control means (for example, the effect control microcomputer 100) for controlling the light emission means based on the received command. The change control means is included in the effect control means, and the effect control means outputs a control signal for controlling the light emitting means in a serial signal system based on a command (for example, an effect control command) transmitted by the game control means. A signal output means (for example, the part that executes step S708 in the production control microcomputer 100), converts the control signal output by the signal output means into a parallel signal system, and the light emission means provided on the game board. A board-side serial-parallel conversion circuit (for example, serial-parallel conversion ICs 616 to 619) for outputting, and a frame for converting the control signal output by the signal output means into a parallel signal system and outputting it to the light emitting means provided in the game frame Side serial-parallel conversion circuit (for example, serial-parallel conversion ICs 610 to 615), and the board side The real-parallel conversion circuit and the frame side serial-parallel conversion circuit are connected via a single line (for example, connected via a single line by connecting the relay boards 606 and 607 in a bus type). The serial-parallel conversion ICs 610 to 619 are connected in one system by being connected in a bus form or a daisy chain type, and different address information is assigned in advance (for example, in FIGS. 18 and 19). (Addresses “00” to “09” are assigned), and only the control signal to which the address information is added is converted into a parallel signal system and output (for example, the header / address detection unit 653 sends it to the address storage unit 654). If it is determined that it matches the stored address, an input capture signal is output to the data buffer 655 and latched. The signal output means, when outputting a control signal for controlling the light emitting means provided on the game board, outputs a control signal to which the address information that can identify the board-side serial-parallel conversion circuit is added to the serial signal system. (For example, the production control microcomputer 100 transmits the serial data to which any of the addresses “06” to “09” shown in FIG. 19 is added using the serial output circuit 353 in the process of step S953. When a control signal for controlling the light emitting means provided in the game frame is output, a control signal to which address information that can identify the frame side serial-parallel conversion circuit is added is output in a serial signal system (for example, In step S953, the production control microcomputer 100 sets addresses “00” to “05” shown in FIG. The serial data or shift is added is configured transmit) as using the serial output circuit 353.

  A gaming machine includes a game frame (for example, a game frame 11) installed to be openable and closable with respect to an outer frame, a predetermined plate-like body, and various components attached to the plate-like body. A game machine having a board (for example, game board 6), wherein a game frame and a game board are provided with light emitting means, and a game control means (for example, game control) for executing a game control process for controlling the progress of the game. Microcomputer 560) and effect control means (for example, an effect control microcomputer) for controlling the light emission means based on the command transmitted by the game control means, and the brightness change control means is included in the effect control means. The effect control means is a signal that outputs a control signal for controlling the light emitting means in a serial signal system based on a command (eg, an effect control command) transmitted by the game control means. Including the output means (for example, the part for executing step S708 in the production control microcomputer 100), the control signal output by the signal output means is converted into a parallel signal system and output to the light emitting means provided on the game board. A board side serial-parallel conversion circuit (for example, serial-parallel conversion ICs 616 to 619) and a frame side serial that converts the control signal output from the signal output means into a parallel signal system and outputs it to the light emitting means provided in the game frame. A parallel conversion circuit (for example, serial-parallel conversion ICs 610 to 615), and at least a part of the panel side serial-parallel conversion circuit or the frame side serial-parallel conversion circuit is connected in series (for example, as shown in FIG. 102) As shown, the serial-parallel conversion ICs 610 to 612 are connected in series with the same system wiring. The serial-parallel conversion ICs 613 and 614 are connected in series with the same system wiring, and the serial-parallel conversion ICs 616 to 619 are connected in series with the same system wiring). , Fixed-length data including control signal information for all the board-side serial-parallel conversion circuits or frame-side serial-parallel conversion circuits connected in series is unit data (for example, 1 bit) at a predetermined cycle (for example, clock) (For example, the production control microcomputer 100 outputs a control signal sequence including a lamp control signal using the serial output circuit 375 in step S972A) and serial connection is performed. The board side serial-parallel conversion circuit or frame side serial-parallel conversion circuit The unit data output every predetermined cycle is sequentially transferred as it is to the board side serial-parallel conversion circuit or the frame side serial-parallel conversion circuit connected to the frame side (for example, as shown in FIG. -In the parallel conversion ICs 610 to 612, 613 to 614 and 616 to 619, the last bit of the shift register 682 is directly input to the lower data latch unit 681), and a control signal is output based on the unit data at a predetermined timing. (For example, as shown in FIG. 102, in each of the serial-parallel conversion ICs 610 to 612, 613 to 614, and 616 to 619, the data buffer 683 receives the latch signal from the effect control microcomputer 100, The data stored in the shift register 682 Pitch and outputs) is configured as.

  The gaming machine has a relay board (for example, relay boards 606 and 607) between the board side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit, or between the frame side serial-parallel conversion circuit and the effect control means. Is provided with a relay board (for example, a relay board 607).

  The gaming machine includes an assembly board (for example, a board-side IC board 601 on which a plurality of serial-parallel conversion ICs 616 to 619 are mounted, a plurality of serial-side boards). The frame side IC substrate 602) on which the parallel conversion ICs 610 to 612 are mounted is provided.

  According to the first aspect of the present invention, the lightness change control means starts the control for changing the lightness of the light emitting means and the predetermined unit time in the predetermined time based on the lightness level when the lightness change means starts and the target lightness level after the predetermined time elapses. Since it includes a lightness level calculation means for determining each lightness level by calculation, and a lightness change execution means for controlling the length of the ON period of the drive signal output in accordance with each lightness level obtained by the lightness level calculation means. Even if the brightness level is increased or the types of brightness change patterns are increased, the data storage capacity in the control means for controlling the light emitting means can be prevented from increasing. Further, it is easy to divert the lightness change control means to other models having different lightness level numbers and lightness change pattern types. In addition, since the electric component provided in the game frame is configured to include a light-emitting component as a light-emitting means and a drive component for moving the light-emitting component, movable light-emitting provided in the game frame By performing an effect using parts, the gameability can be further improved.

  According to the second aspect of the present invention, the lightness change control means starts the control for changing the lightness of the light-emitting means and the predetermined unit time in the predetermined time based on the lightness level when the lightness change means starts and the target lightness level after the predetermined time has elapsed. Since it includes a lightness level calculation means for determining each lightness level by calculation, and a lightness change execution means for controlling the length of the ON period of the drive signal output in accordance with each lightness level obtained by the lightness level calculation means. Even if the brightness level is increased or the types of brightness change patterns are increased, the data storage capacity in the control means for controlling the light emitting means can be prevented from increasing. Further, it is easy to divert the lightness change control means to other models having different lightness level numbers and lightness change pattern types. Further, the electric component provided in the game frame is configured to include a light emitting component as a light emitting means and a driving member for moving a changing member that changes the irradiation direction of light emitted by the light emitting component. Therefore, by performing an effect using the movable light-emitting component provided in the game frame, the game performance can be further improved.

  In the invention described in claim 3, since the brightness change control means includes non-calculated brightness level determination means for determining the brightness level for each predetermined unit time in the predetermined time as the target brightness level without calculation, variations in brightness change are provided. When increasing, there is an effect that the control burden of the brightness change control means does not increase.

  According to a fourth aspect of the present invention, when the signal output means outputs a control signal for controlling the light emitting means provided in the game board, the control is added with address information that can identify the board-side serial-parallel conversion circuit. When a signal is output in the serial signal system and a control signal for controlling the light emitting means provided in the game frame is output, the control signal to which address information that can specify the frame side serial-parallel conversion circuit is added is a serial signal. Since it is configured to output in a system, the number of wires between the game board and the game frame can be reduced. Therefore, in the gaming machine in which the game frame and the game board are detachable, it is possible to easily attach and detach the game frame and the game board.

  In the fifth aspect of the present invention, the signal output means outputs unit data of fixed length data including control signal information for all of the panel side serial-parallel conversion circuits or the frame side serial-parallel conversion circuits connected in series. Since it is configured to output in a serial signal system at predetermined intervals, it is possible to eliminate the need to assign different address information to the panel side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit in advance. The format of the signal output by the signal output means can be simplified.

  In the invention described in claim 6, a relay board is provided between the board side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit, or a relay board is provided between the frame side serial-parallel conversion circuit and the effect control means. Therefore, even when a plurality of light emitting means are provided on the frame side, the attachment / detachment work between the game frame and the game board can be easily performed only by performing the connection work or the removal work to the relay board.

  According to the seventh aspect of the present invention, since a collective board on which a plurality of frame side serial-parallel conversion circuits or board side serial-parallel conversion circuits are mounted is provided, the number of components such as circuits and boards in the gaming machine is reduced. be able to.

Embodiment 1 FIG.
Hereinafter, a first embodiment of the present invention will be described with reference to the drawings.
First, the overall configuration of a pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of a pachinko gaming machine as viewed from the front. FIG. 2 is a front view showing the front of the game frame 11. FIG. 3 is a front view showing the front of the game board. In the following embodiments, a pachinko gaming machine will be described as an example. However, the gaming machine according to the present invention is not limited to a pachinko gaming machine, and can be applied to other gaming machines such as a slot machine. FIG. 2 also shows an enlarged view of the hitting ball supply tray (upper plate) 3 portion of the front surface of the game frame 11.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape, and a game frame 11 attached to the inside of the outer frame so as to be opened and closed. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided on the game frame 11 so as to be opened and closed. The game frame 11 includes a front frame 12 that is openable and closable with respect to the outer frame, a mechanism plate to which mechanism parts and the like are attached, and various parts (except game boards described later) attached to them. It is a structure.

  As shown in FIGS. 1 to 3, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2, there is a hitting ball supply tray (upper plate) 3. Under the hitting ball supply tray 3, an extra ball receiving tray 4 for storing game balls that cannot be accommodated in the hit ball supply tray 3 and a hitting operation handle (operation knob) 5 for launching the game balls are provided. As shown in FIG. 3, there is a plastic frame (plastic frame) constituting a part of the game frame 11 on the back surface of the glass door frame 2. The plastic frame includes a mechanism plate, and components such as a power supply circuit (not shown) and a speaker 27 are attached to the mechanism plate. In addition, the plastic frame of the game frame 11 is provided with a relay board 607 that relays the wiring between the game frame 11 and the game board 6. Moreover, as shown in FIG. 3, the game board 6 is attached to the front frame of the game frame 11 so that attachment or detachment is possible. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. A game area 7 is formed on the front surface of the game board 6.

  In the vicinity of the center of the game area 7, there is provided an effect display device (image display device) 9 including a plurality of variable display portions each variably displaying a decorative pattern for effect. The effect display device 9 has, for example, three variable display portions (symbol display areas) of “left”, “middle”, and “right”. The effect display device 9 performs variable display of decorative symbols as decorative (effect) symbols during the variable symbol variable display period of the special symbol indicator 8. The effect display device 9 for variably displaying decorative symbols is controlled by an effect control microcomputer mounted on the effect control board.

  Below the effect display device 9, a special symbol display (special symbol display device) 8 for variably displaying a special symbol as identification information is provided. In this embodiment, the special symbol display 8 is realized by a simple and small display (for example, 7 segment LED) capable of variably displaying a number of, for example, 00 to 99. The special symbol display 8 is not limited to displaying a two-digit number, and may be configured to variably display a number of other digits such as 0 to 9. In addition, the effect display device 9 performs variable display of a decorative symbol as a symbol for decoration (for effect) during the variable symbol variable display period by the special symbol indicator 8.

  On the right side of the special symbol display 8 is a special symbol hold composed of four indicators for displaying the number of effective winning balls that have entered the start winning openings 13, 14, that is, the number of reserved memories (also referred to as start memory or start prize memory). A storage indicator 18 is provided. Every time there is an effective start prize, the display color of one display is changed. Each time the variable display on the special symbol display 8 is started, the display color of one display is restored. In addition, in the display area of the effect display device 9, a special symbol reserved storage display area including four display areas for displaying the number of reserved memories may be provided. In this embodiment, the upper limit value of the number of reserved memories is 4, but the upper limit value may be larger. Further, the upper limit value may be changed according to the gaming state.

  A first start winning opening 13 is provided below the effect display device 9. A game ball won in the first start winning opening 13 is guided to the back of the game board 6 and detected by the first start opening switch 13a. In addition, on the left side of the effect display device 9, a variable winning device 15 that forms a second start winning port 14 is provided. The winning ball that has entered the second starting winning port 14 is guided to the back of the game board 6 and detected by the starting port switch 14a. The variable winning ball device 15 is opened by a solenoid 16.

  On the right side of the effect display device 9, a truck 151 as a movable member used for game effects is provided. In the game effect, the truck 151 can produce an effect of jumping out from the right side of the effect display device 9 to the left side as shown in FIG. 4 according to the control of the effect control means.

  Further, a beam 152 as a movable member used for the game effect is provided on the upper and right sides of the effect display device 9. As shown in FIG. 5, the beam 152 can perform an effect that collapses from the upper part and the right side of the effect display device 9 according to the control of the effect control means in the game effect.

  Furthermore, a skeleton 153 as a movable member used for the game effect is provided at the lower part of the effect display device 9. In the game effect, the skeleton 153 can perform an effect such that the mouth part opens and closes as shown in FIG. 6 according to the control of the effect control means. Further, the skeleton 153 includes a special variable winning ball apparatus 20 and forms a big winning opening. In this embodiment, in the skeleton 153, in the specific gaming state (big hit state), the special variable winning ball apparatus 20 is controlled to be opened by the solenoid 21, so that the big winning opening serving as the winning area is opened. The winning ball that has won the big winning opening is detected by the count switch 23.

  The pachinko gaming machine 1 also includes operation buttons 81a to 81e that can be operated by the player while the game is in progress. For example, when the operation buttons 81a to 81e are operated (pressed), the trolley 151, the beam 152, and the skeleton 153 as movable members are operated.

  When the game ball passes through the gate 32 and is detected by the gate switch 32a, the variable display of the normal symbol display 10 is started. In this embodiment, variable display is performed by alternately lighting the left and right lamps (a symbol can be visually recognized when the lamp is lit). For example, if the right lamp is lit when the variable display ends, it is a hit. And when the stop symbol in the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball apparatus 15 is opened for a predetermined number of times. Below the normal symbol display 10 is provided a normal symbol start memory display 41 having a display unit with four LEDs for displaying the number of winning balls that have entered the gate 32. Each time there is a prize at the gate 32, the normal symbol start memory display 41 increases the number of LEDs to be turned on by one. Then, every time variable display on the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one.

  The game board 6 is provided with a plurality of winning ports (ordinary winning ports) 29, 30, 33, 39, and winning of game balls to the winning ports 29, 30, 33, 39 is a winning port switch 29a, 30a, respectively. , 33a, 39a. Each winning opening 29, 30, 33, 39 constitutes a winning area provided in the game board 6 as an area for accepting game media and allowing winning. The start winning ports 13 and 14 and the big winning port also constitute a winning area that accepts game media and allows winning. In addition, the game balls won in the respective winning openings 29, 30, 33, 39 may be detected by one switch.

  A decoration member 154 is attached to the center of the game area 7 so as to surround the effect display device 9, and a decoration lamp (center decoration lamp) that is lit up or flashed during the game is placed above the decoration member 154. ) Is provided. In this embodiment, six LEDs 125a to 125f are provided as center decoration lamps. In addition, the decoration member 154 is provided with a decoration lamp (stage lamp) that is lit or flashed during the game so as to surround the effect display device 9. In this embodiment, six LEDs 126a to 126f are provided as stage lamps.

  Further, at the lower part of the game area 7, there is an out port 26 for absorbing game balls that have not won a prize. Two speakers 27 that emit sound effects are provided on the left and right upper portions outside the game area 7. A top frame lamp, a left frame lamp, and a right frame lamp are provided on the outer periphery of the game area 7. Further, a decoration LED is installed around each structure in the game area 7. The top frame lamp, the left frame lamp, the right frame lamp, and the decoration LED are examples of a decorative light emitter provided in the gaming machine. In this embodiment, three LEDs 281a to 281c are provided as the ceiling lamps. In addition, six LEDs 282a to 282f are provided as left frame lamps. In addition, six LEDs 283a to 283f are provided as right frame lamps. Further, as a decorative LED around the structure, one LED 127a is provided for the skeleton 153, two LEDs 127b and 127c are provided for the special variable winning ball apparatus 20, and one LED 83 is provided for the operation buttons 81a to 81e. 3 includes four LEDs 82a to 82d. In this embodiment, the decorative “lamp” is constituted by a decorative “LED”, but a light emitter (light emitting means) other than the LED may be used as each lamp. Good.

  In this embodiment, each LED 281a to 281c of the top frame lamp is configured to be able to be driven in the vertical direction and the horizontal direction. Further, each LED 281a to 281c of the ceiling lamp is configured to be driven to rotate clockwise or counterclockwise in the central direction of the emitted light. The top frame lamp is configured as a unit with a driving component and a driving motor (stepping motor) for driving the LEDs 281a to 281c, and as shown in FIG. It is attached to the top of the. Hereinafter, a component obtained by unitizing the LEDs 281a to 281c of the ceiling frame lamp, the driving component, and the driving motor will be referred to as a ceiling frame lamp unit 281A. In addition, the part located in the part to which the top frame lamp unit 281A is attached in the state which closed the glass door frame 2 among the glass door frames 2 is comprised with the member made from a transparent synthetic resin. Therefore, as shown in FIG. 1, in a state where the glass door frame 2 is closed, the player visually recognizes the LEDs 281 a to 281 c of the top frame lamp attached to the front frame 12 side through the glass door frame 2. be able to.

  Further, the LEDs 282a to 282f of the left frame lamp and the LEDs 283a to 283f of the right frame lamp are attached to the back side of the glass door frame 2 in a state of being mounted on the substrate. In the state in which the glass door frame 2 is closed, a portion of the glass door frame 2 that is located at a portion where the left frame lamp or the right frame lamp is attached is made of a synthetic resin processed into a slit (transparent or semi-finished). It may be transparent). Therefore, as shown in FIG. 1, with the glass door frame 2 closed, the player can recognize that the left frame lamp and the right frame lamp emit light, but the LEDs 282a to 282f, 283a. ˜283f itself cannot be visually recognized.

  The game balls launched from the hit ball launching device enter the game area 7 through the hit ball rail, and then descend the game area 7. When a game ball enters the first start winning opening 13 and is detected by the first start opening switch 13a, or when a game ball enters the second start winning opening 14 and is detected by the second start winning opening switch 14a, If the variable display can be started, the special symbol on the special symbol display unit 8 starts variable display (variation), and the effect display unit 9 starts variable display (variation). If it is not in a state where the variable display of symbols can be started, the start winning memory number is increased by one.

  The variable display of the special symbol on the special symbol display 8 and the variable display of the decorative symbol on the effect display device 9 are stopped when a certain time has elapsed. If the special symbol (stop symbol) at the time of stoppage is a jackpot symbol (specific display result), the game shifts to a jackpot gaming state. That is, the special winning opening is opened until a predetermined time elapses or a predetermined number (for example, 10) of game balls wins.

  When the game ball passes through the gate 32, the normal symbol display unit 10 is in a state where the normal symbol is variably displayed. Further, when the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the probability variation state, the probability that the stop symbol on the normal symbol display 10 becomes a winning symbol is increased, and the opening time and the number of times of opening of the variable winning ball device 15 are increased. Further, in the short time state (the game state in which the variable symbol variable display time is shortened), the opening time and the number of opening times of the variable winning ball device 15 may be increased.

  As described above, the pachinko gaming machine 1 of this embodiment is provided with lamps and LEDs as light emitters in various places. Further, a prepaid card unit (hereinafter also simply referred to as a “card unit”) that enables lending a ball by inserting a prepaid card is installed adjacent to the pachinko gaming machine 1 (not shown).

  FIG. 7 is an explanatory diagram showing a state in which the game frame 11 is opened. As shown in FIG. 7, three substrates 603 to 605 for mounting an IC or the like are attached to the back surface of the crow door frame 2 side. Further, one substrate 602 (not shown in FIG. 7) for mounting an IC or the like is also attached to the back surface of the top frame lamp unit 281A attached to the front frame 12 of the game frame 11. Hereinafter, the substrates 602 to 605 mounted on the glass door frame 2 and the top frame lamp unit 281A are referred to as frame-side IC substrates.

  A frame-side IC substrate 602 attached to the back surface of the top frame lamp unit 281A is equipped with serial-parallel conversion ICs 610 to 612 for converting serial data into parallel data. From the serial-parallel conversion IC 610, each LED 281a of the top frame lamp is installed. A control signal is supplied to ˜281c. Further, a control signal is supplied from the serial-parallel conversion IC 611 to the lamp vertical drive motor 90 for driving the drive components that drive the LEDs 281a to 281c of the ceiling lamp in the vertical direction as a unit. Further, from the serial-parallel conversion IC 612, lamp left / right drive motors 91a and 91b for driving the LEDs 281a to 281c of the top frame lamp in the horizontal direction, and lamp rotation for rotationally driving the LEDs 281a to 281c of the top frame lamp. A control signal is supplied to the drive motor 92.

  Further, the frame side IC substrate 603 attached to the right side (left side as viewed from the back side) of the glass door frame 2 is mounted with a serial-parallel conversion IC 613, and each LED 283 a to 283 f of the right frame lamp is mounted from the serial-parallel conversion IC 613. Is supplied with a control signal. A frame-side IC substrate 604 mounted on the left side (right side when viewed from the back side) of the glass door frame 2 is mounted with a serial-parallel conversion IC 614, and the LEDs 282a to 282f of the left frame lamps are mounted from the serial-parallel conversion IC 614. Is supplied with a control signal.

  The frame side IC substrate 605 attached to the lower part of the glass door frame 2 is equipped with a serial-parallel conversion IC 615 and an input IC 620 for converting parallel data into serial data. The control signals are supplied to the LEDs (operation button lamps) 83 provided at .about.81e and the LEDs 82a to 82d of the dish lamps provided on the hitting ball supply tray (upper plate) 3. In addition, detection signals from the operation buttons 81a to 81e are input to the input IC 620 in parallel. In addition, the figure which looked at the frame side IC board | substrate 605 from the side is also shown by FIG.

  As shown in FIG. 7, in this embodiment, the frame side IC substrate 602 attached to the back surface of the top frame lamp unit 281A among the frame side IC substrates 602 to 605 has three serial-parallel conversion ICs. Is configured as a collective substrate (see FIGS. 8, 11, and 12 described later). With such a configuration, it is possible to consolidate boards on which serial-parallel conversion ICs are mounted, and it is possible to reduce the number of parts in the gaming machine.

  Also, as shown in FIG. 7, a relay board 607 is attached to the game frame 11 side, wiring from the relay board 607 is connected to the frame side IC board 604, and further from the frame side IC board 604 to the frame side IC board. 603 is connected. Further, the wiring from the relay substrate 607 is connected to the frame side IC substrate 602. Further, the wiring from the relay substrate 607 is connected to the frame side IC substrate 605. Further, as shown in FIG. 7, the wiring between the frame side IC substrates 603 and 604 and the wiring between the frame side IC substrates 604 and 605 and the relay substrate 607 are connected to the connectors 156a to 156c, 156f to It is connected using 156h. FIG. 7 shows the case where the wiring connection is performed using a connector of a type that is connected to the board in the vertical direction. You may make it perform.

  As shown in FIG. 7, the wiring from the connector 156 a of the relay board 607 is connected to the connector 156 b of the frame side IC board 604. The wiring pattern of the frame side IC substrate 604 is further branched from the connector 156b, one is connected to the serial-parallel conversion IC 614, and the other is connected to the connector 156c. Further, in the frame side IC substrate 604, the connector 156 c is disposed at the end on the upper side of the glass door frame 2. As shown in FIG. 7, the wiring from the connector 156c of the frame side IC substrate 604 reaches the right side (left side as viewed from the back side) of the glass door frame 2 through the upper part of the glass door frame 2, and the frame side IC substrate 603 To the connector 156f. The wiring pattern of the frame side IC substrate 603 is connected to the serial-parallel conversion IC 613.

  Further, the wiring from the connector 156g of the relay board 607 is connected to the connector 156h of the frame side IC board 605. The wiring pattern of the frame side IC substrate 605 is further branched from the connector 156h, one is connected to the serial-parallel conversion IC 615, and the other is connected to the input IC 620.

  Further, as shown in FIG. 7, a door opening sensor 155 for detecting opening of the game frame 11 is attached.

  FIG. 8 is an explanatory view showing the back of the game frame 11 and the game board 6. As shown in FIG. 8, a base (board side IC substrate) 601 for mounting an IC or the like is attached to the back surface of the game board 6. The board side IC substrate 601 is equipped with four serial-parallel conversion ICs 616 to 619 for converting serial data into parallel data, and motors 151 a for driving the movable members 151 to 153 from the serial-parallel conversion IC 616. Control signals are supplied to 152a and 153a. Further, a control signal is supplied from the serial-parallel conversion IC 617 to the LEDs 125a to 125f of the center decoration lamp. Further, a control signal is supplied from the serial-parallel conversion IC 618 to each LED 126a to 126f of the stage lamp. In addition, a control signal is supplied from the serial-parallel conversion IC 619 to the skeleton 153 that is a movable member and the LEDs 127 a to 127 b of each lamp provided in the special variable winning ball apparatus 20.

  As shown in FIG. 8, in this embodiment, the board side IC substrate 601 is configured as a collective substrate on which four serial-parallel conversion ICs are mounted. With such a configuration, it is possible to consolidate boards on which serial-parallel conversion ICs are mounted, and it is possible to reduce the number of parts in the gaming machine.

  The board-side IC board 601 is equipped with an input IC 621 for converting parallel data into serial data, and detection signals from the position sensors 151b, 152b, and 153b for detecting the positions of the movable members 151 to 153 are input ICs 621. Are input in parallel.

  Also, as shown in FIG. 8, a relay board 606 is attached to the game board 6 side, and a relay board 607 is provided on the game frame 11 side. The wiring from the effect control means is first connected to the relay board 606 and further connected to the relay board 607. The wiring from the relay board 606 is connected to the board side IC board 601. Further, the wiring from the relay substrate 607 is connected to the frame side IC substrate 602. Specifically, the wiring from the relay board 607 is guided to the upper part of the game frame 11 and connected to the connector 157 g of the relay board 608 provided on the upper part of the game frame 11. Further, the wiring from the connector 157g on the rear surface side of the front frame 12 of the game frame 11 is provided on the relay board 608 so as to penetrate the front frame 12 and protrude to the front surface side (FIGS. 11, FIG. 12). Then, by connecting the connector 157 of the relay board 608 and the connector 158 (see FIGS. 11 and 12 described later) provided on the frame side IC board 602 on the back surface of the top frame lamp unit 281A, the frame side IC board 602 is connected. Led.

  Also, the wiring between the board side IC substrate 601 and the relay substrate 606, the wiring between the frame side IC substrate 602 and the relay substrate 607, the wiring between the relay substrates 606, 607, and 608, the relay substrate 606 and the effect control. As shown in FIG. 8, the wiring between the means is connected to each substrate using connectors 157 a to 157 g. The connection method of the connectors 157a to 157g is the same as the connection method of the connectors 156a to 156c and 156f to 156h shown in FIG.

  Further, a relay board is provided to relay the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC boards 602 to 605 and the serial-parallel conversion ICs 616 to 619 mounted on the panel side IC board 601. Also good. In this case, the relay board may be arranged on either the game frame 11 side or the game board 6 side.

  Moreover, you may make it provide the relay board | substrate which relays between the production control board 80 and the serial-parallel conversion IC610-615 mounted in each frame side IC board | substrate 602-605. In this case, the relay board may be arranged on either the game frame 11 side or the game board 6 side.

  An opening is formed in the upper plate of the plastic frame above the hole for paying out the game ball, and a relay board 607 is provided in the opening. The relay board 607 is a board that relays through the front and back connectors. The connectors 157a and 157f are arranged on the front side of the plastic frame, and the connectors 156a and 156g are arranged on the back side. The relay board 607 is disposed at the end of the opening to which the game board 6 is attached. As shown in FIG. 7, the relay board 607 is formed in a shape that follows the shape of the end of the opening to which the game board 6 is attached. Note that the relay board 607 is shifted so that the connectors 157a and 157f arranged on the front side and the connectors 156a and 156g arranged on the back side do not overlap.

  A relay board 606 is provided on the back side of the game board 6. As shown in FIG. 8, the relay board 606 is provided at the end of the game board 6 so as to be positioned in the vicinity of the relay board 607 of the plastic frame. The relay board 606 is a board that relays via a connector, and connectors 157b to 157d are arranged. The connector 157b is connected to the production control microcomputer 100 mounted on the game board 6.

  Next, the configuration of the back surface of the game board 6 will be described. FIG. 9 is a rear view of the game board as seen from the back side. As shown in FIG. 9, an information terminal board 34 is provided on the upper right side of the back surface of the game board 6. The information terminal board 34 may be installed at an arbitrary position. For example, the information terminal board 34 may be installed using an attachment member in front of the effect control board box 2000 when viewed from the back side of the game board 6. In addition, a main board box 1000 that houses the main board 31 is provided at the lower part of the back surface of the game board 6, and an effect control board box 2000 that houses the effect control board 80 is provided at the center of the back surface of the game board 6. Is provided. Further, a relay board 77 is provided in the back of the effect control board box 2000 on the back surface of the game board 6 (in the back of the effect control board box 2000 when the game board 6 is viewed from the back side).

  Further, a dip switch 200 for switching the left and right driving directions of the LEDs 281a to 281c of the top frame lamp is provided on the left side of the back surface of the game board 6.

  Next, the ceiling frame lamp will be described. First, the light emission mode of the ceiling lamp will be described. FIG. 10 is an explanatory diagram showing a light emission mode of the ceiling lamp. Among these, FIG. 10A shows a state in which each of the LEDs 281a to 281c of the top frame lamp irradiates light in the front direction with respect to the gaming machine (hereinafter referred to as a forward light emitting state). FIG. 10B shows a state in which the center direction of the emitted light rotates clockwise or counterclockwise by driving the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92. A state in which each of the LEDs 281a to 281c emits light (hereinafter referred to as a rotational light emission state) is shown. FIG. 10C shows a state in which the LEDs 281a to 281c of the ceiling lamp are irradiating light obliquely downward by driving the lamp left / right drive motors 91a and 91b and the lamp rotation drive motor 92 (hereinafter referred to as “below”). , Referred to as a downward light emission state). FIG. 10 (d) shows that the lamps 281a to 281c of the top frame lamp are moved leftward or rightward (in the figure, with respect to the gaming machine) by driving the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92. A state in which light is irradiated in the left direction (hereinafter, referred to as a lateral light emission state) is shown.

  In this embodiment, by driving the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92, the ceiling frame can be set in any one of the forward light emission state, the rotation light emission state, the downward light emission state, and the horizontal light emission state. The LEDs 281a to 281c of the lamp are caused to emit light. When light is emitted in a downward light emission state, the lamp vertical drive motor 90 is driven to drive a driving member described later, thereby irradiating the LEDs 281a to 281c of the ceiling lamp in an obliquely downward direction. You can also.

  Next, the structure of the top frame lamp will be described. 11 and 12 are explanatory views showing the structure of the ceiling frame lamp unit and the mounting structure of the ceiling frame lamp unit. As shown in FIGS. 11 and 12, the ceiling lamp unit 281 </ b> A is integrally configured with each LED 281 a to 281 c of the ceiling lamp, each driving motor 90, 91 a, 91 b, 92, and each driving member such as a gear and a shaft. It is a unit part. As shown in FIGS. 11 and 12, the top frame lamp unit 281A is attached to the upper part of the front frame 12 of the game frame 11 by screwing or the like. A frame-side IC substrate 602 is attached to the back surface of the top frame lamp unit 281A, and serial-parallel conversion ICs 610 to 612 and a connector unit 158 are mounted on the frame-side IC substrate 602. In addition, in a state where the top frame lamp unit 281A is attached to the front frame 12, the connector portion 158 is connected to a connector 157h provided in a manner that penetrates the front frame 12 to the relay board 608 of the front frame 12.

  FIG. 13 is an explanatory diagram showing a structure in which the LEDs 281a to 281c of the ceiling lamp are driven in the left-right direction or rotated. As shown in FIGS. 11 and 13, the LEDs 281 a to 281 c of the ceiling frame lamp are connected to each other by a shaft 93 in the ceiling frame lamp unit 281 </ b> A. The ceiling lamp unit 281A includes two lamp left and right drive motors 91a and 91b. By driving the lamp left and right drive motors 91a and 91b, the shaft 93 moves forward (the LEDs 281a to 281c are arranged). Or the LED 281a to 281c is pulled backward.

  As shown in FIG. 13A, when the shaft 93 is pulled backward by driving the lamp right and left drive motors 91 a and 91 b, the LEDs 281 a to 281 c are also pulled backward by the shaft 93. Then, as shown to Fig.13 (a), the edge part of the umbrella parts 201a-201c which covers each LED281a-281c contacted the wall surface of the top frame lamp unit 281A (contact part 202a- shown to Fig.13 (a)). 202c), and the respective LEDs 281a to 281c face the front direction with respect to the player (forward light emission state).

  As shown in FIG. 13B, when the shaft 93 is pushed forward by driving the lamp left and right drive motors 91a and 91b, the LEDs 281a to 281c are also moved forward by the pressing force of the shaft 93. Extruded in the direction. Then, as shown in FIG.13 (b), the state which the edge part of umbrella part 201a-201c which covers each LED281a-281c contacted the wall surface of the top frame lamp unit 281A is cancelled | released, and each LED281a-281c is a forward light emission state. From this state (see FIG. 13 (a)), as shown in FIG. 13 (b), the LEDs 281a to 281c are turned to the sideways light emission state. In the example shown in FIG. 13B, the LEDs 281 a to 281 c are actuated by the gear 95 so as to incline in the right oblique side surface direction. FIG. 13B shows a state in which the LEDs 281a to 281c face the diagonally right side surface direction, but the LEDs 281a to 281c are further rotated by driving the lamp rotation drive motor 92 to rotate the LEDs 281a to 281c. ˜281c can be in a state of facing the left oblique side surface direction.

  As shown in FIGS. 11 and 13, the ceiling lamp unit 281A has a built-in lamp rotation drive motor 92, and rotates the shaft 93 via the gear 95 by driving the lamp rotation drive motor 92. The irradiation direction of each LED 281a-281c of the ceiling lamp can be rotated clockwise or counterclockwise.

  Further, as shown in FIG. 12, in the top frame lamp unit 281 </ b> A, each LED 281 a to 281 c of the top frame lamp is mounted on the drive component 96. The ceiling frame lamp unit 281A has a built-in lamp up / down drive motor 90, and by driving the lamp up / down drive motor 90, the drive component 96 can be moved up and down via the gear 98, so that each of the top frame lamps can be moved. The irradiation direction of the LEDs 281a to 281c can be integrally changed in the vertical direction. FIG. 14 is an explanatory diagram showing a movable aspect of the driving component 96 of the ceiling lamp unit 281A. As shown in FIG. 14, the drive component 96 is moved downward via the gear 98 by driving the lamp vertical drive motor 90 from the forward light emission state (see FIG. 14A). And as shown in FIG.14 (b), by moving the drive component 96, the irradiation direction of each LED281a-281c of a top frame lamp can be integrally changed to a downward direction, and can be changed to a downward light emission state. it can.

  FIG. 15 is a block diagram showing an example of a circuit configuration in the main board (game control board) 31. FIG. 15 also shows a payout control board 37 and an effect control board 80 on which a payout control microcomputer for controlling the ball payout device 97 is mounted. A game control microcomputer (corresponding to game control means) 560 for controlling the pachinko gaming machine 1 according to a program is mounted on the main board 31. The game control microcomputer 560 includes a ROM 54 for storing a game control (game progress control) program and the like, a RAM 55 as storage means used as a work memory, a CPU 56 for performing control operations in accordance with the program, and an I / O port unit 57. And a serial output circuit for converting parallel data into serial data and outputting the serial data. In this embodiment, the ROM 54 and the RAM 55 are built in the game control microcomputer 560. That is, the game control microcomputer 560 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the CPU 56 and the RAM 55, and the ROM 54 may be external or built-in. Further, the I / O port unit 57 may be externally attached.

  The game control microcomputer 560 further includes a random number circuit 503 for generating hardware random numbers.

  In the game control microcomputer 560, the CPU 56 executes control in accordance with the program stored in the ROM 54, so that the game control microcomputer 560 (or CPU 56) executes (or performs processing) hereinafter. Specifically, the CPU 56 executes control according to a program. The same applies to microcomputers mounted on substrates other than the main substrate 31.

  Also, an input driver circuit for supplying detection signals from the gate switch 32a, the first start port switch 13a, the second start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a and 39a to the game control microcomputer 560. 58 is also mounted on the main board 31. The main board also includes an output circuit 59 for driving the solenoid 16 for opening and closing the variable winning ball device 15 and the solenoid 21 for opening and closing the special variable winning ball device 20 that forms a big winning opening in accordance with a command from the game control microcomputer 560. 31.

  Further, the game control microcomputer 560 receives a power-off signal from a power supply board (not shown) and a clear switch detection signal (clear signal). The power-off signal is a signal that is output when a power supply monitoring circuit mounted on the power supply board detects a decrease in a predetermined voltage. The clear switch is a switch that can be operated by a game clerk or the like, and is a switch that is operated when the RAM 55 is to be initialized.

  In addition, the game control microcomputer 560 includes a special symbol display 8 that variably displays special symbols, a normal symbol display 10 that variably displays normal symbols, a special symbol hold memory display 18, and a normal symbol hold memory display 41. Perform display control.

  Further, the serial output circuit 78 mounted on the game control microcomputer 560 is constituted by a shift register or the like, converts the effect control command output from the CPU 56 into serial data, and sends it to the effect control board 80 via the relay board 77. Send. The serial output circuit 78 converts the control signal output from the CPU 56 into serial data, and via the relay board 77, the special symbol display 8, the special symbol hold storage display 18, the normal symbol display 10, and the normal symbol. Output to the on-hold storage display 41. The special symbol display 8, the special symbol hold storage display 18, the normal symbol display 10 and the normal symbol hold storage display 41 are provided with serial-parallel conversion ICs for converting serial data into parallel data, respectively. The control signal from the relay board 77 is converted into parallel data and supplied to the special symbol display 8, the special symbol hold storage display 18, the normal symbol display 10, and the normal symbol hold storage display 41.

  An information output circuit (not shown) that outputs an information output signal such as jackpot information indicating the occurrence of a jackpot gaming state to an external device such as a hall computer is also mounted on the main board 31.

  In this embodiment, when the payout control microcomputer mounted on the payout control board 37 receives a ball lending request signal from the card unit 50 via the interface board 66, the ball payout device 97 is driven. Pay out game balls for lending balls.

  In addition, the effect control means (comprising an effect control microcomputer) mounted on the effect control board 80 sends an effect control command from the game control microcomputer 560 via the relay board 77 to the serial signal system ( Serial communication system: a system in which data is transmitted by one signal line), and display control of the effect display device 9 that variably displays decorative symbols is performed.

  Further, the effect control means mounted on the effect control board 80 controls the display of the LED 125a to 125f of the center decoration lamp and the LEDs 126a to 126f of the stage lamp provided on the game board 6, and is provided on the frame side. The display control of the LED 281a to 281c of the ceiling frame lamp, the LEDs 282a to 282f of the left frame lamp, and the LEDs 283a to 283f of the right frame lamp is performed, and the sound output from the speaker 27 is controlled.

  The effect control microcomputer 100 of the effect control board 80 has a control for display control of the lamps 125a to 125f, 126a to 126f, 281a to 281c, 282a to 282f, and 283a to 283f output by the effect control means. A serial output circuit 353 for converting a signal from parallel data to serial data is mounted. In addition, the effect control microcomputer 100 of the effect control board 80 is equipped with a serial input circuit 354 that converts the input serial data into parallel data and outputs the parallel data to the effect control means. Therefore, the effect control means outputs the control signal in the serial signal system via the serial output circuit 353, thereby controlling the display of each of the lamps 125a to 125f, 126a to 126f, 281a to 281c, 282a to 282f, 283a to 283f. I do.

  On the game board side, a board-side IC board 601 on which a serial-parallel conversion IC for converting serial data into parallel data is mounted. The board side IC board 601 is connected to the effect control board 80 via the relay board 606. Further, on the glass door frame 2 side and the game frame 11 side, frame side IC substrates 602, 603, 604, 605 on which serial-parallel conversion ICs for converting serial data into parallel data are mounted. Yes. Each frame-side IC substrate 602, 603, 604, 605 is connected to the effect control substrate 80 via the relay substrate 606, 607.

  The effect control board 80, the relay board 606, and the relay board 607 are connected by a single bus route.

  FIG. 16 is a block diagram illustrating a circuit configuration example of the relay board 77 and the effect control board 80. In addition, although the example shown in FIG. 16 shows the case where only the effect control board 80 is provided regarding effect control, you may provide a lamp driver board | substrate and an audio | voice output board | substrate. In this case, the lamp driver board and the audio output board are not equipped with a microcomputer, but may be equipped with a microcomputer.

  The effect control board 80 includes an effect control microcomputer 100 including an effect control CPU 101, a RAM (not shown), a serial output circuit 353, a serial input circuit 354, a clock signal output unit 356 and an input capture signal output unit 357. It is installed. The RAM may be externally attached. In the effect control board 80, the effect control CPU 101 operates in accordance with a program stored in a built-in or external ROM (not shown), and receives an effect control command via the serial input circuit 102 and the input port 103. In this case, the serial input circuit 102 converts the effect control command received by the serial signal method into parallel data and outputs the parallel data. Further, the effect control CPU 101 causes the VDP (video display processor) 109 to perform display control of the effect display device 9 based on the effect control command.

  In this embodiment, a VDP 109 that performs display control of the effect display device 9 in cooperation with the effect control microcomputer 100 is mounted on the effect control board 80. The VDP 109 has an address space independent of the production control microcomputer 100, and maps a VRAM therein. VRAM is a buffer memory for developing image data. Then, the VDP 109 outputs the image data in the VRAM to the effect display device 9 via the frame memory.

  The effect control CPU 101 outputs to the VDP 109 a command for reading out necessary data from a CGROM (not shown) in accordance with the received effect control command. The CGROM stores in advance character image data and moving image data to be displayed on the effect display device 9, specifically, a person, characters, figures, symbols, etc. (including decorative symbols), and background image data. ROM. The VDP 109 reads image data from the CGROM in response to the instruction from the effect control CPU 101. The VDP 109 executes display control based on the read image data.

  As a signal direction regulating means, the signal inputted from the main board 31 is allowed to pass through the relay board 77 only in the direction toward the effect control board 80 (the signal is not passed in the direction from the effect control board 80 to the relay board 77). The unidirectional circuit 74 is mounted. For example, a diode or a transistor is used as the unidirectional circuit. FIG. 16 illustrates a diode.

  Further, the effect control CPU 101 outputs a signal for driving the lamp via the serial output circuit 353. The serial output circuit converts the input signal (parallel data) for driving the LED of the lamp into serial data and outputs the serial data to the relay board 606. Further, the production control CPU 101 outputs sound number data to the speech synthesis IC 173.

  Further, the clock signal output unit 356 outputs a clock signal to the relay board 606. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 610 to 615 and the input IC 620 mounted on the frame side IC boards 602 to 605 via the relay boards 606 and 607. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 616 to 619 and the input IC 621 mounted on the board side IC substrate 601 via the relay substrate 606. Therefore, in this embodiment, a common clock signal is supplied to each of the serial-parallel conversion ICs 610 to 619 and the input ICs 620 and 621.

  Further, the input capture signal output unit 357 inputs the input capture signal (latch signal) to the board side IC board 601 or the frame side IC boards 602 to 605 via the relay boards 606 and 607 in accordance with the instruction of the effect control CPU 101. Is output. The input IC 620 mounted on the frame side IC board 605 latches the detection signals of the operation buttons 81a to 81e when an input input signal from the production control microcomputer 100 is input, and relay boards 606 and 607 in a serial signal system. To the production control microcomputer 100. The input IC 621 mounted on the board-side IC board 601 latches the detection signals of the position sensors 151b, 152b, and 153b when the input capture signal from the production control microcomputer 100 is input, and uses a serial signal method. This is output to the production control microcomputer 100 via the relay board 606.

  When the sound number IC 173 receives the sound number data, the sound synthesizing IC 173 generates a sound or a sound effect corresponding to the sound number data and outputs it to the amplifier circuit 175. The amplifier circuit 175 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 173 to a level corresponding to the volume set by the volume 176 to the speaker 27. The voice data ROM 174 stores control data corresponding to the sound number data. The control data corresponding to the sound number data is a collection of data indicating the sound effect or sound output mode in a time series in a predetermined period (for example, a decorative symbol variation period).

  FIG. 17 is a block diagram illustrating a configuration example of the effect control board 80, the relay boards 606 and 607, the board-side IC board 601, and the frame-side IC boards 602, 603, 604, and 605. The effect control microcomputer 100 of the effect control board 80 outputs a clock signal to the relay board 606 together with serial data as a control signal. In addition, an input capture signal for causing the input ICs 620 and 621 to latch the input signal is output to the relay board 606.

  The relay board 606 supplies the serial data and the clock signal input from the effect control microcomputer 100 to the serial-parallel conversion ICs 616 to 619 mounted on the board side IC board 601. And each serial-parallel conversion IC616-619 converts the input serial data into parallel data, LED125a-125f of each lamp provided in the game board 6, 126a-126f, 127a-127c, and each movable member The motors 151a to 151c are supplied. The serial-parallel conversion ICs 616 to 619 are also drive circuits for driving the LEDs 125a to 125f, 126a to 126f, 127a to 127c and the motors 151a to 151c. In other words, the LED 125a to 125f, 126a to 126f, 127a to 127c and the motors 151a to 151c have a capability of supplying a current necessary for driving (LEDs are lit).

  Further, the relay board 607 is connected to the relay board 606 through one bus-type wiring route, and the serial data line 300 and the clock signal line 301 connected to the serial-parallel conversion ICs 616 to 619 are the board side IC board. 601 is connected in a bus format. In addition, being connected by one wiring route means that a plurality of serial-parallel conversion ICs or relay boards are connected to one wiring route.

  Each serial-parallel conversion IC 616 to 619 mounted on the board side IC substrate 601 is assigned a unique ID. In this embodiment, as shown in FIG. 17, the ID of IC 616 is 06, the ID of IC 617 is 07, the ID of IC 618 is 08, and the ID of IC 619 is 09.

  In addition, an input IC 621 for inputting a detection signal of a position sensor of each movable member provided on the game board 6 is mounted on the board side IC board 601. In this embodiment, the input IC 621 and the production control microcomputer 100 mounted on the board-side IC board 601 include an input signal line 302, a clock signal line 301, and an input capture signal line 303 via a relay board 606. The connected production control microcomputer 100 outputs an input capture signal to the input IC 621 via the relay board 606 at a predetermined timing. Then, the input IC 621 latches the detection signal of each position sensor based on the input fetch signal (latch signal) and outputs it to the effect control microcomputer 100 via the relay board 606. In this case, the input IC 621 converts the detection signal input in parallel from each position sensor into serial data and outputs it. In this embodiment, the unique ID of the input IC 621 is 11, as shown in FIG.

  As shown in FIG. 17, the serial data and the clock signal input to the relay board 607 are supplied to the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC boards 602 to 605. And each serial-parallel conversion IC610,613-615 converts the input serial data into parallel data, LED281a-281c of each lamp provided in the game frame 11, 282a-282f, 283a-283f, 82a- 82d and 83. The serial-parallel conversion IC 611 converts the input serial data into parallel data, and supplies the parallel data to the lamp vertical drive motor 90. The serial-parallel conversion IC 612 converts the input serial data into parallel data, and supplies the parallel data to the lamp left and right drive motors 91 a and 91 b and the lamp rotation drive motor 92.

  The serial-parallel conversion ICs 610, 613 to 615 are also drive circuits for driving the LEDs 281a to 281c, 282a to 282f, 283a to 283f, 82a to 82d, 83. That is, the LED 281a to 281c, 282a to 282f, 283a to 283f, 82a to 82d, and 83c have a capability of supplying a current necessary for driving (lighting).

  The serial data lines and clock signal lines connected to the serial-parallel conversion ICs 610 to 612 are connected in a bus format on the frame side IC substrate 602. In this embodiment, as shown in FIG. 17, first, the signal is input to the serial-parallel conversion IC 610 of the frame side IC substrate 602, and input from the serial-parallel conversion IC 610 to the serial-parallel conversion IC 611 and the serial-parallel conversion IC 612 in this order. Is done. The serial data lines and clock signal lines connected to the serial-parallel conversion ICs 613 and 614 are connected in a bus format on the frame side IC substrates 603 and 604. In this embodiment, as shown in FIG. 17, first, the signal is input to the serial-parallel conversion IC 614 of the frame side IC substrate 604, and is input from the serial-parallel conversion IC 614 to the serial-parallel conversion IC 613 of the frame side IC substrate 603. The The serial data line and the clock signal line connected to the serial-parallel conversion IC 615 are directly connected from the relay board 607.

  Each serial-parallel conversion IC 610 to 615 mounted on each frame side IC substrate 602 to 605 has a unique ID. In this embodiment, as shown in FIG. 17, the ID of IC 610 is 00, the ID of IC 611 is 01, the ID of IC 612 is 02, the ID of IC 613 is 03, and the ID of IC 614 is 04. The ID of the IC 615 is 05.

  In addition, an input IC 620 for inputting detection signals of the operation buttons 81 a to 81 e provided on the game frame 11 is mounted on the frame side IC board 605. In this embodiment, an input signal line, a clock signal line, and an input capture signal line are connected to the input IC 620 mounted on the frame side IC board 605 and the production control microcomputer 100 via the relay boards 606 and 607. Then, the production control microcomputer 100 outputs an input capture signal to the input IC 620 via the relay boards 606 and 607 at a predetermined timing. In this case, the production control microcomputer 100 outputs the input capture signal to the input IC 620 at a timing different from the timing of outputting the input capture signal to the input IC 621. Then, the input IC 620 latches the detection signals from the operation buttons 81a to 81e based on the input capture signal (latch signal), and outputs it to the effect control microcomputer 100 via the relay boards 606 and 607. In this case, the input IC 620 converts detection signals input in parallel from the operation buttons 81a to 81e into serial data and outputs the serial data. In this embodiment, the unique ID of the input IC 620 is 10 as shown in FIG.

  The serial-parallel conversion ICs 616 to 619 mounted on the panel-side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame-side IC substrates 602 to 605 are connected through one line of wiring. . Specifically, the connection through one system of wiring means that the relay boards 606 and 607 are connected in a bus type, and the serial-parallel conversion ICs 610 to 619 are connected in a bus type or a daisy chain type. It is that. In this embodiment, as shown in FIG. 17, the serial-parallel conversion ICs 610 to 619 are connected in a bus type. As described above, in this embodiment, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel ICs 610 to 615 mounted on the frame side IC substrates 602 to 605 are provided. The connectors 156a to 156c, 156f to 156h, and 157a to 157e are connected via the relay boards 606 and 607 via one line of wiring. Therefore, the wiring work between the game frame 11 and the game board 6 can be performed only by attaching / detaching the connector, and the work of attaching / detaching the game frame 11 to / from the game board 6 can be performed more easily.

  Further, according to this embodiment, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601, the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602 to 605, and the input ICs 620 and 621. The common clock signal is input from the production control microcomputer 100. Therefore, the wiring of the clock signal to the serial-parallel conversion ICs 610 to 619 and the wiring of the clock signal to the input ICs 620 and 621 can be shared, and communication between the effect control means and the board-side IC 601 board, Communication between the effect control means and the frame side IC boards 602 to 605 can be realized using one channel, respectively, and the number of wirings can be reduced. Also, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601, the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602 to 605, and the input ICs 620 and 621 can be easily synchronized. And the number of clock signal wirings can be reduced.

  In this embodiment, each serial-parallel conversion IC 610 to 619 is assigned an address in advance, and the production control microcomputer 100 adds an address to the serial data when outputting the control signal converted to serial data. And output. When serial data is input, each serial-parallel conversion IC 610 to 619 checks whether the address added to the input serial data matches its own address, and if it matches, converts it to parallel data. Are supplied (ie, output) to the LED of each lamp. If the addresses do not match, the LED of each lamp is not supplied.

  As shown in FIG. 17, the production control microcomputer 100 performs bidirectional communication with the board side IC substrate 601 and the frame side IC substrates 602 to 605 (specifically, serial data is converted into serial-parallel conversions). IC 610 to 619 and input signals are input from the input ICs 620 and 621). Therefore, a data input terminal and a data output terminal are provided, and data input and data output can be performed in one channel. In this embodiment, as shown in FIG. 17, a data input terminal and a data output terminal of one channel are respectively connected to different output target devices (in this embodiment, serial-parallel conversion ICs 610 to 619) and input targets. It is connected to a device (in this embodiment, input ICs 620 and 621). With such a configuration, when the output target device and the input target device are originally different devices, the communication should be performed using different channels in both directions. Communication is enabled to reduce the number of channels between the production control microcomputer 100 and the board-side IC board 601 and the frame-side IC boards 602 to 605.

  In this embodiment, a channel is a terminal for a data line (output data line), a clock signal line, an input signal line (input data line), and an input capture signal line (signal line for requesting reading of input data). Is a set. One channel may include a ground wire or a terminal dedicated to the power source. Further, in this embodiment, a case where both data input and data output are performed using one channel is shown, but an output-dedicated channel in which only a terminal for a data line (output data line) and a clock signal line is set. May be used. Alternatively, an input-dedicated channel in which only terminals for input signal lines (input data lines) and input take-in signal lines (signal lines for requesting reading of input data) are set may be used.

  18 and 19 are explanatory diagrams showing examples of addresses given to the serial-parallel conversion ICs 610 to 619. FIG. In this embodiment, the production control microcomputer 100 stores the addresses of the serial-parallel conversion ICs 610 to 619 shown in FIGS. 18 and 19 in a predetermined address storage area previously provided in the RAM.

  In this embodiment, as shown in FIGS. 18 and 19, in the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602 to 605, an address 00 is assigned to the IC 610 and an address is assigned to the IC 611. 01 is assigned, address 02 is assigned to IC 612, address 03 is assigned to IC 613, address 04 is assigned to IC 614, and address 05 is assigned to IC 615. Further, in the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601, the address 006 is given to the IC 616, the address 07 is given to the IC 617, the address 08 is given to the IC 618, and the IC 619 is given. Address 09 is given.

  The serial-parallel conversion ICs 610 to 619 may be assigned the same ID as the unique ID of the IC as an address, or may be given an address including numbers, characters, and symbols different from the unique ID of the IC. Good.

  Further, as shown in FIGS. 18 and 19, the serial-parallel conversion IC 610 whose address is 00 converts serial data into parallel data, and the LED of the top frame lamp of the game frame 11 (in this embodiment, the top frame). To the LEDs 281a-281c of the lamp. The serial-parallel conversion IC 611 whose address is 01 converts serial data into parallel data and supplies the parallel data to the lamp vertical drive motor 90. The serial-parallel conversion IC 612 whose address is 02 converts serial data into parallel data, and supplies the parallel data to the lamp left and right drive motors 91 a and 91 b and the lamp rotation drive motor 92. In this embodiment, the serial-parallel conversion IC 612 supplies the same parallel data (excitation signal) in parallel to the two lamp left and right drive motors 91a and 91b.

  The lamp up / down drive motor 90, the lamp left / right drive motors 91a, 91b, and the lamp rotation drive motor 92 are specifically realized by stepping motors, and the drive speed is changed by changing the pattern of the excitation signal to be supplied. Is possible.

  The serial-parallel conversion IC 613 whose address is 03 converts the serial data into parallel data and supplies it to the LED of the right frame lamp of the game frame 11 (in this embodiment, six LEDs (283a to 283f)). Further, the serial-parallel conversion IC 614 whose address is 04 converts serial data into parallel data, and supplies it to the LED of the left frame lamp of the game frame 11 (in this embodiment, six LEDs (282a to 282f)).

  Further, the serial-parallel conversion IC 615 whose address is 05 converts the serial data into parallel data, and provides a dish lamp (four LEDs (82a to 82d) in this embodiment) provided on the hitting ball supply tray 3 of the game frame 11. ) And an LED (operation button lamp) 83 (one lamp in this embodiment) provided on the operation buttons 81a to 81e.

  The serial-parallel conversion IC 616 whose address is 06 converts serial data into parallel data, and each movable member provided in the game board 6 (in this embodiment, imitating the shape of a beam, a truck, and a skeleton) The three motors 151a, 152a, 153a for driving the accessory) are supplied in the opposite direction to the forward direction. The serial-parallel conversion IC 617 whose address is 07 converts the serial data into parallel data, and configures the LEDs constituting each lamp of the decorative structure (center decoration) provided in the center of the game board 6 (this embodiment In a form, it supplies to 6 LED (125a-125f). The serial-parallel conversion IC 618 whose address is 08 converts serial data to parallel data, and configures each stage lamp provided around the effect display device 9 (in this embodiment, six LEDs (126a To 126f)). The serial-parallel conversion IC 619 whose address is 09 converts serial data into parallel data, and configures an LED (in this embodiment, a lamp provided around the movable member (the skeleton 153 in this embodiment)). It supplies to three LED (127a-127c).

  In this embodiment, each input IC 620, 621 is also given an address in advance. FIG. 20 is an explanatory diagram illustrating an example of addresses given to the input ICs 620 and 621. The production control microcomputer 100 stores the addresses of the input ICs 620 and 621 in a predetermined address storage area provided in advance in the RAM. In this embodiment, as shown in FIG. 20, the address 10 is assigned to the input IC 620 mounted on the frame side IC board 605, and the address 11 is assigned to the input IC 621 mounted on the board side IC board 601. ing.

  Each input IC 620, 621 may be given the same ID as the unique ID of the IC as an address, or may be given an address including numbers, characters, and symbols different from the unique ID of the IC.

  Also, as shown in FIG. 20, the input IC 620 whose address is 10 is the detection signal of the operation buttons 81a to 81e provided in the game frame 11 (whether or not the operation buttons 81a to 81e themselves are turned on, the operation button 81a ˜81e) is inputted in parallel, converted into serial data, and outputted. Further, the input IC 621 whose address is 11 inputs the detection signals of the position sensors 151b, 152b, 153b (three in this embodiment) provided on each movable member of the game board 6 in parallel and converts them into serial data. Convert and output.

  FIG. 21 is a block diagram showing the configuration of each serial-parallel conversion IC 610-619. As illustrated in FIG. 21, the serial-parallel conversion ICs 610 to 619 include a data latch unit 651, a shift register 652, a header / address detection unit 653, a data buffer 655, and a sync driver 656.

  The data latch unit 651 includes, for example, a latch circuit. When serial data is input, the data latch unit 651 latches the input data bit by bit at the rising timing of the clock signal pulse and outputs the latched data to the shift register 652. The shift register 652 sequentially stores data input bit by bit from the data latch unit 651. The shift register 652 shifts stored data bit by bit at the rising timing of the pulse of the clock signal. By repeatedly shifting the stored data bit by bit as described above, the data finally input as serial data (that is, in the serial signal system) is stored in the shift register 652.

  FIG. 22 is an explanatory diagram showing an example of the format of serial data output from the production control microcomputer 100. FIG. 22A shows a data format of serial data output as lamp lighting data for individually lighting or extinguishing the LEDs of each lamp provided in the game board 6 or the game frame 11. FIG. 22B shows a format of serial data output as a reset command for resetting the LEDs of the respective lamps provided on the game board 6 and the game frame 11 to turn off all the lights.

  As shown in FIG. 22A, the lamp lighting data is composed of 28 bits, and includes 9-bit header data, mark bits (M), 8-bit addresses, 8-bit data, and end bits (E). .

  The header data represents the head of the data, and is 1FF (h) in this embodiment. The mark bit (M) is a bit (logical value 0 in this embodiment) representing a data delimiter, and is inserted between the header data and the address and between the address and the data. The address is the address of the data-output destination serial-parallel conversion IC. An ID that is a unique serial number of each serial-parallel conversion IC 610 to 619 may be used as the address.

  The data (8 bits) is for controlling the lighting state of the LED of each lamp, and includes, for example, a logical value 1 as a bit corresponding to the LED of the lamp to be lit, Corresponding bits contain the logical value 0. The end bit (E) indicates the end of data, and is a logical value 0 in this embodiment.

  As shown in FIG. 22B, the reset command is composed of 19 bits, and includes 9-bit header data, mark bits (M), 8-bit reset data, and end bits (E).

  The header data represents the head of the data, and is 1FF (h) in this embodiment. The mark bit (M) is a bit (logical value 0 in this embodiment) representing a data delimiter, and is inserted between the header data and the reset data. The reset data is for resetting the lighting states of the LEDs of the respective lamps so that all the lamps are extinguished. For example, the reset data is all data including the logical value 1. The end bit (E) indicates the end of data, and is a logical value 0 in this embodiment.

  In this embodiment, the lamp lighting data shown in FIG. 22A or the reset command shown in FIG. 22B is input, and the shift register 652 is repeatedly shifted bit by bit at the rising edge of the clock signal pulse. Will be stored.

  The header / address detector 653 detects the header and address from the data stored in the shift register 652. First, the header / address detection unit 653 constantly detects data from the shift register 652, and confirms whether or not the content of the detected data matches 1FF (h) corresponding to the header data. If it matches the header data (1FF (h)), it is determined that the position that matches the header data is the head of the data, and it is determined that one set of lamp lighting data or reset command is stored in the shift register 652. Next, the header / address detection unit 653 detects the 11th to 18th bits of data from the head corresponding to the address from the shift register 652, and whether or not it matches the address previously given to the serial-parallel conversion IC. To check. The board-side IC board 601 and the frame-side IC boards 602 to 605 are provided with, for example, an address storage register 654 that stores the address of the serial-parallel conversion IC to be mounted, and the header / address detector 653 is a shift register. It may be confirmed whether the address detected from 652 matches the address stored in the address storage register 654 in advance. If the addresses match, the header / address detection 653 determines that data destined for the serial-parallel conversion IC has been input, and outputs an input capture signal (latch signal) to the data buffer 655. If the addresses do not match, the header / address detection 653 does not output the input capture signal to the data buffer 655. That is, in this case, since the data is not destined for the serial-parallel conversion IC, the data stored in the shift register 652 is discarded without being output to the data buffer 655.

  FIG. 21 shows a case where the address storage register 654 is provided in advance on the board side IC substrate 601 and each of the frame side IC substrates 602 to 605. However, instead of the address storage register 654, serial-parallel conversion is shown. An address is input from an external hardware circuit (for example, a circuit mounted on the production control board 80) via an address terminal (8 terminals (corresponding to each bit of an 8-bit address)) provided in the IC. You may make it do. Then, an address may be input to the serial-parallel conversion IC by controlling the input of each address terminal to high (high level) or low (low level) from the external hardware circuit side. In this case, for example, the external hardware circuit sets the input to the terminal to high by applying a voltage to the terminal corresponding to any bit of the address, or sets the input to the terminal to low by switching to the ground. Control to do.

  The data buffer 655 is constituted by, for example, a latch register. When an input capture signal is input from the header / address detector 653, the data of the 20th to 27th bits from the head corresponding to the data portion is captured from the shift register 652. Latch with. The data buffer 655 supplies (that is, outputs) the fetched data to the LEDs of each lamp as parallel data (Q0 to Q7).

  If the data stored in the shift register 652 is a reset command, the 11th to 18th bits from the beginning all store data having a logical value of 1. In this case, the data buffer 655 determines that a reset command has been input when all data having a logical value of 1 is fetched, and the LEDs of all the lamps are reset and turned off.

  The sync driver 656 inverts and outputs the logical value of the parallel data output from the data buffer 655 based on a predetermined logic inversion setting signal, or outputs it as it is. For example, when the predetermined logic inversion setting signal is High, the signal is turned on when the bit value of the parallel data output from the data buffer 655 is 1 (that is, the corresponding bit value of the lamp lighting data is 1), An ON signal is output to the LED of each lamp. In this embodiment, the set value of the logic inversion setting signal is set in advance in a register or the like provided on the panel side IC board 601 or each frame side IC board 602 to 605, and the LED of each lamp is set according to the set value set in advance. It is assumed that an ON signal is outputted to the LED of each lamp.

  FIG. 23 is a timing chart showing an example of input timing of serial data and clock signals to the serial-parallel conversion IC and output timing of parallel data. In FIG. 23, a case where lamp lighting data is input by a serial signal method will be described. As shown in FIG. 23, serial data is input to the shift register 652 of the serial-parallel conversion IC in units of 1 bit in the order of header data, mark bits, addresses, mark bits, data, and end bits. The series of data is set as one set. The header / address detection unit 653 does not detect header data until one set of serial data (in this embodiment, lamp lighting data) is completely input, so the output of the data buffer 655 does not change. Therefore, the lighting pattern based on the serial data received last time is output from the serial-parallel conversion IC as it is by the parallel signal method (parallel communication method: a method of sending data through a plurality of signal lines).

  When all sets of serial data have been input, the data portion from the data stored in the shift register 652 is latched in the data buffer 655, and a lighting pattern based on the newly received serial data is output in a parallel signal system. In this embodiment, as shown in FIG. 23, among the parallel data output from the serial-parallel conversion IC, Q0 and Q4 are the rising timing of the pulse of the next clock signal after the completion of the serial data input. Immediately, the data is switched to new lighting pattern data. Q1 and Q5 are switched to new lighting pattern data with a delay of one clock from Q0 and Q4. Q2 and Q6 are switched to new lighting pattern data with a delay of two clocks from Q0 and Q4. Further, Q3 and Q7 are switched to new lighting pattern data with a delay of three clocks from Q0 and Q4.

  FIG. 24 is a block diagram showing the configuration of each of the input ICs 620 and 621. As shown in FIG. 24, in this embodiment, each input IC 620, 621 is composed of a plurality (eight in this embodiment) of D flip-flops 661-668. In this embodiment, detection signals from the operation buttons 81a to 81e or the position sensors 151b, 152b, and 153b are input in parallel to the input ICs 620 and 621, and are input to one of the D flip-flops 661 to 668 for each detection signal. Entered. A clock signal is input to each of the D flip-flops 661 to 668, and each D flip-flop 661 to 668 sequentially performs a shift operation at the rising edge of the clock. The detection signal input in parallel is converted into serial data and output.

  An input capture signal (latch signal) is input to each of the D flip-flops 661 to 668 from the effect control microcomputer 100 at a predetermined timing. When an input capture signal is input, detection signals from the operation buttons 81a to 81e or the position sensors 151b, 152b, and 153b are latched by the D flip-flops 661 to 668, respectively. Then, the latched detection signals are sequentially shifted at the rising edge of the clock and output in a serial signal system.

  Next, the operation of the gaming machine will be described. FIG. 25 is a flowchart showing a main process executed by the game control microcomputer 560 on the main board 31. When power is supplied to the gaming machine and power supply is started, the input level of the reset terminal to which the reset signal is input becomes high level, and the gaming control microcomputer 560 (specifically, the CPU 56) After executing the security check process, which is a process for confirming whether the contents of the program are valid, the main process after step S1 is started. In the main process, the CPU 56 first performs necessary initial settings.

  In the initial setting process, the CPU 56 first sets the interrupt prohibition (step S1). Next, the interrupt mode is set to interrupt mode 2 (step S2), and a stack pointer designation address is set to the stack pointer (step S3). After initialization of the built-in device (CTC (counter / timer) and PIO (parallel input / output port), which are built-in devices (built-in peripheral circuits)) is performed (step S4), the RAM is accessible (Step S5). In the interrupt mode 2, the address synthesized from the value (1 byte) of the specific register (I register) built in the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is This mode indicates an interrupt address.

  Next, the CPU 56 checks the state of the output signal of the clear switch (for example, mounted on the power supply board) input via the input port (step S6). When the ON is detected in the confirmation, the CPU 56 executes a normal initialization process (steps S10 to S15, including S44 and S45).

  If the clear switch is not on, check whether data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) was performed when power supply to the gaming machine was stopped (Step S7). When it is confirmed that such protection processing is not performed, the CPU 56 executes initialization processing. Whether there is backup data in the backup RAM area is confirmed, for example, by the state of the backup flag set in the backup RAM area in the power supply stop process.

  After confirming that the power supply stop process has been performed, the CPU 56 performs data check of the backup RAM area (step S8). In this embodiment, a parity check is performed as a data check. Therefore, in step S8, the calculated checksum is compared with the checksum calculated and stored by the same process in the power supply stop process. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, an initialization process that is executed when the power is turned on is not performed when the power supply is stopped.

  If the check result is normal, the CPU 56 restores the game state restoration process (steps S41 to S43) for returning the internal state of the game control means and the control state of the electrical component control means such as the effect control means to the state when the power supply is stopped. Process). Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (step S41), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (step S42). ). The work area is backed up by a backup power source. In the backup setting table, initialization data for an area that may be initialized in the work area is set. As a result of the processing in steps S41 and S42, the saved contents of the work area that should not be initialized remain. The parts that should not be initialized include, for example, data indicating the gaming state before the power supply is stopped (special symbol process flag, etc.), the area where the output state of the output port is saved (output port buffer), unpaid prize balls This is the part where data indicating the number is set.

  Further, the CPU 56 transmits a power failure recovery designation command as an initialization command at the time of power supply recovery (step S43). Then, the process proceeds to step S14.

  In this embodiment, it is confirmed whether the data in the backup RAM area is stored using both the backup flag and the check data. However, only one of them may be used. That is, either the backup flag or the check data may be used as an opportunity for executing the game state restoration process.

  In the initialization process, the CPU 56 first performs a RAM clear process (step S10). The RAM clear process initializes predetermined data (for example, count value data of a counter for generating a big hit determination random number) to 0, but is initialized to an arbitrary value or a predetermined value. You may make it do. Alternatively, the entire area of the RAM 55 may not be initialized, and predetermined data (for example, count value data of a counter for generating a big hit determination random number) may be left as it is. Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (step S11), and the contents of the initialization setting table are sequentially set in the work area (step S12).

  As a result of the processing in steps S11 and S12, for example, a normal symbol determination random number counter, a special symbol buffer, a total prize ball number storage buffer, a special symbol process flag, and other flags that are selectively processed according to the control state are initialized. Is set.

  Further, the CPU 56 initializes a sub board (a board on which a microcomputer other than the main board 31 is mounted) (a command indicating that the game control microcomputer 560 has executed an initialization process). Is also transmitted to the sub-board (step S13). For example, when the effect control microcomputer 100 receives the initialization designation command, the effect display device 9 performs screen display for notifying that the control of the gaming machine has been performed, that is, initialization notification.

  Further, the CPU 56 sets an abnormality notification prohibition flag (step S44) and sets a value corresponding to the prohibition period value in the prohibition period timer (step S45). The prohibition period value is a value indicating a period during which an abnormal winning notification described later is prohibited. The abnormality notification prohibition flag is a flag indicating that notification of an abnormal winning is prohibited, and is maintained in the set state until the prohibition period timer times out. Therefore, the start of the abnormal winning notification is prohibited for a predetermined period after the initialization notification is started in the effect display device 9.

  Further, the CPU 56 executes random number circuit setting processing for initial setting of the random number circuit (step S14). For example, the CPU 56 performs setting according to the random number circuit setting program so as to cause the random number circuit to update the random R value. In the random number circuit setting process, the CPU 56 also executes a random number circuit confirmation process for confirming the state of the random number circuit. In the random number circuit confirmation process, the CPU 56 monitors a random number confirmation signal output from the random number circuit for a predetermined time. The random number confirmation signal is ON when the clock signal generation circuit built in the random number circuit normally outputs the internal clock signal, and otherwise (for example, when the level of the internal clock signal decreases) Will be off). When the CPU 56 detects the OFF state of the random number confirmation signal continuously for a predetermined time, the CPU 56 determines that an abnormality has occurred in the random number circuit 503 built in the game control microcomputer 560, and generates a random circuit error of the main board 31. A process of transmitting a random circuit error designation command designating notification to the sub-board is executed. If the OFF state of the random number confirmation signal is not detected continuously for a predetermined time, the CPU 56 determines that the random number circuit 503 is operating normally, and proceeds to step S15 as it is.

  In step S15, the CPU 56 sets a CTC register built in the game control microcomputer 560 so that a timer interrupt is periodically generated every predetermined time (for example, 2 ms). That is, a value corresponding to, for example, 2 ms is set in a predetermined register (time constant register) as an initial value. In this embodiment, it is assumed that a timer interrupt is periodically taken every 2 ms.

  When the execution of the initialization process (steps S10 to S15) is completed, the CPU 56 repeatedly executes the display random number update process (step S17) and the initial value random number update process (step S18) in the main process. When executing the display random number update process and the initial value random number update process, the interrupt disabled state is set (step S16). When the display random number update process and the initial value random number update process are finished, the interrupt enabled state is set. Set (step S19). In this embodiment, the display random number is a random number for determining the variation pattern, and the display random number update process is a process for updating the count value of the counter for generating the display random number. The initial value random number update process is a process of updating the count value of the counter for generating the initial value random number. In this embodiment, the initial value random number determines an initial value such as a counter for generating a random number for determining whether or not to win a normal symbol (ordinary random number generation counter for normal symbol determination). It is a random number for. A game control process for controlling the progress of the game, which will be described later (the game control microcomputer 560 controls itself a game device such as an effect display device, a variable winning ball device, a ball payout device, etc. provided in the gaming machine. In the process of sending a command signal to control other microcomputers, or the game machine control process), the count value of the random number for determination per normal symbol is one round (the random number for determination per normal symbol is taken). When the value is incremented by the number of values between the minimum value and the maximum value), an initial value is set in the counter.

  When the timer interrupt occurs, the CPU 56 executes the timer interrupt process in steps S20 to S36 shown in FIG. In the timer interrupt process, first, a power-off detection process for detecting whether or not a power-off signal is output (whether or not an on-state is turned on) is executed (step S20). The power-off signal is output, for example, when a voltage drop monitoring circuit mounted on the power supply board detects a drop in the voltage of the power supplied to the gaming machine. In the power-off detection process, when detecting that the power-off signal has been output, the CPU 56 executes a power supply stop process for saving necessary data in the backup RAM area. Next, detection signals from the gate switch 32a, the first start port switch 13a, the second start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a are input via the input driver circuit 58, These state determinations are performed (switch processing: step S21).

  Next, the CPU 56 executes display control processing for performing display control of the special symbol display 8, the normal symbol display 10, the special symbol hold storage display 18, and the normal symbol hold storage display 41 (step S22). For the special symbol display 8 and the normal symbol display 10, control for outputting a drive signal to each display is executed according to the contents of the output buffer set in steps S34 and S35.

  In addition, the CPU 56 performs a process for notifying an abnormal winning when it detects that a game ball has won a prize at a time other than the regular time (step S23: abnormal winning notifying process).

  Next, processing for updating the count value of each counter for generating random numbers for determination such as random numbers for determining jackpot symbols used for game control is performed (determination random number update processing: step S24). The CPU 56 further performs a process of updating the count value of the counter for generating the initial value random number and the display random number (initial value random number update process, display random number update process: steps S25 and S26).

FIG. 27 is an explanatory diagram showing each random number. Each random number is used as follows.
(1) Random 1: Decide a special symbol's off symbol (stop symbol) (for determining off symbol)
(2) Random 2: Determines the special symbol stop symbol when generating a big hit (for big hit symbol determination)
(3) Random 3: Determine the variation pattern (variation time) of special symbols (for variation pattern determination)
(4) Random 4: Determines whether or not to generate a hit based on the normal symbol (for normal symbol hit determination)
(5) Random 5: Random 4 initial value is determined (for determining random 4 initial value)

  In step S24 in the game control process shown in FIG. 26, the game control microcomputer 560 uses a counter for generating the jackpot symbol determination random number (2) and the random number for determination per regular symbol (4). Count up (add 1). That is, they are determination random numbers, and other random numbers are display random numbers or initial value random numbers. In addition, in order to improve a game effect, you may make it use random numbers other than the random number of said (1)-(5). In this embodiment, the big hit determination random number is a random number generated by the hardware (random number circuit 503) built in the game control microcomputer 560. The big hit determination random number is used as the big hit determination random number. Software random numbers generated based on the program may be used.

  Further, the CPU 56 performs special symbol process processing (step S27). In the special symbol process, the corresponding symbol is executed in accordance with a special symbol process flag for controlling the special symbol display 8 and the special winning award in a predetermined order. The CPU 56 updates the value of the special symbol process flag according to the gaming state.

  Next, normal symbol process processing is performed (step S28). In the normal symbol process, the CPU 56 executes a corresponding process according to the normal symbol process flag for controlling the display state of the normal symbol display 10 in a predetermined order. The CPU 56 updates the value of the normal symbol process flag according to the gaming state.

  Further, the CPU 56 performs a process of sending an effect control command to the effect control microcomputer 100 (effect control command control process: step S29). In this embodiment, in step S29, the game control microcomputer 560 causes the MODE data or EXT data (MODE data to which the address of the destination serial-parallel conversion ICs 610 to 619 is added) constituting the effect control command. Alternatively, transmission control is performed by adding header data, mark bits, and end bits to (EXT data). The effect control command is converted into serial data by the serial output circuit 78 and transmitted to the effect control board 80 via the relay board 77.

  Further, the CPU 56 performs information output processing for outputting data such as jackpot information, starting information, probability variation information supplied to the hall management computer, for example (step S30).

  Further, the CPU 56 performs a prize ball process for setting the number of prize balls based on detection signals of the first start port switch 13a, the second start port switch 14a, the count switch 23 and the winning port switches 29a, 30a, 33a, and 39a. Execute (Step S31). Specifically, payout control is performed in response to detection of a winning based on one of the first starting port switch 13a, the second starting port switch 14a, the count switch 23 and the winning port switches 29a, 30a, 33a, 39a being turned on. A payout control command (award ball number signal) indicating the number of winning balls is output to a payout control microcomputer mounted on the substrate 37. The payout control microcomputer drives the ball payout device 97 in accordance with a payout control command indicating the number of winning balls. In the prize ball process, a process for determining whether or not a prize ball error has occurred is also performed. For example, when there is a discrepancy between the set value of the number of prize balls and the actual number of payouts, the CPU 56 determines that a prize ball error has occurred, and causes the effect control microcomputer 100 mounted on the effect control board 80 to Control is performed to transmit a prize ball error notification designation command designating notification of occurrence of a prize ball error.

  Further, the CPU 56 executes an error detection process based on the detection signal from the full switch, the ball break switch, and the door opening sensor 155 (step S32). Specifically, a full tank error notification designation command for designating notification to the effect control microcomputer 100 mounted on the effect control board 80 that a full tank error has occurred in response to the detection signal of the full tank switch. Send. In addition, in response to a detection signal from the ball-out switch, a ball-out error notification designation command for designating notification to the effect control microcomputer 100 mounted on the effect control board 80 that a ball-out error has occurred. Send. In response to the detection signal of the door opening sensor 155, a door opening error notification designation command for designating that the door opening error has occurred is transmitted to the effect control microcomputer 100 mounted on the effect control board 80. To do.

  In this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided. However, the CPU 56 relates to on / off of the solenoid in the RAM area corresponding to the output state of the output port. The contents are output to the output port (step S33: output process).

  Further, the CPU 56 performs special symbol display control processing for setting special symbol display control data for effect display of the special symbol in the output buffer for setting the special symbol display control data according to the value of the special symbol process flag ( Step S34). For example, if the variation speed is 1 frame / 0.2 seconds until the end flag is set when the start flag set in the special symbol process is set, the CPU 56, for example, every 0.2 seconds passes. Then, the value of the display control data set in the output buffer is incremented by one. Further, the CPU 56 performs variable display of the special symbol on the special symbol display 8 by outputting a drive signal in step S22 according to the display control data set in the output buffer.

  Further, the CPU 56 performs a normal symbol display control process for setting normal symbol display control data for effect display of the normal symbol in an output buffer for setting the normal symbol display control data according to the value of the normal symbol process flag ( Step S35). For example, when the start flag related to the variation of the normal symbol is set, the CPU 56 switches the display state (“◯” and “×”) for the variation rate of the normal symbol every 0.2 seconds until the end flag is set. With such a speed, the value of the display control data set in the output buffer (for example, 1 indicating “◯” and 0 indicating “x”) is switched every 0.2 seconds. Further, the CPU 56 outputs a normal signal on the normal symbol display 10 by outputting a drive signal in step S22 according to the display control data set in the output buffer.

  Thereafter, the interrupt permission state is set (step S36), and the process ends.

  With the above control, in this embodiment, the game control process is started every 2 ms. The game control process corresponds to the processes in steps S21 to S35 (excluding step S30) in the timer interrupt process. In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set, and the game control process is performed by the main process. May be executed.

  FIG. 28 is an explanatory diagram of a jackpot determination table. The jackpot determination table is a table in which a jackpot determination value to be compared with the random R is set. The jackpot determination determination table includes a normal jackpot determination table (see FIG. 28A) used in a normal state (a gaming state that is not a probability change state) and a probability change jackpot determination table (FIG. 28B) used in a probability change state. See). The numerical values described in the left column of FIGS. 28A and 28B are jackpot determination values. When the value of the random R matches any one of the jackpot determination values, the CPU 56 determines that the jackpot is to be made. The CPU 56 extracts the count value of the random number circuit at a predetermined time and uses the extracted value as the jackpot determination random value. When the jackpot determination random value matches the jackpot determination value shown in FIG. Is determined to be a big hit (probable big hit or normal big hit).

  The probability variation jackpot is a jackpot that shifts the gaming state after the jackpot game to a probability variation state in which there is a high probability of being determined to be a jackpot compared to the normal state. Usually, the big hit is a big hit that shifts the gaming state after the big hit game to a state that is not a probable change state. Note that the number of rounds in the case of a probable big hit and the normal big hit is larger than that in the case of a small hit and a sudden probable big hit, for example, 15 rounds.

  The small hit is a big hit in which the number of times of opening of the big winning opening is allowed up to two in the big hit gaming state. Note that when the small hit game ends, the gaming state does not shift to the probable change state. Suddenly probable jackpot is a jackpot where the number of times the big prize opening is allowed is 2 in the big hit gaming state, but the opening time of the big prize opening is extremely short, and the gaming state after the big hit game is shifted to the probable state It ’s a big hit. That is, in this embodiment, the number of rounds is the same between the sudden probability big hit and the small hit.

  In addition, in the big hit game of sudden probability change big hit, the number of rounds is smaller than that in the case of normal big hit and probability variable big hit, and the allowance opening allowance time of each round (for example, 29 seconds in the case of normal big hit and probability variable big hit) On the other hand, 0.5 seconds) is shorter than the case of the normal big hit and the probability variation big hit, but only the number of rounds may be reduced, or only the allowance opening allowance time may be shortened.

  FIG. 29 is an explanatory diagram showing an example of a variation pattern used in this embodiment. As will be described later, in this embodiment, the presentation control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). In FIG. 29, “EXT” indicates EXT data of the second byte in the effect control command having a two-byte structure. “Variation time” indicates the variation time of the special symbol (variable display period of identification information).

  “Normal fluctuation” is a fluctuation pattern without a reach mode. “Normal fluctuation / shortening” is a fluctuation pattern without a reach mode and a fluctuation time shorter than “normal fluctuation”. “Normal reach” is a variation pattern that is accompanied by a reach mode but whose display result (stop symbol) does not become a big hit symbol. “Reach A” is a variation pattern having a reach form different from “normal reach”. When the reach mode is different, the change mode (speed, rotation direction, etc.), character image, etc. appear in the effect display device 9 during the reach change time (the period during which the reach effect is performed), or the effect display device 9 The background design is different. For example, in “normal reach”, a reach mode is realized by only one type of change mode, whereas in “reach A”, a reach mode including a plurality of change modes having different speeds and directions of change is realized. Further, “reach A / shortening” is a variation pattern having a reach manner similar to “reach A”, but reach variation time is shorter than “reach A”. “Reach A / Extension” is a variation pattern having a reach manner similar to “Reach A”, but the reach variation time is longer than “Reach A”.

  “Reach B” is a fluctuation pattern having a reach mode different from “Normal reach” and “Reach A”. Further, “reach B / shortening” is a variation pattern having a reach manner similar to “reach B”, but the reach variation time is shorter than “reach B”. “Reach B / extension” is a variation pattern having a reach manner similar to “reach B”, but reach variation time is longer than “reach B”. “Reach C” is a variation pattern having a reach form different from “normal reach”, “reach A”, and “reach B”. “Reach C / shortening” is a variation pattern having a reach manner similar to “reach C”, but reach variation time is shorter than “reach C”.

  “Super reach A” is a variation pattern having a reach mode different from “normal reach”, “reach A”, “reach B”, and “reach C”. is there. “Super reach B” is a variation pattern having a reach form different from “normal reach”, “reach A”, “reach B”, “reach C” and “super reach A”. This is a variation pattern. “Reach A / Accuracy” is a variation pattern having a reach form different from “Normal reach”, “Reach A”, “Reach B”, “Reach C”, “Super reach A” and “Super reach B”. It should be noted that the reach form of “reach A / accuracy” is a reach form similar to “reach A”.

  In this embodiment, in the case of a big hit, the game control microcomputer 560 is “reach A / shortening”, “reach A”, “reach B / shortening”, “reach B”, “reach C / shortening”. ", Reach C", "Super Reach A" or "Super Reach B". Further, in the case of a probable big hit, the game control microcomputer 560 is “reach A / extension”, “reach B / extension”, “reach C / shortening”, “reach C”, “super reach A” or “ Select "Super Reach B". In case of sudden big odds, select “Reach A / Random”.

  Further, as shown in FIG. 29, a variation pattern selected only in the case of a normal big hit, a variation pattern selected only in the case of a probable big hit, and a normal big hit and a probable big hit can be selected. There are fluctuation patterns.

  In the short-time state, the fluctuation patterns of “normal fluctuation / shortening”, “reach A / shortening”, “reach B / shortening”, and “reach C / shortening” are selected. In the non-time-short state, other variation patterns are selected. However, the variation pattern of “reach A / accuracy” is used in both the short-time state and the non-short-time state.

  In this embodiment, when a big hit occurs and the big hit game ends, the gaming state becomes a short-time state thereafter until the execution of 100 special symbol changes (variable display) is completed. In addition, when variable display of a special symbol is started when variable display is finished, when it is decided to change to a probable change state when the special symbol variable display is started, the game state is changed into a probable change state when the big hit game is ended. To be migrated. If the gaming state at that time is a probability variation state, the probability variation state is continued.

  After the transition to the probability changing state, the state of the probability changing state is short and the state is short until the execution of the variation (variable display) of 100 special symbols is completed. In addition, in the non-probability change state after the big hit game is over, the game state is changed to the normal state (the game state that is not the probability change state and not the short-time state) when the execution of 100 special symbol changes (variable display) is completed. Transition.

  Next, a method for sending a control command from the game control microcomputer 560 to the effect control microcomputer 100 will be described. In this embodiment, the effect control command is converted from parallel data to serial data by the serial output circuit 78 and transmitted from the main board 31 to the effect control board 80 via the relay board 77.

  In this embodiment, the effect control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). The first bit (bit 7) of the MODE data is always set to “1”, and the first bit (bit 7) of the EXT data is always set to “0”. Note that such a command form is an example, and other command forms may be used. For example, a control command composed of 1 byte or 3 bytes or more may be used.

  FIG. 30 is an explanatory diagram showing an example of the format of the effect control command transmitted by the serial signal method. As shown in FIG. 30, when transmitting the effect control command, the game control microcomputer 560 (specifically, the CPU 56) first adds header data and mark bits to MODE data (MODE data to which an address is added), Transmission control is performed by adding an end bit. Then, the serial output circuit 78 converts the MODE data to which the header data, the address, the mark bit, and the end bit are added into serial data, and transmits the serial data to the effect control board 80 via the relay board 77. Next, the game control microcomputer 560 performs transmission control by adding header data, mark bits, and end bits to EXT data (EXT data with an address added). Then, the serial output circuit 78 converts the EXT data to which the header data, the address, the mark bit, and the end bit are added into serial data, and transmits the serial data to the effect control board 80 via the relay board 77.

  FIG. 31 is an explanatory diagram showing an example of the contents of the effect control command transmitted by the game control microcomputer 560. In the example shown in FIG. 31, commands 8001 (H) to 800E (H) are effect control commands (variation) for designating a variation pattern of decorative symbols variably displayed on the effect display device 9 in response to variable display of special symbols. Pattern command). The effect control command for designating the variation pattern is also a command for designating the variation start. Therefore, when the production control microcomputer 100 receives any of the commands 8001 (H) to 800E (H), the production display device 9 performs control so that variable display of the decorative symbols is started. In this embodiment, since the variable display of the special symbol and the variable display of the decorative symbol are synchronized (the variable display start time and the variable display end time are the same), the decorative pattern variation pattern (variation time) Determining also means determining the variation pattern (variation time) of the special symbol.

  The commands 8C01 (H) to 8C05 (H) are effect control commands indicating whether or not to make a big hit and the type of the big hit game. The effect control microcomputer 100 determines the display result of the decorative symbols in response to the reception of the commands 8C01 (H) to 8C05 (H), so the commands 8C01 (H) to 8C05 (H) are referred to as display result specifying commands.

  Command 8F00 (H) is an effect control command (symbol confirmation designation command) indicating that the variable display (fluctuation) of the decorative symbols is terminated and the display result (stop symbol) is derived and displayed. When receiving the symbol confirmation designation command, the effect control microcomputer 100 ends the variable display (fluctuation) of the decorative symbols and derives and displays the display result. The derived display is to finally stop and display the symbol.

  Command 9000 (H) is an effect control command (initialization designation command: power-on designation command) transmitted when power supply to the gaming machine is started. Command 9200 (H) is an effect control command (power failure recovery designation command) transmitted when power supply to the gaming machine is resumed. When the power supply to the gaming machine is started, the gaming control microcomputer 560 transmits a power failure recovery designation command if data is stored in the backup RAM, and if not, initialization designation is performed. Send a command.

  Command 9F00 (H) is an effect control command (customer waiting demonstration designation command) for designating a customer waiting demonstration. The command 9F55 (H) is an effect control command (random number circuit error designation) for designating notification of a random number circuit error of the main board 31 when the occurrence of an abnormality in the random number circuit is detected in the random number circuit check process in the main process. Command).

  The commands A001 to A004 (H) are effect control commands for displaying the fanfare screen, that is, designating the start of the big hit game (big hit start designation command: fanfare designation command). The jackpot start designation commands include jackpot start 1 designation to jackpot start designation 4 designation commands depending on the type of jackpot. The command A1XX (H) is an effect control command (special command during opening of the big winning opening) indicating a display during the opening of the big winning opening for the number of times (round) indicated by XX. A2XX (H) is an effect control command (designation command after opening the big winning opening) indicating the closing of the big winning opening for the number of times (round) indicated by XX.

  Command A301 (H) displays a jackpot end screen, that is, specifies the end of the jackpot game and an effect control command (special jackpot end 1 designation command: ending) that specifies that the jackpot game is a non-probable big hit (usually a big hit) 1 designation command). The command A302 (H) is an effect control command for displaying the jackpot end screen, that is, the end of the jackpot game and specifying that it is a promising big hit (a jackpot end 2 designation command: an ending 2 designation command). is there.

  Command D001 (H) is an effect control command (abnormal winning notification designation command) for instructing notification of abnormal winning.

  The command FF02 (H) notifies that a full tank error has occurred when the lower pan (the surplus ball receiving tray 4) is full (that is, when the full tank switch is turned on). This is an effect control command to be designated (full error notification designation command). The command FF01 (H) is an effect control command for designating cancellation of the full-tan error notification when the full-plate state of the lower pan is released (that is, when the full-tan switch is turned off). (Full tank error release specification command).

  The command FF04 (H) specifies that the door opening error is notified when the game frame 11 is opened (that is, when the detection signal of the door opening sensor 155 is detected). This is a command (door opening error notification designation command). The command FF03 (H) is an effect control command (door opening error release specifying command) that specifies that the notification of the door opening error is released when the open state of the game frame 11 is released.

  Command FF06 (H) is an effect control command (out of ball) that specifies that a ball out error has occurred when the ball is out of state (that is, when the ball out switch is turned on). Error notification designation command). The command FF05 (H) is an effect control command (ball-out error cancel designation command) that designates cancellation of the ball-out error notification when the ball-out state is released.

  The command FF08 (H) is an effect control command (prize ball error notification designation command) for designating notification that a prize ball error has occurred when a prize ball error has occurred. The command FF07 (H) is an effect control command (prize ball error cancel designation command) that designates canceling the notification of the prize ball error when the prize ball error is canceled.

  The effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80 receives the above-described effect control command from the game control microcomputer 560 mounted on the main board 31. Then, the display state of the effect display device 9 is changed according to the contents shown in FIG. 31, the display state of the lamp is changed, or the sound number data is output to the audio output board 70.

  FIG. 32 is an explanatory diagram illustrating an example of the transmission timing of the effect control command. As shown in FIG. 32, the game control microcomputer 560 transmits a change pattern command and a display result specifying command at the start of change. When the variable display time has elapsed, a symbol confirmation designation command is transmitted.

  Before transmitting the variation pattern command, a background designation command for designating a background image in the effect display device 9 according to the gaming state (for example, normal state / short time state / probability variation state) may be transmitted. Further, an effect control command indicating the number of reserved memories may be transmitted following the display result specifying command.

  FIG. 33 and FIG. 34 are flowcharts showing an example of a special symbol process process (step S27) program executed by the game control microcomputer 560 (specifically, the CPU 56) mounted on the main board 31. As described above, in the special symbol process, a process for controlling the special symbol display 8 and the special winning opening is executed. In the special symbol process, if the first start port switch 13a or the second start port switch 14a for detecting that a game ball has won the start winning port 13 is turned on, that is, a start winning is generated. If so, start port switch passage processing is executed (steps S311 and S312). Then, any one of steps S300 to S310 is performed.

  The processes in steps S300 to S310 are as follows.

  Special symbol normal processing (step S300): Executed when the value of the special symbol process flag is zero. When the game control microcomputer 560 is ready to start the variable display of the special symbol, it checks the number of reserved memories (the number of start winning memories). The reserved memory number can be confirmed by the count value of the reserved memory number counter. If the number of reserved memories is not 0, it is determined whether or not to win. Then, the internal state (special symbol process flag) is updated to a value (1 in this example) corresponding to step S301.

  Fluctuation pattern setting process (step S301): This process is executed when the value of the special symbol process flag is 1. The stop symbol after the variable display of the special symbol is determined. Also, the variation pattern is determined, and the variation time in the variation pattern (variable display time: the time from when the variable display is started until the display result is derived and displayed (stop display)) is defined as the variable symbol variation display time. Decide to do. Also, a variable time timer for measuring the special symbol variable time is started. Then, the internal state (special symbol process flag) is updated to a value (2 in this example) corresponding to step S302.

  Display result specifying command transmission process (step S302): This process is executed when the value of the special symbol process flag is 2. Control for transmitting a display result specifying command to the production control microcomputer 100 is performed. Then, the internal state (special symbol process flag) is updated to a value (3 in this example) corresponding to step S303.

  Special symbol changing process (step S303): This process is executed when the value of the special symbol process flag is 3. When the variation time of the variation pattern selected in the variation pattern setting process elapses (the variation time timer set in step S301 times out, that is, the variation time timer value becomes 0), the internal state (special symbol process flag) is stepped. Update to a value corresponding to S304 (4 in this example).

  Special symbol stop process (step S304): executed when the value of the special symbol process flag is 4. The variable display on the special symbol display 8 is stopped and the stop symbol is derived and displayed. In addition, control for transmitting a symbol confirmation designation command to the effect control microcomputer 100 is performed. If the big hit flag is set and the small hit flag is not set, the internal state (special symbol process flag) is updated to a value corresponding to step S305 (5 in this example). If the small hit flag is set, the internal state (special symbol process flag) is updated to a value (8 in this example) corresponding to step S308. If the big hit flag is not set, the internal state (special symbol process flag) is updated to a value corresponding to step S300 (0 in this example). The effect control microcomputer 100 controls the effect display device 9 to stop the decorative symbols when the symbol confirmation designation command transmitted by the game control microcomputer 560 is received.

  Preliminary winning opening opening process (step S305): This is executed when the value of the special symbol process flag is 5. In the pre-opening process for the big prize opening, control for opening the big prize opening is performed. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized, and the solenoid 21 is driven to open the big prize opening. Also, the execution time of the special prize opening opening process is set by the timer, and the internal state (special symbol process flag) is updated to a value corresponding to step S306 (6 in this example). Note that the pre-opening process for the big winning opening is executed for each round, but when the first round is started, the pre-opening process for opening the big winning opening is also a process for starting the big hit game.

  Large winning opening open process (step S306): This process is executed when the value of the special symbol process flag is 6. A control for transmitting an effect control command for round display during the big hit gaming state to the effect control microcomputer 100, a process for confirming the completion of the closing condition of the big prize opening, and the like are performed. If the closing condition for the big prize opening is satisfied and there are still remaining rounds, the internal state (special symbol process flag) is updated to a value corresponding to step S305 (5 in this example). When all the rounds are completed, the internal state (special symbol process flag) is updated to a value corresponding to step S307 (7 in this example).

  Big hit end process (step S307): executed when the value of the special symbol process flag is 7. Control for causing the microcomputer 100 for effect control to perform display control for notifying the player that the big hit gaming state has ended is performed. Also, a process for setting a flag (for example, a probability change flag) indicating the gaming state is performed. Then, the internal state (special symbol process flag) is updated to a value (0 in this example) corresponding to step S300.

  Small hit release pre-processing (step S308): This process is executed when the value of the special symbol process flag is 8. In the pre-opening process for small hits, control is performed to open the big prize opening. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized, and the solenoid 21 is driven to open the big prize opening. Also, the execution time of the special prize opening opening process is set by the timer, and the internal state (special symbol process flag) is updated to a value corresponding to step S309 (9 in this example). It should be noted that the small hit pre-release process is executed for each round, but when the first round is started, the small hit pre-release process is a process for starting the small hit game.

  Small hit release processing (step S309): executed when the value of the special symbol process flag is 9. A control for transmitting an effect control command for a round display during the small hit gaming state to the effect control microcomputer 100, a process for confirming that the closing condition for the big prize opening is satisfied, and the like are performed. If the closing condition for the special prize opening is satisfied and there are still remaining rounds, the internal state (special symbol process flag) is updated to a value corresponding to step S308 (8 in this example). When all the rounds are completed, the internal state (special symbol process flag) is updated to a value corresponding to step S310 (in this example, 10 (decimal number)).

  Small hit end processing (step S310): executed when the value of the special symbol process flag is 10. Control is performed to cause the microcomputer 100 for effect control to perform display control for notifying the player that the small hit gaming state has ended. Then, the internal state (special symbol process flag) is updated to a value (0 in this example) corresponding to step S300.

  FIG. 35 is a flowchart showing the start port switch passing process in step S312. In the start port switch passing process, the CPU 56 checks whether or not the reserved storage number is 4 which is the upper limit value (step S211). If the number of reserved memories is 4, the process is terminated.

  If the number of reserved memories is not 4, the value of the reserved memory number counter indicating the number of reserved memories is incremented by 1 (step S212). Further, the CPU 56 extracts software random numbers (counter value for generating a big hit symbol determination random number, etc.) and random R (big hit determination random number), and uses them as an extracted random number value of the reserved memory number counter. A process of storing in the storage area in the storage buffer corresponding to the value is executed (step S213). In step S213, the CPU 56 extracts random values 1 to 3 (see FIG. 27) as software random numbers, and extracts the random R by reading the count value of the random number circuit. In the reserved storage buffer, the same number of storage areas as the upper limit value of the number of reserved memories is secured. Further, a counter for generating a jackpot symbol determination random number and the like and a reserved storage buffer are formed in the RAM 55. “Formed in RAM” means an area in the RAM.

  36 and 37 are flowcharts showing the special symbol normal process (step S300) in the special symbol process. In the special symbol normal process, the CPU 56 checks the value of the number of reserved storage (step S51). Specifically, the count value of the pending storage number counter is confirmed.

  If the number of reserved storage is 0, the CPU 56 checks whether or not a demonstration display flag indicating that a customer waiting demonstration is being displayed is set (step S54). If the demo display flag is set, the process is terminated. If the demonstration display flag is not set, the CPU 56 transmits a customer waiting demonstration designation command (command 9F00 (H)) to the production control microcomputer 100 (step S55) and sets the demonstration display flag (step S56). ).

  If the reserved memory number is not 0, the CPU 56 reads out each random number value stored in the storage area corresponding to the reserved memory number = 1 in the reserved memory number buffer of the RAM 55 and stores it in the random number buffer area of the RAM 55 (step S52). Then, the value of the reserved memory number is decreased by 1 (the count value of the reserved memory number counter is decremented by 1), and the contents of each storage area are shifted (step S53). That is, each random number value stored in the storage area corresponding to the reserved memory number = n (n = 2, 3, 4) in the reserved memory number buffer of the RAM 55 is stored in the storage area corresponding to the reserved memory number = n−1. To store. Therefore, the order in which the random number values stored in the respective storage areas corresponding to the number of reserved memories is extracted always matches the order of the number of reserved memories = 1, 2, 3 and 4. Yes.

  Then, the CPU 56 reads a random R (a jackpot determination random number) from the random number buffer area (step S61), and executes a jackpot determination module (step S62). The big hit judgment module compares the big hit judgment value (see Fig. 28) determined in advance with the big hit judgment random number, and if they match, the big hit (normal big hit, probability variation big hit or sudden probability variation big hit) or small hit This is a program for executing the process to be determined.

  Note that when the gaming state is in the probability variation state, the CPU 56 uses the jackpot determination value in the table in which the jackpot determination value as shown in FIG. 28B is set, and the gaming state is in the normal state (non-probability variation state). Is, the jackpot determination value in the table in which the jackpot determination value as shown in FIG. 28 (A) is set is used. If it is determined to be a big hit (step S63), the process proceeds to step S81. Note that deciding whether or not to make a big hit means deciding whether or not to shift to the big win gaming state, but deciding whether or not to make the stop symbol in the special symbol display 8 a big hit symbol. It is also a thing.

  If it is decided not to win, the CPU 56 reads out the design symbol random number from the random number buffer area (step S64), and determines the stop symbol based on the design symbol random number (step S65). In this case, an off symbol (for example, any of even symbols) is determined.

  Further, when the time reduction flag indicating the time reduction state is set (step S66), the value of the time reduction counter indicating the number of times the special symbol can be changed in the time reduction state is decremented by 1 (step S67). When the value of the time reduction counter becomes 0, a time reduction end flag is set in order to shift the gaming state to the non-time reduction state when the variable display ends (steps S68 and S69). Then, the process proceeds to step S90.

  In step S81, the CPU 56 sets a big hit flag. Then, the big hit symbol determination random number is read from the random number buffer area (step S82), and the big hit symbol (for example, one of the odd symbols) as the stop symbol is determined based on the big hit symbol determination random number (step S83). Here, the stop symbol is determined without distinguishing between the probable big hit and the normal big hit.

  Next, the CPU 56 sets a probability variation jackpot flag if it is determined to be a probability variation jackpot (steps S84 and S85). If it is determined that the sudden probability change big hit is suddenly set, the sudden probability change big hit flag is set (steps S86 and S87). If it is determined to be a small hit, a small hit flag is set (steps S88 and S89). Then, the value of the special symbol process flag is updated to a value corresponding to the variation pattern setting process (step S301) (step S90). When the probability variation big hit flag or the sudden probability variation big hit flag is set, the gaming state is shifted to the probability changing state when the big hit game is finished.

  In this embodiment, whether or not to make a big hit and the type of big hit are determined based on the big hit determination random number (see FIG. 28), but the big hit is determined based on the big hit determination random number. When it is decided whether to win or not, when a predetermined big hit symbol (predetermined probable big hit symbol or suddenly probable big hit symbol) is determined based on the random number for determining the big hit symbol You may make it control to a probability change state.

  FIG. 38 is a flowchart showing the variation pattern setting process (step S301) in the special symbol process. In the variation pattern setting process, the CPU 56 reads the variation pattern determination random number from the random number buffer area (step S100). Then, the variation pattern is determined based on the variation pattern determination random number (step S101).

  Here, when the gaming state is a non-time saving state and it is determined to be out of play, “normal variation” or “normal reach” is selected (see FIG. 29). If the gaming state is a non-time-saving state and it is determined to be a big hit, “reach A”, “reach A / extension”, “reach B”, “reach B / extension”, “reach C” ”,“ Super Reach A ”,“ Super Reach B ”or“ Reach A · Accuracy ”(see FIG. 29). When it is determined to be a promising big hit out of the big hits, “reach A / extension”, “reach B / extension”, “reach C”, “super reach A” or “super reach B” is selected. In addition, when it is determined that the sudden probability change is a big hit, “reach A / accuracy” is selected. When it is determined to be a big hit (including the case where it is determined to be a small hit) among the big hits (including the case where it is determined to be a small hit), “ Select Reach A, Reach B, Reach C, or Super Reach A.

  When the game state is the short time state and it is determined to be out of play, “normal variation / shortening” is selected (see FIG. 29). If the gaming state is a short-time state and it has been decided to win the game, select “Reach A / Shorten”, “Reach B / Short”, “Reach C / Short” or “Reach A / Success” Select (see FIG. 29). When it is determined to be a promising big hit out of the big hits, “reach C / shortening” is selected. When it is decided to suddenly change the probability big hit, select “reach A / accuracy”. When it is determined that the big hit is usually a big hit (including the case where it is decided to be a small hit), “reach A / shortening”, “reach B / shortening” or “reach C”・ Select “Short”.

  In order to facilitate the selection as described above, a variation pattern table is used according to the game state (whether or not it is a short-time state) and the decision result of whether or not to make a big hit (respectively, each of the types of losing and big hits) . The variation pattern table is stored in the ROM 54, but is prepared according to the gaming state and the determination result as to whether or not to win. In each variation pattern table, data indicating a variation pattern that can be selected and a numerical value corresponding to the data are set. Then, the CPU 56 selects a variation pattern table according to the gaming state and the determination result as to whether or not to win, and corresponds to a numerical value that matches the value of the variation pattern determination random number in the selected variation pattern table. Select a variation pattern. Therefore, the game control microcomputer 560 selects the variation pattern depending on whether or not the jackpot has already been determined and whether or not the probability variation jackpot.

  Then, the CPU 56 performs control to transmit a variation pattern command (see FIG. 29) corresponding to the variation pattern selected in step S101 to the effect control microcomputer 100 (step S103). Specifically, when the CPU 56 transmits an effect control command to the effect control microcomputer 100, the address of the command transmission table (preliminarily set for each command in the ROM) corresponding to the effect control command is used as a pointer. set. Then, the address of the command transmission table corresponding to the effect control command is set in the pointer, and the effect control command is transmitted in the effect control command control process (step S29).

  Moreover, the variation of the special symbol is started (step S104). For example, a start flag referred to in the special symbol display control process in step S34 is set. Further, a value corresponding to the variation time (see FIG. 29) corresponding to the selected variation pattern is set in the variation time timer formed in the RAM 55 (step S105). Then, the value of the special symbol process flag is updated to a value corresponding to the display result specifying command transmission process (step S302) (step S106).

  FIG. 39 is a flowchart showing the display result specifying command transmission process (step S302). In the display result specifying command transmission process, the CPU 56 performs any one of the display control 1 designation to the display result 5 designation according to the determined type of jackpot (including the jackpot) (see FIG. 31). Control to send. Specifically, the CPU 56 first checks whether or not the big hit flag (which is also set when the small hit is determined) is set (step S110). If not set, control is performed to transmit a display result 1 designation command (step S111). When the big hit flag is set, when the probability variation big hit flag is set, control for transmitting the display result 4 designation command is performed (steps S112 and S113). When the sudden probability big hit flag is set, control for transmitting a display result 5 designation command is performed (steps S114 and S115). When the small hit flag is set, control for transmitting a display result 3 designation command is performed (steps S116 and S117). When none of the probability variation big hit flag, sudden probability variation big hit flag, and small hit flag is set, control is performed to transmit a display result 2 designation command (step S118). Then, the value of the special symbol process flag is updated to a value corresponding to the special symbol changing process (step S303) (step S119).

  FIG. 40 is a flowchart showing the special symbol changing process (step S303) in the special symbol process. In the special symbol changing process, the CPU 56 decrements the variable time timer by 1 (step S121), and when the variable time timer times out (step S122), the value of the special symbol process flag corresponds to the special symbol stop process (step S304). The updated value is updated (step S123). If the variable time timer has not timed out, the process ends.

  FIG. 41 is a flowchart showing the special symbol stop process (step S304) in the special symbol process. In the special symbol stop process, the CPU 56 sets an end flag referred to in the special symbol display control process in step S34 to end the variation of the special symbol, and performs control for deriving and displaying the stop symbol on the special symbol display 8. (Step S131). Moreover, control which transmits the symbol determination designation | designated command to the microcomputer 100 for production control is performed (step S132). When the big hit flag is not set, the process proceeds to step S146 (step S133).

  When the jackpot flag is set, the CPU 56 performs control to transmit a jackpot start designation command (step S135). Specifically, when the probability variation big hit flag is set, a big hit start 3 designation command is transmitted, and when the probability variation big hit flag is suddenly set, a big hit start 4 designation command is transmitted. If it is set, a jackpot start 2 designation command is transmitted. Otherwise, a jackpot start 1 designation command is transmitted.

  Also, a value corresponding to the big hit display time (time for notifying that the big hit has occurred, for example, in the effect display device 9) is set in the big hit display time timer (step S136). If the small hit flag is set, the value of the special symbol process flag is updated to a value corresponding to the small hit release pre-processing (step S308) (steps S137 and S138). If the small hit flag is not set, the value of the special symbol process flag is updated to a value corresponding to the pre-opening process for the big prize opening (step S305) (step S139). The case where the small hit flag is not set is a case where the normal big hit, the probability variation big hit or the sudden probability variation big hit is determined.

  In step S146, the CPU 56 checks whether or not the time reduction end flag is set. If the time saving end flag is not set, the process proceeds to step S149. If the time reduction end flag is set, the time reduction end flag is reset (step S147), and the time reduction flag indicating that the gaming state is the time reduction state is reset (step S148). Then, the value of the special symbol process flag is updated to a value corresponding to the special symbol normal process (step S300) (step S149).

  The time reduction end flag is set in step S69 in the special symbol normal process. In addition, the gaming state shifts to a non-time saving state by resetting the time saving flag. At this stage, if the gaming state is a probability variation state, the gaming state becomes a probability variation state of a non-short-time state. On the other hand, if it is in the non-probable change state, it shifts to a normal state (a state that is not in the probabilistic change state and is not in the time-short state).

  In the big winning opening opening pre-processing, when the big hit display time timer is set, the CPU 56 controls to open the big winning opening when the big hit display time timer times out, and sets the big winning opening opening time timer. Set a value corresponding to the opening time (for example, 29 seconds for normal big hits and probable big hits, and 0.5 seconds for sudden big odds), and the special symbol process flag value is processed while the big prize opening is open The value is updated to a value corresponding to (Step S306). The case where the big hit display time timer is set is the case before the start of the first round. When an interval timer (timer for determining the interval time between rounds) is set, when the interval timer times out, control is performed to open the big prize opening, and the opening time ( For example, a value corresponding to 29 seconds is set for a normal big hit and a promising big hit, and a value corresponding to 0.5 seconds is set for a sudden probable big hit. ) To a value corresponding to.

  In the process during opening of the big prize opening, the CPU 56 does not finish the final round when the big prize opening time timer times out or the number of winning balls to the big prize opening reaches a predetermined number (for example, 10). In this case, control for closing the special winning opening is performed, a value corresponding to the interval time is set in the interval timer, and the value of the special symbol process flag is set to a value corresponding to the pre-opening process for the special winning opening (step S305). Update. When the final round is completed, the value of the special symbol process flag is updated to a value corresponding to the jackpot end process (step S307).

  FIG. 42 is a flowchart showing the big hit end process (step S307) in the special symbol process. In the jackpot end process, the CPU 56 checks whether or not the jackpot end display timer is set (step S150). If the jackpot end display timer is set, the process proceeds to step S154. If the jackpot end display timer is not set, the jackpot flag is reset (step S151), and control for transmitting a jackpot end designation command is performed (step S152). Here, if the probability variation jackpot flag or the sudden probability variation bonus flag is set, a jackpot end 2 designation command is transmitted, and if the probability variation jackpot flag or the sudden probability variation bonus flag is not set, the jackpot end 1 designation is specified. Send a command. Then, a value corresponding to the display time corresponding to the time during which the big hit end display is performed on the effect display device 9 (big hit end display time) is set in the big hit end display timer (step S153), and the processing is ended.

  In step S154, 1 is subtracted from the value of the big hit end display timer. Then, the CPU 56 checks whether or not the value of the jackpot end display timer is 0, that is, whether or not the jackpot end display time has elapsed (step S155). If not, the process ends. If it has elapsed, the time reduction flag is set to shift the gaming state to the time reduction state (step S156), and 100 is set in the time reduction counter (step S157).

  Then, it is confirmed whether or not the probability variation big hit flag or the sudden probability variation big flag is set (step S158). If the probability variation big hit flag or sudden probability variation big win flag is set, the set flag (probability big hit flag or sudden probability variation big flag) is reset (step S159), the probability variation flag is set and the gaming state is set. The state is changed to a certain change state (step S161). If the gaming state at that time is a probability variation state, the probability variation flag has already been set. Then, the value of the special symbol process flag is updated to a value corresponding to the special symbol normal process (step S300) (step S162).

  In the pre-opening process for small hits in step S308, the same process as the pre-opening process for the big prize opening (step S305) is performed. However, instead of updating the value of the special symbol process flag to a value corresponding to the large winning opening opening process, the special symbol process flag is updated to a value corresponding to the small hit opening process. Further, in the small hit opening process in step S309, the same process as the big prize opening opening process (step S306) is performed. However, if it is not the final round, the value of the special symbol process flag is updated to a value corresponding to the small hit release pre-processing (step S308), and if it is the final round (second round), the value of the special symbol process flag Is updated to a value corresponding to the small hit end process (step S310).

  FIG. 43 is a flowchart showing the small hit end process (step S310) in the special symbol process. In the small hit end process, the CPU 56 checks whether or not the small hit end display timer is set (step S170). If the small hit end display timer is set, the process proceeds to step S174. When the big hit end display timer is not set, the big hit flag and the small hit flag are reset (steps S171A and S171B), and control for transmitting the big hit end 1 designation command is performed (step S172). Then, the small hit end display timer sets a value corresponding to the display time corresponding to the time during which the small hit end display is performed in the effect display device 9 (small hit end display time) in the small hit end display timer ( Step S173), the process is terminated.

  In step S174, 1 is subtracted from the value of the small hit end display timer. Then, the CPU 56 checks whether or not the value of the small hit end display timer is 0, that is, whether or not the small hit end display time has elapsed (step S175). If not, the process ends. If it has elapsed, the value of the special symbol process flag is updated to a value corresponding to the special symbol normal process (step S300) (step S176).

  FIG. 44 is a flowchart showing the abnormal winning notification process in step S23. In the abnormal winning notification process, the CPU 56 checks whether or not an abnormal notification prohibition flag is set (step S581). The abnormality notification prohibition flag is set in the main process executed when power supply to the gaming machine is started (see step S44 in FIG. 25). When the abnormality notification prohibition flag is not set, the process proceeds to step S585. If the abnormality notification prohibition flag is set, the value of the prohibition period timer set in step S45 is decremented by 1 (step S582). When the value of the prohibition period timer becomes 0, that is, when the prohibition period timer times out, the abnormality notification prohibition flag is reset (steps S583 and S584).

  Next, it is confirmed whether or not the value of the special symbol process flag is 5 or more (step S585). The state where the value of the special symbol process flag is 5 or more is a state where a big hit game or a small hit game is being played. In such a state, there is a possibility that a game ball may win the big winning opening, so it is not confirmed that an abnormal winning has occurred in the big winning opening. That is, if the value of the special symbol process flag is 5 or more, the abnormal winning notification process is terminated.

  If the value of the special symbol process flag is less than 5 (a state where neither big hit game nor small hit game is played), the CPU 56 loads the contents of the switch-on buffer into the register (step S586). Then, the logical product of the content of the loaded switch-on buffer and the count switch input bit determination value (for example, 02 (H)) is calculated (step S587). When the content of the switch-on buffer is 02 (H), that is, when the count switch 23 is on, the logical product operation result is 02 (H). When the count switch 23 is not turned on, the operation result of the logical product is 0 (00 (H)).

  If the result of the logical product is not 0, it is determined that an abnormal winning at the special winning opening has occurred, and control is performed to transmit an abnormal winning notification designation command to the effect control board 80 (steps S588 and S589).

  When the count switch 23 is turned on in a state where neither a big hit game nor a small hit game is performed by the above processing, an abnormal winning notification designation command is transmitted. Further, the process of steps S581 to S583 prohibits the start of abnormality notification when the effect control microcomputer 100 is performing initialization notification. Note that the production control microcomputer 100 continues to execute the initialization notification until the period corresponding to the prohibition period has elapsed since the start of the initialization notification.

Next, the operation of the effect control means will be described.
FIG. 45 is a flowchart showing a main process executed by the effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80. The effect control CPU 101 starts executing the main process when the power is turned on. In the main processing, first, initialization processing is performed for clearing the RAM area, setting various initial values, and initializing a timer for determining the activation control activation interval (for example, 1 ms) (step S701). .

  Then, the effect control CPU 101 proceeds to a loop process for monitoring the timer interrupt flag (step S702). When a timer interrupt occurs, the effect control CPU 101 sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the effect control CPU 101 clears the flag (step S703) and executes the effect control process.

  In the effect control process, the effect control CPU 101 first analyzes the received effect control command and executes a process of setting a flag according to the received effect control command (command analysis process: step S704). Next, the effect control CPU 101 executes effect control process processing (step S705). In the effect control process, the process corresponding to the current control state (effect control process flag) is selected from the processes corresponding to the control state, and display control of the effect display device 9 is executed. In addition, a random number update process for updating a counter value of a counter for generating a predetermined random number (for example, a random number for determining a stop symbol) is executed (step S706). Moreover, the notification control process process which performs notification using an effect device such as the effect display device 9 is executed (step S707). Furthermore, the serial input / output process which outputs the data set by the command analysis process, the effect control process process, and the notification control process process to the serial output circuit 353, and reads the data received from the input ICs 620 and 621 from the serial input circuit 354. Is executed (step S708). Thereafter, the process proceeds to step S702.

  FIG. 46 is an explanatory diagram showing a configuration example of a command reception buffer for storing the effect control command received from the game control microcomputer 560 of the main board 31. In this example, a command reception buffer in the form of a ring buffer capable of storing six 2-byte effect control commands is used. Therefore, the command reception buffer is configured by a 12-byte area of reception command buffers 1 to 12. A command reception number counter indicating in which area the received command is stored is used. The command reception number counter takes a value from 0 to 11. The ring buffer format is not necessarily required.

  The effect control command transmitted from the game control microcomputer 560 is received by an interrupt process based on the effect control INT signal, and is stored in a buffer area formed in the RAM. In the command analysis process, it is analyzed which command (see FIG. 31) the effect control command stored in the buffer area is.

  47 to 49 are flowcharts showing specific examples of command analysis processing (step S704). The effect control command received from the main board 31 is stored in the reception command buffer, but in the command analysis process, the effect control CPU 101 confirms the content of the command stored in the command reception buffer.

  In the command analysis process, the effect control CPU 101 first checks whether or not a reception command is stored in the command reception buffer (step S611). Whether it is stored or not is determined by comparing the value of the command reception number counter with the read pointer. The case where both match is the case where the received command is not stored. When the received command is stored in the command receiving buffer, the effect control CPU 101 reads the received command from the command receiving buffer (step S612). When reading is performed, the value of the read pointer is incremented by 2 (step S613). The reason for +2 is that 2 bytes (1 command) are read at a time.

  If the received effect control command is a variation pattern command (step S614), the effect control CPU 101 stores the variation pattern command in a variation pattern command storage area formed in the RAM (step S615). Then, a variation pattern command reception flag is set (step S616).

  If the received effect control command is a display result specifying command (step S617), the effect control CPU 101 stores the display result specifying command in a display result specifying command storage area formed in the RAM (step S618). . Then, a display result specifying command reception flag is set (step S619).

  If the received effect control command is a symbol confirmation designation command (step S621), the effect control CPU 101 sets a confirmed command reception flag (step S622).

  If the received effect control command is one of the jackpot start 1-4 designation commands (step S623), the effect control CPU 101 sets the jackpot start 1-4 designation command reception flag (step S624).

  If the received effect control command is a customer waiting demonstration designation command (step S625), the effect control CPU 101 sets a customer waiting demonstration execution flag (step S626).

  If the received effect control command is a power-on specification command (initialization specification command) (step S631), the effect control CPU 101 displays an initial screen on the effect display device 9 indicating that the initialization process has been executed. Control is performed (step S632A). The initial screen includes an initial display of predetermined production symbols. Also, an initial notification flag is set (step S632B), and a RAM clear flag is set (step S632C).

  If the received effect control command is a power failure recovery designation command (step S633), a predetermined power failure recovery screen (screen for displaying information notifying the player that the gaming state is continuing) is displayed. Display control is performed (step S634), and an initial notification flag is set (step S635).

  If the received effect control command is a jackpot end 1 designation command (step S641), the effect control CPU 101 sets a jackpot end 1 designation command reception flag (step S642). If the received effect control command is a jackpot end 2 designation command (step S643), the effect control CPU 101 sets a jackpot end 2 designation command reception flag (step S644).

  If the received effect control command is an abnormal prize notification designation command (step S645), the effect control CPU 101 sets an abnormal prize notification designation command reception flag (step S646).

  If the received effect control command is a random number circuit error designation command (step S647), the effect control CPU 101 sets a random number circuit error flag (step S648).

  If the received production control command is a full tank error release designation command (step S649), the production control CPU 101 resets the full tank error notification flag set in step S652 described later and sets an error notification release flag ( Step S650).

  If the received production control command is a full tank error notification designation command (step S651), the production control CPU 101 sets a full tank error notification flag (step S652).

  If the received effect control command is a door opening error release designation command (step S653), the effect control CPU 101 resets the door opening error notification flag set in step S656, which will be described later, and sets the error notification cancellation flag. (Step S654).

  If the received effect control command is a door opening error notification designation command (step S655), the effect control CPU 101 sets a door opening error notification flag (step S656).

  If the received effect control command is a ball break error release designation command (step S657), the effect control CPU 101 resets a ball break error notification flag set in step S660 described later and sets an error notification cancel flag. (Step S658).

  If the received effect control command is a ball-out error notification designation command (step S659), the effect control CPU 101 sets a ball-out error notification flag (step S660).

  If the received effect control command is a prize ball error release designation command (step S661), the effect control CPU 101 resets the prize ball error notification flag set in step S664 described later and sets the error notification release flag. (Step S662).

  If the received effect control command is a prize ball error notification designation command (step S663), the effect control CPU 101 sets a prize ball error notification flag (step S664).

  If the received effect control command is another command, the effect control CPU 101 sets a flag corresponding to the received effect control command (step S665). Then, control goes to a step S611.

  Next, lamp control will be described. First, control of the ceiling lamp will be described. In this embodiment, the production control CPU 101 may cause the LEDs 281a to 281c of the ceiling lamp to emit light in a forward light emission state, and drives the driving motors 90 to 92 to cause the ceiling lamp to move in a predetermined movable manner. In this state, the LEDs 281a to 281c may emit light. FIG. 50 is an explanatory diagram illustrating an example of a movable mode of the ceiling lamp. As shown in FIG. 50, in this embodiment, the effect control CPU 101 causes each of the LEDs 281a to 281c of the ceiling lamp to emit light in the movable state of either the first movable mode or the second movable mode. .

  As shown in FIGS. 50 (A) and 50 (B), the first movable mode is a movable mode in which the LEDs 281a to 281c of the ceiling frame lamp are set in a downward light emitting state to irradiate the player. In this case, in order to prevent the player from being irradiated with light more than necessary, for example, the player is controlled to irradiate the player with a lightness of 9 or less in 16 levels of lightness from 0 to 15. . In this embodiment, when controlling to the first movable mode, the effect control CPU 101 drives the lamp vertical drive motor 90 to move the drive component 96 downward, and the LEDs 281a to 281c are integrated downward. The light emission is made downward by moving it to the right. In addition, for example, the effect control CPU 101 drives the lamp left and right drive motors 91a and 91b to move the LEDs 281a to 281c leftward or rightward, and drives the lamp rotation drive motor 92 to drive the LEDs 281a to 281c. The light may be rotated downward to emit light.

  As shown in FIGS. 50 (C) and 50 (D), the second movable mode is a movable mode in which the LEDs 281a to 281c of the top frame lamp are set in the horizontal light emission state and the oblique side surface direction is irradiated to the gaming machine. is there. In this case, for example, it is controlled to irradiate with a maximum of 15 brightnesses in 16 levels of brightness so that light can be visually recognized even from a passage in a game store.

  In this embodiment, the effect control CPU 101 continuously responds to the gaming state (for example, when a big hit occurs, during a customer waiting demonstration, when a reach effect is being executed, or when an error occurs) By changing to the first movable mode or the second movable mode (according to the number of consecutive big hits (number of consecutive houses) in the case of a big hit), the LEDs 281a to 281c of the ceiling lamp are controlled to emit light.

  In this embodiment, the production control CPU 101 performs control to emit light to the LEDs 281a to 281c of the ceiling lamp by controlling to the second movable mode when a big hit occurs, when a customer waiting demonstration is executed, or when an error occurs. By doing so, when a big hit occurs or during a customer waiting demonstration, by irradiating the game machine with an oblique side surface direction, other game players who are not playing games will be irradiated. And pay attention to other players who are not playing games. In addition, when an error occurs, the game machine clerk irradiates the game machine clerk walking along the aisle by illuminating the game machine in an oblique side direction, and the game clerk recognizes the occurrence of the error from the aisle. It can be so. In addition, in order to make it easier for other players who are not playing games or game clerk to notice, in the second movable mode, each LED 281a to 281c of the top frame lamp is at least 30 degrees or more with respect to the direction perpendicular to the front of the gaming machine It is preferable to irradiate the side of the gaming machine at an angle (ideally about 45 degrees).

  In this embodiment, the production control CPU 101 performs control to emit light to the LEDs 281a to 281c of the top frame lamp by controlling to the first movable mode when the reach production is executed. By doing so, by irradiating the player at the time of reach production, the player's consciousness is raised and the interest is improved.

  In the example shown in FIGS. 50C and 50D, in the second movable mode, each LED 281a to 281c of the top frame lamp is controlled to irradiate the left oblique side surface direction to the gaming machine. However, by switching the dip switch 200 provided on the back surface of the game board 6, it is possible to switch the irradiation direction in the left oblique side surface direction or the right oblique side surface direction in the second movable mode. FIG. 51 is an explanatory diagram illustrating an example of switching the irradiation direction in the second movable mode. As shown in FIG. 51A, when the dip switch 200 is set to illuminate the left side surface direction, the effect control CPU 101 determines that each LED 281a to 281c of the top frame lamp is connected to the gaming machine. Control to illuminate the left oblique side direction. In addition, as shown in FIG. 51B, when the dip switch 200 is set to illuminate the right oblique side surface direction, the effect control CPU 101 determines that each LED 281a to 281c of the top frame lamp is a gaming machine. Is controlled so as to illuminate the direction of the right side surface.

  Next, lamp control related to error notification and jackpot game will be described. FIG. 52 is an explanatory diagram showing an example of lamp control contents executed in response to process data (including error notification process data) when each production control command is received. As shown in FIG. 52, for example, when the effect control CPU 101 receives a jackpot end 1 designation command and sets the gaming state to the normal state, the LED 125a to 125f of the center decoration lamp on the gaming board 6 and the stage Control is performed so that only the LEDs 126a to 126f of the lamp are lit. Then, while the gaming state is the normal state, an effect is made such that only the LED 125a to 125f of the center decoration lamp and the LEDs 126a to 126f of the stage lamp on the gaming board 6 are lit.

  In addition, for example, when the game control CPU 101 receives a jackpot end 2 designation command and changes the gaming state to a probable change state, the center decoration lamp LEDs 125 a to 125 f and the stage lamp LEDs 126 a to 126 f on the gaming board 6. In addition to lighting, the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of each lamp (excluding the dish lamp) on the game frame 11 side are controlled to blink at a predetermined time interval (for example, 1 second). While the gaming state is in the probable state, in addition to the lighting of the center decoration lamps 125a to 125f and the stage lamps LEDs 126a to 126f on the gaming board 6, each lamp on the gaming frame 11 side (excluding the dish lamp) The LEDs 281a to 281c, 282a to 282f, and 283a to 283f are flashed at predetermined time intervals (for example, 1 second).

  Further, for example, when the big hit start designation command is received and the big hit is made, the effect control CPU 101 blinks the center decoration lamps 125a to 125f and the stage lamps LEDs 126a to 126f on the game board 6, An effect is made such that the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of the respective lamps (excluding the dish lamp) on the game frame 11 side are blinked at a time interval (for example, 0.5 seconds) faster than the probability variation state. By performing such an effect, compared to when the gaming state is in the probable state, by flashing more lamps at a faster time interval than in the probable state, compared to when in the promising state when the big hit occurs Can produce a more flashy impression.

  In addition, for example, when the CPU 101 for effect control receives an initialization designation command and issues an initialization notification and a RAM clear notification, the LEDs 281a to 281c of the respective lamps (excluding the dish lamp) on the game frame 11 side. , 282a to 282f and 283a to 283f are performed. In addition, when the CPU 101 for effect control receives, for example, a random number circuit error designation command and notifies the random number circuit error, the LEDs 281a to 281c and 282a to the respective lamps (excluding the dish lamp) on the game frame 11 side. An effect is made to light up the lights 282f and 283a to 283f. In addition, for example, when the effect control CPU 101 receives an abnormal winning notification designation command and performs abnormal winning notification, the LEDs 281a to 281c and 282a to 282f of the respective lamps (excluding the dish lamp) on the game frame 11 side are provided. An effect of blinking 283a to 283f is performed. In addition, for example, when the CPU 101 for effect control receives a full tank error notification designation command and performs a full tank error notification, it performs an effect such that the LEDs 82a to 82d constituting the pan lamps blink. In addition, for example, when the CPU 101 for effect control receives a door opening error designation command and issues a door opening error notification, the LEDs 281a to 281c and 282a to 282f of the respective lamps (excluding the dish lamp) on the game frame 11 side. , 283a to 283f are flashed. In addition, for example, the effect control CPU 101 receives an out-of-ball error designation command and performs an effect of blinking the LEDs 281a to 281c of the top frame lamps on the game frame 11 side when notifying the out-of-ball error. In addition, for example, when the effect control CPU 101 receives a prize ball error designation command and issues a prize ball error notification, the effect control CPU 101 performs an effect of blinking the LEDs 281a to 281c of the top frame lamps on the game frame 11 side.

  Next, stepwise brightness control of a lamp (specifically, an LED constituting the lamp) will be described. In stepwise brightness control, the brightness state of a lamp is gradually changed from a certain brightness state (for example, all extinguished state), that is, stepwise, to another brightness state (for example, fully lit state (for example, fully lit state). )) Or a stepwise decrease from a certain lightness state (for example, full lighting state) to another lightness state (for example, full light extinction state). In other words, it means that the brightness of the lamp is not immediately set to the target brightness, but is gradually brought closer to the target brightness from the brightness at the start of the control. The lightness between the lightness at the start of control and the target lightness is controlled to an intermediate lightness. Note that the full lighting state means a state in which the lamp is continuously lit during the lamp control period. Further, the all-off state means a state in which the lamp is not lit at all during the lamp control period.

  In this embodiment, the gradual brightness control of the lamp is executed when the decorative pattern is changed, but the gradual brightness control of the lamp is executed when the gaming state is other state. You may do it.

  In this embodiment, brightness 0 to 15 is used as brightness. A lightness of 0 corresponds to the fully turned off state, and a lightness of 15 corresponds to the fully turned on state. FIG. 53 is an explanatory diagram illustrating an example of control for realizing lightness 1 to lightness 15. As shown in FIG. 53, the reference time (unit time for control) of brightness control is 15 ms. When realizing lightness n (n = 1 to 15), the light is turned on (on state) for nms (n milliseconds) in 15 ms, and is turned off for (15-n) ms. For example, when the brightness 1 is realized, the light is turned on for 1 ms in 15 ms and turned off for 14 ms. That is, each brightness is realized by controlling the lighting time (on time) and the light extinguishing time (off time) in a unit time.

  FIG. 54 is an explanatory diagram showing an example of data indicating specific lamp stepwise brightness control over a certain control period. Among these, FIG. 54 (A) shows lightness control in the case of performing a variable display of decorative symbols without a reach effect. FIG. 54B shows lightness control in the case of performing a variable display of a decorative design accompanied by a reach effect. In FIG. 54, (1) to (11) indicate each period in the control period. In this embodiment, brightness control is performed on the three LEDs 281a to 281c of the ceiling lamp, and brightness control is performed on the LEDs 282a to 282f and 283a to 283f of the left and right frame lamps other than the ceiling lamp. Shall not be performed.

  Data 1 to 3 indicate lamp numbers (specifically, LED numbers). That is, FIG. 54 shows an example in which the brightness of the three LEDs 281a to 281c of the top frame lamp is controlled. Here, although three LEDs are illustrated, for example, three LEDs 281a to 281c as top frame lamps, six LEDs 282a to 282f as left frame lamps, and six LEDs 283a to 280a as right frame lamps Data 1 to 15 are used when performing stepwise brightness control for all of 283f. For example, when the top frame lamp, the left frame lamp, and the right frame lamp are regarded as one group, and the LEDs in each group are similarly controlled in brightness, data 1 to 3 are used. Moreover, the value (0, 6, 9 or F in this example) shown as data indicates the final brightness (target brightness) in each period.

  “ON” of “lightness control” indicates that stepwise lightness control is executed. “Lightness control” OFF indicates that stepwise lightness control is not executed. For example, since the period (2) is ON, and the reach effect is not performed in the period (2), each lamp has a lightness 15 (hexadecimal number) that is the final lightness in the period (1) that is the immediately preceding period. From F), it is shown that control is performed so as to gradually shift to lightness 0, which is the target lightness. Further, in the case of performing the reach effect, it is indicated that each lamp is controlled to gradually shift from the lightness 9 that is the final lightness in the period (1) that is the immediately preceding period to the lightness 0 that is the target lightness. In addition, since it is OFF in the period (3), when the reach effect is not performed, each lamp is immediately controlled to the lightness F regardless of the final lightness in the immediately preceding period. Further, when the reach effect is performed, each lamp is immediately controlled to lightness 9 regardless of the final lightness in the immediately preceding period. In addition, since the period (4) is OFF, the lamps are immediately controlled to lightness 0 regardless of the final lightness in the immediately preceding period, both when the reach effect is not performed and when the reach effect is performed. Show.

  FIG. 55 is an explanatory diagram schematically showing changes in brightness during periods (1) to (11) of the LEDs indicated by data 2 (LED of lamp number 2). Among these, FIG. 55 (A) schematically shows a change in lightness during the periods (1) to (11) in the case of performing a variable display of decorative symbols without a reach effect. FIG. 55 (B) schematically shows changes in lightness during periods (1) to (11) in the case of performing a variable display of decorative symbols with reach effects. As shown in FIG. 55, since the brightness control is ON in the periods (1), (2), (5) to (11), the brightness gradually changes during those periods. For periods (5) and (8), the target brightness is 0, and the final brightness in the immediately preceding period (period (4)) is also 0, so the brightness does not change. In the example shown in FIG. 54, in the periods (6) and (9), the LED indicated by the data 2 changes in brightness stepwise from lightness 0 to lightness 9 when no reach effect is involved. Be controlled. In addition, when the reach effect is accompanied, the brightness is controlled so as to change from brightness 0 to brightness 6 in a stepwise manner.

  FIG. 56A is an explanatory diagram showing in more detail the change in brightness of the LED period (1) indicated by the data 2. FIG. 56 (B) is an explanatory diagram showing in more detail the change in brightness during the period (7) of the LED indicated by data 3. In FIG. 56, the brightness change during the variation display of the decorative design without the reach effect is shown. However, in the same manner during the display of the decorative pattern variation with the reach effect (however, the period (1)). The lightness changes in a stepwise manner from lightness 0 to lightness 9, and the lightness changes in the period (7) in a stepwise manner from lightness 6 to lightness 0.

  As shown in FIG. 54, the target brightness of the LED period (1) indicated by the data 8 is the brightness F. Further, it is assumed that the brightness before the start of the period (1) is 0 as the initial value. In that case, the brightness is controlled stepwise from brightness 0 to brightness F (15). The target brightness of the LED period (7) indicated by the data 8 is 0. The brightness before the start of the period (7) (the final brightness of the period (6)) is the brightness 9. Therefore, the lightness is controlled stepwise from lightness 9 to lightness 0.

  Note that the “switching time” shown in FIG. 56 indicates the time from when a certain lightness is reached until the next lightness is switched. “Switching frequency” indicates the number of times the brightness is changed, and corresponds to a numerical value of a difference between the initial brightness and the target brightness. “Increase” in “increase / decrease” indicates that the brightness is gradually increased, and “decrease” indicates that the brightness is gradually decreased. As will be described later, the information of “switching time”, “number of times of switching”, and “up / down” is information used by the effect control microcomputer 100 in lamp control.

  In FIG. 56, the cases of periods (1) and (7) are illustrated, but the other periods in which the brightness control is ON are the same as those of periods (1) and (7). The brightness is controlled to increase or decrease in stages.

  As shown in FIG. 56, in the period, the time controlled for each lightness (that is, switching time) is equally allocated, and the switching time is a multiple of 15 ms which is a unit time. However, depending on the length of the period, the switching times may not be equal and the switching time cannot be a multiple of 15 ms. For example, when the length of the period is 480 ms, the initial lightness is lightness 9, and the target lightness is lightness 0, each switching time is made equal and the switching time is made a multiple of 15 ms. I can't. In that case, for example, the time to be controlled to lightness 9 that is the first lightness, the time to be controlled to lightness 0 that is the target lightness, or an arbitrary time in the middle is lengthened. For example, the time of lightness 9 is (45 + 30) ms, the time of other lightness is 45 ms, the time of lightness 9 and the time of lightness 0 is (45 + 15) ms, and the time of other lightness is 45 ms. To do.

  When the length of the period is 490 ms, the initial lightness is lightness 9, and the target lightness is lightness 0, the time controlled to the lightness 9 that is the first lightness or the lightness 0 that is the target lightness. Even if the controlled time or any time in the middle is increased, the length cannot be a multiple of 15 ms. In this case, for example, the time of lightness 9 is set to (45 + 40) ms, the time of other lightness is set to 45 ms, the time of lightness 9 and the time of lightness 0 are set to (45 + 20) ms, and the time of other lightness is set. Or 45 ms for each.

  When the lightness 9 time is set to (45 + 40) ms or (45 + 20) ms, a time that cannot be controlled in units of 15 ms occurs. For example, since (45 + 40) = 15 × 5 + 10 ms, an odd time of 10 ms occurs. In such a case, in the time of 10 ms, control different from the lightness 9 control shown in FIG. 53 is performed. For example, it is turned on for 6 ms out of 10 ms.

  54 and FIG. 55 exemplify 11 periods from period (1) to period (11), 11 as an example is an example, and the number of periods is arbitrary. Moreover, although lightness 0 to lightness 15 is illustrated as lightness, the lightness number, that is, the lightness type number 16 is an example, and the lightness number is arbitrary.

  FIG. 57 is a flowchart showing the effect control process (step S705) in the main process shown in FIG. In the effect control process, the effect control CPU 101 performs one of steps S800 to S806 according to the value of the effect control process flag. In each process, the following process is executed.

  Fluctuation pattern command reception waiting process (step S800): It is confirmed whether or not a variation pattern command is received from the game control microcomputer 560. Specifically, it is confirmed whether or not the variation pattern command reception flag set in the command analysis process is set. If the variation pattern command has been received, the value of the effect control process flag is changed to a value corresponding to the decorative symbol variation start process (step S801).

  Decoration symbol variation start processing (step S801): Control is performed so that the variation of the ornament symbol is started. Then, the value of the effect control process flag is updated to a value corresponding to the decorative symbol changing process (step S802).

  Decoration symbol variation processing (step S802): Controls the switching timing of each variation state (variation speed) constituting the variation pattern and monitors the end of the variation time. When the variation time ends, the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation stop process (step S803).

  Decoration symbol variation stop process (step S803): Based on the reception of the effect control command (design determination designation command) for instructing all symbols to stop, the variation of the ornament symbol is stopped and the display result (stop symbol) is derived and displayed. Take control. Then, the value of the effect control process flag is updated to a value corresponding to the jackpot display process (step S804) or the variation pattern command reception waiting process (step S800).

  Big hit display processing (step S804): After the end of the variation time, control is performed to display a screen for notifying the effect display device 9 of the occurrence of the big hit. Then, the value of the effect control process flag is updated to a value corresponding to the big hit game processing (step S805).

  Big hit game processing (step S805): Control during the big hit game is performed. For example, when receiving a special command during opening of a special prize opening or a designation command after opening a special prize opening, display control of the number of rounds in the effect display device 9 is performed. Then, the value of the effect control process flag is updated to a value corresponding to the big hit end process (step S806).

  Big hit end processing (step S806): In the effect display device 9, display control is performed to notify the player that the big hit gaming state has ended. Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800).

  FIG. 58 is a flowchart showing the variation pattern command reception waiting process (step S800) in the effect control process shown in FIG. In the variation pattern command reception waiting process, the effect control CPU 101 confirms whether or not the variation pattern command reception flag is set (step S1811). If the variation pattern command reception flag is set, the variation pattern command reception flag is reset (step S1812). Then, the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation start process (step S801) (step S1813).

  If the variation pattern command reception flag is not set, the effect control CPU 101 confirms whether or not the customer waiting demonstration execution flag is set (step S1814). The customer waiting demo execution flag is set based on the reception of the customer waiting demo designation command in the command analysis process.

  If the customer waiting demonstration execution flag is set, the effect control CPU 101 performs control to display the customer waiting demonstration screen on the effect display device 9 (step S1815). In this case, for example, control is performed to display a character string such as “Demo in progress!” On the effect display device 9. Next, the effect control CPU 101 sets excitation signal data to be output to the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1816). Further, the effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1817). Then, the effect control CPU 10 executes a serial setting process for controlling various lamps as effect components (step S1818).

  FIG. 59 is an explanatory diagram showing timers and counters used when the effect control CPU 101 performs lamp brightness control. The brightness continuation timer is used for a certain brightness (any one of the periods (1) to (11) in the example shown in FIG. 54), and any brightness 0 to 15 in the example shown in FIG. 56 (A). In the example shown in B), it is a timer that defines the time for which lightness is 9 to 0). The lightness correspondence counter is a counter used for determining that a certain period (one of the periods (1) to (11) in the example shown in FIG. 54) has ended. When the brightness-corresponding counter counts up, the effect control CPU 101 performs lamp control time with the target brightness during that period (in the example shown in FIG. 56A, the time controlled with brightness 15; FIG. 56B). In the example shown in FIG. 4, it is determined that the time during which lightness is controlled at 0) has elapsed. Note that the value of the lightness corresponding counter represents the lightness controlled at that time.

  The period counter is a counter used for determining whether or not the final period (period (11) in the example shown in FIG. 54) has elapsed. When the period counter counts up, the effect control CPU 101 returns to the state in which the brightness control of the first period (period (1) in the example shown in FIG. 54) is executed. The 15 ms timer is a counter for determining whether or not to light up within a certain brightness level. In the example shown in FIG. 53, in the case of lightness n (n = 1 to 15), the effect control CPU 101 turns on a lamp (specifically, LED) in a section where the value of the 15 ms timer is 1 to n. Control is performed so that the lamp is turned off in other sections.

  Referring to the example shown in FIG. 56A, the 15 ms timer is used to measure each 15 ms. The brightness continuation timer is used to measure the time (corresponding to the switching time) controlled at each brightness. The lightness correspondence counter is incremented every time the lightness is switched in the period (1) (a period of 480 ms), and whether or not the number of times of switching has reached 16, that is, whether or not the period (1) has ended. Used for judgment. The period counter is incremented every time the period is switched in the periods (1) to (11).

  FIG. 60 is a flowchart showing a decorative symbol variation start process (step S801) in the effect control process shown in FIG. In the decorative symbol variation start process, the effect control CPU 101 reads data indicating the variation pattern command from the variation pattern command storage area (step S816).

  Next, it is confirmed whether or not the display result specifying command reception flag is set (step S817). If the display result specifying command reception flag is not set, the process proceeds to step S820. When the display result specifying command reception flag is set, the display result (stop symbol) of the decorative symbol is displayed according to the data stored in the display result specifying command storage area (that is, the received display result specifying command). Determination is made (step S818).

  FIG. 61 is an explanatory diagram showing an example of a decorative symbol stop pattern in the effect display device 9. In the example shown in FIG. 61, when the received display result specifying command indicates a normal jackpot (when the received display result specifying command is a display result 2 designation command), the effect control CPU 101 uses the stop design as a stop symbol. A combination of decorative symbols in which the left middle right symbol is an even symbol (usually a stop symbol reminiscent of the occurrence of a big hit) is determined. When the received display result specifying command indicates a probable big hit (when the received display result specifying command is a display result 4 designation command), the effect control CPU 101 uses the left middle right symbol as an odd symbol as an odd symbol. A combination of decorative symbols arranged in accordance with (a stop symbol reminiscent of occurrence of a probable big hit) is determined. When the received display result specifying command indicates a small hit or suddenly probable big hit (when the received display result specifying command is a display result 3 specifying command or a display result 5 specifying command), the presentation control CPU 101 A combination of “135” (a stop symbol reminiscent of the occurrence of a small hit or suddenly probable big hit) is determined as the left middle right decorative symbol as the stop symbol. In the case of a loss (when the received display result specifying command is a display result 1 designation command), a combination of decorative symbols other than the above is determined. However, when a reach effect is involved, a combination of decorative symbols with left and right aligned is determined. The combination of the left, middle, and right decorative symbols derived and displayed on the effect display device 9 is the “stop symbol” of the decorative symbol.

  The effect control CPU 101 extracts, for example, a random number for determining a stop symbol, and uses a stop symbol determination table in which data indicating a combination of decorative symbols and a numerical value are associated with each other to generate a stop symbol for the decorative symbol. decide. That is, the stop symbol is determined by selecting data indicating a combination of decorative symbols corresponding to a numerical value that matches the extracted random number.

  As for the decorative symbol, a stop symbol that recalls a big hit is called a big hit symbol. In addition, a stop symbol reminiscent of a probable big hit is called a probable big hit symbol, and a stop symbol reminiscent of a normal big hit is called a normal big hit symbol. A stop symbol that suddenly recalls a probable big hit is called a sudden probable big hit symbol, and a stop symbol that recalls a small hit is called a small hit symbol. And a stop symbol that reminds of a loss is called a loss symbol.

  Further, the effect control CPU 101 resets the display result specifying command reception flag (step S819). Next, a process table corresponding to the variation pattern is selected (step S831A).

  In this embodiment, the effect control CPU 101 performs control so that the decorative pattern is variably displayed by the change pattern corresponding to the change pattern command on a one-to-one basis, but the effect control CPU 101 controls the change pattern command. The variation pattern to be used may be selected from a plurality of types of variation patterns corresponding to.

  Further, a lamp control table corresponding to the variation pattern is selected (step S831B). Then, the switching time and the number of switching are calculated for the first data in the lamp control table, that is, for the period (1) (step S832). Note that step S832 is executed for all the lamps to be subjected to brightness control. The lamp control table includes a table corresponding to each of all lamps to be subjected to brightness control. Therefore, the switching time and the number of switching times are calculated for each of all the lamps.

  The effect control CPU 101 sets “1” as the initial value in the period counter, and sets the first brightness value in the brightness correspondence counter (step S833). The first lightness value is 0 corresponding to lightness 0, for example. However, when the brightness is constant, the value corresponds to the constant brightness. Further, the lightness correspondence counter exists corresponding to each of all the lamps to be subjected to lightness control. Then, the process timer in the process data 1 of the process table selected in step S831A is started (step S834A). Further, a value corresponding to the switching time calculated in step S832 is set in the brightness continuation timer, and an initial value “1” is set in the 15 ms timer (step S834B).

  FIG. 62 is an explanatory diagram of a configuration example of the process table. The process table is a table in which process data referred to when the effect control CPU 101 executes control of the effect device is set. That is, the effect control CPU 101 controls effect devices (effect components) such as the effect display device 9 in accordance with the data set in the process table. In this embodiment, an error notification process table (error notification process table) used when various types of error notification are performed is prepared in addition to the process table used for normal game effects shown in FIG. ing. Details of the error notification process table will be described later.

  The process table includes data in which a plurality of combinations of process timer set values, display control execution data, and sound number data are collected. The display control execution data includes data indicating each variation mode constituting the variation mode during the variable display time (variation time) of the variable display of the decorative symbols. Specifically, data relating to the change of the display screen of the effect display device 9 is described. The process timer set value is set with a change time in the form of the change. The effect control CPU 101 refers to the process table and performs control to display the decorative pattern in the variation mode set in the display control execution data for the time set in the process timer set value.

  The process table shown in FIG. 62 is stored in the ROM of the effect control board 80. A process table is prepared for each variation pattern. A ramp control table is also prepared for each variation pattern.

  FIG. 63 is an explanatory diagram of a configuration example of a lamp control table. The lamp control table shown in FIG. 63 is a table for realizing the brightness change exemplified in FIG. In the configuration example shown in FIG. 63, the number of periods is set at the head in the lamp control table. Next, data indicating whether the “lightness control” corresponding to each of the periods (1) to (11) is ON or OFF, the length (time) of the period, and the brightness value indicating the target brightness in the period Is set. In FIG. 63, (H) indicates a hexadecimal number, and (D) indicates a decimal number.

  Further, FIG. 63 illustrates only a table relating to the lamp (specifically, LED) of lamp number 2 (see FIG. 54) when the reach effect is not included, but lamps corresponding to other lamp numbers are illustrated. There are also tables available. In addition, a table in which a lightness value of 9 or less is set as the target lightness is prepared for the lamps having the respective lamp numbers when the reach effect is included.

  The production control CPU 101 has an abnormality notification flag indicating that an abnormal winning notification is being made and other error flags (RAM clear flag, random number circuit error flag, full tank error notification flag, door open error notification flag, ball break error) On the condition that the notification flag and the prize ball error notification flag) are not set, according to the contents of the process data 1 (display control execution data 1 and sound number data 1), the effect device (the effect display device 9 as an effect part, And the control of the speaker 27 as a production component is executed (steps S835A and S835B). For example, a command is output to the VDP 109 in order to display an image corresponding to the variation pattern on the effect display device 9. In addition, a control signal (sound number data) is output to the voice synthesizing IC 173 in order to perform voice output from the speaker 27.

  Next, the effect control CPU 101 confirms whether or not it is a case where a reach effect is executed (step S835C). For example, the effect control CPU 101 checks whether or not the variation pattern indicated by the variation pattern command read in step S816 includes a reach effect. If the reach effect is not executed, the process proceeds to step S835E. If the reach effect is to be executed, the effect control CPU 101 sets the excitation signal data output to the lamp vertical drive motor 90 corresponding to the first movable mode in a predetermined area of the RAM (step S835D). The effect control CPU 101 may set the excitation signal data output to the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 according to the first movable mode in a predetermined area of the RAM.

  Further, the CPU 101 for effect control sets data to be output to the lamp (specifically, LED) in a predetermined area of the RAM according to the value of the brightness correspondence counter and the value of the 15 ms timer (step S835E). And a serial setting process is performed in order to control various lamps as production parts (step S835F). The relationship between the value of the lightness counter and the value of the 15 ms timer and the data output to the lamp will be described later.

  For example, in the lamp control table selected when the gaming state is the normal state, data for performing brightness control is set only for the LED 125a to 125f for the center decoration lamp and the LEDs 126a to 126f for the stage lamp. . In the serial setting process, the effect control CPU 101 sets the data set in the predetermined area of the RAM in the process of step S835E in the predetermined data storage area. Therefore, when the gaming state is the normal state, data regarding only the LED 125a to 125f of the center decoration lamp and the LEDs 126a to 126f of the stage lamp are set in a predetermined data storage area. Further, in the lamp control table selected when the gaming state is a probable change state, the center decoration lamp LEDs 125a to 125f and the stage lamp LEDs 126a to 126f are turned on, and all of the lamps provided on the gaming frame 11 side are also turned on. Data for performing brightness control is set for the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of the lamps (excluding the dish lamp). In the serial setting process, lamp control signals for these LEDs are set in a predetermined data storage area. The lamp control signal set in the process of step S835F is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and the relay board 606. , 607 to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  When the abnormality notification flag or other error flag is set, the rendering device is controlled according to the contents of the process data 1 excluding the sound number data 1 (steps S835A and S835G). In other words, when the abnormality notification flag or other error flag is set, when a new variable display of a decorative design is started, a sound effect according to the variable display is not executed, but an abnormal Sound output corresponding to the winning notification and various error notifications (RAM clear notification, random number circuit error notification, full tank error notification, door opening error notification, ball runout error notification, prize ball error notification) is continued.

  In addition, when performing the process of step S835G, the presentation control CPU 101 does not simply output a command based on the display control execution data 1 to the VDP 109, but also outputs a command for performing “superimposed display” to the VDP 109. In other words, the display at that time (notification of abnormal winning, full tank error, and random number circuit error) on the effect display device 9 and the image of the display effect of the variable display of the decorative symbols are simultaneously produced. Control is performed so that the image is displayed on the display device 9. That is, when the abnormality notification flag and other error flags are set, when a new variable display of a decorative design is started, only the display effect according to the variable display is not executed. Notifications according to abnormal winning notifications and various error notifications are also continued.

  Then, a value corresponding to the variation time specified by the variation pattern command is set in the variation time timer (step S836), and the value of the effect control process flag is set to a value corresponding to the decorative symbol variation process (step S802). (Step S837).

  In step S820, it is confirmed whether or not a variation pattern command that can be used for both a normal big hit and a probable big hit is received. In this embodiment, as shown in FIG. 29, the fluctuation pattern commands of “reach C / shortening”, “reach C”, and “super reach A” are usually used for both big hits and probable big hits. This is a variable pattern command. Therefore, the CPU 101 for effect control receives the variation pattern command that can be used for both the normal big hit and the probable big hit when the data indicating those fluctuation pattern commands is stored in the fluctuation pattern command storage area. It is determined that When it is determined that the variation pattern command that can be used during both the normal big hit and the probable big hit is received, the effect control CPU 101 determines the stop symbol as the normal big hit symbol (step S822). Also, if it is determined that a variation pattern command other than the variation pattern command that can be used for both a normal big hit and a probable big hit is received, the stop symbol is combined with a decorative symbol corresponding to the received variation pattern. (Step S821). In this embodiment, a variation pattern command other than the variation pattern command that can be used for both a normal jackpot and a probable variation jackpot is used at the time of losing or is used according to the type of jackpot ( (See FIG. 29). Therefore, when the variation control command 101 other than the variation pattern command that can be used for both the normal big hit and the probable big hit is received, the effect control CPU 101 determines the deviation based on the received variation pattern command. Whether or not a big hit (including a small hit) is determined, and if it is determined to be a big hit, the type of the big hit can be specified.

  In this way, the effect control microcomputer 100 receives the variation pattern command that can be used for both the normal big hit and the probable big hit, and when the display result specifying command cannot be received, Since the display result (stop symbol) is determined to be a normal jackpot symbol, it is possible to make the player recognize whether or not a specific gaming state occurs even if the display result specifying command cannot be received. In addition, by including information that can specify the decorative pattern display result in the variation pattern command, the effect control microcomputer 100 can display the display result identification command without using a command other than the variation pattern command and the display result identification command. Since the display result of the decorative design can be determined even if it cannot be received, the types of commands transmitted by the game control microcomputer 560 do not increase, and as a result, the control burden on the game control microcomputer 560 does not increase.

  FIG. 64 is a flowchart showing an example of specific processing (switching time / switching count calculation processing) in step S832 in FIG. In the switching time / switching number calculation process, the effect control CPU 101 is a value indicating that “brightness control” is ON (“1” in this example) for the target period in the lamp control table. (Step S861). If it is not a value indicating ON, information indicating "constant brightness" is stored in a predetermined area of the RAM (step S865). When the information of “constant brightness” is stored in the RAM, the CPU 101 for effect control has a value corresponding to a constant brightness regardless of the value of the brightness correspondence counter in the process of step S984 (see FIG. 66). Control for setting a drive signal to the lamp (specifically, LED) is performed according to (value set in the lamp control table). Therefore, the CPU 101 for effect control determines the lightness level per unit time in the period as the target lightness level without performing calculation when the value indicating that “lightness control” is OFF. It will be.

  If “lightness control” is a value indicating ON, (maximum brightness−minimum brightness + 1) is calculated. Then, the calculation result is set to “number of times of switching” (step S862). The maximum brightness is the target brightness (final brightness), and the minimum brightness is the target brightness in the immediately preceding period. However, when the target brightness (final brightness) is lower than the target brightness in the immediately preceding period, the minimum brightness is set to the target brightness (final brightness), and the maximum brightness is set to the target brightness in the immediately preceding period.

  For example, in the example shown in FIG. 63, the target brightness in the period (6) is 9, and the target brightness in the immediately preceding period (period (5)) is 0. Therefore, the maximum brightness is 9, and the minimum brightness is 0. It is. Therefore, the number of times of switching is 10. Further, since the target brightness in the period (7) is 0 and the target brightness in the immediately preceding period (period (6)) is 9, the maximum brightness is 9, and the minimum brightness is 0. Therefore, the number of times of switching is 10. In the period (1), it is assumed that the target brightness in the immediately preceding period is zero.

  In addition, (period time / number of switching times) is calculated, and the calculation result is set as the switching time (step S863). For example, in the example shown in FIG. 63, (period time / number of switching times) in the period (7) is 450/10 = 45, and 45 ms is calculated as the switching time.

  The effect control CPU 101 stores the switching time and the number of switching times in the RAM, and stores information indicating “brightness increase” or “brightness decrease” in a predetermined area of the RAM (step S864). In step S864, “increased brightness” is stored when the target brightness is higher than the target brightness in the immediately preceding period, and “down brightness” is stored when the target brightness is lower than the target brightness in the immediately preceding period.

  In this embodiment, the production control CPU 101 determines the brightness level for each unit time (in this example, 15 ms) in the period (1) to the period (11) by calculation. For example, in the period (1) illustrated in FIG. 56 (A), the length of the entire period is 480 ms, and therefore, 30 unit times of 15 ms are included therein. Then, the brightness for each unit time is determined. For example, lightness 0 is determined for the first two unit times at 480 ms, and lightness 15 (F) is determined for the last two unit times. In this embodiment, a lamp control table as illustrated in FIG. 63 is used for brightness control, but data for fine brightness control within each period (1) to period (11). A table with is not required. Therefore, the ROM capacity in the production control microcomputer 100 can be reduced as compared with the case where a table in which data for fine brightness control within each period is used.

  FIG. 65 is a flowchart showing the decorative symbol variation process (step S802) in the effect control process. In the decorative symbol variation process, the effect control CPU 101 executes a brightness control process (step S840). Further, the process timer value is decremented by 1 (step S841), and the variable time timer value is decremented by 1 (step S842). When the process timer times out (step S843), the process data is switched. That is, the process timer setting value set next in the process table is set in the process timer (step S844).

  Also, the abnormality notification flag and other error flags (RAM clear flag, random number circuit error flag, full tank error notification flag, door opening error notification flag, ball out error notification flag, prize ball error notification flag) are not set. As a condition, the control state for the rendering device is changed based on the display control execution data and sound number data set next (steps S845A and S845B).

  In step S845B, the effect control CPU 101 outputs a command to the VDP 109 in order to display an image corresponding to the variation pattern on the effect display device 9, for example. In addition, a control signal (sound number data) is output to the voice synthesizing IC 173 in order to perform voice output from the speaker 27.

  When the abnormality notification flag or other error flag is set, the rendering device is controlled according to the contents of process data i (i is any one of 2 to n) (excluding the sound number data i). (Steps S845A and S845D). Therefore, when the abnormality notification flag or other error flag is set, the sound effect according to the variable display of the decorative design is not executed, but an abnormal winning notification or various error notifications (RAM clear notification, Sound output corresponding to random number circuit error notification, full tank error notification, door opening error notification, ball runout error notification, prize ball error notification) is continued.

  Further, when the process of step S845D is performed, the presentation control CPU 101 does not simply output a command based on the display control execution data i to the VDP 109, but also outputs a command for performing “superimposed display” to the VDP 109. . Therefore, when the abnormality notification flag and other error flags are set, not only the display effect according to the variable display of the decorative design is executed, but the notification according to the abnormal winning notification or various error notifications is performed. Will continue.

  If the variation time timer has timed out (step S846), the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation stop process (step S803) (step S848). Even if the variable time timer has not timed out, if the confirmation command reception flag indicating that the symbol confirmation designation command has been received is set (step S847), the process proceeds to step S848. Even if the variation time timer has not timed out, if the symbol confirmation designation command is received, the process shifts to control to stop variation.For example, a variation pattern command indicating a long variation time due to noise between substrates is received. Even in such a case, the variation of the decorative symbol can be terminated when the regular variation time has elapsed (when the variation of the special symbol has ended).

  FIG. 66 is a flowchart showing the brightness control process in step S840. In the brightness control process, the effect control CPU 101 increments the value of the 15 ms timer by 1 (step S981). When the value of the 15 ms timer reaches 16, the value of the 15 ms timer is returned to 1 (steps S982 and S983).

  Next, the effect control CPU 101 confirms whether or not it is a case where a reach effect is executed (step S983A). For example, the effect control CPU 101 checks whether or not the variation pattern indicated by the variation pattern command stored in the variation pattern command storage area includes a reach effect. If the reach effect is not executed, the process directly proceeds to step S984. If the reach effect is to be executed, the effect control CPU 101 sets the excitation signal data output to the lamp vertical drive motor 90 corresponding to the first movable mode in a predetermined area of the RAM (step S983B). The effect control CPU 101 may set the excitation signal data output to the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 according to the first movable mode in a predetermined area of the RAM.

  Then, data to be output to the lamp (specifically, LED) is set in a predetermined area of the RAM according to the value of the brightness correspondence counter and the value of the 15 ms timer (step S984).

  FIG. 67 is an explanatory diagram showing an example of data output as a lamp in accordance with the value of the brightness correspondence counter and the value of the 15 ms timer. FIG. 67 illustrates a case where the value of the lightness corresponding counter is 9 (that is, lightness 9). When the value of the brightness correspondence counter is 9, when the value of the 15 ms timer is any one of 1 to 9, “1” indicating lighting is set in the RAM. Further, when the value of the 15 ms timer is any one of 10 to 15, “0” indicating that the light is off is set in the RAM.

  Note that since a drive signal is given to the lamp in accordance with data set in a predetermined area of the RAM, the data is represented as “drive signal” in FIG. In addition, FIG. 67 illustrates the case of lightness 9, but lighting is indicated when the value of the 15 ms timer is any of 1 to n for lightness n (any of n = 1 to 14). “1” is set in the RAM. In addition, when the value of the 15 ms timer is any one of (n + 1) to 15, “0” indicating turning off is set in the RAM. When the brightness is 0, “0” indicating that the light is off is set in the RAM regardless of the value of the 15 ms timer. When the brightness is 15 (F), “1” indicating lighting is set in the RAM regardless of the value of the 15 ms timer.

  In addition, when the information of “constant brightness” is stored in the RAM, the CPU 101 for effect control uses a value corresponding to the constant brightness and a 15 ms timer in the process of step S984 regardless of the value of the brightness correspondence counter. The data to be output to the lamp (specifically, LED) is set in a predetermined area of the RAM according to the value of. For example, if the constant lightness is lightness 9, regardless of the value of the lightness corresponding counter, “1” indicating lighting is set in the RAM when the value of the 15 ms timer is any one of 1 to 9. When the value of the 15 ms timer is any of 10 to 15, “0” indicating turning off is set in the RAM.

  Next, the production control CPU 101 decrements the value of the brightness continuation timer by 1 (step S985). The lightness continuation timer has a switching time as an initial value (see step S834B). The switching time is 30 ms in the example shown in FIG. 56 (A) and 45 ms in the example shown in FIG. 56 (B).

  The effect control CPU 101 checks the value of the brightness continuation timer (step S986), and when the value of the brightness continuation timer is 0, that is, when time-out has occurred, the process proceeds to step S995.

  When the value of the brightness continuation timer has not timed out, that is, when the time for controlling to a certain brightness has elapsed, the value of the brightness corresponding counter is incremented by +1 or −1 (step S987). In step S987, the production control CPU 101 increments by 1 when information indicating "brightness increase" is stored in the RAM, and when information indicating "brightness decrease" is stored in the RAM-. 1

  If the value of the brightness correspondence counter exceeds the final brightness value (target brightness value), the period (for example, any one of period (1) to period (11)) has ended. In that case, the process proceeds to step S989 (step S988). When the value of the brightness correspondence counter does not exceed the final brightness value, the process proceeds to step S995. In step S <b> 989, when the information indicating that “brightness increase” is stored in the RAM, the CPU 101 for effect control has the value of the lightness corresponding counter at [final lightness value (target lightness value) +1]. If the information indicating “lightness decrease” is stored in the RAM, it is confirmed whether or not the value of the lightness corresponding counter is [final lightness value (target lightness value) −1]. .

  Further, the effect control CPU 101 increments the value of the period counter indicating which of the period (1) to period (11) is +1 (step S989). When the value of the period counter exceeds the number of periods (11 in this example), the value of the period counter is returned to 1 (steps S990 and S991). Then, a switching time / switching count calculation process (see FIG. 64) is executed to set the switching time and the switching count for the new period (step S992). In addition, the first brightness value in the period indicated by the value of the period counter (specifically, the target brightness value in the immediately preceding period) is set in the brightness correspondence counter (step S993).

  In addition, the switching time is set to the brightness continuation timer, and the value of the 15 ms timer is initialized to 1 (step S994). Then, an abnormality notification flag indicating that an abnormal winning notification is being made and other error flags (RAM clear flag, random number circuit error flag, full tank error notification flag, door open error notification flag, ball breakage error notification flag, award Serial setting processing is executed on the condition that the ball error notification flag) is not set (steps S995 and S996). The effect control CPU 101 sets the data set in the predetermined area of the RAM in the process of step S984 in the serial setting process in the predetermined data storage area. The lamp control signal set in the serial processing is output to the serial output circuit 353 in the serial input / output processing (step S708) in the main processing, converted into serial data by the serial output circuit 353, and via the relay boards 606 and 607. Is output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  FIG. 68 is a flowchart showing the decorative symbol variation stopping process (step S803) in the effect control process. In the decorative symbol variation stop process, the effect control CPU 101 confirms whether or not the confirmed command reception flag is set (step S851). If the confirmed command reception flag is set, the confirmed command reception flag is reset. Then, control is performed to derive and display the determined stop symbol (step S853). Then, the production control CPU 101 confirms whether or not it is determined to be a big hit (step S854). Whether or not it is determined to be a big hit is confirmed by, for example, a display result specifying command stored in the display result specifying command storage area. In this embodiment, it can be confirmed whether or not it is determined to be a big hit based on the determined stop symbol.

  When it is determined to be a big hit, the value of the effect control process flag is updated to a value corresponding to the big hit display process (step S804) (step S855).

  If it is determined not to win, the effect control CPU 101 checks whether or not the time reduction state flag is set (step S856). The short time state flag is set when the gaming state is a short time state (see step S886 described later). If the time reduction state flag is set, the value of the time reduction variation counter is incremented by 1 (step S857).

  Then, the production control CPU 101 confirms whether or not the value of the time-varying variation number counter is 100 (step S858). If the value of the hour / short fluctuation counter is 100, the hour / short state flag is reset (step S859). Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800) (step S860).

  In this embodiment, the effect control microcomputer 100 ends the variation (variable display) of the decorative symbols on the condition that the symbol confirmation designation command has been received (see steps S851 and S853). However, if the variation time timer based on the received variation pattern command times out, the variation of the decorative symbol may be controlled to end without receiving the symbol determination designation command. In this case, the game control microcomputer 560 may not transmit the symbol confirmation designation command for designating the end of variable display.

  FIG. 69 is a flowchart showing the jackpot display process (step S804) in the effect control process. In the jackpot display process, the effect control CPU 101 first checks whether or not the jackpot display flag indicating that the jackpot display is being performed is set (step S1870). The jackpot display flag is set in step S1876 based on the start of the jackpot display. If the jackpot display flag is not set, the production control CPU 101 checks whether or not the jackpot start 1-4 designation command reception flag indicating that any one of the jackpot start 1-4 designation commands has been received is set. (Step S1871). When any one of the big hit start 1 to 4 designation command reception flags is set, control is performed to display a game start screen corresponding to the set flag on the effect display device 9 (step S1872).

  In step S1872, the effect control CPU 101 performs control to display a screen for informing the start of the small hit game on the effect display device 9 when the big hit start 2 designation command is received. Further, when the big hit start 4 designation command is received, control is performed to display on the effect display device 9 a screen for informing the sudden start of the probable big hit game. When a jackpot start 1 designation command or a jackpot start 3 designation command is received, a screen for informing the start of the jackpot game (a screen for informing the start of the jackpot game and a notice of the start of the sudden probability change jackpot game) Control is performed to display on the effect display device 9.

  Next, the effect control CPU 101 sets the excitation signal data output to the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1873). Further, the effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1874). Then, the effect control CPU 10 executes a serial setting process for controlling various lamps as effect components (step S1875).

  Next, the effect control CPU 101 starts a jackpot display period measurement timer for measuring the jackpot display period (step S1876). Then, the effect control CPU 101 sets a jackpot display flag (step S1877).

  If the jackpot display flag is not set in step S1870, the production control CPU 101 decrements the jackpot display period measurement timer by 1 (step S1878) and confirms whether or not the jackpot display period measurement timer has timed out (step S1878). S1879). If the jackpot display period measurement timer has not timed out, control is performed to display a game start screen corresponding to the set flag on the effect display device 9 (step S1880).

  Next, the effect control CPU 101 sets the excitation signal data output to the lamp right / left drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1881). The effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1882). Then, the effect control CPU 10 executes a serial setting process for controlling various lamps as effect components (step S1883).

  If the jackpot display period measurement timer has timed out in step S1879, the effect control CPU 101 resets the set flag (any one of the jackpot start 1-4 designation command reception flags) (step S1884). Then, the value of the effect control process flag is updated to a value corresponding to the big hit game processing (step S805) (step S1885).

  FIG. 70 is a flowchart showing the big hit end process (step S806) in the effect control process. In the jackpot end process, the effect control CPU 101 checks whether or not the jackpot end effect timer is set (step S880). If the big hit end effect timer is set, the process proceeds to step S885. If the jackpot end effect timer is not set, a jackpot end designation command reception flag (a jackpot end 1 designation command reception flag or a jackpot end 2 designation command reception flag) indicating that the jackpot termination designation command has been received is set. It is confirmed whether or not there is (step S881). When the jackpot end designation command reception flag is set, the jackpot end designation command reception flag is reset (step S882), and a value corresponding to the jackpot end display time is set in the jackpot end presentation timer (step S883). Then, the effect display device 9 is controlled to display a jackpot end screen (screen for notifying the end of the jackpot game) (step S884). Specifically, an instruction to display the big hit end screen is given to the VDP 109.

  In this embodiment, even if the type of jackpot is different, the same jackpot end screen is displayed on the effect display device 9. For example, the big hit end display and the small hit end display are the same. However, the big hit end display (including the small hit end display) may be divided according to the type of the big hit.

  In step S885, 1 is subtracted from the value of the big hit end effect timer. Then, the effect control CPU 101 checks whether or not the value of the jackpot end effect timer is 0, that is, whether or not the jackpot end effect time has elapsed (step S886). If not, the process ends. If it has elapsed, the time reduction state flag is set (step S887), and the time reduction number counter is set to 0 (step S888). If the jackpot end 1 designation command is received, the probability variation state flag is reset (steps S889 and S891). When the jackpot end 1 designation command has not been received (when the jackpot end 2 designation command has been received), the probability variation state flag is set (steps S889, S890). Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800) (step S892).

  The probability change state flag and the time-short state flag are used, for example, when the effect control CPU 101 notifies the probability change state and the time-short state by a background or a decorative light emitter (lamp / LED) in the effect display device 9.

  FIG. 71 is an explanatory diagram illustrating an example of a notification screen displayed on the effect display device 9. FIG. 71 (A) shows an example of an initial screen that the effect control CPU 101 displays on the effect display device 9 in response to the reception of the initialization designation command. FIG. 71 (B) shows an example of a power failure recovery screen that the effect control CPU 101 displays on the effect display device 9 in response to reception of a power failure recovery designation command. FIG. 71 (C) shows an example of an abnormality notification screen that the effect control CPU 101 displays on the effect display device 9 in response to the reception of the abnormal winning notification designation command, and the variation of the decorative design is started. Also, it is shown that the display of the abnormality notification screen is continued (see the right side of FIG. 71 (C)).

  Next, the notification control process process in step S707 will be described. First, various error notification modes executed in the notification control process will be described. FIG. 72 is an explanatory diagram showing an example of various error notification modes executed in the notification control process. As shown in FIG. 72, the RAM clear notification is executed for a predetermined period (for example, 31 seconds) after the gaming machine is turned on. When performing the RAM clear notification, the effect control CPU 101 lights the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) on the game frame 11 side, and causes the speaker 27 to generate a predetermined error sound. Control (for example, beep sound) is output.

  The door opening error notification is executed while the game frame 11 is opened (for example, while the detection signal of the door opening sensor 155 is input). When performing the door opening error notification, the effect control CPU 101 performs control to blink the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) on the game frame 11 side. In addition, control is performed so that a predetermined error sound (for example, a beep sound) is output to the speaker 27 together with a sound “the door is open”.

  Further, the ball break error notification is executed from the occurrence of a ball break until the ball break state is canceled (for example, while a detection signal of a ball break switch is input). The effect control CPU 101 performs control of blinking the LEDs 281a to 281c of the top frame lamp on the game frame 11 side when performing a ball break error notification. The full tank error notification is executed from the occurrence of the full tank state of the lower pan until the full tank state is canceled (for example, while the detection signal of the full tank switch is input). When performing the full tank error notification, the effect control CPU 101 performs control to blink the LEDs 82a to 82d of the lower pan lamps on the game frame 11 side and to output a sound “the lower pan is full”. In addition, control is performed to display “the bottom plate is full” on the effect display device 9. In this case, when display by the game effect (for example, variable display of decorative symbols) is performed on the effect display device 9, the character string “bottom plate is full” is superimposed on the effect display device 9. .

  The prize ball error notification is executed from the occurrence of the prize ball abnormality until the prize ball abnormality state is canceled. The effect control CPU 101 performs control to blink the LEDs 281a to 281c of the top frame lamps on the game frame 11 side when performing a prize ball error notification. Further, the random number circuit error notification is executed until the power is turned off after the random number circuit error is detected when the gaming machine is turned on. When performing the random number circuit error notification, the effect control CPU 101 lights up the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) on the game frame 11 side, and a predetermined error sound (for example, (Beep sound) is output. In addition, control is performed to display “error” on the effect display device 9. In this case, when display by a game effect (for example, variable display of decorative symbols) is performed on the effect display device 9, a character string “error” is superimposed on the effect display device 9.

  The abnormal winning error notification is executed for a predetermined period (for example, 30 seconds) from the occurrence of the abnormal winning. When performing the abnormal winning notification, the effect control CPU 101 blinks the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) on the game frame 11 side, and a predetermined error sound (for example, a beep). Sound) is output.

  FIG. 73 is a flowchart showing the notification control process (step S707) in the main process shown in FIG. In the notification control process, the effect control CPU 101 performs one of steps S1900 and S1901 according to the value of the notification control process flag. In each process, the following process is executed.

  The notification start processing (step S1900) includes error flags (initial notification flag, random number circuit error flag, abnormal winning notification designation command reception flag, RAM clear flag, full tank error notification flag, prize ball error notification set in the command analysis processing. This is a process of starting error notification based on the flag and the ball break error notification flag. When the error notification is started, the value of the notification control process flag is changed to a value corresponding to the notification process (step S1901).

  The in-notification process (step S1901) is based on each error flag (initial notification flag, random number circuit error flag, abnormality notification flag, RAM clear flag, full tank error notification flag, winning ball error notification flag, out of ball error notification flag). Thus, the error notification process is continued. Further, the error notification is terminated based on the fact that an error notification period (initial notification period, RAM clear notification period) has elapsed or an error notification release flag set in the command analysis process. When the error notification is finished, the value of the notification control process flag is changed to a value corresponding to the notification start process (step S1901).

  74 to 77 are flowcharts showing notification start processing (step S1900) in the notification control process shown in FIG. In the notification start process, the production control CPU 101 first checks whether or not the initial notification flag is set (step S1911). If set, the effect control CPU 101 sets a value corresponding to the initial notification period value in the period timer 1 (step S1912). The initial notification period is a period in which initialization notification is performed in response to reception of the initialization designation command. The effect control CPU 101 ends the initialization notification when the initial notification period elapses. The initial notification period is the same as the prohibition period set by the game control microcomputer 560 in step S45. Therefore, the abnormality notification designation command is not received when the initialization notification is performed.

  Next, the production control CPU 101 resets the initial notification flag and sets an initial notification flag indicating that the initial notification is being performed (step S1912A). Then, control goes to a step S1950.

  If the initial notification flag is not set, the effect control CPU 101 checks whether or not the door opening error notification flag is set (step S1913). If set, the effect control CPU 101 selects error process data corresponding to the door opening error (step S1914). In this embodiment, error process data (error process data) for controlling the speaker 27 and the lamps 281a to 281c, 282a to 282f, 283a to 283f, and 82a to 82d when various errors are notified. Prepared in advance. Details of the error process data will be described later.

  Next, the production control CPU 101 starts an error process timer (step S1915) and controls the speaker 27 according to the content of the error process data 1 (step S1916). For example, the effect control CPU 101 controls the speaker 27 so as to output a predetermined error sound (for example, a beep sound) together with a sound such as “the door is open”.

  Next, the effect control CPU 101 sets the excitation signal data output to the lamp right and left drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1916A). The effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1916B).

  Next, the effect control CPU 101 sets the lamp control signal in a predetermined data storage area in order to control the lamps 281a to 281c, 282a to 282f, 283a to 283f, and 82a to 82d (see FIG. 87). ) Is executed (step S1917). For example, the effect control CPU 101 sends lamp control signals for blinking the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided in the game frame 11 in a predetermined data storage area. Set to. The lamp control signal set in step S1917 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to each of the frame side IC substrates 602 to 604.

  Next, the production control CPU 101 resets the door opening error notification flag and sets a door opening error notification flag indicating that the door opening error notification is being performed (step S1917A). Then, control goes to a step S1950.

  If the door opening error notification flag is not set, the effect control CPU 101 checks whether or not the random number circuit error flag is set (step S1918). If set, the effect control CPU 101 performs control to display a random number circuit error display screen indicating that it is a random number circuit error on the effect display device 9 (step S1919). Next, the effect control CPU 101 selects error process data corresponding to the random circuit error (step S1920). Next, the production control CPU 101 starts an error process timer (step S1921) and controls the speaker 27 according to the content of the error process data 1 (step S1922). For example, the effect control CPU 101 controls the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Next, the effect control CPU 101 sets the excitation signal data output to the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1922A). Further, the effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1922B).

  Next, the effect control CPU 101 executes a serial setting process for setting the lamp control signal in a predetermined data storage area in order to control the lamps 281a to 281c, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1923). For example, the effect control CPU 101 sends lamp control signals for blinking the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided in the game frame 11 in a predetermined data storage area. Set to. The lamp control signal set in step S1923 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to each of the frame side IC substrates 602 to 604.

  Next, the effect control CPU 101 resets the random number circuit error flag and sets a random number circuit error notification flag indicating that the random number circuit error notification is being performed (step S1923A). Then, control goes to a step S1950.

  If the door opening error notification flag is not set, the effect control CPU 101 checks whether or not the abnormal winning notification designation command reception flag is set (step S1924). If set, the production control CPU 101 selects error process data corresponding to the abnormal winning notification (step S1925). Next, the effect control CPU 101 starts an error process timer (step S1926) and controls the speaker 27 according to the content of the error process data 1 (step S1927). For example, the effect control CPU 101 controls the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Next, the effect control CPU 101 sets the excitation signal data output to the lamp right and left drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1927A). Further, the effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1927B).

  Next, the effect control CPU 101 executes a serial setting process for setting the lamp control signal in a predetermined data storage area in order to control the lamps 281a to 281c, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1928). For example, the CPU 101 for effect control transmits lamp control signals for lighting the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided in the game frame 11 in a predetermined data storage area. Set to. The lamp control signal set in step S1928 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to each of the frame side IC substrates 602 to 604.

  Therefore, thereafter, sound output (output of abnormal notification sound) and lamp display (abnormal notification flashing) in accordance with the notification of abnormal winning are performed. Then, the production control CPU 101 resets the abnormal winning notification designation command reception flag and sets an abnormal notification flag indicating that abnormal notification is being performed (step S1929). Then, control goes to a step S1950.

  If the abnormal winning notification designation command reception flag is not set, the effect control CPU 101 checks whether or not the RAM clear flag is set (step S1930). If set, the production control CPU 101 selects error process data corresponding to the RAM clear notification (step S1931). The RAM clear notification is processing for notifying that the initialization process has been executed and the RAM has been cleared.

  Next, the production control CPU 101 starts an error process timer (step S1932) and controls the speaker 27 according to the contents of the error process data 1 (step S1933). For example, the effect control CPU 101 controls the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Next, the effect control CPU 101 sets the excitation signal data output to the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1933A). Further, the effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1933B).

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control the lamps 281a to 281c, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1934). For example, the CPU 101 for effect control transmits lamp control signals for lighting the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided in the game frame 11 in a predetermined data storage area. Set to. The lamp control signal set in step S1934 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to each of the frame side IC substrates 602 to 604. Then, control goes to a step S1950.

  Next, the effect control CPU 101 sets a value corresponding to the RAM clear notification period value in the period timer 2 (step S1935). The RAM clear notification period is a period during which a RAM clear notification is being notified. When the RAM clear notification period elapses, the effect control CPU 101 ends the RAM clear notification. The initial notification period and the RAM clear notification period may be the same period.

  Next, the effect control CPU 101 resets the RAM clear flag and sets a RAM clear notification flag indicating that the RAM clear notification is being performed (step S1935A). Then, control goes to a step S1950.

  If the RAM clear flag is not set, the production control CPU 101 checks whether or not the full tank error notification flag is set (step S1936). If it is set, the CPU 101 for effect control performs control to display a full tank error display screen indicating that it is full error on the effect display device 9 (step S1937). Next, the effect control CPU 101 selects error process data corresponding to a full tank error (step S1938). Next, the production control CPU 101 starts an error process timer (step S1939) and controls the speaker 27 according to the content of the error process data 1 (step S1940). For example, the production control CPU 101 controls the speaker 27 so as to output a sound such as “the bottom plate is full”.

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control the lamps 281a to 281c, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1941). For example, the effect control CPU 101 sets lamp control signals for blinking the LED lamps 82 a to 82 d of the dish lamps provided in the game frame 11 in a predetermined data storage area. The lamp control signal set in step S1941 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. To the frame-side IC substrate 605.

  Next, the production control CPU 101 resets the full tank error notification flag and sets a full tank error notification flag indicating that a full tank error notification is being performed (step S1941A). Then, control goes to a step S1950.

  If the full tank error notification flag is not set, the effect control CPU 101 checks whether or not the prize ball error notification flag is set (step S1942). If set, the production control CPU 101 selects error process data corresponding to the prize ball error (step S1943) and starts an error process timer (step S1944).

  Next, the effect control CPU 101 sets the excitation signal data output to the lamp right and left drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1944A). Further, the effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1944B).

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control the lamps 281a to 281c, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1945). For example, the effect control CPU 101 sets a lamp control signal for blinking the LEDs 281a to 281c of the ceiling lamps provided in the game frame 11 in a predetermined data storage area. The lamp control signal set in step S1945 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to each frame side IC substrate 602.

  Next, the effect control CPU 101 resets the prize ball error notification flag and sets a prize ball error notification flag indicating that the prize ball error notification is being performed (step S1945A). Then, control goes to a step S1950.

  In this embodiment, a case where only a notification process using a lamp is performed and a notification process using sound using the speaker 27 is not performed when a prize ball error is notified will be described. The used notification may be performed.

  If the prize ball error notification flag is not set, the effect control CPU 101 confirms whether or not the ball break error notification flag is set (step S1946). If set, the production control CPU 101 selects error process data corresponding to the ball-out error (step S1947) and starts an error process timer (step S1948).

  Next, the effect control CPU 101 sets the excitation signal data output to the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1948A). Further, the effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1948B).

  Next, the effect control CPU 101 executes a serial setting process for setting the lamp control signal in a predetermined data storage area in order to control the lamps 281a to 281c, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1949). For example, the effect control CPU 101 sets a lamp control signal for blinking the LEDs 281a to 281c of the ceiling lamps provided in the game frame 11 in a predetermined data storage area. The lamp control signal set in step S1949 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to each frame side IC substrate 602.

  Next, the effect control CPU 101 resets the ball-out error notification flag and sets a ball-out error notification flag indicating that the ball-out error notification is being performed (step S1949A). Then, control goes to a step S1950.

  In this embodiment, a case where only a notification process using a lamp is performed and a notification process using a sound using the speaker 27 is not performed when a ball break error is notified will be described. The used notification may be performed.

  In step S1950, the effect control CPU 101 changes the value of the notification control process flag to a value corresponding to the processing during notification (step S1901), and ends the processing.

  FIGS. 78 to 80 are flowcharts showing the in-notification process (step S1901) in the notification control process shown in FIG. In the notification process, the production control CPU 101 first checks whether or not the initial notification flag is set (step S1960). If the initial notification flag is not set, the process proceeds to step S1965. When the initial notification flag is set, the value of the timer 1 set in step S1912 is decremented by 1 (step S1961). When the value of the period timer 1 becomes 0, that is, when the initial notification period has elapsed, the initial notification flag is reset (steps S1962, S1963). If the value of the period timer 1 is not 0, the processing is terminated as it is.

  Further, the effect control CPU 101 outputs a command for deleting the initial screen or the power failure recovery screen in the effect display device 9 to the VDP 109 (step S1964). The VDP 109 deletes the initial screen or the power failure recovery screen from the effect display device 9 according to the command. Then, the process proceeds to step S2010.

  If the initial notification flag is not set, the effect control CPU 101 checks whether the door opening error notification flag is set (step S1965). If not set, the process proceeds to step S1971. If set, the production control CPU 101 decrements the error process timer by 1 (step S1966), and when the error process timer times out (step S1967), switches the error notification process data. That is, the process timer setting value set next in the error process table is set in the error process timer (step S1968).

  FIG. 81 is an explanatory diagram of a configuration example of an error notification process table. The error notification process table is a table in which process data to be referred to when the effect control CPU 101 performs control of the effect device and performs various error notifications is set. That is, the effect control CPU 101 performs error notification by controlling the speaker 27 and each lamp in accordance with data set in the error notification process table. The error notification process table includes data obtained by collecting a plurality of combinations of process timer set values, error lamp control execution data, and error sound number data. In the process timer set value, the duration in the sound output state and the lamp display state is set. The effect control CPU 101 refers to the error notification process table and controls the lighting / non-lighting state of each lamp in a manner set in the lamp display control execution data for the time set in the process timer set value. The sound output using the speaker 27 is controlled.

  The error notification process table shown in FIG. 81 is stored in the ROM of the effect control board 80. The error notification process table is prepared according to the error type (RAM clear notification, random number circuit error, full tank error, door opening error, out of ball error, prize ball error). Further, in this embodiment, every time the error process timer times out, the lighting of the pattern A and the lighting of the pattern B are switched, and the lighting or blinking is controlled.

  Next, the production control CPU 101 controls the speaker 27 based on the error sound number data (step S1969). In step S1969, the effect control CPU 101 outputs sound data indicating sound output corresponding to the corresponding error notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174, and outputs a voice signal to the speaker 27 side according to the read data. For example, the CPU 101 for effect control causes the speaker 27 to output a sound “the door is open” and a predetermined error sound (for example, a beep sound).

  Next, the effect control CPU 101 sets the excitation signal data output to the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1969A). Further, the effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1969B).

  Further, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S1970). For example, in step S1970, the effect control CPU 101 generates lamp control signals for blinking the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. Set to a predetermined data storage area. The lamp control signal set in step S1970 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the door opening error notification flag is not set, the effect control CPU 101 checks whether or not the random number circuit error notification flag is set (step S1971). If set, the production control CPU 101 decrements the error process timer by 1 (step S1972), and when the error process timer times out (step S1973), switches the error notification process data. That is, the process timer setting value set next in the error process table is set in the error process timer (step S1974).

  Next, the production control CPU 101 controls the speaker 27 based on the error sound number data (step S1975). In step S1975, the effect control CPU 101 outputs sound data indicating sound output corresponding to the corresponding error notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174, and outputs a voice signal to the speaker 27 side according to the read data. For example, the effect control CPU 101 causes the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Next, the effect control CPU 101 sets the excitation signal data output to the lamp right / left drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1975A). Further, the effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1975B).

  Further, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S1976). For example, in step S1976, the effect control CPU 101 outputs lamp control signals for lighting the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. Set in a predetermined data storage area. The lamp control signal set in step S1976 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the random circuit error notification flag is not set, the effect control CPU 101 checks whether the abnormality notification flag is set (step S1977). If not set, the process proceeds to step S1984. If set, the effect display device 9 outputs a command to superimpose and display the abnormality notification screen on the screen displayed at that time to the VDP 109 (step S1978). In response to the command, the VDP 109 superimposes and displays an abnormality notification screen on the effect display device 9 (see FIG. 90C).

  Further, the effect control CPU 101 decrements the error process timer by 1 (step S1979), and when the error process timer times out (step S1980), switches the error notification process data. That is, the process timer setting value set next in the error process table is set in the error process timer (step S1981).

  Next, the production control CPU 101 controls the speaker 27 based on the error sound number data (step S1982). In step S1982, the effect control CPU 101 outputs sound data indicating sound output in response to the abnormal winning notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174, and outputs a voice signal to the speaker 27 side according to the read data. For example, the effect control CPU 101 causes the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Next, the effect control CPU 101 sets excitation signal data to be output to the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1982A). The effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1982B).

  Further, the production control CPU 101 executes serial setting processing in order to control each lamp in accordance with the abnormal winning notification in accordance with the error lamp control execution data (step S1983). In step S1983, the CPU 101 for effect control provides predetermined lamp control signals for blinking the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. Set in the data storage area. The lamp control signal set in step S1983 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the abnormality notification flag is not set, the effect control CPU 101 checks whether or not the RAM clear notification flag is set (step S1984). If the RAM clear notification flag is not set, the process proceeds to step S1993. If the RAM clear notification flag is set, the process timer is decremented by -1 (step S1985) and the value of the timer 2 set in step S1935 is decremented by 1 (step S1986). When the process timer times out (step S1987), the error notification process data is switched. That is, the process timer setting value set next in the error process table is set in the process timer (step S1988).

  Next, the production control CPU 101 controls the speaker 27 based on the error sound number data (step S1989). In step S1989, the production control CPU 101 outputs a control signal (sound number data) to the speech synthesis IC 173 in order to cause the speaker 27 to output a sound. For example, the effect control CPU 101 causes the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Next, the effect control CPU 101 sets excitation signal data to be output to the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S1989A). The effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S1989B).

  Further, the effect control CPU 101 executes serial setting processing to control various lamps as effect parts in accordance with the error lamp control execution data (step S1990). In step S1990, the CPU 101 for effect control provides predetermined lamp control signals for lighting the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. Set in the data storage area. The lamp control signal set in step S1990 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to each frame side IC substrate 602 to 604.

  Next, the production control CPU 101 confirms whether or not the value of the period timer 2 has become 0 (step S1991). When the value of the period timer 2 becomes 0, that is, when the RAM clear notification period has elapsed, the RAM clear notification flag is reset (step S1992), and the process proceeds to step S2010. If the value of the period timer 2 has not timed out, the processing is terminated as it is.

  If the RAM clear notification flag is not set, the effect control CPU 101 checks whether or not the full tank error notification flag is set (step S1993). If not set, the process proceeds to step S1999. If set, the production control CPU 101 decrements the error process timer by 1 (step S1994), and when the error process timer times out (step S1995), switches the error notification process data. That is, the process timer setting value set next in the error process table is set in the error process timer (step S1996).

  Next, the production control CPU 101 controls the speaker 27 based on the error sound number data (step S1997). In step S1997, the production control CPU 101 outputs sound data indicating sound output corresponding to the corresponding error notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174, and outputs a voice signal to the speaker 27 side according to the read data. For example, the production control CPU 101 causes the speaker 27 to output a sound “the bottom plate is full”.

  Further, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S1998). For example, in step S1998, the effect control CPU 101 sets a lamp control signal for blinking the lamps 82a to 82d of the dish lamps in a predetermined data storage area. The lamp control signal set in step S1998 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the full tank error notification flag is not set, the effect control CPU 101 checks whether or not the prize ball error notification flag is set (step S1999). If not set, the process proceeds to step S2005. If set, the production control CPU 101 decrements the error process timer by 1 (step S2000), and when the error process timer times out (step S2001), switches the error notification process data. That is, the process timer setting value set next in the error process table is set in the error process timer (step S2002).

  Next, the effect control CPU 101 sets excitation signal data to be output to the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S2002A). The effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S2002B).

  In addition, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S2003). For example, in step S2003, the effect control CPU 101 sets a lamp control signal for blinking the LEDs 281a to 281c of the ceiling lamps provided on the game frame 11 side in a predetermined data storage area. The lamp control signal set in step S2003 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the award ball error notification flag is not set, the effect control CPU 101 checks whether or not the ball out error notification flag is set (step S2004). If not set, the process proceeds to step S2010. If set, the production control CPU 101 decrements the error process timer by 1 (step S2005), and when the error process timer times out (step S2006), switches the error notification process data. That is, the process timer setting value set next in the error process table is set in the error process timer (step S2007).

  Next, the effect control CPU 101 sets the excitation signal data output to the lamp right and left drive motors 91a and 91b and the lamp rotation drive motor 92 according to the second movable mode in a predetermined area of the RAM (step S2007A). The effect control CPU 101 sets brightness value data corresponding to the brightness 15 in a predetermined area of the RAM (step S2007B).

  Further, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S2008). For example, in step S2008, the effect control CPU 101 sets a lamp control signal for blinking the LEDs 281a to 281c of the ceiling lamps provided on the game frame 11 side in a predetermined data storage area. The lamp control signal set in step S2008 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  In this embodiment, as shown in FIG. 80, when a ball break error or a prize ball error is notified, sound output from the speaker 27 is not performed, but a ball break error or a prize ball error is notified. In this case, sound output control using the speaker 27 may be performed.

  In step S2009, the effect control CPU 101 checks whether or not an error notification release flag is set. If it is set, the process proceeds to step S2010. If it is not set, the process is terminated as it is. In step S2010, the production control CPU 101 changes the value of the notification control process flag to a value corresponding to the notification start process (step S1900), and ends the process.

  By executing the processing as described above, notification of various errors is executed. Also, error notification is executed in the order of initial notification, door opening error notification, random number circuit error notification, abnormal winning notification, RAM clear notification, full tank error notification, winning ball error notification, and out of ball error notification.

  The production control CPU 101 determines Y in steps S1960, S1965, S1971, S1977, S1984, S1993, S1999, and S2004, and then designates an initial notification flag, a door opening error notification flag, a random number circuit error flag, and an abnormal winning notification specification. It may be determined whether any one or more of a command reception flag, a RAM clear flag, a full tank error notification flag, a winning ball error notification flag, and a ball shortage error notification flag are set. If it is set, the value of the notification control process flag may be changed to a value corresponding to the notification start process (step S1900), and the notification start process may be repeated.

  Next, a lamp control signal set in a predetermined data storage area according to the error lamp control execution data will be described. FIG. 82 is an explanatory diagram showing an example of a lamp control signal output as a serial data method in the notification control process. As shown in FIG. 82, in this embodiment, two patterns of error lamp control execution data (pattern A and pattern B) are used for each error type. In this embodiment, the blinking display of the lamp is controlled by switching and using the error lamp control execution data for the pattern A and the pattern B. The effect control microcomputer 100 stores the lamp control signal shown in FIG. 82 in a predetermined lamp control signal storage area provided in advance in the ROM in association with the error lamp control execution data. Then, the effect control CPU 101 extracts a lamp control signal from a predetermined lamp control signal storage area based on the error lamp control execution data, and outputs it to the serial output circuit 353.

  As shown in FIG. 82, each lamp control signal is stored in a predetermined lamp control signal storage area with the addresses of the output destination serial-parallel conversion ICs 610, 613 to 615 added thereto. For example, since the address of the serial-parallel conversion IC 610 that supplies a control signal to the LEDs 281a to 281c of the ceiling lamp is “00”, the address “0000” is added to the 8-digit data body for controlling the lamp. Stored in state. Since the address of the serial-parallel conversion IC 613 that supplies the control signal to the LEDs 283a to 283f of the right frame lamp is “03”, the address “0011” is added to the 8-digit data body for controlling the lamp. Stored in state. Since the address of the serial-parallel conversion IC 614 that supplies the control signal to the LEDs 282a to 282f of the left frame lamp is “04”, the address “0100” is added to the 8-digit data body for controlling the lamp. Stored in state.

  In the case of RAM clear notification, as shown in FIG. 82, a ramp control signal whose control data body is “00000111” is transmitted to the serial-parallel conversion IC 610 whose address is “00”, and the address is “03”. A lamp control signal whose control data body is “00111111” is transmitted to each serial-parallel conversion IC 613 and 614 that is “04”. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281c and 282a to 282f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. , 283a to 283f are turned on. In addition, when the RAM clear notification is made, the same lamp control signal is output when the error lamp control execution data is pattern A and pattern B, so that the game frame 11 side during error notification is being executed. The LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided in are continuously lit.

  In the ramp control signal output to the serial-parallel conversion IC 610, the first bit corresponds to the input signal to the LED 281a, the second bit corresponds to the input signal to the LED 281b, and the third bit corresponds to the input signal to the LED 281c. . In the ramp control signal output to the serial-parallel conversion IC 613, the first bit is an input signal to the LED 283a, the second bit is an input signal to the LED 283b, the third bit is an input signal to the LED 283c, and the fourth bit is The input signal to the LED 283d corresponds to the input signal to the LED 283e, the fifth bit corresponds to the input signal to the LED 283f. In the ramp control signal output to the serial-parallel conversion IC 614, the first bit is an input signal to the LED 282a, the second bit is an input signal to the LED 282b, the third bit is an input signal to the LED 282c, and the fourth bit is The input signal to the LED 282d corresponds to the input signal to the LED 282e, the fifth bit corresponds to the input signal to the LED 282f.

  When notifying the door opening error, as shown in FIG. 82, first, based on the error lamp control execution data of pattern A, the control data body is transferred to the serial-parallel conversion IC 610 having the address “00”. A lamp control signal “00000111” is transmitted, and a lamp control signal whose control data body is “00111111” is transmitted to each serial-parallel conversion IC 610, 613, 614 whose addresses are “03” and “04”. The That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281c and 282a to 282f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. , 283a to 283f are turned on. Further, when the process data is switched, the control data body is transferred to each serial-parallel conversion IC 610, 613, 614 having addresses “00”, “03”, and “04” based on the error lamp control execution data of pattern B. A lamp control signal with “00000000” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 0 is output, and the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps provided on the game frame 11 side are turned off. Is done. By repeating such control, when notifying a door opening error, the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps provided on the game frame 11 side are blinked at predetermined time intervals. Control is performed.

  When notifying the ball break error, as shown in FIG. 82, first, based on the error lamp control execution data of the pattern A, the control data body is transferred to the serial-parallel conversion IC 610 whose address is “00”. A lamp control signal of “00000111” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the ceiling lamp are all 1 is output, and the LEDs 281a to 281c of the ceiling lamps provided on the game frame 11 side are turned on. At the time of process data switching, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 610 whose address is “00” based on the error lamp control execution data for pattern B. . That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the ceiling frame lamp are all 0 is output, and the LEDs 281a to 281c of the ceiling frame lamps provided on the game frame 11 side are turned off. When such a control is repeatedly performed and a ball-out error is notified, control is performed such that only the LEDs 281a to 281c of the top frame lamps provided on the game frame 11 side blink at predetermined time intervals.

  When notifying a full tank error, as shown in FIG. 82, first, based on the error lamp control execution data of pattern A, the serial-parallel conversion IC 615 whose address is “05” has the control data body “ A lamp control signal “00001111” is transmitted. That is, a lamp control signal in which the logical values of all the bits corresponding to the dish lamp LEDs 82a to 82d are 1, and the dish lamp LEDs 82a to 82d are turned on. At the time of process data switching, based on the error lamp control execution data for pattern B, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 615 whose address is “05”. . That is, a lamp control signal in which the logical values of the bits corresponding to the LED of the dish lamp are all 0 is output, and the LEDs 82a to 82d of the dish lamp are turned off. When such a control is repeatedly performed to notify a full tank error, control is performed so that only the LED lamps 82a to 82d of the pan lamp blink at a predetermined time interval.

  In the ramp control signal output to the serial-parallel conversion IC 615, the first bit is an input signal to the LED 82a, the second bit is an input signal to the LED 82b, the third bit is an input signal to the LED 82c, and the fourth bit is The input signal to the LED 82d and the fifth bit correspond to the input signal to the LED 83.

  When notifying the prize ball error, as shown in FIG. 82, first, based on the error lamp control execution data of pattern A, the control data body is set to the serial-parallel conversion IC 610 having the address “00”. A lamp control signal “00000111” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the ceiling lamp are all 1 is output, and only the LEDs 281a to 281c of the ceiling lamps provided on the game frame 11 side are turned on. At the time of process data switching, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 610 whose address is “00” based on the error lamp control execution data of pattern B. By repeatedly performing such control, when notifying a prize ball error, control is performed such that only the LEDs 281a to 281c of the top frame lamps provided on the game frame 11 side blink at predetermined time intervals.

  When a random circuit error is notified, as shown in FIG. 82, a ramp control signal whose control data body is “00000111” is transmitted to the serial-parallel conversion IC 610 whose address is “00”, and the address is “ The lamp control signal whose control data body is “00111111” is transmitted to the serial-parallel conversion ICs 613 and 614 that are “03” and “04”. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281c and 282a to 282f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. , 283a to 283f are turned on. Further, when a random number circuit error is notified, the same lamp control signal is output when the error lamp control execution data is pattern A and pattern B. The LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided on the 11 side are continuously turned on.

  When notifying an abnormal winning error, as shown in FIG. 82, first, based on the error lamp control execution data of pattern A, the control data body is transferred to the serial-parallel conversion IC 610 having the address “00”. A lamp control signal “00000010” is transmitted, and a lamp control signal whose control data body is “00101010” is transmitted to each of the serial-parallel conversion ICs 613 and 614 whose addresses are “03” and “04”. That is, a lamp control signal in which the logical values of all the bits corresponding to some of the LEDs of the lamp provided on the game frame 11 side are 1 is output, and some of the LEDs 281b of each lamp provided on the game frame 11 side. , 282b, d, f, 283b, d, f only are lit. As described above, in the control signal output to the serial-parallel conversion IC 610, 1 of the second bit corresponds to the input signal to the LED 281b. In the control signal output to the serial-parallel conversion IC 613, the second bit 1 is an input signal to the LED 283b, the fourth bit 1 is an input signal to the LED 283d, and the sixth bit 1 is an input signal to the LED 283f. It corresponds to. In the control signal output to the serial-parallel conversion IC 614, the 1st bit of the second bit is an input signal to the LED 282b, the 1st bit is the input signal to the LED 282d, and the 1st bit is the input signal to the LED 282f. It corresponds to.

  At the time of process data switching, a lamp control signal whose control data body is “00000101” is transmitted to the serial-parallel conversion IC 610 whose address is “00” based on the error lamp control execution data of pattern B, A lamp control signal whose control data body is “00010101” is transmitted to each of the serial-parallel conversion ICs 613 and 614 whose addresses are “03” and “04”. That is, a lamp control signal in which the logical values of all the bits corresponding to the other part of the LEDs of the ceiling lamps provided on the game frame 11 side are all 1 is output, and each lamp provided on the game frame 11 side. Only some of the other LEDs 281a, c, 282a, c, e, 283a, c, e are turned on. As described above, in the control signal output to the serial-parallel conversion IC 610, 1 in the first bit corresponds to an input signal to the LED 281a, and 1 in the third bit corresponds to an input signal to the LED 281c. In the control signal output to the serial-parallel conversion IC 613, the first bit 1 is an input signal to the LED 283a, the third bit 1 is an input signal to the LED 283c, and the fifth bit 1 is an input signal to the LED 283e. It corresponds to. In the control signal output to the serial-parallel conversion IC 614, the first bit 1 is an input signal to the LED 282a, the third bit 1 is an input signal to the LED 282c, and the fifth bit 1 is an input signal to the LED 282e. It corresponds to.

  When an abnormal winning error is notified by repeating the control as described above, the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of the respective lamps provided on the game frame 11 side are alternately alternated at a predetermined time interval. Control is performed so as to blink.

  In the example shown in FIG. 82, when performing error notification, the lamp control signal is also supplied to the serial-parallel conversion ICs 610 and 613 to 615 of the lamps that are not subject to display control. For example, in the case of RAM clear notification, there is no need to control the lighting or blinking of the pan lamp, but the example shown in FIG. A lamp control signal whose bit logical values are all 0 is output. By doing so, it is possible to make sure that the LED that is not the control target at the time of error notification is turned off.

  When performing error notification, the lamp control signal may not be output (transmitted) to the serial-parallel conversion ICs 610 and 613 to 615 of the lamps that are not subject to display control. FIG. 83 is an explanatory diagram showing another example of the lamp control signal output as the serial data method in the notification control process.

  When performing RAM clear notification, door open error notification, random number error notification, or abnormal winning error notification, the dish lamp is not subject to display control, and as shown in FIG. 83, the serial whose address is “05”. -A lamp control signal is not output to the parallel conversion IC 615. Further, in the case of notifying a ball break error or a prize ball error, since the left frame lamp and the right frame lamp are not subject to display control in addition to the dish lamp, the address is “03” as shown in FIG. The lamp control signal is not output to the serial-parallel conversion ICs 613 to 615 that are "to" 05 ". Further, when performing full tank error notification, only the dish lamp is a display control target. Therefore, as shown in FIG. 83, serial-parallel conversion ICs 610 having addresses “00”, “03”, and “04” are used. , 613, 614 are not output a lamp control signal. By doing so, it is possible to reduce the lamp control signal output from the production control microcomputer 100 to each of the frame side IC substrates 602 to 605.

  In the example shown in FIGS. 82 and 83, the case where various error notifications are performed using only the LEDs 281a to 281c, 282a to 282f, 283a to 283f, and 82a to 82d of the lamps provided on the game frame 11 side has been described. However, in addition to these, various error notifications may be performed using center decoration lamps or stage lamp LEDs 125a to 125f and 126a to 126f provided on the game board 6 side.

  Next, a lamp control signal that is set in a predetermined data storage area in the case of performing decorative display variation display will be described. FIG. 84 is an explanatory diagram showing an example of a lamp control signal stored in the data storage area in the case where the decorative symbol variation display is performed. FIG. 84 illustrates lamp control signals for driving the top frame lamp, the right frame lamp, and the left frame lamp. As shown in FIG. 84, the lamp control signal is stored in a predetermined lamp control signal storage area with the addresses of the output destination serial-parallel conversion ICs 610, 613, and 614 added. For example, since the address of the serial-parallel conversion IC 610 that supplies a control signal to the LEDs 281a to 281c of the ceiling lamp is “00”, the address “0000” is added to the 8-digit data body for controlling the lamp. Stored in state. Since the address of the serial-parallel conversion IC 613 that supplies the control signal to the LEDs 283a to 283f of the right frame lamp is “03”, the address “0011” is added to the 8-digit data body for controlling the lamp. Stored in state. Since the address of the serial-parallel conversion IC 614 that supplies the control signal to the LEDs 282a to 282f of the left frame lamp is “04”, the address “0100” is added to the 8-digit data body for controlling the lamp. Stored in state.

  In this example, in the case of displaying a decorative pattern, a ramp control signal whose control data body is “00000111” is transmitted to the serial-parallel conversion IC 610 whose address is “00”, and the addresses are “03” and “03”. The lamp control signal whose control data body is “00111111” is transmitted to each serial-parallel conversion IC 613 and 614 that is “04”. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281c and 282a to 282f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. , 283a to 283f are turned on. Then, the brightness is controlled in the manner shown in FIGS.

  Although the case where the top frame lamp, the right frame lamp, and the left frame lamp are driven is illustrated here, the production control microcomputer 100 outputs a control signal for controlling the lamp provided in the game board 6. When playing, a control signal added with address information that can identify the board-side serial-parallel conversion circuit (see FIG. 17) mounted on the board-side IC board is output in a serial signal system and provided in the game frame 11. When a control signal for controlling the lamp is output, a control signal to which address information that can identify the frame-side serial-parallel conversion circuit (see FIG. 17) mounted on the frame-side IC board is added in a serial signal system. Output.

  Next, a motor control signal output when the movable members 151 to 153 are operated in the game effect will be described. FIG. 85 is an explanatory diagram showing an example of a motor control signal output as a serial data system in a game effect. In the example shown in FIG. 85, the case where the motors 151a, 152a, and 153a for driving the movable members 151 to 153 are DC motors will be described. Note that stepping motors may be used as the motors 151a, 152a, and 153a for driving the movable members 151 to 153.

  The motor control signal shown in FIG. 85 is, for example, predetermined data in the serial setting process when variable display including a notice effect using the movable members 151 to 153 is executed in the decorative symbol changing process shown in FIG. Set in the storage area. The effect control microcomputer 100 stores the motor control signal shown in FIG. 85 in a predetermined motor control signal storage area provided in advance in the ROM in association with, for example, display control execution data. Then, the effect control CPU 101 extracts a motor control signal from a predetermined motor control signal storage area based on the display control execution data, and outputs the motor control signal to the serial output circuit 353.

  As shown in FIG. 85, each motor control signal is stored in a predetermined lamp control signal storage area with the address of the output destination serial-parallel conversion IC 616 added thereto. In this embodiment, since the address of the serial-parallel conversion IC 616 that supplies a control signal to each of the motors 151a, 152a, 153a is “06”, the address “0110” is stored in the 8-digit data body for controlling the motor. Is stored in a state where is added.

  When the trolley 151 is operated in the forward direction as a movable member, a motor control signal whose control data body is “00000001” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal in which the logical value of the bit (first bit of the control data) corresponding to the forward operation of the motor 151a for driving the truck 151 is 1 is output, and the truck 151 is driven by driving the motor 151a. Is operated. When the operation of the truck 151 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal whose logical value of the bit corresponding to the forward operation of the motor 151a (the first bit of the control data) is 0 is output, and the operation of the truck 151 is stopped by stopping the driving of the motor 151a. Is done. In this embodiment, when the trolley 151 is moved in the forward direction, the trolley 151 is detected by the position sensor 151b, and the driving time of the motor 151a has elapsed for a predetermined time (for example, 1 second). Then, the driving of the motor 151a is stopped.

  When the trolley 151 is operated in the reverse direction as a movable member, a motor control signal whose control data body is “00000010” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal in which the logical value of the bit (second bit of the control data) corresponding to the reverse operation of the motor 151a for driving the trolley 151 is 1 is output, and the trolley 151 is driven by driving the motor 151a. Is operated. When the operation of the truck 151 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the reverse operation of the motor 151a (the second bit of the control data) is output, and the operation of the truck 151 is stopped by stopping the driving of the motor 151a. Is done. In this embodiment, when the trolley 151 is operated in the reverse direction, the trolley 151 is not detected by the position sensor 151b, and the driving time of the motor 151a has elapsed for a predetermined time (for example, 1 second). As a result, the driving of the motor 151a is stopped.

  When the beam 152 is moved in the forward direction as a movable member, a motor control signal whose control data body is “00000100” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal in which the logical value of the bit (the third bit of the control data) corresponding to the forward direction operation of the motor 152a for driving the beam 152 is 1 is output, and the beam 152 is driven by driving the motor 152a. Is operated. When the operation of the beam 152 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the positive direction operation of the motor 152a (the third bit of the control data) is output, and the operation of the beam 152 is stopped by stopping the driving of the motor 152a. Is done. In this embodiment, when the beam 152 is moved in the forward direction, the beam 152 is detected by the position sensor 152b, and the driving time of the motor 152a has elapsed for a predetermined time (for example, 1 second). The driving of the motor 152a is stopped.

  When the beam 152 is moved in the reverse direction as a movable member, a motor control signal whose control data body is “00001000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 1 corresponding to the reverse operation of the motor 152a for driving the beam 152 (the fourth bit of the control data) is output, and the motor 152a is driven to drive the beam 152. Is operated. When the operation of the beam 152 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the reverse operation of the motor 152a (the fourth bit of the control data) is output, and the operation of the beam 152 is stopped by stopping the driving of the motor 152a. Is done. In this embodiment, when the beam 152 is operated in the reverse direction, the beam 152 is not detected by the position sensor 152b, and the driving time of the motor 152a has elapsed for a predetermined time (for example, 1 second). As a result, the driving of the motor 152a is stopped.

  When the skeleton 153 is moved in the forward direction as a movable member, a motor control signal whose control data body is “00010000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 1 corresponding to the forward operation of the motor 153a for driving the skeleton 153 (the fifth bit of the control data) is output, and the skeleton 153 is driven by driving the motor 153a. Is operated. When the operation of the skeleton 153 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the forward operation of the motor 153a (the fifth bit of the control data) is output, and the operation of the skeleton 153 is stopped by stopping the driving of the motor 153a. Is done. In this embodiment, when the skeleton 153 is moved in the forward direction, the skeleton 153 is detected by the position sensor 153b, and the driving time of the motor 153a has elapsed for a predetermined time (for example, 1 second). The drive of the motor 153a is stopped.

  When the skeleton 153 is moved in the reverse direction as the movable member, a motor control signal whose control data body is “00100000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 1 corresponding to the reverse operation of the motor 153a for driving the skeleton 153 (the sixth bit of the control data) is output, and the skeleton 153 is driven by driving the motor 153a. Is operated. When the operation of the skeleton 153 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the reverse operation of the motor 153a (the sixth bit of the control data) is output, and the operation of the skeleton 153 is stopped by stopping the driving of the motor 153a. Is done. In this embodiment, when the skeleton 153 is operated in the reverse direction, the position sensor 153b does not detect the skeleton 153, and the driving time of the motor 153a has elapsed for a predetermined time (for example, 1 second). As a result, the driving of the motor 153a is stopped.

  Next, motor control signals (excitation signals) output when the LEDs 281a to 281c of the ceiling lamp are moved will be described. FIG. 86 is an explanatory diagram showing an excitation pattern used for exciting the lamp right / left drive motors 91a and 91b and the lamp rotation drive motor 92 (stepping motor). As shown in FIG. 86, in this embodiment, the lamp left / right drive motors 91a, 91b and the lamp rotation drive motor 92 are driven by 1-2 phase excitation. Then, magnetic pulses are sequentially output to the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 in accordance with the excitation pattern data of step numbers 1 to 16 in FIG. 86A or step numbers 1 to 8 in FIG. 86B. As a result, the LEDs 281a to 821c of the ceiling lamp are moved.

  In this embodiment, when the customer waiting demonstration display or the big hit display is performed, the excitation pattern shown in FIG. 86 (a) is used to excite the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92. Used. In the case of displaying various errors, the excitation pattern shown in FIG. 86 (b) is used to excite the lamp left / right drive motors 91a, 91b and the lamp rotation drive motor 92. As shown in FIG. 86, when various errors are displayed, the lamp left and right drive motors 91a and 91b and the lamp rotation drive motor 92 are twice as fast as when a customer waiting demonstration display and a big hit display are performed. When excited, each LED 281a to 821c of the ceiling lamp is moved at a double speed. By doing so, when various errors are displayed, it is possible to make it easier for a game clerk to recognize the occurrence of the error.

  86 shows the motor control signals when driving the lamp right and left drive motors 91a and 91b and the lamp rotation drive motor 92. For example, the motor output to the lamp vertical drive motor 90 when performing the reach effect. The same applies to the control signal.

  Next, the serial setting process will be described. FIG. 87 is a flowchart illustrating an example of the serial setting process. In the serial setting process, for example, in the production control process process, when a customer waiting demonstration display is performed (see step S1818), or when a decorative symbol is variably displayed (see steps S835F and S996), a jackpot display is performed (step S1818). This is executed when various error notifications are made (see steps S1917, S1923, S1928, S1934, S1941, S1945, S1949, S1970, S1976, S1983, S1990, S1998, S2003, S2008).

  In the serial setting process, the production control CPU 101 first reads out lamp control execution data (such as lamp lighting pattern data and motor control data associated with the variation pattern) from the ROM (step S950). In this case, for example, when performing the serial setting process during the execution of the variable display of decorative symbols, the effect control CPU 101 reads the lamp control execution data of the process table shown in FIG. When serial setting processing is performed in the notification control process, the error lamp control execution data in the error notification process table shown in FIG. 81 is read.

  Next, the effect control CPU 101 confirms whether or not there is a change in the display state of each lamp based on the read lamp control execution data (step S951). If the display state of each lamp is changed, the CPU 101 for effect control extracts the lamp control signal to which the address of the serial-parallel conversion IC of the lamp to be displayed is added from a predetermined lamp control signal storage area ( Step S952). Next, header data (1FFh), a mark bit, and an end bit shown in FIG. 22 are added to the extracted ramp control signal and set in a predetermined data storage area provided in the RAM (step S953). Then, a lamp control signal output request flag is set (step S954).

  For example, when the serial setting process is executed in steps S1917, S1923, S1928, S1934, S1941, S1945, S1949, S1970, S1976, S1983, S1990, S1998, S2003, and S2008 in the notification control process, in step S952. One of the lamp control signals with an address shown in FIG. 82 is read out and set in the data storage area in step S953.

  Next, the production control CPU 101 reads display control execution data from the ROM (step S955). In this case, for example, when performing serial setting processing during execution of variable display of decorative symbols, the effect control CPU 101 reads display control execution data in the process table shown in FIG. On the other hand, when the serial setting process is performed in the notification control process, the error notification process table shown in FIG. 81 does not include display control execution data, so that it is determined as N in the next step S956. become.

  Next, the effect control CPU 101 confirms whether or not the movable effect of any of the movable members 151 to 153 is included in the game effect based on the read display control execution data (step S956). When the movable members 151 to 153 are movable, the effect control CPU 101 adds a motor control signal to which the address (“06” in this example) of the serial-parallel conversion IC of the movable members 151 to 153 to be moved is added. Are extracted from a predetermined motor control signal storage area (step S957). Next, header data (1FFh), a mark bit, and an end bit shown in FIG. 22 are added to the extracted motor control signal and set in a predetermined data storage area provided in the RAM (step S958). Then, a motor control signal output request flag is set (step S959).

  For example, when the decorative display variable display includes a notice effect or the like, and when any of the movable members 151 to 153 is moved and the serial setting process is executed, the motor control with any of the addresses shown in FIG. 85 in step S957. The signal is read out and set in the data storage area in step S958.

  Next, the effect control CPU 101 checks whether or not the top frame lamp is movable based on the read lamp control execution data (step S960). In the case of moving the ceiling lamp, the CPU 101 for effect control is a motor to which the address of the serial-parallel conversion IC of the lamp vertical drive motor 90, the lamp horizontal drive motors 91a and 91b, and the lamp rotation drive motor 92 is added. A control signal is extracted from a predetermined lamp control signal storage area (step S961). Next, header data (1FFh), a mark bit, and an end bit shown in FIG. 22 are added to the extracted motor control signal and set in a predetermined data storage area provided in the RAM (step S962). Then, a motor control signal output request flag is set (step S963).

  For example, when performing a customer waiting demonstration display or a jackpot display, the excitation signal shown in FIG. 86 (a) is read out with an address in step S961, and set in the data storage area in step S962. . For example, when various errors are displayed, the excitation signal shown in FIG. 86B is read with an address in step S961, and set in the data storage area in step S962.

  FIG. 88 is an explanatory diagram showing a configuration example of a data storage area in which a lamp control signal and a motor control signal to be output are set. In this example, nine data storage areas for storing the lamp control signal or the motor control signal are prepared, and the lamp control signal and the motor are sequentially output to the panel side IC substrate 601 and the frame side IC substrates 602 to 605. Control signals are sequentially stored in steps S952, S957, and S961.

  FIG. 89 is a flowchart showing a specific example of the serial input / output process (step S708). In the serial input / output process, the production control CPU 101 first checks whether the lamp control signal output request flag or the motor control signal output request flag is set (step S970). If set, the lamp control signal output request flag or the motor control signal output request flag is reset (step S971), and the lamp control signal and motor control signal stored in the data storage area are transferred to the serial output circuit 353. Output (step S972). In this case, when a plurality of lamp control signals are set in the data storage area, the effect control CPU 101 sequentially reads each lamp control signal and outputs it to the serial output circuit 353 in step S972. The output lamp control signal and motor control signal are converted into serial data by the serial output circuit 353 and serially transmitted to the board side IC board 601 and the frame side IC boards 602 to 605 via the relay boards 606 and 607. It will be output as a data method.

  Next, the effect control CPU 101 causes the input capture signal output unit 357 to output an input capture signal (latch signal) to the board side IC substrate 601 via the relay substrates 606 and 607 (step S973). The input IC 621 mounted on the panel-side IC board 601 latches the detection signals of the position sensors 151b, 152b, and 153b based on the input input signal being input, and relays boards 606 and 607 as a serial data system. Is output to the effect control board 80. Then, the effect control CPU 101 reads the input data from the serial input circuit 354 and stores it in a predetermined storage area of the RAM (step S974). In step S974, the effect control CPU 101 controls the serial input circuit 354 to read the input data from the serial input circuit 354 after delaying the input data from the input IC 621 by a time.

  Next, the effect control CPU 101 causes the input capture signal output unit 357 to output an input capture signal (latch signal) to the frame side IC substrate 605 via the relay substrate 607 (step S975). The input IC 620 mounted on the board side IC substrate 605 latches the detection signals of the operation buttons 81a to 81e based on the input input signal being input, and produces the serial data system via the relay substrate 607. The data is output to the control board 80. Then, the effect control CPU 101 reads the input data from the serial input circuit 354 and stores it in a predetermined storage area of the RAM (step S976). In step S976, the effect control CPU 101 controls the serial input circuit 354 to read the input data from the serial input circuit 354 after delaying the time by which the serial input circuit 354 receives the input data from the input IC 620.

  FIG. 90 is an explanatory diagram showing an example of a display effect on the effect display device 9, a sound effect by the speaker 27, and a display effect by each lamp. FIG. 90 (A) shows an example when the decorative display is variably displayed on the effect display device 9.

  FIG. 90 (B) shows an example in which initialization notification is performed in the effect display device 9. As shown in FIG. 90B, when the initialization display command is received and initialization notification is performed in the effect display device 9, a predetermined period (for example, 31 seconds) after receiving the initialization specification command, The LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided in the game frame 11 are turned on, and a predetermined error sound is output from the speaker 27, and the RAM is cleared. Inform you.

  In FIG. 90C, abnormality notification is performed in the effect display device 9, an abnormality notification sound is output by the speaker 27, and abnormality notification display (for example, by the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of each lamp) An example in the case of blinking) is shown. When receiving the abnormal prize notification designation command from the game control microcomputer 560, the effect control microcomputer 100 performs control to display an abnormality notification screen on the effect display device 9, and outputs an abnormality notification sound from the speaker 27. Control is performed to display abnormality notification on the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of each lamp. Further, even when the decorative pattern variable display is started in response to the reception of the variation pattern command, the display of the abnormality notification screen on the effect display device 9, the output of the abnormality notification sound from the speaker 27, and the LEDs 281a to 281c of each lamp, The abnormality notification display of 282a to 282f and 283a to 283f is continued. Even after the variable display of the decorative symbols is finished, the display of the abnormality notification screen on the effect display device 9, the output of the abnormality notification sound from the speaker 27, and the LEDs 281a to 281c, 282a to 282f, 283a to 283f of the respective lamps. The abnormality notification display is continued.

  Since the production control microcomputer 100 does not execute control for deleting the abnormality notification screen, control for stopping the output of the abnormality notification sound, and control for stopping the abnormality notification display, the display of the abnormality notification screen on the effect display device 9 is not performed. The output of the abnormality notification sound from the speaker 27 and the abnormality notification display of the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of each lamp are continued until the power supply to the gaming machine is stopped. However, when the predetermined time has elapsed after the display of the abnormality notification screen, the output of the abnormality notification sound, and the abnormality notification display is started, the production control microcomputer 100 displays the abnormality notification screen, the output of the abnormality notification sound, and the abnormality notification. You may control to stop a display.

  Further, in this embodiment, the game control microcomputer 560 does not detect abnormal winnings for a predetermined period (a period during which the initialization notification is executed) after the power supply to the game machine is started, and does not perform game control. The abnormal winning notification designation command is not transmitted from the microcomputer 560. However, the game control microcomputer 560 always detects an abnormal winning when the value of the special symbol process flag is less than a predetermined value (5 in this embodiment), so that the effect control microcomputer 100 performs the game control. If an abnormal winning notification designation command is received during a predetermined period after the power supply to the machine is started, the abnormal winning notification may not be performed.

  Also, in this embodiment, when the game control microcomputer 560 detects that one game ball has won a big winning opening when it is not in the big win game state, the abnormal control notification designation command is sent to the effect control microcomputer. Although it is transmitted to 100, when it is detected that a predetermined number (a plurality of) game balls have won the big winning opening when not in the big hit gaming state, an abnormal winning notification designation command may be transmitted. Further, when it is not in the big hit gaming state, when it is detected that a predetermined number (a plurality of) gaming balls have won within a predetermined time, an abnormal winning notification designating command may be transmitted. When receiving the abnormal winning notification designation command, the production control microcomputer 100 displays the abnormality notification screen, outputs the abnormality notification sound, and displays the abnormality notification as described above.

  As described above, according to this embodiment, the production control microcomputer 100 is based on the production control command received from the game control microcomputer 560, and the LEDs 125a to 125f, 126a to 126f, and 281a of the respective lamps. Control signals for controlling ˜281c, 282a to 282f, and 283a to 283f are output in a serial signal system. Further, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602 to 605 are connected through one system wiring. At the same time, different address information is assigned in advance, and only the control signal with its own address information added is converted into parallel data and output. In addition, when the production control microcomputer 100 outputs a control signal for controlling the serial-parallel conversion ICs 616 to 619 provided in the game board 6, address information that can identify the serial-parallel conversion ICs 616 to 619 is provided. The added control signal is output by the serial signal system. In addition, when the production control microcomputer 100 outputs a control signal for controlling the serial-parallel conversion ICs 610 to 615 provided in the game frame 11, address information that can identify the serial-parallel conversion ICs 610 to 615 is provided. The added control signal is output by the serial signal system. Therefore, the number of wirings between the game board 6 and the game frame 11 can be reduced. Therefore, in a gaming machine in which the game frame 11 and the game board 6 are configured to be detachable, it is possible to easily attach and detach the game frame 11 and the game board 6.

  In addition, according to this embodiment, the ceiling frame lamp unit 281A provided in the game frame 11 can move the three LEDs 281a to 281c that can emit light as the ceiling frame lamp, and the driving components for moving the LEDs 281a to 281c ( A lamp vertical drive motor 90, lamp right and left drive motors 91a and 91b, a lamp rotation drive motor 92, a shaft 93, gears 95 and 98, and a drive component 96). Therefore, it is possible to further improve the game performance by performing effects using the LEDs 281a to 281c of the movable ceiling frame lamp provided in the game frame 11.

  In addition, it is not provided with the drive component for moving each LED281a-281c, but is provided with the change member which changes the irradiation direction of the light which each LED281a-281c emits, and the drive member for moving these change members. You may comprise as follows. FIG. 91 is an explanatory diagram showing the structure of the ceiling frame lamp unit and the mounting structure of the ceiling frame lamp unit in the case of including a changing member that changes the irradiation direction of the light emitted by the LEDs 281a to 281c. FIG. 92 is an explanatory diagram showing a structure in which the LEDs 281a to 281c of the top frame lamp are driven in the left-right direction or rotationally driven when a changing member that changes the irradiation direction of the light emitted by the LEDs 281a to 281c is provided. is there.

  In the example shown in FIGS. 91 and 92, the ceiling lamp unit 281A includes nine optical mirrors 85a to 85i that can change the light irradiation direction instead of the shaft 93 and the gear 95. The top frame lamp unit 281A includes nine mirror drive motors for driving the optical mirrors 85a to 85i in place of the lamp right / left drive motors 91a and 91b and the lamp rotation drive motor 92. In FIG. 91 and FIG. 92, only three mirror drive motors 86a, 86b, 86c for driving the optical mirrors 85d, 85e, 85f arranged around the LED 281b are shown, but the ceiling lamp unit 281A is shown in FIG. Including three mirror drive motors for driving the optical mirrors 85a, 85b, 85c arranged around the LED 281a, and three mirror drives for driving the optical mirrors 85g, 85h, 85i arranged around the LED 281a. Including motor

  For example, the case where the LED 281b is movable will be described as an example. The same control is performed when the LEDs 281a and 281c are moved. When the LED 281b is in the downward light emission state, as shown in FIG. 92A, the optical mirror 85e is pushed forward by driving the mirror drive motor 86b. Then, the light emitted from the LED 281b is reflected by the optical mirror 85e, and enters a downward light emitting state in which the gaming machine is irradiated downward. When the LED 281b is set to the left sideways light emission state, as shown in FIG. 92 (b), the optical mirror 85f is pushed forward by driving the mirror drive motor 86c. Then, the light emitted from the LED 281b is reflected by the optical mirror 85f, and enters a lateral light emitting state in which the game machine is irradiated in the left side direction. In addition, when the LED 281b is set to the right sideways light emission state, the optical mirror 85d is pushed forward by driving the mirror drive motor 86a as shown in FIG. 92 (c). Then, the light emitted from the LED 281b is reflected by the optical mirror 85d and enters a lateral light emitting state in which the game machine is irradiated in the right side surface direction.

  As described above, when configured as shown in FIGS. 91 and 92, the top frame lamp unit 281A provided in the game frame 11 can emit three LEDs 281a to 281c that can emit light as the top frame lamp, and the LEDs 281a to 281c. Drive members (9 mirror drive motors including mirror drive motors 86a to 86c) for moving change members (optical mirrors 85a to 85i) that change the irradiation direction of the light emitted by the light source. . Therefore, it is possible to further improve the game performance by performing effects using the LEDs 281a to 281c of the movable ceiling frame lamp provided in the game frame 11.

  FIG. 93 is an explanatory diagram showing an installation state in the game store of the gaming machine 1 using the movable ceiling frame lamp provided in the game frame 11. For example, when a display of a decorative pattern that does not include a reach effect is displayed during the game, the LEDs 281a to 281c of the top frame lamp emit light forward so as to irradiate the gaming machine 1 in the forward direction. Light is emitted in the state (see 400 shown in FIG. 93). On the other hand, when the reach effect is performed during the variation display of the decorative symbols, the LEDs 281a to 281c of the frame lamp emit light in a downward light emitting state so as to illuminate the player (402 shown in FIG. 93). reference). By doing so, the excitement level for reach production can be enhanced, and the interest in games can be improved. In addition, when performing customer waiting demonstration display, jackpot display, and various error displays, each LED 281a to 281c of the frame lamp emits light in a sideways light emitting state so that other players and game clerk who are not playing games can recognize. (See 401 shown in FIG. 93). By doing so, it is possible to make other game players aware of the waiting for customer demonstrations and the occurrence of jackpots, or to make it easier for game shop staff to notice the occurrence of various errors.

  In addition, according to this embodiment, the serial-parallel conversion ICs 616 to 619 mounted on the board-side IC board 601 and the serial-parallel mounted on the frame-side IC boards 602 to 604 by the relay boards 606 and 607 are used. The connection with the conversion ICs 610 to 615 is relayed. The relay board 607 relays the connection between the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC boards 602 to 604 and the effect control microcomputer 100. Therefore, the attachment / detachment work between the game frame 11 and the game board 6 can be easily performed only by performing the connection work and the removal work to the relay boards 606 and 607.

  Further, according to this embodiment, the frame side IC substrate 602 as a collective substrate on which three serial-parallel conversions 610 to 612 are mounted is provided on the game frame 11 side. A board-side IC board 601 as a collective board on which four serial-parallel conversion ICs 616 to 619 are mounted is provided on the game board 6 side. Therefore, the boards on which the serial-parallel conversion ICs are mounted can be integrated, and the number of parts in the gaming machine can be reduced.

  Further, according to this embodiment, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602 to 605 are connected to each other by the connector. Are connected through one line of wiring. Therefore, the wiring work between the game frame 11 and the game board 6 can be performed simply by attaching and detaching the connector, and the game frame 11 and the game board 6 can be attached and detached more easily.

  Further, according to this embodiment, the game control microcomputer 560 transmits the effect control command to the effect control microcomputer 100 in the serial signal system using the serial output circuit 78. Therefore, the number of wires between the game control microcomputer 560 and the effect control microcomputer 100 can also be reduced.

  Further, according to this embodiment, the production control microcomputer 100 includes the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel conversion mounted on the frame side IC substrates 602 to 605. A clock signal used in common for the ICs 610 to 615 and the input ICs 620 and 621 is output. Therefore, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601, the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602 to 605, and the input ICs 620 and 621 can be easily synchronized. And the number of clock signal wirings can be reduced.

  In this embodiment, the production control microcomputer 100 may store the device ID of the serial-parallel conversion ICs 610 to 619 as an address in a predetermined address storage area of the RAM in advance. If comprised in that way, each lamp | ramp 125a-125f, 126a-126f, 281a-281c, 282a-282f, 283a-283f will be controlled using ID information intrinsic | native to serial-parallel conversion IC610-619 as address information. be able to.

  In this embodiment, as the movable mode of the ceiling lamp, the LEDs 281a to 281c are caused to emit light by controlling the movable mode of the first movable mode or the second movable mode. Although the case where the light emission state is set to the lateral direction in the side direction or the right oblique side direction has been described, the second movable mode may be configured to irradiate light with a spread from the left oblique side direction to the right oblique side direction. FIG. 94 is an explanatory diagram showing another example of the movable aspect of the ceiling lamp. As shown in FIG. 94, in the second movable mode, as shown in FIGS. 94 (C) and 94 (D), among the three LEDs 281a to 281c of the top frame lamp, the LED 281a located on the left side is inclined in the left side surface direction. By irradiating the LED 281c located on the right side in the right oblique side direction, the light irradiation range may be wider than that in the first movable mode.

  In this embodiment, as shown in FIGS. 11 to 14, the top frame lamp unit 281A includes each LED 281a to 281c of the top frame lamp, each drive motor 90, 91a, 91b, 92, gears 95, 98, Each drive member such as the shaft 93 is configured as a unit component integrally formed. And it is comprised so that removal from the front frame 12 of the game frame 11 is possible. Therefore, for example, when the model change of the gaming machine 1 is performed, the shape and color of the ceiling lamp can be easily changed by replacing the ceiling lamp unit 281A. Moreover, since the top frame lamp unit 281A is attached in such a manner that the top of the game frame 11 attached to the front frame 12 is covered with the glass door frame 2, the top frame lamp unit 281A cannot be removed unless the glass door frame 2 is opened. can do. Therefore, it is possible to prevent a situation in which the top frame lamp unit 281A is illegally removed.

  Further, in this embodiment, the case where the top frame lamp unit 281A is attached to the front frame 12 of the game frame 11 is shown, but the top frame lamp unit 281A may be attached to the glass door frame 2 side. FIG. 95 is an explanatory diagram showing the structure of the top frame lamp unit and the mounting structure of the top frame lamp unit when mounted on the glass door frame side. In this case, as shown in FIG. 95, the top frame lamp unit 281A is attached to the upper part of the glass door frame 2 by screwing or the like. FIG. 96 is a front view of the pachinko gaming machine viewed from the front when the top frame lamp unit is attached to the glass door frame side. FIG. 97 is a front view showing the front of the game board when the top frame lamp unit is attached to the glass door frame side. The structure of the top frame lamp unit 281A is the same as that shown in FIGS. However, when attaching to the glass door frame 2 side, the top frame lamp unit 281A includes two connector portions 158a and 185b.

  FIG. 98 is an explanatory diagram showing a state in which the game frame 11 is opened when the top frame lamp unit is attached to the glass door frame side. FIG. 99 is an explanatory diagram showing the back of the game board 11 and the game board 6 when the top frame lamp unit is attached to the glass door frame side. When the ceiling frame lamp unit 281A is attached to the glass door frame 2 side, the wiring between the frame side IC substrates 603 and 604 and the wiring between the frame side IC substrates 604 and 605 and the relay substrate 607 are shown in FIG. Thus, it connects to each board | substrate using the connectors 156a-156h. The connector 156d is fitted into the connector portion 158a of the top frame lamp unit 281A, and the connector 156e is fitted into the connector portion 158b of the top frame lamp unit 281A.

  In the example shown in FIG. 98, the wiring from the connector 156a of the relay board 607 is connected to the connector 156b of the frame side IC board 604. The wiring pattern of the frame side IC substrate 604 is further branched from the connector 156b, one is connected to the serial-parallel conversion IC 614, and the other is connected to the connector 156c. As shown in FIG. 98, the wiring from the connector 156c of the frame side IC substrate 604 is connected to the connector 156d, and from the connector 156e via the frame side IC substrate 602 provided on the back surface of the top frame lamp unit 281A. It is connected to the connector 156f of the frame side IC substrate 603. The wiring pattern of the frame side IC substrate 603 is connected to the serial-parallel conversion IC 613.

  Even when the top frame lamp unit 281A is configured as shown in FIGS. 95 to 98, for example, when the model change of the gaming machine 1 is performed, the top frame lamp unit 281A is replaced to change the top frame lamp unit 281A. The shape, color, etc. can be easily changed. Further, it is possible to prevent the ceiling lamp unit 281A from being removed unless the glass door frame 2 is opened, and it is possible to prevent a situation in which the ceiling lamp unit 281A is illegally removed.

  Moreover, you may make it provide the control board for frames in the game frame 11 side or the glass door frame 2 side. Then, control data for a movable member such as a motor may be fetched from a board (for example, an effect control board 80) provided on the game board 6, and the movable member may be controlled.

  Further, in this embodiment, the case where each LED 281a to 281c of the top frame lamp is moved so as to irradiate the player when performing the reach effect or the like is shown. As described above, the LEDs 281a to 281c of the ceiling frame lamp may be moved in a direction directly below. Then, for example, by printing a character string with a fluorescent paint or the like on the hitting ball supply tray (upper plate) 3, a character string indicating a notice or the like appears on the hitting ball supply tray (upper plate) 3. Depending on the situation, a notice effect may be performed.

  Further, a movable object (for example, a movable object imitating the shape of a dragon) that is movable from the outside of the game area to the game area side is provided on the game frame 11 side. You may make it improve the interest of a game by using it for production with LED281a-281c.

  Further, a display device using an EL backlight or the like may be provided on the game frame 11 side (for example, in front of the hitting ball supply tray (top plate) 3). Moreover, you may make it comprise the display apparatus provided in the game frame 11 side so that a movement is possible.

  In addition, an operation unit such as a push button or a jog dial that can be operated by the player may be provided, and the LEDs 281a to 281c of the top frame lamp may be moved in accordance with the operation of the operation unit. In this case, for example, when a character string such as “Chance!” Is displayed on the effect display device 9, the LEDs 281 a to 281 c of the ceiling lamps are made to emit light downward based on the operation of the operation unit by the player. You may control to operate and irradiate a player.

  In addition, a shielding member capable of shielding the LEDs 281a to 281c is provided in front of the LEDs 281a to 281c of the ceiling lamp, and the LEDs 281a to 281c are shielded according to the gaming state to weaken the light emitting state. Also good.

  In this embodiment, the LED 281a to 281c of the top frame lamp is configured as a movable light emitting component. However, the LEDs 282a to 282f and 283a to 283f of the left frame lamp and the right frame lamp are movable. You may make it comprise. Further, for example, a movable lamp may be provided below the gaming machine (for example, in the vicinity of the hit ball supply tray (upper plate) 3).

  In this embodiment, the production control board 80, the board side IC board 601, the frame side IC boards 602 to 605, and the relay boards 606 and 607 are connected as the production control board 80, the relay board 606, and the relay board. 607 is connected by one bus type wiring route, and the serial-parallel conversion ICs 610 to 619 mounted on the board side IC substrate 601 and the frame side IC substrates 602 to 604 are connected by one bus type wiring route. As described above, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 are connected in series (hereinafter also referred to as daisy chain connection), or the frame side IC substrates 602 to 605 are connected. The serial-parallel conversion ICs 610 to 615 mounted on the PC are connected in series (daisy chain type connection), so that It may be to reduce the number.

  FIG. 100 is a block diagram illustrating another configuration example of the effect control board 80, the relay boards 606 and 607, the board-side IC board 601, and the frame-side IC boards 602, 603, 604, and 605. In the example shown in FIG. 100, the effect control microcomputer 100 of the effect control board 80 outputs a clock signal to the relay board 607 together with serial data as a control signal. The relay board 607 further supplies serial data and a clock signal input from the production control microcomputer 100 to the board side IC board 601 via the relay board 606.

  The serial data input to the board side IC substrate 601 is first input to the serial-parallel conversion IC 619. As shown in FIG. 100, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 have serial data signal lines connected in a daisy chain type. Accordingly, the input serial data is sequentially transferred from the serial-parallel conversion IC 619 to the other serial-parallel conversion ICs 616, 618, and 617 mounted on the board side IC substrate 601. For example, by configuring the output of the last bit of the shift register 652 shown in FIG. 21 to the data latch unit 651 of the next serial-parallel conversion IC, serial data is sequentially sent to the serial-parallel conversion ICs 616 to 619. What is necessary is just to forward. The serial-parallel conversion ICs 616 to 619 convert the input serial data into parallel data, and supply the parallel data to the LEDs of the lamps provided on the game board 6. The clock signal input to the board-side IC board 601 is branched on the board-side IC board 601 and input to the serial-parallel conversion ICs 616 to 619 and the input IC 621.

  The relay board 607 supplies the serial data and the clock signal input from the production control microcomputer 100 to the frame side IC board 604 and the frame side IC board 605. The serial data input to the frame side IC substrate 604 is first input to the serial-parallel conversion IC 614. As shown in FIG. 100, the serial-parallel conversion ICs 610 to 612 mounted on the frame side IC substrate 602 have serial data signal lines connected in a daisy chain type. Therefore, the input serial data is sequentially transferred from the serial-parallel conversion IC 610 to the other serial-parallel conversion ICs 611 and 612 mounted on the frame side IC substrate 602. For example, the configuration is such that the output of the last bit of the shift register 652 shown in FIG. What is necessary is just to forward. And each serial-parallel conversion IC610-612 converts the input serial data into parallel data, and supplies it to LED of each lamp | ramp provided in the game frame 11, and a drive motor.

  The serial-parallel conversion ICs 613 and 614 mounted on the frame-side IC substrates 603 and 604 have signal lines for serial data connected in a daisy chain type. Accordingly, the input serial data is sequentially transferred from the serial-parallel conversion IC 614 to the other serial-parallel conversion ICs 613 mounted on each frame side IC substrate 603. For example, the configuration is such that the output of the final bit of the shift register 652 shown in FIG. What is necessary is just to forward. The serial-parallel conversion ICs 613 and 614 convert the input serial data into parallel data, and supply the parallel data to the LEDs of the lamps provided in the game frame 11.

  The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 602 and input to each of the serial-parallel conversion ICs 610 to 612. Further, the clock signal input to the frame side IC substrate 604 is branched on the frame side IC substrate 604, input to the serial-parallel conversion IC 614, and input to the frame side IC substrate 603. The clock signal input to the frame side IC substrate 603 is branched on the frame side IC substrate 603 and input to the serial-parallel conversion IC 613. The clock signal input to the frame side IC substrate 605 is branched on the frame side IC substrate 605 and input to the serial-parallel conversion IC 615 and the input IC 620.

  Further, in this embodiment, the effect control means receives the variation pattern command, but when the display result specifying command cannot be received, the variation pattern command that can be used for both the normal big hit and the probable big hit. If it is determined that a change pattern command other than the change pattern command that can be used for both the normal big hit and the probable big hit is received is determined. Since the stop symbol is determined to be a combination of decorative symbols corresponding to the received variation pattern, the effect display device 9 can notify that a big hit will occur even if the display result specifying command cannot be received due to noise or the like.

Embodiment 2. FIG.
In the first embodiment, the addressed lamp control signal is output to the serial-parallel conversion ICs 610 to 619, whereby the LEDs 125a to 125f, 126a to 126f, 281a to 281c, 282a to 282f, and 283a to 283f of the respective lamps. However, a plurality of serial-parallel conversion ICs are connected in series with the same system wiring, and a fixed signal including a lamp control signal for controlling all the lamps connected with the same system wiring is used. You may make it output the data of length. Hereinafter, by outputting data of a fixed length including a lamp control signal for controlling all the lamps connected by wiring of the same system, LEDs 125a to 125f, 126a to 126f, 281a to 281c, 282a of each lamp are output. A second embodiment for controlling ˜282f and 283a˜283f will be described.

  Note that in this embodiment, detailed description of the portions having the same configuration and processing as those of the first embodiment will be omitted, and portions different from those of the first embodiment will be mainly described.

  FIG. 101 is a block diagram illustrating a circuit configuration example of the relay board 77 and the effect control board 80 in the second embodiment. In addition, although the example shown in FIG. 101 shows the case where only the effect control board 80 is provided regarding the effect control, a lamp driver board and an audio output board may be provided. In this case, the lamp driver board and the audio output board are not equipped with a microcomputer, but may be equipped with a microcomputer.

  The effect control board 80 includes an effect control CPU 101, a RAM (not shown), a serial output circuit 353, a serial input circuit 354, a latch signal output unit 355, a clock signal output unit 356, and an input capture signal output unit 357. A control microcomputer 100 is mounted. The RAM may be externally attached. In the effect control board 80, the effect control CPU 101 operates in accordance with a program stored in a built-in or external ROM (not shown), and receives an effect control command via the serial input circuit 102 and the input port 103. In this case, the serial input circuit 102 converts the effect control command received by the serial signal method into parallel data and outputs the parallel data. Further, the effect control CPU 101 causes the VDP (video display processor) 109 to perform display control of the effect display device 9 based on the effect control command.

  The effect control CPU 101 outputs a signal for driving the lamp via the serial output circuit 353. The serial output circuit converts the input signal (parallel data) for driving the LED of the lamp into serial data and outputs the serial data to the relay board 606.

  In this embodiment, as will be described later, among the serial-parallel conversion ICs 610 to 615 provided on the game frame 11 side, three ICs 610 to 612 are connected in series by wires of the same system. When controlling the ceiling lamp, the CPU 101 for effect control has fixed length data including lamp control signals and motor control signals for all serial-parallel conversion ICs 610 to 612 connected by the same system wiring. (Control signal sequence) is output via the serial output circuit 353 in a serial signal system. When the output control CPU 101 finishes outputting the fixed-length control signal sequence, the latch signal output unit outputs a latch signal for causing the serial-parallel conversion ICs 610 to 612 to take in the lamp control signal and the motor control signal. 355 to output.

  In this embodiment, two ICs 613 and 614 out of the serial-parallel conversion ICs 610 to 615 provided on the game frame 11 side are connected in series by wires of the same system. When controlling the left frame lamp and the right frame lamp, the effect control CPU 101 has fixed length data including lamp control signals for all the serial-parallel conversion ICs 613 and 614 connected by the same system wiring. (Control signal sequence) is output via the serial output circuit 353 in a serial signal system. Then, when the production control CPU 101 finishes outputting the fixed-length control signal sequence, the latch signal output unit 355 outputs a latch signal for causing the serial-parallel conversion ICs 613 and 614 to capture the lamp control signal. .

  In this embodiment, as will be described later, serial-parallel conversion ICs 616 to 619 provided on the game board 6 side are connected in series by the same system wiring. When controlling the center decoration lamp, the stage lamp, and the lamp provided around the skeleton 153 which is a movable member, the effect control CPU 101 includes all the serial-parallel conversion ICs 616 to 616 connected by the same system wiring. Data of a fixed length including a lamp control signal for 619 (control signal string) is output via the serial output circuit 353 in a serial signal system. Then, when the production control CPU 101 finishes outputting the fixed-length control signal sequence, it causes the latch signal output unit 355 to output a latch signal for causing the serial-parallel conversion ICs 616 to 619 to capture the lamp control signal. .

  Of the serial-parallel conversion ICs 610 to 615 provided on the game frame 11 side, the IC 615 is connected by a single wiring. When controlling the pan lamp and the operation button lamp, the effect control CPU 101 transmits a lamp control signal for the serial-parallel conversion IC 615 connected by the single wiring in a serial signal system via the serial output circuit 353. Output. Then, when the effect control CPU 101 finishes outputting the lamp control signal, it causes the latch signal output unit 355 to output a latch signal for causing the serial-parallel conversion IC 615 to capture the lamp control signal.

  FIG. 102 is a block diagram illustrating a configuration example of the effect control board 80, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, and 605 according to the second embodiment. The effect control microcomputer 100 of the effect control board 80 outputs a clock signal to the relay board 606 together with serial data as a control signal. In addition, the production control microcomputer 100 outputs a latch signal to the relay board 606 at the timing when the serial data has been output. The relay board 606 supplies serial data, a clock signal, and a latch signal input from the effect control microcomputer 100 to the board side IC board 601. The relay board 606 further supplies serial data, a clock signal, and a latch signal to the frame side IC boards 602 to 605 via the relay board 607.

  The serial data input to the board side IC substrate 601 is first input to the serial-parallel conversion IC 619. As shown in FIG. 102, the serial-parallel conversion ICs 616 to 619 mounted on the board-side IC substrate 601 are connected in series with the same system wiring. The connection by the same system wiring means that a plurality of serial-parallel conversion ICs are connected in series by a so-called bead connecting wiring. For example, each serial-parallel conversion IC 616 to 619 has serial data signal lines connected in a daisy chain type. Accordingly, the input serial data is sequentially transferred from the serial-parallel conversion IC 619 to the other serial-parallel conversion ICs 616, 618, and 617 mounted on the board side IC substrate 601. In this embodiment, as will be described later, the output of the last bit of the shift register 682 mounted in each serial-parallel conversion IC is input to the data latch unit 681 of the next serial-parallel conversion IC (see FIG. 103), serial data may be transferred to the serial-parallel conversion ICs 616 to 619 in order. Each serial-parallel conversion IC 616 to 619 latches the serial data at the timing when the latch signal is input, converts the latched serial data into parallel data, and supplies it to the LED of each lamp provided on the game board 6. To do. The clock signal input to the board-side IC board 601 is branched on the board-side IC board 601 and input to the serial-parallel conversion ICs 616 to 619 and the input IC 621.

  The relay board 607 supplies serial data, a clock signal, and a latch signal input from the effect control microcomputer 100 to the frame side IC board 602, the frame side IC board 604, and the frame side IC board 605. The serial data input to the frame side IC substrate 604 is first input to the serial-parallel conversion IC 610. As shown in FIG. 102, the serial-parallel conversion ICs 610 to 612 mounted on the frame side IC substrate 602 are connected in series by the same system wiring. For example, in each of the serial-parallel conversion ICs 610 to 612, serial data signal lines are connected in a daisy chain type (connected by a so-called daisy chain wiring). Therefore, the input serial data is sequentially transferred from the serial-parallel conversion IC 610 to the other serial-parallel conversion ICs 611 and 612 mounted on the frame side IC substrate 602. In this embodiment, as will be described later, the output of the last bit of the shift register 682 mounted in each serial-parallel conversion IC is input to the data latch unit 681 of the next serial-parallel conversion IC (see FIG. 103), the serial data may be transferred to the serial-parallel conversion ICs 610 to 612 in order. Each of the serial-parallel conversion ICs 610 to 612 latches the serial data at the timing when the latch signal is inputted, converts the latched inputted serial data into parallel data, and LED of each lamp provided in the game frame 11 To supply.

  The serial data input to the frame side IC substrate 604 is first input to the serial-parallel conversion IC 614. As shown in FIG. 102, the serial-parallel conversion ICs 613 and 614 mounted on the frame-side IC substrates 603 and 604 are connected in series by wires of the same system. For example, each serial-parallel conversion IC 613, 614 has a serial data signal line connected in a daisy chain (connected by a so-called daisy chain wiring). Accordingly, the input serial data is sequentially transferred from the serial-parallel conversion IC 614 to another serial-parallel conversion IC 613 mounted on the frame side IC substrate 603. In this embodiment, as will be described later, the output of the last bit of the shift register 682 mounted in each serial-parallel conversion IC is input to the data latch unit 681 of the next serial-parallel conversion IC (see FIG. 103), serial data may be transferred to the serial-parallel conversion ICs 613 and 614 in order. Each serial-parallel conversion IC 613, 614 latches the serial data at the timing when the latch signal is input, converts the latched input serial data into parallel data, and LED of each lamp provided in the game frame 11 To supply.

  The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 602 and input to each of the serial-parallel conversion ICs 610 to 612. Further, the clock signal input to the frame side IC substrate 604 is branched on the frame side IC substrate 604, input to the serial-parallel conversion IC 614, and input to the frame side IC substrate 603. The clock signal input to the frame side IC substrate 603 is branched on the frame side IC substrate 603 and input to the serial-parallel conversion IC 613. The clock signal input to the frame side IC substrate 605 is branched on the frame side IC substrate 605 and input to the serial-parallel conversion IC 615 and the input IC 620.

  The serial data input to the frame side IC substrate 605 is input to the serial-parallel conversion IC 615. Each serial-parallel conversion IC 615 latches the serial data at the timing when the latch signal is input, converts the latched input serial data into parallel data, and provides a dish lamp and an operation button lamp provided in the game frame 11. LEDs 82a to 82d and 83 are supplied. The clock signal input to the frame side IC substrate 605 is branched on the frame side IC substrate 605 and input to the serial-parallel conversion IC 615 and the input IC 620.

  Next, the configuration of the serial-parallel conversion IC in the second embodiment will be described. FIG. 103 is a block diagram showing a configuration of each serial-parallel conversion IC in the second embodiment. In addition, in FIG. 103, the structure of each serial-parallel conversion IC610-612 provided in the game frame 11 side is shown as an example, but each serial-parallel conversion IC616-619 provided in the game board 6 side, The configurations of the serial-parallel conversion ICs 613 and 614 provided on the game frame 11 side and the other serial-parallel conversion IC 5615 provided on the game frame 11 side are the same.

  As illustrated in FIG. 103, each serial-parallel conversion IC 610 to 612 includes a data latch unit 681, a shift register 682, and a data buffer 683. Also, as shown in FIG. 103, the serial-parallel conversion ICs 610 to 612 are connected in series with the same system wiring in the order of IC 610, IC 611, and IC 612.

  The data latch unit 681 is configured by, for example, a latch circuit. When serial data is input, the data latch unit 681 latches the input data bit by bit at a predetermined cycle, for example, the rising timing of the clock signal pulse, and outputs the latched data to the shift register 682. . The shift register 682 sequentially stores unit data, for example, data input bit by bit from the data latch unit 681. The shift register 682 shifts the stored data bit by bit at the rising timing of the clock signal pulse. By shifting the stored data one bit at a time, the shift register 682 is in a state where data is stored in all 8 bits. Further, when input data and a clock signal are input, the data of the last bit of the shift register 682 is changed to a subsequent stage of the serial-parallel conversion IC (hereinafter referred to as the lower side (the input side of the serial-parallel conversion IC is referred to as the upper side). In this case, the data is input to the data latch unit 681 of the serial-parallel conversion IC. For example, in the example shown in FIG. 103, the last bit data of the shift register 682 of the IC 610 is input to the data latch unit 681 of the lower-order IC 611, and the last bit data of the shift register 682 of the IC 611 is changed to the lower-order IC 612. Are input to the data latch unit 681. By doing so, the serial data output from the production control microcomputer 100 is transferred in the order of IC610, IC611, and IC612.

  In this embodiment, the production control microcomputer 100 outputs a control signal sequence including all lamp control signals for the four serial-parallel ICs 610 to 612 in a serial signal system. In this case, the effect control microcomputer 100 includes control signals including in order from the lamp control signal for the lower-order IC (that is, the lamp control signal for the IC 612, the lamp control signal for the IC 611, and the lamp control signal for the IC 610). Output a column. Then, as described above, when data is transferred in the order of IC 610, IC 611, and IC 612, and when the output of a series of control signal sequences is completed by the production control microcomputer 100, the shift register 682 of the IC 612 is transferred to the shift register 682. The motor control signal for IC 612 is stored, the motor control signal for IC 611 is stored in the shift register 682 of IC 611, and the lamp control signal for IC 610 is stored in the shift register 682 of IC 610. Then, at the timing when the latch signal is output by the production control microcomputer 100, the data is taken in by each of the serial-parallel conversion ICs 610 to 612.

  The data buffer 683 is constituted by, for example, a latch register. When a latch signal from the effect control microcomputer 100 is input, the data buffer 683 takes in and latches data stored in the shift register 682. The data buffer 683 supplies the fetched data as parallel data (Q0 to Q7) to the LED of each lamp. Note that the timing (predetermined timing) at which the latch signal is input is a timing at which the latch signal falls within a longer span than the time required to send data to the lower-level IC.

  Next, a control signal sequence including a lamp control signal set in a predetermined data storage area according to error lamp control execution data will be described. FIG. 104 is an explanatory diagram illustrating an example of a control signal sequence including a lamp control signal and a motor control signal that are output as a serial data method in the notification control process according to the second embodiment. As shown in FIG. 104, in this embodiment, two patterns of error lamp control execution data (pattern A and pattern B) are used for each error type. In this embodiment, the blinking display of the lamp is controlled by switching and using the error lamp control execution data for the pattern A and the pattern B. Further, the production control microcomputer 100 is provided in the ROM in advance with the control signal sequence (or lamp control signal) including the lamp control signal and the motor control signal shown in FIG. 104 associated with the error lamp control execution data. And stored in a predetermined lamp control signal storage area. Then, the effect control CPU 101 extracts a control signal sequence (or lamp control signal) including a lamp control signal and a motor control signal from a predetermined lamp control signal storage area based on the error lamp control execution data, and serially outputs it. Output to the circuit 353.

  In the case of RAM clear notification, as shown in FIG. 104, the control data body corresponding to each serial-parallel conversion IC 610 provided on the game frame 11 side is “00000111”, and each serial-parallel conversion IC 611,612 is shown. A control signal sequence including a data sequence of a motor control signal is transmitted as a control data body corresponding to. Also, a control signal sequence including a lamp control signal whose control data body corresponding to 613 and 614 is “00111111” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281c and 282a to 282f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. , 283a to 283f are turned on. Further, when the RAM clear notification is performed, a control signal sequence including a lamp control signal having the same content is output when the error lamp control execution data is pattern A and pattern B. The LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided on the game frame 11 side are continuously turned on.

  When notifying the door opening error, as shown in FIG. 104, first, based on the error lamp control execution data of pattern A, the control corresponding to each serial-parallel conversion IC 610 provided on the game frame 11 side. The data body is “00000111”, and a control signal string including a data string of motor control signals is transmitted as a control data body corresponding to each serial-parallel conversion IC 611,612. Also, a control signal sequence including a lamp control signal whose control data body corresponding to 613 and 614 is “00111111” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281c and 282a to 282f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. , 283a to 283f are turned on. At the time of process data switching, the control data body corresponding to each serial-parallel conversion IC 610 provided on the game frame 11 side is “00000000” based on the error lamp control execution data of pattern B, and each serial- A control signal sequence including a data sequence of motor control signals is transmitted as a control data body corresponding to the parallel conversion ICs 611 and 612. In addition, a control signal sequence including a lamp control signal whose control data body corresponding to 613 and 614 is “00000000” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 0 is output, and the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps provided on the game frame 11 side are turned off. Is done. By repeating such control, when notifying a door opening error, the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps provided on the game frame 11 side are blinked at predetermined time intervals. Control is performed.

  When notifying a ball break error, as shown in FIG. 104, first, based on the error lamp control execution data of pattern A, the control data body corresponding to each serial-parallel conversion IC 610 is “00000111”. A control signal sequence including a data sequence of motor control signals is transmitted as a control data body corresponding to each serial-parallel conversion IC 611,612. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the ceiling lamp are all 1 is output, and the LEDs 281a to 281c of the ceiling lamps provided on the game frame 11 side are turned on. At the time of process data switching, the control data body corresponding to each serial-parallel conversion IC 610 is “00000000” based on the error lamp control execution data of pattern B, and corresponds to each serial-parallel conversion IC 611,612. A control signal sequence including a data sequence of motor control signals is transmitted as the control data body. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the ceiling frame lamp are all 0 is output, and the LEDs 281a to 281c of the ceiling frame lamps provided on the game frame 11 side are turned off. When such a control is repeatedly performed and a ball-out error is notified, control is performed such that only the LEDs 281a to 281c of the top frame lamps provided on the game frame 11 side blink at predetermined time intervals.

  When notifying a full tank error, as shown in FIG. 104, first, based on the error lamp control execution data of the pattern A, the serial-parallel conversion IC 615 sends a lamp control signal whose control data body is “00001111”. Is sent. That is, a lamp control signal in which the logical values of all the bits corresponding to the dish lamp LEDs 82a to 82d are 1, and the dish lamp LEDs 82a to 82d are turned on. At the time of process data switching, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 615 based on the error lamp control execution data of pattern B. That is, a lamp control signal in which the logical values of the bits corresponding to the LED of the dish lamp are all 0 is output, and the LEDs 82a to 82d of the dish lamp are turned off. When such a control is repeatedly performed to notify a full tank error, control is performed so that only the LED lamps 82a to 82d of the pan lamp blink at a predetermined time interval.

  When notifying the prize ball error, as shown in FIG. 104, first, based on the error lamp control execution data of pattern A, the control data body corresponding to the serial-parallel conversion IC 610 is “00000111”. A control signal sequence including a data sequence of motor control signals is transmitted as a control data body corresponding to each serial-parallel conversion IC 611,612. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the ceiling lamp are all 1 is output, and only the LEDs 281a to 281c of the ceiling lamps provided on the game frame 11 side are turned on. At the time of process data switching, the control data body corresponding to the serial-parallel conversion IC 610 is “00000000” based on the error lamp control execution data of pattern B, and the control corresponding to each serial-parallel conversion IC 611,612. A control signal sequence including a data sequence of motor control signals is transmitted as the data body. That is, a lamp control signal in which the logical values of the bits corresponding to the LED of the ceiling lamp are all 0 is output, and the LEDs 281g to 281c of the ceiling lamp provided on the game frame 11 side are turned off. By repeatedly performing such control, when notifying a prize ball error, control is performed such that the LEDs 281a to 281c of the ceiling lamps provided on the game frame 11 side blink at predetermined time intervals.

  When notifying the random number circuit error, as shown in FIG. 104, the control data body corresponding to each serial-parallel conversion IC 610 provided on the game frame 11 side is “00000111”, and each serial-parallel conversion IC 611 , 612, a control signal sequence including a data sequence of motor control signals is transmitted. In addition, a control signal sequence including a lamp control signal whose control data body corresponding to each of the serial-parallel conversion ICs 613 and 614 is “00111111” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281c and 282a to 282f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. , 283a to 283f are turned on. Further, when a random number circuit error is notified, the same lamp control signal is output when the error lamp control execution data is pattern A and pattern B. The LEDs 281a to 281c, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided on the 11 side are continuously turned on.

  When notifying an abnormal winning error, as shown in FIG. 104, first, based on the error lamp control execution data of pattern A, control corresponding to each serial-parallel conversion IC 610 provided on the game frame 11 side. The data body is “00000010”, and a control signal string including a data string of motor control signals is transmitted as a control data body corresponding to each serial-parallel conversion IC 611,612. Further, a control signal sequence including a lamp control signal whose control data body corresponding to each of the serial-parallel conversion ICs 613 and 614 is “00101010” is transmitted. That is, a lamp control signal in which the logical values of all the bits corresponding to some of the LEDs of the lamp provided on the game frame 11 side are 1 is output, and some of the LEDs 281b of each lamp provided on the game frame 11 side. , 282b, d, f, 283b, d, f only are lit. When the process data is switched, the control data body corresponding to each serial-parallel conversion IC 610 provided on the game frame 11 side is “00000101” based on the error lamp control execution data of pattern B, and each serial- A control signal sequence including a data sequence of motor control signals is transmitted as a control data body corresponding to the parallel conversion ICs 611 and 612. In addition, a control signal sequence including a lamp control signal whose control data body corresponding to each of the serial-parallel conversion ICs 613 and 614 is “00010101” is transmitted. That is, a lamp control signal in which the logical values of all the bits corresponding to the other part of the LEDs of the ceiling lamps provided on the game frame 11 side are all 1 is output, and each lamp provided on the game frame 11 side. Only some of the other LEDs 281a, c, 282a, c, e, 283a, c, e are turned on.

  When an abnormal winning error is notified by repeating the control as described above, the LEDs 281a to 281c, 282a to 282f, and 283a to 283f of the respective lamps provided on the game frame 11 side are alternately alternated at a predetermined time interval. Control is performed so as to blink.

  Next, a control signal sequence including a motor control signal output when the movable members 151 to 153 are operated in the game effect will be described. FIG. 105 is an explanatory diagram showing an example of a control signal sequence including a motor control signal output as a serial data system in the game effect according to the second embodiment. The control signal sequence including the motor control signal shown in FIG. 105 is, for example, predetermined data in the serial setting process when variable display including a notice effect using the movable members 151 to 153 is executed in the decorative symbol variation process. Set in the storage area. Further, the production control microcomputer 100 stores a control signal sequence including the motor control signal shown in FIG. 105 in a predetermined control signal storage area provided in advance in the ROM in association with display control execution data, for example. ing. Then, the effect control CPU 101 extracts a control signal sequence including a motor control signal from a predetermined motor control signal storage area based on the display control execution data, and outputs the control signal string to the serial output circuit 353.

  As shown in FIG. 105, the control signal string including the motor control signal includes a lamp control for controlling the center decoration lamp, the stage lamp, and the lamp around the skeleton 153 which is a movable member in accordance with the game effect. Includes signals.

  When the trolley 151 is operated in the forward direction as a movable member, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000001” is transmitted. That is, a motor control signal having a logical value of 1 corresponding to the forward operation of the motor 151a for driving the truck 151 is output, and the truck 151 is operated by driving the motor 151a. When the operation of the truck 151 is stopped, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000000” is transmitted. That is, a motor control signal whose logical value of the bit corresponding to the forward operation of the motor 151a is 0 is output, and the operation of the truck 151 is stopped by stopping the driving of the motor 151a.

  When the trolley 151 is operated in the reverse direction as a movable member, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000010” is transmitted. That is, a motor control signal whose bit logical value is 1 corresponding to the reverse operation of the motor 151a for driving the trolley 151 is output, and the trolley 151 is operated by driving the motor 151a. When the operation of the truck 151 is stopped, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000000” is transmitted. That is, a motor control signal having a logical value of 0 corresponding to the reverse operation of the motor 151a is output, and the operation of the truck 151 is stopped by stopping the driving of the motor 151a.

  When the beam 152 is moved in the forward direction as the movable member, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000100” is transmitted. That is, a motor control signal having a logical value of 1 corresponding to the forward operation of the motor 152a for driving the beam 152 is output, and the beam 152 is operated by driving the motor 152a. When the operation of the beam 152 is stopped, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000000” is transmitted. That is, a motor control signal having a logical value of 0 corresponding to the forward movement of the motor 152a is output, and the operation of the beam 152 is stopped by stopping the driving of the motor 152a.

  When the beam 152 is moved in the reverse direction as the movable member, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00001000” is transmitted. That is, a motor control signal whose bit logical value is 1 corresponding to the reverse operation of the motor 152a for driving the beam 152 is output, and the beam 152 is operated by driving the motor 152a. When the operation of the beam 152 is stopped, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000000” is transmitted. That is, a motor control signal having a logical value of 0 corresponding to the reverse operation of the motor 152a is output, and the operation of the beam 152 is stopped by stopping the driving of the motor 152a.

  When the skeleton 153 is moved in the forward direction as the movable member, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00010000” is transmitted. That is, a motor control signal having a logical value of 1 corresponding to the forward operation of the motor 153a for driving the skeleton 153 is output, and the skeleton 153 is operated by driving the motor 153a. When the operation of the skeleton 153 is stopped, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000000” is transmitted. That is, a motor control signal having a logical value of 0 corresponding to the forward operation of the motor 153a is output, and the operation of the skeleton 153 is stopped by stopping the driving of the motor 153a.

  When the skeleton 153 is operated in the reverse direction as the movable member, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00100000” is transmitted. That is, a motor control signal having a logical value of 1 corresponding to the backward operation of the motor 153a for driving the skeleton 153 is output, and the skeleton 153 is operated by driving the motor 153a. When the operation of the skeleton 153 is stopped, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000000” is transmitted. That is, a motor control signal whose bit logical value corresponding to the backward operation of the motor 153a is 0 is output, and the operation of the skeleton 153 is stopped by stopping the driving of the motor 153a.

  Next, the serial setting process will be described. FIG. 106 is a flowchart illustrating an example of serial setting processing according to the second embodiment. In the serial setting process, for example, in the production control process process, when a customer waiting demonstration display is performed (see step S1818), or when a decorative symbol is variably displayed (see steps S835F and S996), a jackpot display is performed (step S1818). This is executed when various error notifications are performed (steps S1917, S1923, S1928, S1934, S1941, S1945, S1949, S1970, S1976, S1983, S1990, S1998, S2003, S2008).

  In FIG. 106, the processes in steps S950 and S951 are the same as those described in the first embodiment. If there is a change in the display state of each lamp in step S951, the CPU 101 for effect control converts a control signal sequence including a lamp control signal for the serial-parallel conversion IC of the lamp to be controlled for display into a predetermined lamp control signal storage area. (Step S952A). Next, the effect control CPU 101 sets a control signal sequence including the extracted lamp control signal in a predetermined data storage area provided in the RAM (step S953A). Then, a lamp control signal output request flag is set (step S954).

  In FIG. 106, the processes in steps S955 and S956 are the same as those described in the first embodiment. When the movable members 151 to 153 are movable in step S956, the effect control CPU 101 outputs a control signal sequence including a motor control signal for the serial-parallel conversion IC of the movable members 151 to 153 to be moved, to a predetermined value. Extracted from the control signal storage area (step S957A). Next, the effect control CPU 101 sets a control signal sequence including the extracted motor control signal in a predetermined data storage area provided in the RAM (step S958A). Then, a motor control signal output request flag is set (step S959).

  In FIG. 106, the process of step S960 is the same as those shown in the first embodiment. If the ceiling frame lamp is to be moved in step S960, the effect control CPU 101 is for the serial-parallel conversion IC for the lamp vertical drive motor 90, the left / right drive motors 91a and 91b, and the lamp rotation drive motor 92 to be driven. A control signal sequence including the motor control signal is extracted from a predetermined control signal storage area (step S961A). Next, the effect control CPU 101 sets a control signal sequence including the extracted motor control signal in a predetermined data storage area provided in the RAM (step S962A). Then, a motor control signal output request flag is set (step S963).

  FIG. 107 is an explanatory diagram showing a configuration example of a data storage area in which a control signal sequence including a lamp control signal and a motor control signal to be output is set in the second embodiment. In this embodiment, three data storage areas each storing a control signal sequence including a lamp control signal and a motor control signal are prepared. That is, it is connected to the board side output data storage area for storing the control signal sequence output to each serial-parallel conversion IC 616 to 619 provided on the game board 6 side connected by the same system wiring, by the same system wiring. A frame-side output data storage area for storing control signal sequences output to the serial-parallel conversion ICs 610 to 614 provided on the gaming frame 11 side, and a serial-parallel conversion IC 615 provided on the gaming frame 11 side. A dish-side output data storage area for storing the output control signal sequence is provided.

  For example, when the CPU 101 for effect control notifies the RAM clear notification, the door opening error, the ball break error, the winning ball error, the random number circuit error, or the abnormal winning error, the RAM shown in FIG. 104 in step S952A of the serial setting process. A control signal sequence including a lamp control signal corresponding to a clear notification, a door opening error, a ball break error, a winning ball error, a random number circuit error or an abnormal winning error is extracted and stored in the frame side output data storage area shown in FIG. . Further, for example, when the full control error is notified, the effect control CPU 101 extracts the lamp control signal corresponding to the full error shown in FIG. 104 in step S952A of the serial setting process, and outputs the dish side output data shown in FIG. Store in the storage area. Further, for example, when the movable members 151 to 153 are moved in the game effect, the effect control CPU 101 extracts a control signal sequence including any of the motor control signals shown in FIG. 105 in step S957A of the serial setting process. , And stored in the board output data storage area shown in FIG.

  FIG. 108 is a flowchart illustrating a specific example of the serial input / output process (step S708) according to the second embodiment. In FIG. 108, the processes in steps S970 and S971 are the same as those described in the first embodiment. When the lamp control signal output request flag or the motor control signal output request flag is reset, the presentation control CPU 101 outputs a control signal sequence including the lamp control signal and the motor control signal stored in the data storage area to the serial output circuit 353. (Step S972A). Then, the output control signal sequence including the lamp control signal and the motor control signal is converted into serial data by the serial output circuit 353, and the board side IC board 601 and each frame side IC board are connected via the relay boards 606 and 607. From 602 to 605, the data is output as a serial data system. Next, the production control CPU 101 requires a predetermined time (from when the control signal sequence is output to the serial output circuit 353 until it is output as a serial data system to the panel side IC substrate 601 and the frame side IC substrates 602 to 605. After the elapse of time, the latch signal output unit 355 is caused to output a latch signal to each of the frame side IC substrates 602 to 605 (step S972B).

  When the control signal sequence is stored in any one of the three data storage areas shown in FIG. 107, the effect control CPU 101 repeatedly executes the processes of steps S972A and S972B a plurality of times. For example, if the control signal sequence is stored in all three data storage areas shown in FIG. 107, the presentation control CPU 101 first extracts the control signal sequence from the board-side output data storage area and outputs the serial signal. The data is output to the circuit 353 (see step S972A). Then, after a predetermined time has elapsed, the latch signal output unit 355 is caused to output a latch signal to the board side IC substrate 601 (see step S972B). Next, the effect control CPU 101 extracts a control signal sequence from the frame-side output data storage area and outputs it to the serial output circuit 353 (see step S972A). Then, after a predetermined time has elapsed, the latch signal output unit 355 is caused to output a latch signal to the frame side IC substrates 602 to 604 (see step S972B). Next, the effect control CPU 101 extracts the lamp control signal from the dish-side output data storage area and outputs it to the serial output circuit 353 (see step S972A). Then, after a predetermined time has elapsed, the latch signal output unit 355 is caused to output a latch signal to the frame side IC substrate 605 (see step S972B).

  Note that the processes in steps S973 to S976 are the same as those described in the first embodiment.

  As described above, according to this embodiment, the effect control microcomputer 100 is based on the effect control commands received from the game control microcomputer 560, and the LEDs 125a to 125f, 126a to 126f, and 281a to 281c of the respective lamps. , 282a to 282f, 283a to 283f, a control signal for controlling the serial signal is output. Further, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602 to 605 are connected through one system wiring. The Therefore, the number of wirings between the game board 6 and the game frame 11 can be reduced. Therefore, in a gaming machine in which the game frame 11 and the game board 6 are configured to be detachable, it is possible to easily attach and detach the game frame 11 and the game board 6.

  In addition, according to this embodiment, the production control microcomputer 100 has a fixed length including control signal information of all production electrical components (lamps and motors) connected in series to the same system wiring. This data is output in units of unit data by a serial signal method at predetermined intervals. Therefore, it is not necessary to assign different addresses to the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602 to 605 in advance. Can do.

  In this embodiment, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 are connected by the same system wiring, and the serial-parallel ICs 602 to 604 mounted on the frame side IC substrate 602 to 604 are connected. Although the case where the parallel conversion ICs 610 to 614 are connected by the same system wiring has been described, the serial conversion ICs 616 to 619 and the frame side IC substrates 602 to 605 mounted on the board side IC substrate 601 are mounted. All of the serial-parallel conversion ICs 610 to 615 may be connected by wiring of the same system.

  FIG. 109 is a block diagram illustrating another configuration example of the effect control board 80, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, and 605 according to the second embodiment. . In FIG. 109, all of the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602 to 605 are all of the same system wiring. Connected.

  In the example shown in FIG. 109, the serial data output from the production control microcomputer 100 is first input to the serial-parallel conversion IC 619 mounted on the board-side IC board 601 via the relay board 606. The input serial data is sequentially transferred from the serial-parallel conversion IC 619 to the other serial-parallel conversion ICs 616, 618, and 617 mounted on the board-side IC substrate 601.

  Further, the lowest-order serial-parallel conversion IC 617 mounted on the board-side IC board 601 further outputs serial data to the relay board 606. The serial data is input from the relay board 606 to the serial-parallel conversion IC 614 mounted on the frame side IC board 604 via the relay board 607. The input serial data is sequentially transferred from the serial-parallel conversion IC 614 to the other serial-parallel conversion ICs 610, 611, 612, 613, and 615 mounted on the frame side IC substrates 602 to 605.

Embodiment 3 FIG.
In the first embodiment, using the effect control board 80, all effect means (effect display device 9, sound output device (speaker) 27 and LEDs 125a to 125f, 126a to 126f, 281a to 281c, and 282a to each lamp are provided. 282f, 283a to 283f) has been described, but each rendering means may be controlled using separate control boards. Hereinafter, a sound / lamp control board for controlling the sound output device 27 and the LEDs 125a to 125f, 126a to 126f, 281a to 281c, 282a to 282f, and 283a to 283f of the lamps, and a symbol control board for controlling the effect display device 9 A third embodiment including the above will be described.

  Note that in this embodiment, detailed description of the parts having the same configuration and processing as those of the first embodiment will be omitted, and parts different from those of the first embodiment will be mainly described.

  FIG. 110 is a block diagram illustrating a circuit configuration example of the relay board 77, the sound / lamp control board 80b, and the symbol control board 80a according to the third embodiment. In this embodiment, the sound / lamp control board 80b performs sound output control of the sound output device 27 and display control of the LEDs 125a to 125f, 126a to 126f, 281a to 281c, 282a to 282f, and 283a to 283f of each lamp. . Moreover, the symbol control board 80a performs display control of the effect display device 9. In this embodiment, “effect control” means display control of the effect display device 9, sound output control of the speaker 27, LEDs 125a to 125f, 126a to 126f, 281a to 281c, 282a to 282f of each lamp, By performing display control of 283a to 283f, it means performing an effect such as a game effect. Further, in this embodiment, the effect control means includes a symbol control microcomputer 100a that performs display control of the effect display device 9, sound output control of the speaker 27, and LEDs 125a to 125f, 126a to 126f, and 281a of each lamp. ˜281c, 282a to 282f, and 283a to 283f are realized by the sound / lamp control microcomputer 100b that performs display control.

  The sound / lamp control board 80b includes a sound / lamp control microcomputer 101b including a sound / lamp control CPU 101b, a RAM, a serial output circuit 353, a serial input circuit 354, a clock signal output unit 356, and an input capture signal output unit 357. It is equipped with. The RAM may be externally attached. In the sound / lamp control board 80b, the sound / lamp control microcomputer 100b operates in accordance with a program stored in a built-in or external ROM (not shown).

  Further, the sound / lamp control microcomputer 100 b outputs a signal for driving the lamp via the serial output circuit 353. The serial output circuit converts the input signal (parallel data) for driving the LED of the lamp into serial data and outputs the serial data to the relay board 606.

  Further, the clock signal output unit 356 outputs a clock signal to the relay board 606. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 610 to 615 and the input IC 620 mounted on the frame side IC substrates 602 to 605 via the relay substrate 606. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 616 to 619 and the input IC 621 mounted on the board side IC substrate 601 via the relay substrate 606. Therefore, in this embodiment, a common clock signal is supplied to each of the serial-parallel conversion ICs 610 to 619 and the input ICs 620 and 621.

  Further, the input capture signal output unit 357 inputs the input capture signal (latch signal) to the board side IC board 601 or the frame side IC boards 602 to 605 via the relay boards 606 and 607 in accordance with the instruction of the effect control CPU 101. Is output. The input IC 620 mounted on the frame side IC board 605 latches the detection signals of the operation buttons 81a to 81e when an input capture signal from the sound / lamp control microcomputer 100b is input, and relays the board 606 in a serial signal system. , 607 to the sound / lamp control microcomputer 100b. Further, when the input IC 621 mounted on the board side IC board 601 receives an input input signal from the sound / lamp control microcomputer 100b, the input IC 621 latches the detection signal of each position sensor 151b, 152b, 153b, and outputs a serial signal. And output to the sound / lamp control microcomputer 100b via the relay substrate 606.

  Further, the sound / lamp control microcomputer 100b outputs sound number data to the speech synthesis IC 173. The voice synthesizing IC 173 generates a voice or a sound effect corresponding to the sound number data and outputs it to the amplifier circuit 175. The amplifier circuit 175 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 173 to a level corresponding to the volume set by the volume 176 to the speaker 27. The voice data ROM 174 stores control data corresponding to the sound number data. The control data corresponding to the sound number data is a collection of data indicating the sound effect or sound output mode in a time series in a predetermined period (for example, a decorative symbol variation period).

  The signal for driving the lamp and the sound number data are communicated between the sound / lamp control microcomputer 100b, the lamp driver 352, and the speech synthesis IC 173 (a response signal is transmitted from the signal receiving side to the transmitting side). Communication).

  The symbol control board 80a is equipped with a symbol control microcomputer 100a including a symbol control CPU 101a and a RAM. The RAM may be externally attached. In the symbol control board 80a, the symbol control microcomputer 100a operates in accordance with a program stored in a built-in or external ROM (not shown). Further, the symbol control microcomputer 100a performs display control of the effect display device 9 using the LCD on the VDP (video display processor) 109 based on the effect control command received from the main board 31 via the relay board 77. Let it be done.

  The symbol control microcomputer 100a reads necessary data from a character ROM (not shown) in accordance with the effect control command received from the game control microcomputer 560. The character ROM stores character image data frequently used among images displayed on the effect display device 9, specifically, people, characters, figures, symbols, and the like (including decorative designs). Is. The symbol control microcomputer 100 a outputs the data read from the character ROM to the VDP 109. The VDP 109 executes display control of the effect display device 9 based on data input from the symbol control microcomputer 100a.

  In this embodiment, the VDP 109 that performs display control of the effect display device 9 is mounted on the symbol control board 80a. The VDP 109 has an address space independent of the symbol control microcomputer 100a, and maps a VRAM therein. The VRAM is a buffer memory for expanding image data generated by the VDP. Then, the VDP 109 outputs the image data in the VRAM to the effect display device 9.

  As a signal direction regulating means, the signal inputted from the main board 31 is allowed to pass through the relay board 77 only in the direction toward the symbol control board 80a (the signal is not passed in the direction from the symbol control board 80a to the relay board 77). The unidirectional circuit is installed. For example, a diode or a transistor is used as the unidirectional circuit. FIG. 110 illustrates a diode.

  Further, the symbol control microcomputer 100 a transmits (transfers) an effect control command (a variation pattern command or a display result designation command) from the main board 31 to the sound / lamp control board 80 b via the input / output port 104.

  FIG. 111 shows a configuration example of the symbol control board 80a, the sound / lamp control board 80b, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, and 605 in the third embodiment. FIG. The sound / lamp control microcomputer 100b of the sound / lamp control board 80b (specifically, the sound / lamp control CPU 101b) outputs a clock signal to the relay board 607 together with serial data as a control signal. In addition, an input capture signal for causing the input ICs 620 and 621 to latch the input signal is output to the relay board 606.

  The relay board 606 supplies the serial data and the clock signal input from the sound / lamp control microcomputer 100 b to the serial-parallel conversion ICs 616 to 619 mounted on the board side IC board 601. And each serial-parallel conversion IC616-619 converts the input serial data into parallel data, LEDLED125a-125f of each lamp provided in the game board 6, 126a-126f, 127a-127c, and each movable member To the motors 151a to 151c.

  Further, the relay board 607 is connected to the relay board 606 through one bus-type wiring route, and the serial data line 300 and the clock signal line 301 connected to the serial-parallel conversion ICs 616 to 619 are the board side IC board. 601 is connected in a bus format.

  In addition, an input IC 621 for inputting a detection signal of a position sensor of each movable member provided on the game board 6 is mounted on the board side IC board 601. In this embodiment, the input IC 621 and the sound / lamp control microcomputer 100b mounted on the board side IC board 601 are connected via the relay board 606 to the input signal line, the clock signal line 301 and the input take-in signal line 303. Are connected, and the sound / lamp control microcomputer 100b outputs an input capture signal to the input IC 621 via the relay board 606 at a predetermined timing. Then, the input IC 621 latches the detection signal of each position sensor based on the input capture signal (latch signal) and outputs it to the sound / lamp control microcomputer 100b via the relay board 606. In this case, the input IC 621 converts the detection signal input in parallel from each position sensor into serial data and outputs it.

  The serial data and clock signal input to the relay board 607 are supplied to the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC boards 602 to 605, as shown in FIG. And each serial-parallel conversion IC610-615 converts the input serial data into parallel data, LED281a-281c of each lamp provided in the game frame 11, 282a-282f, 283a-283f, 82a-82d, 83.

The serial data lines and clock signal lines connected to the serial-parallel conversion ICs 610 to 614 are connected in a bus format on the frame side IC substrates 602 to 604. In this embodiment, as shown in FIG. 111, first, it is input to the serial-parallel conversion IC 610 of the frame side IC substrate 602, input from the serial-parallel conversion IC 610 to the serial-parallel conversion IC 611, and further serial-parallel conversion. They are input in the order of IC612. Further, the signal is input to the serial-parallel conversion IC 614 of the frame side IC substrate 604, and is input from the serial-parallel conversion IC 614 to the serial-parallel conversion IC 613 of the frame side IC substrate 603. The serial data line 300 and the clock signal line 301 connected to the serial-parallel conversion IC 615 are directly connected from the relay substrate 607.

  In addition, an input IC 620 for inputting detection signals of the operation buttons 81 a to 81 e provided on the game frame 11 is mounted on the frame side IC board 605. In this embodiment, the input IC 620 and the sound / lamp control microcomputer 100b mounted on the frame side IC substrate 605 are connected to the input signal line 302, the clock signal line 301, and the input capture signal line via the relay substrate 607. 303 and the sound / lamp control microcomputer 100b outputs an input capture signal to the input IC 620 via the relay boards 606 and 607 at a predetermined timing. In this case, the sound / lamp control microcomputer 100b outputs the input capture signal to the input IC 620 at a timing different from the timing of outputting the input capture signal to the input IC 621. Then, the input IC 620 latches the detection signals from the operation buttons 81a to 81e based on the input capture signal (latch signal), and outputs it to the sound / lamp control microcomputer 100b via the relay boards 606 and 607. In this case, the input IC 620 converts detection signals input in parallel from the operation buttons 81a to 81e into serial data and outputs the serial data.

  In this embodiment, each serial-parallel conversion IC 610 to 619 is assigned an address in advance, and the sound / lamp control microcomputer 100b is assigned an address when outputting the control signal converted into serial data. Output serial data. When serial data is input, each serial-parallel conversion IC 610 to 619 checks whether the address added to the input serial data matches its own address, and if it matches, converts it to parallel data. To the LED of each lamp. If the addresses do not match, the LED of each lamp is not supplied.

  Next, the operation of the symbol control microcomputer 100a will be described. FIG. 112 is a flowchart showing main processing executed by the symbol controlling microcomputer 100a according to the third embodiment. When power supply to the gaming machine is started and the reset signal becomes high level, the symbol controlling microcomputer 100a starts main processing. In the main process, the symbol control microcomputer 100a first performs an initialization process for clearing the RAM area, setting various initial values, and initializing a timer for determining the activation control activation interval ( Step S781). Thereafter, the symbol controlling microcomputer 100a shifts to a loop process for confirming the monitoring of the timer interrupt flag (step S782). When a timer interrupt occurs, the symbol control microcomputer 100a sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the symbol control microcomputer 100a clears the flag (step S783) and executes the following symbol control process.

  A timer interrupt takes, for example, every 33 ms. That is, the symbol control process is activated every 33 ms, for example. In this embodiment, only the flag is set in the timer interrupt process, and the specific symbol control process is executed in the main process. However, the symbol control process may be executed in the timer interrupt process.

  In the symbol control process, the symbol control microcomputer 100a first analyzes the received effect control command (command analysis process: step S784). In this case, the symbol control microcomputer 100a is similar to the command analysis processing (command analysis processing executed by the effect control microcomputer 100 shown in FIGS. 47 to 49) shown in the first embodiment. The effect control command is analyzed according to

  Next, the symbol control microcomputer 100a performs symbol control process processing (step S785). In this case, the symbol control microcomputer 100a performs processing according to the same processing as the effect control process shown in the first embodiment (the effect control process executed by the effect control microcomputer 100 shown in FIG. 57) ( However, only the portion related to the control of the effect display device 9) is executed.

  Then, the symbol controlling microcomputer 100a executes a process of updating the random number counter (step S786). Further, notification control process processing for performing notification using the effect display device 9 is executed (step S787). In this case, the symbol control microcomputer 100a executes the same process as the notification process using the effect display device 9 in the notification control process shown in the first embodiment.

  Further, the symbol control microcomputer 100a performs a process of sending (transferring) the effect control command received from the main board 31 to the sound / lamp control board 80b (command control process: step S788). Thereafter, the process returns to the process of checking the timer interrupt flag in step S782.

  In the command control process in step S788, the symbol control microcomputer 100a may transmit the effect control command received from the game control microcomputer 560 to the sound / lamp control microcomputer 100b as it is, or the received effect. The control command may be processed and transmitted to the sound / lamp control microcomputer 100b. For example, the symbol control microcomputer 100a may recreate the variation pattern command and the display result command into one effect control command, and transmit it to the sound / lamp control microcomputer 100b. In this case, for example, the design control microcomputer 100a newly creates an effect control command that can specify only the type and effect time of the effect to be executed during the variation of the decorative symbol based on the change pattern command and the display result command. It is generated and transmitted to the sound / lamp control microcomputer 100b. With this configuration, the number of commands transmitted from the symbol control microcomputer 100a to the sound / lamp control microcomputer 100b can be reduced.

  Next, the operation of the sound / lamp control microcomputer 100b will be described. FIG. 113 is a flowchart showing a main process executed by the sound / lamp control microcomputer 100b according to the third embodiment. When power supply to the gaming machine is started and the reset signal becomes high level, the sound / lamp control microcomputer 100b starts main processing. In the main process, the sound / lamp control microcomputer 100b first performs an initialization process for clearing the RAM area, setting various initial values, and initializing a timer for determining the activation control activation interval. This is performed (step S881). Thereafter, the sound / lamp control microcomputer 100b proceeds to a loop process for monitoring the timer interrupt flag (step S882). When a timer interrupt occurs, the sound / lamp control microcomputer 100b sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the sound / lamp control microcomputer 100b clears the flag (step S883) and executes the following sound / lamp control process.

  A timer interrupt takes, for example, every 33 ms. That is, the sound / lamp control process is started every 33 ms, for example. In this embodiment, only the flag is set in the timer interrupt process, and the specific sound / lamp control process is executed in the main process, but the sound / lamp control process is executed in the timer interrupt process. Also good.

  In the sound / lamp control process, the sound / lamp control microcomputer 100b first analyzes the effect control command received from the symbol control microcomputer 100a (command analysis process: step S884). In this case, the sound / lamp control microcomputer 100b is the same as the command analysis process (command analysis process executed by the effect control microcomputer 100 shown in FIGS. 47 to 49) shown in the first embodiment. The effect control command is analyzed in accordance with the process.

  Next, the sound / lamp control microcomputer 100b performs a sound / lamp control process (step S885). In this case, the sound / lamp control microcomputer 100b follows the same process as the effect control process shown in the first embodiment (the effect control process executed by the effect control microcomputer 100 shown in FIG. 57). The process (however, only the part related to the control of the LEDs 27a to 125f, 126a to 126f, 281a to 281c, 282a to 282f, and 283a to 283f of the speaker 27 and each lamp) is executed.

  Then, the sound / lamp control microcomputer 100b executes a process of updating the random number counter (step S886). Further, a notification control process for performing notification using the speaker 27 and the LEDs 125a to 125f, 126a to 126f, 281a to 281c, 282a to 282f, and 283a to 283f of the lamps is executed (step S887). In this case, the sound / lamp control microcomputer 100b includes the speaker 27 and the LEDs 125a to 125f, 126a to 126f, 281a to 281c, and 282a to 282f of the lamp in the notification control process shown in the first embodiment. Processing similar to the notification processing using 283a to 283f is executed. Further, the data set in the command analysis process, the sound / lamp control process process, and the notification control process process is output to the serial output circuit 353, and the data received from the input ICs 620 and 621 is read from the serial input circuit 354. Output processing is executed (step S888). Thereafter, the process proceeds to step S882.

  As described above, according to this embodiment, the sound / lamp control microcomputer 100b uses the LED 125a to 125f, 126a to 126f, 126a to 126f of each lamp based on the effect control command transferred from the symbol control microcomputer 100a. Control signals for controlling 281a to 281c, 282a to 282f, and 283a to 283f are output in a serial signal system. Further, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602 to 605 are connected through one system wiring. At the same time, different address information is assigned in advance, and only the control signal with its own address information added is converted into parallel data and output. Further, when the sound / lamp control microcomputer 100b outputs a control signal for controlling the serial-parallel conversion ICs 616 to 619 provided in the game board 6, an address that can specify the serial-parallel conversion ICs 616 to 619 is specified. A control signal with information added is output in a serial signal system. In addition, when the sound / lamp control microcomputer 100b outputs a control signal for controlling the serial-parallel conversion ICs 610 to 615 provided in the game frame 11, an address that can identify the serial-parallel conversion ICs 610 to 615. A control signal with information added is output in a serial signal system. Therefore, similarly to the first embodiment, the number of wirings between the game board 6 and the game frame 11 can be reduced. Therefore, in a gaming machine in which the game frame 11 and the game board 6 are configured to be detachable, it is possible to easily attach and detach the game frame 11 and the game board 6.

  In this embodiment, the pattern / control board 80a, the sound / lamp control board 80b, the board-side IC board 601, the frame-side IC boards 602-605, and the relay boards 606, 607 are connected as sound / lamp control. Although the case where the board 80b, the relay board 606, and the relay board 607 are connected by one bus type wiring route has been described, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC board 601 are connected in series ( The number of wires can be reduced by connecting the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC boards 602 to 605 in series (for example, daisy chain connection). May be.

  FIG. 114 shows another configuration of the symbol control board 80a, sound / lamp control board 80b, relay boards 606 and 607, board-side IC board 601, frame-side IC boards 602, 603, 604, and 605 according to the third embodiment. It is a block diagram which shows an example. In the example shown in FIG. 114, the sound / lamp control microcomputer 100b (specifically, the sound / lamp control CPU 101b) of the sound / lamp control board 80b transmits the clock signal together with the serial data as the control signal to the relay board. The data is output to 606, respectively. The relay board 606 supplies the serial data and the clock signal input from the sound / lamp control microcomputer 100 b to the relay board 607 and the board-side IC board 601.

  The serial data input to the board side IC substrate 601 is first input to the serial-parallel conversion IC 619. As shown in FIG. 114, the serial-parallel conversion ICs 616 to 619 mounted on the board-side IC substrate 601 have serial data signal lines connected in a daisy chain type. Accordingly, the input serial data is sequentially transferred from the serial-parallel conversion IC 619 to the other serial-parallel conversion ICs 616, 618, and 617 mounted on the board side IC substrate 601. For example, by configuring the output of the last bit of the shift register 652 shown in FIG. 21 to the data latch unit 651 of the next serial-parallel conversion IC, serial data is sequentially sent to the serial-parallel conversion ICs 616 to 619. What is necessary is just to forward. The serial-parallel conversion ICs 616 to 619 convert the input serial data into parallel data, and supply the parallel data to the LEDs of the lamps provided on the game board 6. The clock signal input to the board-side IC board 601 is branched on the board-side IC board 601 and input to the serial-parallel conversion ICs 616 to 619 and the input IC 621.

  The relay board 607 supplies the serial data and the clock signal input from the production control microcomputer 100 to the frame side IC board 604 and the frame side IC board 605. The serial data input to the frame side IC substrate 602 is first input to the serial-parallel conversion IC 610. As shown in FIG. 114, the serial-parallel conversion ICs 610 to 612 mounted on the frame side IC substrate 602 have serial data signal lines connected in a daisy chain type. Therefore, the input serial data is sequentially transferred from the serial-parallel conversion IC 610 to the other serial-parallel conversion ICs 611 and 612 mounted on the frame side IC substrate 602. For example, the configuration is such that the output of the last bit of the shift register 652 shown in FIG. What is necessary is just to forward. The serial-parallel conversion ICs 610 to 612 convert the input serial data into parallel data, and supply the parallel data to the LEDs of the lamps and the drive motors provided in the game frame 11.

  The serial data input to the frame side IC substrate 604 is first input to the serial-parallel conversion IC 614. As shown in FIG. 114, the serial-parallel conversion ICs 613 and 614 mounted on the frame-side IC substrates 603 and 604 have serial data signal lines connected in a daisy chain type. Accordingly, the input serial data is sequentially transferred from the serial-parallel conversion IC 614 to another serial-parallel conversion IC 613 mounted on the frame side IC substrate 603. For example, the configuration is such that the output of the last bit of the shift register 652 shown in FIG. What is necessary is just to forward. The serial-parallel conversion ICs 613 and 614 convert the input serial data into parallel data, and supply the parallel data to the LEDs of the lamps provided in the game frame 11.

  The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 602 and input to the serial-parallel conversion ICs 610, 611, and 612, respectively. Further, the clock signal input to the frame side IC substrate 604 is branched on the frame side IC substrate 604, input to the serial-parallel conversion IC 614, and input to the frame side IC substrate 603. The clock signal input to the frame side IC substrate 603 is input to the serial-parallel conversion IC 613. The clock signal input to the frame side IC substrate 605 is branched on the frame side IC substrate 605 and input to the serial-parallel conversion IC 615 and the input IC 620.

  In this embodiment, the lamp control signals with addresses are output to the serial-parallel conversion ICs 610 to 619, whereby the LEDs 125a to 125f, 126a to 126f, 281a to 281c, 282a to 282f, and 283a to 283f of the respective lamps. In the same way as in the second embodiment, a plurality of serial-parallel conversion ICs are connected in series with the same system wiring, and all lamps connected with the same system wiring are connected. You may make it output the data of fixed length containing the lamp control signal for controlling.

  FIG. 115 is a block diagram illustrating another circuit configuration example of the relay board 77, the sound / lamp control board 80b, and the symbol control board 80a according to the third embodiment. In the example shown in FIG. 115, the sound / lamp control board 80b includes a sound / lamp control CPU 101b, a RAM, a serial output circuit 353, a serial input circuit 354, a latch signal output unit 355, a clock signal output unit 356, and an input capture signal. A sound / lamp control microcomputer 100b including an output unit 357 is mounted. The RAM may be externally attached. In the sound / lamp control board 80b, the sound / lamp control microcomputer 100b operates in accordance with a program stored in a built-in or external ROM (not shown).

  The sound / lamp control CPU 101b outputs a signal for driving the lamp via the serial output circuit 353. The serial output circuit 353 converts the input signal (parallel data) for driving the LED of the lamp into serial data and outputs the serial data to the relay board 606.

  In the example shown in FIG. 115, as in the second embodiment, four ICs 610 to 614 out of the serial-parallel conversion ICs 610 to 615 provided on the game frame 11 side are connected in series with the same system wiring. Yes. When controlling the top frame lamp, the left frame lamp, and the right frame lamp, the sound / lamp control CPU 101b outputs lamp control signals for all the serial-parallel conversion ICs 610 to 614 connected by the same system wiring. The data having a fixed length (control signal sequence) is output via the serial output circuit 353 in the serial signal system. When the sound / lamp control CPU 101b finishes outputting the fixed-length control signal sequence, the latch signal output unit 355 provides a latch signal for causing the serial-parallel conversion ICs 610 to 614 to capture the lamp control signal. Output.

  In the example shown in FIG. 115, as in the second embodiment, serial-parallel conversion ICs 616 to 619 provided on the game board 6 side are connected in series by wires of the same system. When controlling the center decoration lamp, the stage lamp, and the lamp provided around the skeleton 153 which is a movable member, the sound / lamp control CPU 101b performs all serial-parallel conversions connected by the same system wiring. The fixed-length data (control signal sequence) including the lamp control signals for the ICs 616 to 619 is output via the serial output circuit 353 in the serial signal system. When the sound / lamp control CPU 101b finishes outputting the fixed-length control signal sequence, the latch signal output unit 355 provides a latch signal for causing the serial-parallel conversion ICs 616 to 619 to capture the lamp control signal. Output.

  As in the second embodiment, four ICs 615 among the serial-parallel conversion ICs 610 to 615 provided on the game frame 11 side are connected by a single wiring. When controlling the pan lamp or the operation button lamp, the sound / lamp control CPU 101b sends the lamp control signal for the serial-parallel conversion IC 615 connected by the single wiring to the serial signal via the serial output circuit 353. Output in the method. When the sound / lamp control CPU 101b finishes outputting the lamp control signal, the sound / lamp control CPU 101b causes the latch signal output unit 355 to output a latch signal for causing the serial-parallel conversion IC 615 to capture the lamp control signal.

  FIG. 116 shows still another example of the symbol control board 80a, the sound / lamp control board 80b, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, and 605 according to the third embodiment. It is a block diagram which shows the example of a structure. The sound / lamp control microcomputer 100b of the sound / lamp control board 80 outputs a clock signal to the relay board 606 together with serial data as a control signal. The sound / lamp control microcomputer 100b outputs a latch signal to the relay board 607 at the timing when the serial data has been output. The relay board 606 supplies serial data, a clock signal, and a latch signal input from the sound / lamp control microcomputer 100 b to the board side IC board 601. The relay board 606 further supplies serial data, a clock signal, and a latch signal to the frame side IC boards 602 to 605 via the relay board 607.

  The serial data input to the board side IC substrate 601 is first input to the serial-parallel conversion IC 619. As shown in FIG. 116, the serial-parallel conversion ICs 616 to 619 mounted on the board-side IC substrate 601 are connected in series with the same system wiring. For example, each serial-parallel conversion IC 616 to 619 has serial data signal lines connected in a daisy chain type. Accordingly, the input serial data is sequentially transferred from the serial-parallel conversion IC 619 to the other serial-parallel conversion ICs 616, 618, and 617 mounted on the board side IC substrate 601. In the example shown in FIG. 116, the output of the last bit of the shift register 682 mounted on each serial-parallel conversion IC is input to the data latch unit 681 of the next serial-parallel conversion IC, as in the second embodiment. With this configuration (see FIG. 103), serial data may be sequentially transferred to the serial-parallel conversion ICs 616 to 619. Each serial-parallel conversion IC 616 to 619 latches the serial data at the timing when the latch signal is input, converts the latched serial data into parallel data, and supplies it to the LED of each lamp provided on the game board 6. To do. The clock signal input to the board-side IC board 601 is branched on the board-side IC board 601 and input to the serial-parallel conversion ICs 616 to 619 and the input IC 621.

  The relay board 607 supplies the serial data, the clock signal, and the latch signal input from the sound / lamp control microcomputer 100 b to the frame side IC board 604 and the frame side IC board 605. The serial data input to the frame side IC substrate 602 is first input to the serial-parallel conversion IC 610. As shown in FIG. 116, the serial-parallel conversion ICs 610 to 612 mounted on the frame-side IC substrate 602 are connected in series with the same system wiring. For example, each serial-parallel conversion IC 610 to 612 has serial data signal lines connected in a daisy chain type. Therefore, the input serial data is sequentially transferred from the serial-parallel conversion IC 610 to the other serial-parallel conversion ICs 611 and 612 mounted on the frame side IC substrate 602. In the example shown in FIG. 116, the output of the last bit of the shift register 682 mounted on each serial-parallel conversion IC is input to the data latch unit 681 of the next serial-parallel conversion IC, as in the second embodiment. With this configuration (see FIG. 103), serial data may be sequentially transferred to the serial-parallel conversion ICs 610 to 612. Each of the serial-parallel conversion ICs 610 to 612 latches the serial data at the timing when the latch signal is inputted, converts the latched inputted serial data into parallel data, and LED of each lamp provided in the game frame 11 And supplied to each drive motor.

  The serial data input to the frame side IC substrate 604 is first input to the serial-parallel conversion IC 614. As shown in FIG. 116, the serial-parallel conversion ICs 613 and 614 mounted on the frame-side IC substrates 603 and 604 are connected in series by wiring of the same system. For example, in each serial-parallel conversion IC 613, 614, signal lines for serial data are connected in a daisy chain type. Accordingly, the input serial data is sequentially transferred from the serial-parallel conversion IC 614 to another serial-parallel conversion IC 613 mounted on the frame side IC substrate 603. In the example shown in FIG. 116, the output of the last bit of the shift register 682 mounted on each serial-parallel conversion IC is input to the data latch unit 681 of the next serial-parallel conversion IC, as in the second embodiment. With this configuration (see FIG. 103), serial data may be transferred to the serial-parallel conversion ICs 613 and 614 in order. Each serial-parallel conversion IC 613, 614 latches the serial data at the timing when the latch signal is input, converts the latched input serial data into parallel data, and LED of each lamp provided in the game frame 11 To supply.

  The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 602 and input to the serial-parallel conversion ICs 610, 611, and 612, respectively. Further, the clock signal input to the frame side IC substrate 604 is branched on the frame side IC substrate 604, input to the serial-parallel conversion IC 614, and input to the frame side IC substrate 603. The clock signal input to the frame side IC substrate 603 is input to the serial-parallel conversion IC 613. The clock signal input to the frame side IC substrate 605 is branched on the frame side IC substrate 605 and input to the serial-parallel conversion IC 615 and the input IC 620.

  The serial data input to the frame side IC substrate 605 is input to the serial-parallel conversion IC 615. Each serial-parallel conversion IC 615 latches the serial data at the timing when the latch signal is input, converts the latched input serial data into parallel data, and provides a dish lamp and an operation button lamp provided in the game frame 11. LEDs 82a to 82d and 83 are supplied. The clock signal input to the frame side IC substrate 605 is branched on the frame side IC substrate 605 and input to the serial-parallel conversion IC 615 and the input IC 620.

  In the example shown in FIGS. 115 and 116, each serial-parallel conversion IC is configured similarly to the configuration shown in the second embodiment (see FIG. 103). In the example shown in FIGS. 115 and 116, the control signal sequence including the lamp control signal in the second embodiment is used. In the example shown in FIGS. 115 and 116, the sound / lamp control microcomputer 100b (specifically, the sound / lamp control CPU 101b) is the production control microcomputer 100 shown in the second embodiment. The serial setting process and the serial input / output process are executed in accordance with the same process (see FIGS. 116 to 104).

  115 and 116, the sound / lamp control microcomputer 100b is configured so that the LEDs 125a to 125f, 126a to 126f, 126a to 126f of the respective lamps are based on the effect control commands transferred from the design control microcomputer 100a. Control signals for controlling 281a to 281c, 282a to 282f, and 283a to 283f are output in a serial signal system. Further, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602 to 605 are connected through one system wiring. The Therefore, similarly to the second embodiment, the number of wirings between the game board 6 and the game frame 11 can be reduced. Therefore, in a gaming machine in which the game frame 11 and the game board 6 are configured to be detachable, it is possible to easily attach and detach the game frame 11 and the game board 6.

  In this embodiment, as an example of controlling each presentation means using separate control boards, a case has been described in which a gaming machine includes a symbol control board 80a and a sound / lamp control board 80b. A plurality of control boards may be provided. For example, the gaming machine controls a design / sound control board that controls the effect display device 9 and the speaker 27, and lamps that control the LEDs 125a to 125f, 126a to 126f, 281a to 281c, 282a to 282f, and 283a to 283f of each lamp. And a control board. In this case, for example, the symbol / sound control microcomputer mounted on the symbol / sound control board first receives an effect control command from the game control microcomputer 560 and transfers (transmits) it to the lamp control board. Then, the lamp control microcomputer mounted on the lamp control board outputs the control signal in a serial signal system based on the transferred effect control command, whereby the LEDs 125a to 125f, 126a to 126f, and 281a to each lamp are output. 281c, 282a to 282f, and 283a to 283f are controlled.

  Further, for example, the gaming machine controls the speaker 27 with the design / lamp control board that controls the effect display device 9 and the LEDs 125a to 125f, 126a to 126f, 281a to 281c, 282a to 282f, and 283a to 283f of each lamp. And a sound control board to be provided. In this case, for example, the sound control microcomputer mounted on the sound control board first receives an effect control command from the game control microcomputer 560 and transfers (transmits) it to the symbol / lamp control board. Then, the symbol / lamp control microcomputer mounted on the symbol / lamp control board outputs a control signal in a serial signal system based on the transferred presentation control command, thereby causing the LEDs 125a to 125f and 126a to 126- 126f, 281a to 281c, 282a to 282f, 283a to 283f are controlled.

  As described above, in the above embodiment, the gaming machine controls a lamp provided in the gaming machine by outputting a driving signal to the lamp (for example, for effect control). A microcomputer 100), and the lamp control means includes brightness change control means for controlling the brightness level of the lamp by controlling the length of the ON period of the drive signal output in unit time, and the brightness change control means includes the lamp Brightness level calculation means for determining the brightness level per unit time in a predetermined time by calculation based on the brightness level at the time of starting the control to change the brightness and the target brightness level after the predetermined time has elapsed, and the brightness level calculation Brightness change execution means for controlling the length of the ON period of the drive signal output in accordance with each brightness level obtained by the operation. Which is configured urchin, control means for controlling a lamp (e.g., presentation control means) can be prevented to increase the data storage capacity in. Further, the brightness change control means can be easily applied to other models having different brightness level numbers and different types of brightness change patterns.

  Further, when the brightness is not changed at a predetermined time, the brightness level for each predetermined unit time in the predetermined time is determined as the target brightness level without performing the calculation. The burden of the control means to control is reduced. That is, an increase in program capacity can be suppressed.

  In the above embodiment, the production control microcomputer 100 determines the predetermined time (the time from the present to the target brightness level) based on the current brightness level and the target brightness level (at the start of brightness control). ), The lightness level of a single color per unit time is determined by calculation. However, the present invention can also be applied to a case where the tone (color intensity) or the color itself is gradually changed. In that case, a three-color LED (for example, a red LED, a green LED, and a blue LED) is used as the LED.

  For example, when the current emission color is blue (only the blue LED emits light) and the target emission color is red (only the red LED emits light), the effect control microcomputer 100 calculates blue for each unit time by calculation. The LED brightness level (gradually decreasing) and the red LED brightness level (gradually increasing) per unit time are calculated, and brightness control is performed in the same manner as shown in FIG. 54 according to the calculation result. It should be noted that an intermediate color between blue and red is visually recognized by the player between the current time and the elapse of a predetermined time.

  In addition, the pachinko gaming machine of each of the above embodiments can be given a predetermined game value to a player mainly when the special symbol that is variably displayed on the variable display unit based on the start winning prize becomes a predetermined symbol. A pachinko machine that can be given a predetermined gaming value to a player when there is a prize in a predetermined area of an electric game that is released based on a start prize, or a start prize The present invention is applied even to a pachinko game machine in which a predetermined right is generated or continued when there is a prize for a predetermined electric combination that is released when the stop symbol of the symbol variably displayed becomes a predetermined symbol combination. it can. Furthermore, the present invention can be applied to a slot machine that inserts game medals and sets a bet number and plays a game, or a game machine that inserts game balls instead of game medals and sets a bet number and plays a game.

  The present invention includes a game frame that can be opened and closed with respect to an outer frame, and a game board that is attached to the game frame and includes a predetermined plate-like body and various parts that are attached to the plate-like body. Applicable to game machines such as interchangeable pachinko machines.

It is the front view which looked at the pachinko game machine from the front. It is a front view which shows the front of a game frame. It is a front view which shows the front of a game board. It is explanatory drawing which shows operation | movement of the truck as a movable member. It is explanatory drawing which shows operation | movement of the beam as a movable member. It is explanatory drawing which shows operation | movement of the skeleton as a movable member. It is explanatory drawing which shows the state which opened the game frame. It is explanatory drawing which shows the back of a game frame and a game board. It is the rear view which looked at the game board from the back. It is explanatory drawing which shows the light emission aspect of a ceiling-lamp. It is explanatory drawing which shows the structure of a top frame lamp unit, and the attachment structure of a top frame lamp unit. It is explanatory drawing which shows the structure of a top frame lamp unit, and the attachment structure of a top frame lamp unit. It is explanatory drawing which shows the structure which drives each LED of a top frame lamp to the left-right direction, or rotationally drives. It is explanatory drawing which shows the movable aspect of the drive component of a top frame lamp unit. It is a block diagram which shows the circuit structural example of a game control board (main board). It is a block diagram which shows the circuit structural example of a relay board | substrate and an effect control board. FIG. 11 is a block diagram illustrating a configuration example of an effect control board, a relay board, a board side IC board, and a frame side IC board. It is explanatory drawing which shows the example of the address provided to each serial-parallel conversion IC. It is explanatory drawing which shows the example of the address provided to each serial-parallel conversion IC. It is explanatory drawing which shows the example of the address provided to each input IC. It is a block diagram which shows the structure of each serial-parallel conversion IC. It is explanatory drawing which shows the example of the format of the serial data output from the microcomputer for production control. It is a timing diagram which shows the example of the input timing of the serial data and clock signal to serial-parallel conversion IC, and the output timing of parallel data. It is a block diagram which shows the structure of each input IC. It is a flowchart which shows the main process which CPU in a main board | substrate performs. It is a flowchart which shows a 2 ms timer interruption process. It is explanatory drawing which shows each random number. It is explanatory drawing which shows an example of a big hit determination value. It is explanatory drawing which shows an example of a fluctuation pattern. It is explanatory drawing which shows the example of the format of the production control command transmitted by a serial signal system. It is explanatory drawing which shows an example of the content of an effect control command. It is explanatory drawing which shows an example of the transmission timing of an effect control command. It is a flowchart which shows a special symbol process process. It is a flowchart which shows a special symbol process process. It is a flowchart which shows a starting port switch passage process. It is a flowchart which shows a special symbol normal process. It is a flowchart which shows a special symbol normal process. It is a flowchart which shows a fluctuation pattern setting process. It is a flowchart which shows a display result specific command transmission process. It is a flowchart which shows the special symbol change process. It is a flowchart which shows a special symbol stop process. It is a flowchart which shows a big hit end process. It is a flowchart which shows a small hit end process. It is a flowchart which shows an abnormal winning notification process. It is a flowchart which shows the presentation control main process which CPU for presentation control performs. It is explanatory drawing which shows the structural example of a command reception buffer. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is explanatory drawing which shows the example of the movable aspect of a top frame lamp. It is explanatory drawing which shows the example of a switching of the irradiation direction in a 2nd movable aspect. It is explanatory drawing which shows the example of the control content of a lamp. It is explanatory drawing which shows the example of control for implement | achieving the lightness 1-the lightness 15. It is explanatory drawing which shows an example of the data which show the stepwise brightness control of a lamp | ramp. It is explanatory drawing which shows typically the brightness change of period (1)-(11). It is explanatory drawing which shows a brightness change in more detail. It is a flowchart which shows production control process processing. It is a flowchart which shows a fluctuation pattern command reception waiting process. It is explanatory drawing which shows the timer and counter used when performing the brightness control of a lamp | ramp. It is a flowchart which shows a decoration design change start process. It is explanatory drawing which shows an example of the stop symbol of a decoration symbol. It is explanatory drawing which shows the structural example of process data. It is explanatory drawing which shows the structural example of a lamp control table. It is a flowchart which shows a switching time and switching frequency calculation process. It is a flowchart which shows a process during decoration design change. It is a flowchart which shows a brightness control process. It is explanatory drawing which shows an example of the data output by a lamp according to the value of a lightness corresponding | compatible counter, and the value of a 15 ms timer. It is a flowchart which shows a decoration design change stop process. It is a flowchart which shows a big hit display process. It is a flowchart which shows a big hit end process. It is explanatory drawing which shows the example of the alerting | reporting screen displayed on an effect display apparatus. It is explanatory drawing which shows the example of the aspect of the various error alerting | reporting performed in alerting | reporting control process processing. It is a flowchart which shows alerting | reporting control process processing. It is a flowchart which shows a notification start process. It is a flowchart which shows a notification start process. It is a flowchart which shows a notification start process. It is a flowchart which shows a notification start process. It is a flowchart which shows the process during alerting | reporting. It is a flowchart which shows the process during alerting | reporting. It is a flowchart which shows the process during alerting | reporting. It is explanatory drawing which shows the structural example of the process table for error alerting | reporting. It is explanatory drawing which shows the example of the lamp control signal output as a serial data system in alerting | reporting control process processing. It is explanatory drawing which shows the other example of the lamp control signal output as a serial data system in alerting | reporting control process processing. It is explanatory drawing which shows an example of the lamp control signal stored in the data storage area, when performing the variable display of a decoration design. It is explanatory drawing which shows the example of the motor control signal output as a serial data system in a game production. It is explanatory drawing which shows the excitation pattern used in order to excite a lamp | ramp left-right drive motor and a lamp | ramp rotation drive motor. It is a flowchart which shows an example of a serial setting process. It is explanatory drawing which shows an example of the lamp control signal stored in the data storage area. It is a flowchart which shows the specific example of a serial input / output process. It is explanatory drawing which shows the example of the situation of the display effect in an effect display apparatus, the sound effect by a speaker, and the display effect by each lamp | ramp. It is explanatory drawing which shows the structure of the top frame lamp unit in the case of providing the change member which changes the irradiation direction of the light which each LED light-emits, and the attachment structure of a top frame lamp unit. It is explanatory drawing which shows the structure which drives each LED of a top-frame lamp in the case of providing the change member which changes the irradiation direction of the light which each LED light-emits, or rotationally drives. It is explanatory drawing which shows the installation condition in the game store of the game machine using the movable top frame lamp provided in the game frame. It is explanatory drawing which shows the other example of the movable aspect of a top-frame lamp. It is explanatory drawing which shows the structure of the top frame lamp unit in the case of attaching to the glass door frame side, and the attachment structure of a top frame lamp unit. It is the front view which looked at the pachinko game machine in the case of attaching a top frame lamp unit to the glass door frame side from the front. It is a front view which shows the front surface of the game board in the case of attaching a top frame lamp unit to the glass door frame side. It is explanatory drawing which shows the state which opened the game frame in the case of attaching a top frame lamp unit to the glass door frame side. It is explanatory drawing which shows the back surface of the game board in the case of attaching a top frame lamp unit to the glass door frame side, and a game board. It is a block diagram which shows the other structural example of an effect control board, a relay board | substrate, a board | substrate side IC board, and a frame side IC board. It is a block diagram which shows the circuit structural example of the relay board | substrate and effect control board in 2nd Embodiment. It is a block diagram which shows the structural example of the presentation control board in a 2nd Embodiment, a relay board | substrate, a board | substrate side IC board, and a frame side IC board. It is a block diagram which shows the structure of each serial-parallel conversion IC in 2nd Embodiment. It is explanatory drawing which shows the example of the control signal sequence containing the lamp control signal and motor control signal which are output as a serial data system in the alerting | reporting control process in 2nd Embodiment. It is explanatory drawing which shows the example of the control signal sequence containing the motor control signal output as a serial data system in the game effect in 2nd Embodiment. It is a flowchart which shows the example of the serial setting process in 2nd Embodiment. It is explanatory drawing which shows the example of 1 structure of the data storage area | region where the control signal sequence containing the lamp control signal and motor control signal of the output object in 2nd Embodiment is set. It is a flowchart which shows the specific example of the serial input / output process (step S708) in 2nd Embodiment. It is a block diagram which shows the other structural example of the production | presentation control board in a 2nd embodiment, a relay board, a board side IC board, and a frame side IC board. It is a block diagram which shows the circuit structural example of the relay board | substrate in 3rd Embodiment, a sound / lamp control board, and a symbol control board. It is a block diagram which shows the structural example of the symbol control board in a 3rd embodiment, a sound / lamp control board, a relay board, a board side IC board, and a frame side IC board. It is a flowchart which shows the main process which the microcomputer for symbol control in 3rd Embodiment performs. It is a flowchart which shows the main process which the microcomputer for sound / lamp control in 3rd Embodiment performs. It is a block diagram which shows the other structural example of the symbol control board in a 3rd embodiment, a sound / lamp control board, a relay board, a board side IC board, and a frame side IC board. It is a block diagram which shows the other circuit structure example of the relay board | substrate in 3rd Embodiment, a sound / lamp control board, and a symbol control board. It is a block diagram which shows the further another structural example of the symbol control board in a 3rd embodiment, a sound / lamp control board, a relay board, a board side IC board, and a frame side IC board.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Pachinko machine 8 Special symbol display 9 Production display device 13 1st start winning opening 14 2nd starting winning opening 20 Special variable winning ball apparatus 31 Game control board (main board)
56 CPU
560 Microcomputer for game control 78 Serial output circuit 80 Production control board 82a-82d Dish lamp (LED)
85a to 85i Optical mirrors 86a to 86c Mirror drive motor 90 Lamp up / down drive motor 91a, 91b Lamp left / right drive motor 92 Lamp rotation drive motor 93 Shaft 95, 98 Gear 96 Drive component 100 Production control microcomputer 101 Production control CPU
109 VDP
125a-125f Center decoration lamp (LED)
126a-126f Stage lamp (LED)
281a-281c Ceiling lamp (LED)
282a-282f Left frame lamp (LED)
283a-283f Right frame lamp (LED)
353 Serial output circuit 354 Serial input circuit 601 Board side IC board 602 to 605 Frame side IC board 606,607 Relay board 610 to 619 Serial-parallel conversion IC

Claims (7)

A gaming machine in which a player can perform a predetermined game using a game medium,
Electric parts for production are provided in a game frame that is installed to be openable and closable with respect to the outer frame,
Light emitting means for emitting light in response to the drive signal;
A light emission control means for controlling the light emission means by outputting a drive signal to the light emission means,
The electrical components provided in the game frame are
A light emitting component as the light emitting means;
A drive component for moving the light emitting component,
The light emission control means includes lightness change control means for controlling the lightness level of the light emission means by controlling the length of the ON period of the drive signal output in a predetermined unit time,
The brightness change control means includes:
Lightness level calculation means for determining the lightness level for each predetermined unit time in the predetermined time by calculation based on the lightness level when starting the control to change the lightness of the light emitting means and the target lightness level after the predetermined time elapses When,
A lightness change execution means for controlling the length of the ON period of the drive signal output in accordance with each lightness level obtained by the lightness level calculation means. A gaming machine in which a player can perform a predetermined game using a game medium,
Electric parts for production are provided in a game frame that is installed to be openable and closable with respect to the outer frame,
Light emitting means for emitting light in response to the drive signal;
A light emission control means for controlling the light emission means by outputting a drive signal to the light emission means,
The electrical components provided in the game frame are
A light emitting component as the light emitting means;
A drive member for moving a change member that changes an irradiation direction of light emitted by the light-emitting component,
The light emission control means includes lightness change control means for controlling the lightness level of the light emission means by controlling the length of the ON period of the drive signal output in a predetermined unit time,
The brightness change control means includes:
Lightness level calculation means for determining the lightness level for each predetermined unit time in the predetermined time by calculation based on the lightness level when starting the control to change the lightness of the light emitting means and the target lightness level after the predetermined time elapses When,
A lightness change execution means for controlling the length of the ON period of the drive signal output in accordance with each lightness level obtained by the lightness level calculation means.   3. The gaming machine according to claim 1, wherein the lightness change control means includes non-computed lightness level determination means for determining a lightness level for each predetermined unit time in a predetermined time as a target lightness level without calculation. A gaming machine comprising a gaming frame that is openable and closable with respect to an outer frame, and a gaming board that is attached to the gaming frame and includes a predetermined plate-like body and various components attached to the plate-like body. ,
Light emitting means is provided on the game frame and the game board,
A game control means for executing a game control process for controlling the progress of the game, and an effect control means for controlling the light emission means based on a command transmitted by the game control means;
The brightness change control means is included in the effect control means,
The production control means includes a signal output means for outputting a control signal for controlling the light emission means in a serial signal system based on a command transmitted by the game control means,
The board side serial-parallel conversion circuit that converts the control signal output from the signal output means into a parallel signal system and outputs the parallel signal system to the light emitting means provided in the game board, and the control signal output from the signal output means. A frame-side serial-parallel conversion circuit that converts to a parallel signal system and outputs the light to the light emitting means provided in the game frame,
The board-side serial-parallel conversion circuit and the frame-side serial-parallel conversion circuit are connected via a single line of wiring, and are assigned different address information in advance, and control signals to which their own address information is added Convert only to parallel signal system and output,
The signal output means includes
When outputting a control signal for controlling the light emitting means provided in the game board, a control signal added with address information capable of specifying the board side serial-parallel conversion circuit is output in a serial signal system,
2. When outputting a control signal for controlling the light emitting means provided in the game frame, a control signal to which address information capable of specifying the frame side serial-parallel conversion circuit is added is output by a serial signal system. The gaming machine according to claim 3. A gaming machine comprising a gaming frame that is openable and closable with respect to an outer frame, and a gaming board that is attached to the gaming frame and includes a predetermined plate-like body and various components attached to the plate-like body. ,
Light emitting means is provided on the game frame and the game board,
A game control means for executing a game control process for controlling the progress of the game, and an effect control means for controlling the light emission means based on a command transmitted by the game control means;
The brightness change control means is included in the effect control means,
The production control means includes a signal output means for outputting a control signal for controlling the light emission means in a serial signal system based on a command transmitted by the game control means,
The board side serial-parallel conversion circuit that converts the control signal output from the signal output means into a parallel signal system and outputs the parallel signal system to the light emitting means provided in the game board, and the control signal output from the signal output means. A frame-side serial-parallel conversion circuit that converts to a parallel signal system and outputs the light to the light emitting means provided in the game frame,
At least a part of the panel side serial-parallel conversion circuit or the frame side serial-parallel conversion circuit is connected in series,
The signal output means includes
A fixed-length data including control signal information for all of the panel-side serial-parallel conversion circuits or the frame-side serial-parallel conversion circuits connected in series is output by a serial signal system in units of a predetermined period,
The panel-side serial-parallel conversion circuit or the frame-side serial-parallel conversion circuit connected in series is connected to the panel-side serial-parallel conversion circuit or the frame-side serial-parallel conversion circuit connected to the lower side. The gaming machine according to any one of claims 1 to 3, wherein unit data output every predetermined cycle is sequentially transferred as it is, and a control signal is output based on the unit data at a predetermined timing.   5. A relay board is provided between the board side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit, or a relay board is provided between the frame side serial-parallel conversion circuit and the effect control means. The gaming machine according to claim 5.   The gaming machine according to claim 4 or 5, wherein a collective board on which a plurality of frame side serial-parallel conversion circuits or board side serial-parallel conversion circuits are mounted is provided.