JP2009010273A - Power source noise filtering structure of printed wiring board - Google Patents

Power source noise filtering structure of printed wiring board Download PDF

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JP2009010273A
JP2009010273A JP2007172086A JP2007172086A JP2009010273A JP 2009010273 A JP2009010273 A JP 2009010273A JP 2007172086 A JP2007172086 A JP 2007172086A JP 2007172086 A JP2007172086 A JP 2007172086A JP 2009010273 A JP2009010273 A JP 2009010273A
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power supply
bypass capacitor
bypass
capacitor
electrode
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Yuichi Sasaki
雄一 佐々木
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Renesas Technology Corp
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Renesas Technology Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a power source noise filtering structure of a printed wiring board which structure has a bypass capacitor mounting structure that improves an effect of suppressing high-frequency noises superposed on current from a power supply system. <P>SOLUTION: A power supply line is divided into two i.e. a power supply line 2a and a power supply line 2b. Capacitor mounting power pads 5a and 5b are disposed on the surfaces of division ends of the power supply lines 2a and 2b, respectively, and the division ends are connected via an electrode 4a of a bypass capacitor 4, which is a two-terminal chip capacitor. This causes the entire high-frequency noises heading from the power supply line 2a toward the power supply line 2b to flow through the electrode 4a of the bypass capacitor 4, thus improves a performance of bypassing high-frequency noises through an electrode 4b to a GND layer 3. The division ends are also connected via a power line detouring pattern 8 to avoid disconnection between the power supply lines 2a and 2b due to the separation of the bypass capacitor 4, etc. The high-frequency impedance of the power line detouring pattern 8 is determined to be larger than the high-frequency impedance of the electrode 4a of the bypass capacitor 4. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

この発明は、プリント配線板の電源ノイズフィルタ構造に関するものである。   The present invention relates to a power supply noise filter structure for a printed wiring board.

従来から、LSIやICが実装されるプリント配線板では、その実装されるLSIやICから放射される高周波ノイズが電源供給系に重畳されるのを抑制するためのフィルタ構造として、電源供給系にバイパス用コンデンサを実装できる構造が設けられている(例えば、特許文献1,2等)。   Conventionally, in printed wiring boards on which LSIs and ICs are mounted, a power supply system is used as a filter structure for suppressing high frequency noise radiated from the mounted LSIs and ICs on the power supply system. A structure capable of mounting a bypass capacitor is provided (for example, Patent Documents 1 and 2).

特開2006−120786号公報JP 2006-120786 A 特開平11−87880号公報Japanese Patent Laid-Open No. 11-87880

しかしながら、従来のバイパス用コンデンサの実装構造は、所望のバイパス性能が得られない場合があるので、電源供給系に重畳される高周波ノイズに対する所望の抑制効果が得られない場合があるという問題がある。   However, since the conventional bypass capacitor mounting structure may not obtain a desired bypass performance, there is a problem that a desired suppression effect against high-frequency noise superimposed on the power supply system may not be obtained. .

この発明は、上記に鑑みてなされたものであり、電源供給系に重畳される高周波ノイズに対する抑制効果の向上が図れるバイパス用コンデンサの実装構造を備えたプリント配線板の電源ノイズフィルタ構造を得ることを目的とする。   The present invention has been made in view of the above, and obtains a power supply noise filter structure for a printed wiring board having a bypass capacitor mounting structure capable of improving the effect of suppressing high frequency noise superimposed on a power supply system. With the goal.

上述した目的を達成するために、この発明は、電子部品実装面である一方の層面に電子部品への電源供給を行う電源配線が配設され、他方の層面にグラウンド層が配設される絶縁層を備えるプリント配線板における、2端子タイプのバイパス用コンデンサの一方の端子電極を前記電源配線に接続し、他方の端子電極を前記絶縁層に設けたグラウンドパッドおよびスルホールを介して前記グラウンド層に接続する電源ノイズフィルタ構造であって、前記電源配線は、前記2端子タイプのバイパス用コンデンサの端子電極の長さよりも短い間隔を置いて離間する第1の電源配線と第2の電源配線とに分割して構成され、前記第1および第2の電源配線の対向する分割端側の配線上面に、前記バイパス用コンデンサの端子電極を接続するパッドがそれぞれ設けられているとともに、前記第1および第2の電源配線の対向する分割端間を接続する迂回電源配線が、同じ前記電子部品実装面において前記第1および第2の電源配線の配設経路とは異なる経路を通って配設されていることを特徴とする。   In order to achieve the above-described object, the present invention provides an insulation in which a power supply wiring for supplying power to an electronic component is disposed on one layer surface which is an electronic component mounting surface, and a ground layer is disposed on the other layer surface. In a printed wiring board having a layer, one terminal electrode of a two-terminal type bypass capacitor is connected to the power supply wiring, and the other terminal electrode is connected to the ground layer via a ground pad and a through hole provided in the insulating layer. A power supply noise filter structure to be connected, wherein the power supply wiring is divided into a first power supply wiring and a second power supply wiring that are spaced apart from each other by a distance shorter than the length of the terminal electrode of the two-terminal type bypass capacitor. A pad for connecting the terminal electrode of the bypass capacitor is formed on the upper surface of the wiring on the divided end side facing the first and second power supply wirings. The detour power supply wiring that is provided between the opposing divided ends of the first and second power supply wirings is disposed on the same electronic component mounting surface. It is characterized by being arranged through a route different from the route.

この発明によれば、2端子タイプのバイパス用コンデンサの一方の端子電極を電源配線に接続し、他方の端子電極をグラウンド層に接続する場合に、電源配線を2分割し、その分割端間をバイパス用コンデンサの一方の端子電極で接続する。電源配線を分割しない場合には、電源配線の一方端から他方端に向かう高周波ノイズは、電源配線側とバイパス用コンデンサの端子電極側とに分流するので、バイパス性能が劣化するが、この発明では、全てバイパス用コンデンサの端子電極を流れるので、他方の端子電極を通ってグラウンド層へバイパスする性能が向上する。   According to the present invention, when one terminal electrode of a two-terminal type bypass capacitor is connected to the power supply wiring and the other terminal electrode is connected to the ground layer, the power supply wiring is divided into two, and the space between the divided ends is divided. Connect with one terminal electrode of the bypass capacitor. If the power supply wiring is not divided, high-frequency noise from one end of the power supply wiring to the other end is shunted to the power supply wiring side and the terminal electrode side of the bypass capacitor. Since all flow through the terminal electrode of the bypass capacitor, the performance of bypassing to the ground layer through the other terminal electrode is improved.

この場合、バイパス用コンデンサの剥離などによって、第1の電源配線と第2の電源配線との間の導通が得られなくなる事態が生ずるのを回避するため、分割した電源配線間を別の接続用導体で接続すると、高周波ノイズは、バイパス用コンデンサの端子電極と別の接続用導体とに分流するので、バイパス性能が低下する。   In this case, in order to avoid a situation in which continuity between the first power supply wiring and the second power supply wiring cannot be obtained due to separation of the bypass capacitor or the like, another connection between the divided power supply wirings is performed. When connected by a conductor, high-frequency noise is diverted to the terminal electrode of the bypass capacitor and another connection conductor, so that the bypass performance is degraded.

つまり、2端子タイプのバイパス用コンデンサの剥離などによる第1の電源配線と第2の電源配線との間の導通が得られなくなる事態発生を回避しつつバイパス性能の向上を図るには、高周波ノイズがバイパス用コンデンサの端子電極側をより多く流れるようにする必要がある。そのためには、別の接続用導体の高周波インピーダンスをバイパス用コンデンサの端子電極が有する高周波インピーダンスよりも大きくすればよいので、その別の接続用導体として、同じ電子部品実装面上において別の経路を通る迂回電源配線を設け、この迂回電源配線によって分割した電源配線間を接続することにしている。   In other words, in order to improve the bypass performance while avoiding the situation where the continuity between the first power supply wiring and the second power supply wiring cannot be obtained due to separation of the two-terminal type bypass capacitor or the like, high frequency noise Needs to flow more on the terminal electrode side of the bypass capacitor. For this purpose, the high-frequency impedance of another connection conductor may be made larger than the high-frequency impedance of the terminal electrode of the bypass capacitor, so that another connection conductor has a different path on the same electronic component mounting surface. A bypass power supply wiring is provided, and the power supply wiring divided by the bypass power supply wiring is connected.

この迂回電源配線では、2端子タイプのバイパス用コンデンサの端子電極とのインピーダンス比率(分流比)を、高周波ノイズがバイパス用コンデンサの端子電極側をより多く流れる比率となるように、インダクタンス成分がバイパス用コンデンサの端子電極よりも大きくなり、高周波インピーダンスがバイパス用コンデンサの端子電極よりも大きくなるように配設経路を選択してあるので、高周波ノイズがバイパス用コンデンサの端子電極側をより多く流れるようにすることができる。したがって、この発明によれば、電源供給系に重畳される高周波ノイズに対する抑制効果の向上が図れるという効果を奏する。   In this bypass power supply wiring, the inductance component bypasses the impedance ratio (division ratio) with the terminal electrode of the two-terminal type bypass capacitor so that the high-frequency noise flows more on the terminal electrode side of the bypass capacitor. Since the arrangement path is selected so that it is larger than the terminal electrode of the bypass capacitor and the high frequency impedance is larger than the terminal electrode of the bypass capacitor, more high frequency noise flows on the terminal electrode side of the bypass capacitor. Can be. Therefore, according to the present invention, the effect of suppressing the high frequency noise superimposed on the power supply system can be improved.

まず、この発明の理解を容易にするため、図5〜図8を参照して上記した特許文献1,2に開示されている従来技術の概要を説明する。   First, in order to facilitate understanding of the present invention, an outline of the prior art disclosed in Patent Documents 1 and 2 will be described with reference to FIGS.

図5は、特許文献1に開示されている従来のバイパス用コンデンサの実装構造を備えたプリント配線板の電源ノイズフィルタ構造を示す斜視図である。図5では、絶縁層の電子部品実装面に電子部品への電源供給を行う電源配線も配設される場合への適用例が示されている。   FIG. 5 is a perspective view showing a power supply noise filter structure of a printed wiring board having a conventional bypass capacitor mounting structure disclosed in Patent Document 1. As shown in FIG. FIG. 5 shows an application example in which a power supply wiring for supplying power to the electronic component is also provided on the electronic component mounting surface of the insulating layer.

図5において、プリント配線板の基材を構成する絶縁層1の一方の層面(図示例では上面)は、LSIやICなどの電子部品の配置面であり、それらの電子部品に電源を供給する電源配線2も配設されている。そして、絶縁層1の他方の層面(図示例では下面)は、全面にグラウンド層(GND層)3が配設されている。   In FIG. 5, one layer surface (upper surface in the illustrated example) of the insulating layer 1 constituting the substrate of the printed wiring board is an arrangement surface for electronic components such as LSI and IC, and supplies power to these electronic components. A power supply wiring 2 is also provided. A ground layer (GND layer) 3 is disposed on the entire surface of the other layer surface (lower surface in the illustrated example) of the insulating layer 1.

バイパス用コンデンサ4は、市販部品として入手できる2端子タイプのチップコンデンサであり、端子電極4a,4bを有している。図示例では、端子電極4a,4bは、長方形形状をした内部電極の短辺側に設けられている。なお、端子電極は、以降、単に「電極部」と記す。   The bypass capacitor 4 is a two-terminal type chip capacitor that can be obtained as a commercially available part, and has terminal electrodes 4a and 4b. In the illustrated example, the terminal electrodes 4a and 4b are provided on the short side of the rectangular internal electrode. Hereinafter, the terminal electrode is simply referred to as “electrode part”.

このバイパス用コンデンサ4を実装する構造として、電源配線2上の所定領域位置に、一方の電極部4aを接続するコンデンサ実装用電源パッド5が設けられ、絶縁層1の上面上の所定位置に、他方の電極部4bを接続するコンデンサ実装用GNDパッド6が設けられている。このGNDパッド6は、グラウンド層接続用スルホール7を介してGND層3に接続されている。   As a structure for mounting this bypass capacitor 4, a capacitor mounting power supply pad 5 for connecting one electrode portion 4 a is provided at a predetermined region position on the power supply wiring 2, and at a predetermined position on the upper surface of the insulating layer 1, A capacitor mounting GND pad 6 for connecting the other electrode portion 4b is provided. The GND pad 6 is connected to the GND layer 3 through a ground layer connecting through hole 7.

図6は、図5に示すバイパス用コンデンサを実装したプリント配線板の等価回路を示す回路図である。図6において、絶縁層1を挟んで対向する電源導体20およびグラウンド導体21は、それぞれ、単位長毎にインダクタンスLlineが存在すると表され、電源導体20とグラウンド導体21との間には、単位長毎にキャパシタンスClineが存在すると表されるので、等価回路は、インダクタンスLlineとキャパシタンスClineとの直並列回路として表される。 FIG. 6 is a circuit diagram showing an equivalent circuit of a printed wiring board on which the bypass capacitor shown in FIG. 5 is mounted. In FIG. 6, the power supply conductor 20 and the ground conductor 21 that are opposed to each other with the insulating layer 1 interposed therebetween are represented as having an inductance L line for each unit length, and the unit between the power supply conductor 20 and the ground conductor 21 is a unit. Since the capacitance C line is present for each length, the equivalent circuit is represented as a series-parallel circuit of the inductance L line and the capacitance C line .

そして、バイパス用コンデンサ4の実装領域22では、電源導体20とグラウンド導体21との間に、キャパシタンスClineに代えてバイパス用コンデンサ4のキャパシタンスCcが挿入され、グラウンド導体21でのインダクタンスは、単位長当たりのインダクタンス(Lline/2+Lline/2)であるが、電源導体20でのインダクタンスは、バイパス用コンデンサ4の端子電極4aを電源配線2上に接続したので、バイパス用コンデンサ4の端子電極4aが有するインダクタンス(Lcap/2+Lcap/2)23と、単位長当たりのインダクタンス(Lline/2+Lline/2)24との並列回路となる。 In the mounting region 22 of the bypass capacitor 4, the capacitance Cc of the bypass capacitor 4 is inserted between the power supply conductor 20 and the ground conductor 21 instead of the capacitance C line , and the inductance of the ground conductor 21 is unit. Although the inductance per length (L line / 2 + L line / 2), the inductance in the power supply conductor 20 is such that the terminal electrode 4a of the bypass capacitor 4 is connected to the power supply wiring 2, and therefore the terminal electrode of the bypass capacitor 4 4a becomes a parallel circuit of an inductance (L cap / 2 + L cap / 2) 23 and an inductance (L line / 2 + L line / 2) 24 per unit length.

すなわち、図5に示すバイパス用のコンデンサの実装構造では、バイパス用コンデンサ4の実装領域22における電源配線2側では、電源配線2上に重畳される高周波ノイズの一部は、電源配線2によるインダクタンスLlineを流れるが、電源配線2によるインダクタンスLlineとバイパス用コンデンサ4の端子電極4aによるインダクタンスLcapとがほぼ同じ値になるので、バイパス性能がほぼ半分に劣化するという問題がある。 That is, in the bypass capacitor mounting structure shown in FIG. 5, a part of the high-frequency noise superimposed on the power supply wiring 2 on the power supply wiring 2 side in the mounting region 22 of the bypass capacitor 4 is an inductance caused by the power supply wiring 2. Although the L line flows, the inductance L line due to the power supply wiring 2 and the inductance L cap due to the terminal electrode 4a of the bypass capacitor 4 have substantially the same value, so that there is a problem that the bypass performance deteriorates to almost half.

次に、図7は、特許文献2に開示されている従来のバイパス用コンデンサの実装構造を備えたプリント配線板の電源ノイズフィルタ構造を示す斜視図である。図7では、電子部品が実装される絶縁層と電子部品への電源供給を行う電源配線が配設される絶縁層とが異なる場合への適用例が示されている。   Next, FIG. 7 is a perspective view showing a power supply noise filter structure of a printed wiring board provided with a conventional bypass capacitor mounting structure disclosed in Patent Document 2. FIG. FIG. 7 shows an application example when the insulating layer on which the electronic component is mounted and the insulating layer on which the power supply wiring for supplying power to the electronic component is different.

図7において、プリント配線板における2つの絶縁層30,31のうち、上側の絶縁層30の上面は、LSIやICなどの電子部品の実装面であり、上側の絶縁層30と下側の絶縁層31との間に、グラウンド層(GND層)32が配設され、下側の絶縁層31の下面に電源層33が配設されている。   In FIG. 7, of the two insulating layers 30 and 31 in the printed wiring board, the upper surface of the upper insulating layer 30 is a mounting surface for an electronic component such as LSI or IC, and the upper insulating layer 30 and the lower insulating layer are insulated. Between the layer 31, a ground layer (GND layer) 32 is disposed, and a power supply layer 33 is disposed on the lower surface of the lower insulating layer 31.

そして、LSIやICなどの電子部品の実装面である上側の絶縁層30の上面に、バイパス用コンデンサ4の一方の電極部4aを接続するコンデンサ実装用電源パッド34が設けられ、また他方の電極部4bを接続するコンデンサ実装用GNDパッド35が設けられている。コンデンサ実装用電源パッド34は、2つの絶縁層30,31に設けた電源層接続用スルホール36を介して電源層38に接続され、またコンデンサ実装用GNDパッド35は、絶縁層30に設けたグラウンド層接続用スルホール37を介してGND層32に接続されている。   A capacitor mounting power supply pad 34 for connecting one electrode portion 4a of the bypass capacitor 4 is provided on the upper surface of the upper insulating layer 30 which is a mounting surface of an electronic component such as LSI or IC, and the other electrode A capacitor mounting GND pad 35 for connecting the portion 4b is provided. The capacitor mounting power supply pad 34 is connected to the power supply layer 38 through the power supply layer connecting through hole 36 provided in the two insulating layers 30 and 31, and the capacitor mounting GND pad 35 is connected to the ground provided in the insulating layer 30. The layer connection through hole 37 is connected to the GND layer 32.

図8は、図7に示すバイパス用コンデンサを実装したプリント配線板の等価回路を示す回路図である。図8において、絶縁層31を挟んで対向する電源導体40およびグラウンド導体41は、それぞれ、単位長毎にインダクタンスLlineが存在すると表され、電源導体40とグラウンド導体41との間には、単位長毎にキャパシタンスClineが存在すると表されるので、等価回路は、図6と同様に、インダクタンスLlineとキャパシタンスClineとの直並列回路として表される。 FIG. 8 is a circuit diagram showing an equivalent circuit of the printed wiring board on which the bypass capacitor shown in FIG. 7 is mounted. In FIG. 8, the power supply conductor 40 and the ground conductor 41 that are opposed to each other with the insulating layer 31 interposed therebetween are each represented as having an inductance L line for each unit length, and the unit between the power supply conductor 40 and the ground conductor 41 is a unit. Since the capacitance C line is present for each length, the equivalent circuit is represented as a series-parallel circuit of the inductance L line and the capacitance C line , as in FIG.

そして、バイパス用コンデンサ4の実装領域42では、電源導体40とグラウンド導体41との間に、電源層接続用スルホール36のインダクタンス(LTH)43と、バイパス用コンデンサ4のキャパシタンス(Cc)44と、グラウンド層接続用スルホール37のインダクタンス(LTH)45との直列回路が挿入された形になる。 In the mounting region 42 of the bypass capacitor 4, the inductance (L TH ) 43 of the power layer connecting through hole 36 and the capacitance (Cc) 44 of the bypass capacitor 4 are provided between the power supply conductor 40 and the ground conductor 41. A series circuit with the inductance (L TH ) 45 of the through hole 37 for ground layer connection is inserted.

すなわち、図7に示すバイパス用のコンデンサ実装構造では、電源層接続用スルホール36のインダクタンス(LTH)43とグラウンド層接続用スルホール37のインダクタンス(LTH)45とが追加されるので、バイパス用コンデンサ4の高周波インピーダンスが増加することになり、高周波ノイズがバイパス用コンデンサ4を流れ難くなり、バイパス性能が劣化するという問題がある。 That is, in the capacitor mounting structure for the bypass shown in Figure 7, since the inductance (L TH) 45 inductance of the power supply layer connecting through hole 36 (L TH) 43 the ground layer connection through-holes 37 are added, bypass As a result, the high frequency impedance of the capacitor 4 increases, and it becomes difficult for high frequency noise to flow through the bypass capacitor 4, thereby deteriorating the bypass performance.

そこで、この発明にかかるプリント配線板の電源ノイズフィルタ構造が備えるバイパス用コンデンサの実装構造は、上記のようにバイパス性能の向上が図れる構造とした。以下に図面を参照して、この発明にかかるプリント配線板の電源ノイズフィルタ構造の好適な実施の形態を詳細に説明する。   Therefore, the bypass capacitor mounting structure included in the power supply noise filter structure of the printed wiring board according to the present invention has a structure capable of improving the bypass performance as described above. Exemplary embodiments of a power supply noise filter structure for a printed wiring board according to the present invention will be described below in detail with reference to the drawings.

実施の形態1.
図1は、この発明の実施の形態1によるバイパス用コンデンサの実装構造を備えたプリント配線板の電源ノイズフィルタ構造を示す斜視図である。なお、図1では、説明の便宜から、図5(従来例)に示した構成要素と同一ないしは同等である構成には、同一の符号を付してある。ここでは、この実施の形態1に関わる部分を中心に説明する。
Embodiment 1 FIG.
1 is a perspective view showing a power supply noise filter structure of a printed wiring board having a bypass capacitor mounting structure according to Embodiment 1 of the present invention. In FIG. 1, for the convenience of explanation, the same or equivalent components as those shown in FIG. 5 (conventional example) are denoted by the same reference numerals. Here, the description will focus on the parts related to the first embodiment.

図5にて説明したように、電源配線2にバイパス用コンデンサ4の電極部4aを接続すると、電源配線2の一方端から他方端に向かう高周波ノイズは、電源配線2側とバイパス用コンデンサ4の電極部4a側とに分流するので、バイパス性能が劣化する。   As described in FIG. 5, when the electrode portion 4 a of the bypass capacitor 4 is connected to the power supply wiring 2, high-frequency noise from one end of the power supply wiring 2 to the other end is generated between the power supply wiring 2 side and the bypass capacitor 4. Since the current is diverted to the electrode part 4a side, the bypass performance deteriorates.

そこで、図1に示すように、この実施の形態1によるバイパス用コンデンサの実装構造は、図5に示した構成において、電源配線2を、バイパス用コンデンサ4の一方の電極部4aの実装箇所において、電極部4aの長さよりも短い間隔を置いて離間する電源配線2aと電源配線2bとに分割して構成し、電源配線2a,2bの対向する分割端側の配線上面に、電極部4aを接続するコンデンサ実装用電源パッド5a,5bをそれぞれ設け、電極部4aが、電源配線2a,2bの対向する分割端間を接続するようにしている。   Therefore, as shown in FIG. 1, the mounting structure of the bypass capacitor according to the first embodiment is the same as that shown in FIG. 5 except that the power supply wiring 2 is connected to the place where one electrode portion 4a of the bypass capacitor 4 is mounted. The power supply wiring 2a and the power supply wiring 2b are spaced apart from each other with a distance shorter than the length of the electrode part 4a, and the electrode part 4a is formed on the upper surface of the wiring on the divided end side facing the power supply wirings 2a and 2b. Capacitor mounting power supply pads 5a and 5b to be connected are provided, respectively, and the electrode portion 4a connects between the opposed divided ends of the power supply wirings 2a and 2b.

この構造によれば、例えば、電源配線2aに図示しないLSIやICが接続され、電源配線2bに電源供給元が接続されているとすれば、LSIやICが放射する高周波ノイズが電源配線2a側から電源配線2b側へ伝導する場合、その高周波ノイズは、全てバイパス用コンデンサ4の電極部4aを流れるので、当該高周波ノイズを、内部電極を通り電極部4bからGND層3へバイパスする性能が従来例(図5)よりも向上する。しかし、この構造では、バイパスコンデンサ4の剥離などがあると、電源配線2aと電源配線2bとの間の導通が得られなくなる事態が発生する。   According to this structure, for example, if an LSI or IC (not shown) is connected to the power supply wiring 2a and a power supply source is connected to the power supply wiring 2b, the high-frequency noise radiated from the LSI or IC is generated on the power supply wiring 2a side. When all the high-frequency noise is conducted to the power supply wiring 2b side, the high-frequency noise flows through the electrode portion 4a of the bypass capacitor 4. Therefore, the conventional high-frequency noise is bypassed from the electrode portion 4b to the GND layer 3 through the internal electrode. This is an improvement over the example (FIG. 5). However, in this structure, when the bypass capacitor 4 is peeled off, a situation occurs in which the continuity between the power supply wiring 2a and the power supply wiring 2b cannot be obtained.

このような電源配線2aと電源配線2bとの間の導通が得られなくなる事態を回避するため、分割した電源配線2a,2b間を別の接続用導体で接続すると、高周波ノイズは、バイパスコンデンサ4の電極部4aと別の接続用導体とに分流するので、バイパス性能が低下する。したがって、電源配線2aと電源配線2bとの間の導通が得られなくなる事態を回避しつつバイパス性能の向上を図るには、別の接続用導体の高周波インピーダンスがバイパスコンデンサ4の電極部4aよりも大きくなるようにして、高周波ノイズがバイパスコンデンサ4の電極部4aをより多く流れるようにすれば良い。   In order to avoid such a situation that the continuity between the power supply wiring 2a and the power supply wiring 2b cannot be obtained, when the divided power supply wirings 2a and 2b are connected by another connection conductor, the high frequency noise is generated by the bypass capacitor 4. Since the current is divided between the electrode portion 4a and another connecting conductor, the bypass performance is lowered. Therefore, in order to improve the bypass performance while avoiding the situation where the continuity between the power supply wiring 2a and the power supply wiring 2b cannot be obtained, the high frequency impedance of another connecting conductor is higher than that of the electrode portion 4a of the bypass capacitor 4. What is necessary is just to make it increase so that more high frequency noise may flow through the electrode part 4a of the bypass capacitor 4.

そこで、図1に示すように、この実施の形態1によるバイパス用コンデンサの実装構造は、その別の接続用導体として、分割した電源配線2a,2b間を同じ電子部品実装面上において別の経路を通って接続する電源配線の迂回パターン(迂回電源配線)8を設けてある。電源配線の迂回パターン8は、できるだけ大きな迂回経路が採れるように、迂回用電源配線8a,8b,8cで構成されている。   Therefore, as shown in FIG. 1, the bypass capacitor mounting structure according to the first embodiment has another path between the divided power supply wirings 2a and 2b on the same electronic component mounting surface as another connecting conductor. A detour pattern (detour power supply wiring) 8 of the power supply wiring connected through is provided. The power supply wiring detour pattern 8 is composed of detour power wiring lines 8a, 8b, and 8c so that a detour path as large as possible can be taken.

図2は、図1に示すバイパス用コンデンサを実装したプリント配線板の等価回路を示す回路図である。図2において、電源導体10は、絶縁層1の電子部品実装面に配設される電源配線2a,2bおよびバイパス用コンデンサ4の電極部4aと、バイパス用コンデンサ4の電極部4aに並列する電源配線の迂回パターン8とで構成される。グラウンド導体11は、絶縁層1の他方の層面に配設されるGND層3である。   FIG. 2 is a circuit diagram showing an equivalent circuit of the printed wiring board on which the bypass capacitor shown in FIG. 1 is mounted. In FIG. 2, a power supply conductor 10 includes power supply wires 2 a and 2 b disposed on the electronic component mounting surface of the insulating layer 1, an electrode portion 4 a of the bypass capacitor 4, and a power supply parallel to the electrode portion 4 a of the bypass capacitor 4. It is comprised with the detouring pattern 8 of wiring. The ground conductor 11 is a GND layer 3 disposed on the other layer surface of the insulating layer 1.

電源導体10における電源配線2a,2bに対応する部分およびグラウンド導体11では、単位長毎にインダクタンスLlineが存在すると表され、電源導体10における電源配線2a,2bに対応する部分とグラウンド導体11との間には、単位長毎にキャパシタンスClineが存在すると表される。 In the portion corresponding to the power supply wirings 2a and 2b and the ground conductor 11 in the power supply conductor 10, it is represented that the inductance L line exists for each unit length, and the portion corresponding to the power supply wirings 2a and 2b in the power supply conductor 10 and the ground conductor 11 In between, it is expressed that there is a capacitance C line for each unit length.

そして、バイパス用コンデンサ4の実装領域12では、電源導体10とグラウンド導体11との間に、キャパシタンスClineに代えてバイパス用コンデンサ4のキャパシタンスCcが挿入され、グラウンド導体11でのインダクタンスは、単位長当たりのインダクタンス(Lline/2+Lline/2)であるが、電源導体10でのインダクタンスは、バイパス用コンデンサ4の電極部4aが有するインダクタンス(Lcap/2+Lcap/2)13に対して、電源配線の迂回パターン8における迂回用電源配線8aのインダクタンス(Lline+Lline)14と、迂回用電源配線8bのインダクタンス(Lline+Lline)15と、迂回用電源配線8cのインダクタンス(Lline+Lline)16との直列回路が並列接続される形となる。 In the mounting region 12 of the bypass capacitor 4, the capacitance Cc of the bypass capacitor 4 is inserted between the power supply conductor 10 and the ground conductor 11 instead of the capacitance C line , and the inductance of the ground conductor 11 is expressed in units. Although the inductance per length (L line / 2 + L line / 2), the inductance of the power supply conductor 10 is smaller than the inductance (L cap / 2 + L cap / 2) 13 of the electrode portion 4 a of the bypass capacitor 4. a power supply wiring bypass power supply lines 8a of the inductance in the detour pattern 8 of the (L line + L line) 14 , and the inductance of the bypass supply line 8b (L line + L line) 15, the inductance of the bypass power line 8c (L line + L line) A series circuit of the 6 is shaped to be connected in parallel.

これらのインダクタンスLと、周波数Fと、インピーダンスZとの関係は、式(1)で表される。
Z=2πFL …(1)
The relationship among these inductance L, frequency F, and impedance Z is expressed by equation (1).
Z = 2πFL (1)

すなわち、周波数F=0である場合は、インピーダンスZ=0となり、直流成分については、インダクタンスLの影響を受けない。また、高周波になるほど、インピーダンスZは増加し、インダクタンスLの増加によりインピーダンスZは更に増加する。   That is, when the frequency F = 0, the impedance Z = 0, and the DC component is not affected by the inductance L. Further, as the frequency becomes higher, the impedance Z increases, and the impedance Z further increases as the inductance L increases.

電源配線の迂回パターン8では、経路長を長くしてインダクタンス成分を増加させ得るので、高周波インピーダンスを高くすることができ、高周波ノイズを流れ難くすることができる。但し、本来必要な直流電源の供給は、このインダクタンスの影響を受けない。   In the bypass pattern 8 of the power supply wiring, the path length can be increased to increase the inductance component, so that the high-frequency impedance can be increased and the high-frequency noise can be made difficult to flow. However, the supply of the originally necessary DC power is not affected by this inductance.

これに対して、バイパス用コンデンサ4の電極部4aの長さは、可変できないので、そのインダクタンス13は小さいままであり、高周波インピーダンスは、電源配線の迂回パターン8側よりも低くなり、高周波ノイズを流れ易くする。   On the other hand, since the length of the electrode portion 4a of the bypass capacitor 4 cannot be changed, the inductance 13 remains small, and the high frequency impedance is lower than that of the bypass pattern 8 side of the power supply wiring, and high frequency noise is reduced. Make it easy to flow.

つまり、電源配線の迂回パターン8は、バイパス用コンデンサ4の電極部4aとのインピーダンス比率(分流比)を、高周波ノイズがバイパス用コンデンサ4の電極部4a側をより多く流れる比率となるように、インダクタンス成分がバイパス用コンデンサ4の電極部4aよりも大きくなり、高周波インピーダンスがバイパス用コンデンサ4の電極部4aよりも大きくなるように配設経路を選択してあるので、電源配線2aと電源配線2bとの間の導通が得られなくなる事態発生を回避する電源配線の迂回パターン8を設けても、高周波ノイズのGND層3へのバイパス性能を低下させずに高めることができる。   That is, the bypass pattern 8 of the power supply wiring has an impedance ratio (diversion ratio) with the electrode part 4a of the bypass capacitor 4 such that high-frequency noise flows more on the electrode part 4a side of the bypass capacitor 4. Since the arrangement path is selected so that the inductance component is larger than the electrode portion 4a of the bypass capacitor 4 and the high frequency impedance is larger than the electrode portion 4a of the bypass capacitor 4, the power supply wiring 2a and the power supply wiring 2b are selected. Even if the bypass pattern 8 of the power supply wiring that avoids the occurrence of the situation in which the continuity with the power supply cannot be obtained is provided, the bypass performance of the high frequency noise to the GND layer 3 can be improved without deteriorating.

以上のように、実施の形態1によれば、LSIやICへの電源供給を行う電源配線を2分割し、分割した電源配線間を、バイパス用コンデンサの一方の電極部で接続するとともに、バイパス用コンデンサの電極部が有する高周波インピーダンスよりも大きな高周波インピーダンスを実現する迂回電源配線で接続するようにしたので、バイパス用コンデンサの剥離など、分割した電源配線間の導通が得られなくなる事態発生を回避しつつバイパス性能の向上を図ることができ、電源供給系に重畳される高周波ノイズに対する抑制効果の向上が図れるプリント配線板の電源ノイズフィルタ構造が実現できる。   As described above, according to the first embodiment, the power supply wiring for supplying power to the LSI or IC is divided into two parts, and the divided power supply wirings are connected by one electrode portion of the bypass capacitor, and the bypass is bypassed. Since the connection is made with a bypass power supply wiring that realizes a high-frequency impedance larger than the high-frequency impedance of the electrode part of the capacitor for the capacitor, it is possible to avoid the situation where conduction between the divided power supply wirings cannot be obtained, such as separation of the bypass capacitor However, it is possible to improve the bypass performance, and to realize a power supply noise filter structure of a printed wiring board that can improve the suppression effect against high frequency noise superimposed on the power supply system.

なお、図1では明示してないが、絶縁層1は、多層基板において、電子部品実装面である一方の層面に電子部品への電源供給を行う電源配線が配設され、他方の層面にグラウンド層が配設される1つの絶縁層であってもよい。   Although not clearly shown in FIG. 1, in the multilayer substrate, the insulating layer 1 is provided with a power supply wiring for supplying power to the electronic component on one layer surface which is an electronic component mounting surface, and a ground surface on the other layer surface. There may be one insulating layer on which the layer is disposed.

実施の形態2.
図3は、この発明の実施の形態2によるバイパス用コンデンサの実装構造を備えたプリント配線板の電源ノイズフィルタ構造を示す斜視図である。なお、図3では、図1(実施の形態1)に示した構成要素と同一ないしは同等である構成要素には同一の符号が付されている。ここでは、この実施の形態2に関わる部分を中心に説明する。
Embodiment 2. FIG.
3 is a perspective view showing a power supply noise filter structure of a printed wiring board provided with a bypass capacitor mounting structure according to Embodiment 2 of the present invention. In FIG. 3, the same reference numerals are given to components that are the same as or equivalent to the components shown in FIG. 1 (Embodiment 1). Here, the description will be focused on the portion related to the second embodiment.

図3に示すように、この実施の形態2によるバイパス用コンデンサの実装構造は、図1(実施の形態1)に示した構成において、バイパス用コンデンサ4に代えてバイパス用コンデンサ9が設けられている。   As shown in FIG. 3, the bypass capacitor mounting structure according to the second embodiment includes a bypass capacitor 9 in place of the bypass capacitor 4 in the configuration shown in FIG. 1 (Embodiment 1). Yes.

バイパス用コンデンサ9は、バイパス用コンデンサ4と同様に、市販部品として入手できる2端子タイプのチップコンデンサであるが、電極部9a,9bが、長方形形状をした内部電極の長辺側に設けられている。したがって、電源配線2a,2bの分割端間の間隔は、図1(実施の形態1)に示した構成よりも長くなっている。   The bypass capacitor 9 is a two-terminal type chip capacitor that can be obtained as a commercially available part, similar to the bypass capacitor 4, but the electrode portions 9a and 9b are provided on the long side of the rectangular internal electrode. Yes. Therefore, the interval between the divided ends of power supply wirings 2a and 2b is longer than that shown in FIG. 1 (Embodiment 1).

実施の形態1では、言及しなかったが、電源配線2a,2bの分割端間には、必ず寄生キャパシタンスが存在している。したがって、図3に示すバイパス用コンデンサを実装したプリント配線板の等価回路は、図4に示すようになる。   Although not mentioned in the first embodiment, a parasitic capacitance always exists between the divided ends of the power supply wires 2a and 2b. Therefore, an equivalent circuit of the printed wiring board on which the bypass capacitor shown in FIG. 3 is mounted is as shown in FIG.

図4に示すように、バイパス用コンデンサ実装領域18では、電源導体10側は、電源配線2a,2b間の寄生キャパシタンス19が、バイパス用コンデンサ9の電極部9aが有するインダクタンス(Lcap/2+Lcap/2)13と、電源配線の迂回パターン8における、迂回用電源配線8aのインダクタンス(Lline+Lline)14、迂回用電源配線8bのインダクタンス(Lline+Lline)15および迂回用電源配線8cのインダクタンス(Lline+Lline)16の直列回路との並列回路に並列接続された形となる。 As shown in FIG. 4, in the bypass capacitor mounting region 18, the parasitic capacitance 19 between the power supply wires 2 a and 2 b is present on the power supply conductor 10 side, and the inductance (L cap / 2 + L cap) of the electrode portion 9 a of the bypass capacitor 9. / 2) In the bypass pattern 8 of the power supply line, the inductance (L line + L line ) 14 of the bypass power supply line 8a, the inductance (L line + L line ) 15 of the bypass power supply line 8b, and the bypass power supply line 8c The inductance (L line + L line ) 16 is connected in parallel to a parallel circuit with a series circuit.

この寄生キャパシタンス19は、電源配線2a,2bの分割端間の間隔が長くなると減少し、短くなると増加する。この寄生キャパシタンス19を寄生キャパシタンスCとすれば、或る周波数Fにおける寄生キャパシタンスCのインピーダンスZは、
Z=1/(2πFC) …(2)
と表される。
The parasitic capacitance 19 decreases as the distance between the divided ends of the power supply lines 2a and 2b increases, and increases as the distance between the divided ends decreases. If this parasitic capacitance 19 is a parasitic capacitance C, the impedance Z of the parasitic capacitance C at a certain frequency F is:
Z = 1 / (2πFC) (2)
It is expressed.

この式(1)は、次のようなことを示している。すなわち、周波数Fが同じであれば、寄生キャパシタンスCが大きいほどインピーダンスZが低下するので、寄生キャパシタンスCを高周波ノイズが伝送され易くなる。つまり、高周波ノイズが、寄生キャパシタンスCを通るルートが生ずるので、バイパス用コンデンサの電極部のインダクタンス13を通る割合が減少し、バイパス性能の劣化を招来する。   This equation (1) indicates the following. That is, if the frequency F is the same, the larger the parasitic capacitance C, the lower the impedance Z. Therefore, high-frequency noise is easily transmitted through the parasitic capacitance C. That is, since a route through which high-frequency noise passes through the parasitic capacitance C is generated, the ratio of passing through the inductance 13 of the electrode portion of the bypass capacitor is reduced, leading to deterioration of the bypass performance.

これに対して、寄生キャパシタンスCが小さいほどインピーダンスZが増加するので、寄生キャパシタンスCを高周波ノイズが伝送され難くなる。つまり、高周波ノイズが、バイパス用コンデンサの電極部のインダクタンス13を通る割合が増えるので、バイパス性能の向上が図れる。   On the other hand, since the impedance Z increases as the parasitic capacitance C decreases, it is difficult for high-frequency noise to be transmitted through the parasitic capacitance C. That is, since the ratio of high-frequency noise passing through the inductance 13 of the electrode portion of the bypass capacitor increases, the bypass performance can be improved.

要するに、この実施の形態2では、図3に示すように、電源配線2a,2bの分割端間の間隔を、実施の形態1よりも長くしたので、電源配線2a,2bの分割端間に生ずる寄生キャパシタンスCを小さくすることができる。したがって、高周波ノイズに対して、寄生キャパシタンスCのインピーダンスZが実施の形態1よりも大きくなるので、バイパス性能の更なる向上が図れる。   In short, in the second embodiment, as shown in FIG. 3, the interval between the divided ends of the power supply wirings 2a and 2b is made longer than that in the first embodiment, so that it occurs between the divided ends of the power supply wirings 2a and 2b. The parasitic capacitance C can be reduced. Therefore, since the impedance Z of the parasitic capacitance C becomes larger than that of the first embodiment with respect to the high frequency noise, the bypass performance can be further improved.

以上のように、この発明にかかるプリント配線板の電源ノイズフィルタ構造は、電源供給系に重畳される高周波ノイズに対する抑制効果の向上を図るのに有用である。   As described above, the power supply noise filter structure of the printed wiring board according to the present invention is useful for improving the effect of suppressing high frequency noise superimposed on the power supply system.

この発明の実施の形態1によるバイパス用コンデンサの実装構造を備えたプリント配線板の電源ノイズフィルタ構造を示す斜視図である。It is a perspective view which shows the power supply noise filter structure of the printed wiring board provided with the mounting structure of the bypass capacitor by Embodiment 1 of this invention. 図1に示すバイパス用コンデンサを実装したプリント配線板の等価回路を示す回路図である。It is a circuit diagram which shows the equivalent circuit of the printed wiring board which mounted the capacitor | condenser for bypass shown in FIG. この発明の実施の形態2によるバイパス用コンデンサの実装構造を備えたプリント配線板の電源ノイズフィルタ構造を示す斜視図である。It is a perspective view which shows the power supply noise filter structure of the printed wiring board provided with the mounting structure of the bypass capacitor by Embodiment 2 of this invention. 図3に示すバイパス用コンデンサを実装したプリント配線板の等価回路を示す回路図である。It is a circuit diagram which shows the equivalent circuit of the printed wiring board which mounted the capacitor | condenser for bypass shown in FIG. 特許文献1に開示されている従来のバイパス用コンデンサの実装構造を備えたプリント配線板の電源ノイズフィルタ構造を示す斜視図である。It is a perspective view which shows the power supply noise filter structure of the printed wiring board provided with the mounting structure of the conventional bypass capacitor currently disclosed by patent document 1. FIG. 図5に示すバイパス用コンデンサを実装したプリント配線板の等価回路を示す回路図である。FIG. 6 is a circuit diagram showing an equivalent circuit of a printed wiring board on which the bypass capacitor shown in FIG. 5 is mounted. 特許文献2に開示されている従来のバイパス用コンデンサの実装構造を備えたプリント配線板の電源ノイズフィルタ構造を示す斜視図である。It is a perspective view which shows the power supply noise filter structure of the printed wiring board provided with the mounting structure of the conventional bypass capacitor currently disclosed by patent document 2. FIG. 図7に示すバイパス用コンデンサを実装したプリント配線板の等価回路を示す回路図である。It is a circuit diagram which shows the equivalent circuit of the printed wiring board which mounted the capacitor | condenser for bypass shown in FIG.

符号の説明Explanation of symbols

1 絶縁層
2a,2b 分割した電源配線
3 グラウンド(GND)層
4 バイパス用コンデンサ(2端子タイプのチップコンデンサ:短辺側に電極部)
4a,4b 端子電極(電極部)
5a,5b コンデンサ実装用電源パッド
6 コンデンサ実装用GNDパッド
7 GND層接続用スルホール
8 電源配線の迂回パターン(迂回電源配線)
8a,8b,8c 迂回用電源配線
9 バイパス用コンデンサ(2端子タイプのチップコンデンサ:長辺側に電極部)
9a,9b 端子電極(電極部)
DESCRIPTION OF SYMBOLS 1 Insulation layer 2a, 2b Divided power supply wiring 3 Ground (GND) layer 4 Bypass capacitor (2-terminal type chip capacitor: electrode part on short side)
4a, 4b Terminal electrode (electrode part)
5a, 5b Power supply pad for capacitor mounting 6 GND pad for capacitor mounting 7 Through hole for GND layer connection 8 Detour pattern of power supply wiring (detour power supply wiring)
8a, 8b, 8c Bypass power supply wiring 9 Bypass capacitor (2-terminal type chip capacitor: electrode part on long side)
9a, 9b Terminal electrode (electrode part)

Claims (3)

電子部品実装面である一方の層面に電子部品への電源供給を行う電源配線が配設され、他方の層面にグラウンド層が配設される絶縁層を備えるプリント配線板における、2端子タイプのバイパス用コンデンサの一方の端子電極を前記電源配線に接続し、他方の端子電極を前記絶縁層に設けたグラウンドパッドおよびスルホールを介して前記グラウンド層に接続する電源ノイズフィルタ構造であって、
前記電源配線は、前記2端子タイプのバイパス用コンデンサの端子電極の長さよりも短い間隔を置いて離間する第1の電源配線と第2の電源配線とに分割して構成され、
前記第1および第2の電源配線の対向する分割端側の配線上面に、前記バイパス用コンデンサの端子電極を接続するパッドがそれぞれ設けられているとともに、
前記第1および第2の電源配線の対向する分割端間を接続する迂回電源配線が、同じ前記電子部品実装面において前記第1および第2の電源配線の配設経路とは異なる経路を通って配設されている、
ことを特徴とするプリント配線板の電源ノイズフィルタ構造。
A two-terminal type bypass in a printed wiring board having an insulating layer in which a power supply wiring for supplying power to an electronic component is disposed on one layer surface, which is an electronic component mounting surface, and a ground layer is disposed on the other layer surface A power supply noise filter structure in which one terminal electrode of a capacitor for use is connected to the power supply wiring, and the other terminal electrode is connected to the ground layer through a ground pad and a through hole provided in the insulating layer,
The power supply wiring is configured to be divided into a first power supply wiring and a second power supply wiring that are separated by a distance shorter than the length of the terminal electrode of the two-terminal type bypass capacitor.
Pads for connecting the terminal electrodes of the bypass capacitors are respectively provided on the upper surfaces of the opposing divided ends of the first and second power supply wires, and
A detour power supply line connecting between the divided ends facing each other of the first and second power supply lines passes through a different path from the arrangement path of the first and second power supply lines on the same electronic component mounting surface. Arranged,
A power supply noise filter structure for a printed wiring board.
前記2端子タイプのバイパス用コンデンサの端子電極は、内部電極の長辺側に設けられていることを特徴とする請求項1に記載のプリント配線板の電源ノイズフィルタ構造。   2. The power supply noise filter structure for a printed wiring board according to claim 1, wherein a terminal electrode of the two-terminal type bypass capacitor is provided on a long side of the internal electrode. 前記迂回電源配線は、前記2端子タイプのバイパス用コンデンサの端子電極が有する高周波インピーダンスよりも大きな高周波インピーダンスを実現する経路を選択して配設されていることを特徴とする請求項1または2に記載のプリント配線板の電源ノイズフィルタ構造。   3. The bypass power supply wiring is arranged by selecting a path that realizes a high frequency impedance larger than a high frequency impedance of a terminal electrode of the two-terminal type bypass capacitor. The power supply noise filter structure of the printed wiring board as described.
JP2007172086A 2007-06-29 2007-06-29 Power source noise filtering structure of printed wiring board Pending JP2009010273A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007172086A JP2009010273A (en) 2007-06-29 2007-06-29 Power source noise filtering structure of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007172086A JP2009010273A (en) 2007-06-29 2007-06-29 Power source noise filtering structure of printed wiring board

Publications (1)

Publication Number Publication Date
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JP2007172086A Pending JP2009010273A (en) 2007-06-29 2007-06-29 Power source noise filtering structure of printed wiring board

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103531552A (en) * 2013-10-25 2014-01-22 深圳市华星光电技术有限公司 Chip structure and circuit structure
WO2021029558A1 (en) * 2019-08-09 2021-02-18 Samsung Electronics Co., Ltd. Printed circuit board including auxiliary power supply and electronic apparatus including the same
CN114585153A (en) * 2020-12-02 2022-06-03 辉达公司 Circuit board, electronic equipment and computing system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103531552A (en) * 2013-10-25 2014-01-22 深圳市华星光电技术有限公司 Chip structure and circuit structure
US9345124B2 (en) 2013-10-25 2016-05-17 Shenzhen China Star Optoelectronics Technology Co., Ltd. Chip and circuit structure
WO2021029558A1 (en) * 2019-08-09 2021-02-18 Samsung Electronics Co., Ltd. Printed circuit board including auxiliary power supply and electronic apparatus including the same
US11184973B2 (en) 2019-08-09 2021-11-23 Samsung Electronics Co., Ltd. Printed circuit board including auxiliary power supply and electronic apparatus including the same
CN114585153A (en) * 2020-12-02 2022-06-03 辉达公司 Circuit board, electronic equipment and computing system

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