JP2008539653A5 - - Google Patents

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Publication number
JP2008539653A5
JP2008539653A5 JP2008508835A JP2008508835A JP2008539653A5 JP 2008539653 A5 JP2008539653 A5 JP 2008539653A5 JP 2008508835 A JP2008508835 A JP 2008508835A JP 2008508835 A JP2008508835 A JP 2008508835A JP 2008539653 A5 JP2008539653 A5 JP 2008539653A5
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JP
Japan
Prior art keywords
node
signal
coupled
output signal
input signal
Prior art date
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Application number
JP2008508835A
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English (en)
Japanese (ja)
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JP4611421B2 (ja
JP2008539653A (ja
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Publication date
Priority claimed from US11/118,230 external-priority patent/US7684518B2/en
Application filed filed Critical
Publication of JP2008539653A publication Critical patent/JP2008539653A/ja
Publication of JP2008539653A5 publication Critical patent/JP2008539653A5/ja
Application granted granted Critical
Publication of JP4611421B2 publication Critical patent/JP4611421B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2008508835A 2005-04-28 2006-02-28 論理しきい値取得回路および逆ピーク検出器を使用する方法 Expired - Fee Related JP4611421B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/118,230 US7684518B2 (en) 2005-04-28 2005-04-28 Logic threshold acquisition circuits and methods using reversed peak detectors
PCT/US2006/007115 WO2006118644A2 (en) 2005-04-28 2006-02-28 Logic threshold acquisition circuits and methods using reversed peak detectors

Publications (3)

Publication Number Publication Date
JP2008539653A JP2008539653A (ja) 2008-11-13
JP2008539653A5 true JP2008539653A5 (enExample) 2009-04-16
JP4611421B2 JP4611421B2 (ja) 2011-01-12

Family

ID=37234402

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008508835A Expired - Fee Related JP4611421B2 (ja) 2005-04-28 2006-02-28 論理しきい値取得回路および逆ピーク検出器を使用する方法

Country Status (4)

Country Link
US (1) US7684518B2 (enExample)
JP (1) JP4611421B2 (enExample)
CN (1) CN101584168B (enExample)
WO (1) WO2006118644A2 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100972033B1 (ko) * 2008-08-13 2010-07-23 한국전자통신연구원 전치 증폭기와 후치 증폭기가 단일로 집적된 기가비트 수동형 광 네트워크용 버스트 모드 수신기
US20100040099A1 (en) * 2008-08-13 2010-02-18 Emcore Corporation Bias Signal Generation for a Laser Transmitted in a Passive Optical Network
CN102832956B (zh) * 2011-06-16 2016-01-20 晨星软件研发(深圳)有限公司 包络检测器与相关方法

Family Cites Families (25)

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US5021747A (en) * 1989-11-22 1991-06-04 Harris Semiconductor Patents, Inc. Symmetrical variable impedance apparatus employing MOS transistors
US5120995A (en) * 1991-05-29 1992-06-09 Motorola, Inc. Switched peak detector
JPH07244091A (ja) 1994-03-02 1995-09-19 Fujitsu Ltd 信号検出回路及びノイズ測定回路
JP3340341B2 (ja) * 1996-10-03 2002-11-05 沖電気工業株式会社 レベル識別回路
JPH10190385A (ja) * 1996-12-27 1998-07-21 Matsushita Electric Ind Co Ltd 増幅回路ユニットおよび増幅回路
FR2760845B1 (fr) * 1997-03-11 1999-05-14 Electricite De France Dispositif de controle de l'emission de courants porteurs sur un reseau bt
US6051998A (en) * 1998-04-22 2000-04-18 Mitsubishi Semiconductor America, Inc. Offset-compensated peak detector with output buffering
US6359941B1 (en) * 1998-04-30 2002-03-19 Lucent Technologies Inc. System and method for improved reference threshold setting in a burst mode digital data receiver
US6107840A (en) * 1998-12-18 2000-08-22 Texas Instruments Incorporated Method and apparatus for eliminating asymmetry error in servo de-modulation using peak-to-peak detection of servo burst amplitudes
US6381270B1 (en) * 1999-01-07 2002-04-30 Adc Telecommunications, Inc. Cable equalizer for AES digital audio data
JP3593646B2 (ja) * 1999-03-19 2004-11-24 富士通株式会社 バースト光送信回路
US6735260B1 (en) * 2000-04-17 2004-05-11 Texas Instruments Incorporated Adaptive data slicer
JP3967065B2 (ja) * 2000-06-12 2007-08-29 三菱電機株式会社 増幅回路
KR100381410B1 (ko) * 2000-08-23 2003-04-23 학교법인 한국정보통신학원 다단 궤환형 버스트모드 광수신기
US6549071B1 (en) * 2000-09-12 2003-04-15 Silicon Laboratories, Inc. Power amplifier circuitry and method using an inductance coupled to power amplifier switching devices
JP4342111B2 (ja) * 2001-01-30 2009-10-14 富士通マイクロエレクトロニクス株式会社 電流パルス受信回路
JP3788253B2 (ja) * 2001-03-12 2006-06-21 ソニー株式会社 データスライス回路
US20030099307A1 (en) * 2001-11-13 2003-05-29 Narad Networks, Inc. Differential slicer circuit for data communication
US20030092412A1 (en) * 2001-11-13 2003-05-15 Narad Networks, Inc Automatic gain control circuit with multiple input signals
JP3539952B2 (ja) * 2002-06-13 2004-07-07 沖電気工業株式会社 レベル識別回路
JP4267274B2 (ja) * 2002-08-28 2009-05-27 富士通マイクロエレクトロニクス株式会社 電源変動抑制装置、半導体装置及び電源変動抑制方法
KR100537901B1 (ko) * 2003-03-29 2005-12-20 한국전자통신연구원 버스트 모드 광 수신기
US7113749B2 (en) * 2003-07-18 2006-09-26 International Business Machines Corporation System and method for measuring a high speed signal
US7145373B2 (en) * 2004-07-29 2006-12-05 Intel Corporation Frequency-controlled DLL bias
US7348808B2 (en) * 2005-04-27 2008-03-25 Pmc-Sierra, Inc. Method and apparatus for detection of high-speed electrical signals

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