JP2008270740A - 布製半導体素子のパッケージ、その取り付け方法およびその製造方法 - Google Patents
布製半導体素子のパッケージ、その取り付け方法およびその製造方法 Download PDFInfo
- Publication number
- JP2008270740A JP2008270740A JP2008043931A JP2008043931A JP2008270740A JP 2008270740 A JP2008270740 A JP 2008270740A JP 2008043931 A JP2008043931 A JP 2008043931A JP 2008043931 A JP2008043931 A JP 2008043931A JP 2008270740 A JP2008270740 A JP 2008270740A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- circuit board
- fabric
- printed circuit
- package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004744 fabric Substances 0.000 title claims abstract description 177
- 239000004065 semiconductor Substances 0.000 title claims abstract description 155
- 238000000034 method Methods 0.000 title claims description 26
- 238000004519 manufacturing process Methods 0.000 title claims description 23
- 239000004020 conductor Substances 0.000 claims abstract description 26
- 238000000465 moulding Methods 0.000 claims abstract description 23
- 238000000059 patterning Methods 0.000 claims abstract description 9
- 239000002759 woven fabric Substances 0.000 claims description 22
- 239000000835 fiber Substances 0.000 claims description 18
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 239000004593 Epoxy Substances 0.000 claims description 6
- JHIVVAPYMSGYDF-UHFFFAOYSA-N cyclohexanone Chemical compound O=C1CCCCC1 JHIVVAPYMSGYDF-UHFFFAOYSA-N 0.000 claims description 6
- 239000007788 liquid Substances 0.000 claims description 6
- 239000002904 solvent Substances 0.000 claims description 6
- 239000011248 coating agent Substances 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 4
- 238000007789 sealing Methods 0.000 claims description 4
- 239000004677 Nylon Substances 0.000 claims description 3
- 239000000853 adhesive Substances 0.000 claims description 3
- 230000001070 adhesive effect Effects 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 229920001778 nylon Polymers 0.000 claims description 3
- 229920000642 polymer Polymers 0.000 claims description 3
- 238000009958 sewing Methods 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 239000013077 target material Substances 0.000 claims description 3
- 239000004753 textile Substances 0.000 abstract 3
- 150000001875 compounds Chemical class 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/038—Textiles
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/0557—Disposition the external layer being disposed on a via connection of the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/061—Disposition
- H01L2224/0612—Layout
- H01L2224/0615—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
- H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0275—Fibers and reinforcement materials
- H05K2201/029—Woven fibrous reinforcement or textile
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10287—Metal wires as connectors or conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0221—Perforating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/14—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
- H05K3/143—Masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
- H05K3/326—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor the printed circuit having integral resilient or deformable parts, e.g. tabs or parts of flexible circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Textile Engineering (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
【解決手段】布製半導体素子のパッケージは、織布と、前記織布上に導電材をパターニングして形成されたリード部(lead)と、を有する布製印刷回路基板と、前記布製印刷回路基板のリード部に接続された電極部を有する半導体素子と、前記布製印刷回路基板と、前記半導体素子とを密封する成形部(molding)と、を含む。
【選択図】図1
Description
図7は、本発明の好ましい実施例に係る布製印刷回路基板100の形成方法を示したものである。
図9乃至11は本発明の好ましい実施例に係る、半導体素子と布製印刷回路基板とを接続させる(または、ボンドする)方法を示したものである。
図12は、本発明の好ましい実施例に係る、布製半導体素子のパッケージにおける成形部を形成する方法を示したものである。
110 リード部
200 半導体素子
210 電極部
220 ワイヤ
300 成形部
Claims (18)
- 織布と、前記織布上に導電材をパターニングして形成されたリード部(lead)と、を有する布製印刷回路基板と、
前記布製印刷回路基板のリード部に接続された電極部を有する半導体素子と、
前記布製印刷回路基板と、前記半導体素子とを密封する成形部(molding)と、
を含む布製半導体素子のパッケージ。 - 前記半導体素子の電極部と、前記布製印刷回路基板のリード部とが、ワイヤボンディングで接続されている請求項1に記載の布製半導体素子のパッケージ。
- 前記布製印刷回路基板は、リード部上に設けられた金属板を含んでおり、前記半導体の電極部と前記布製印刷回路基板の金属板とが、ワイヤボンディングで接続されている請求項1に記載の布製半導体素子のパッケージ。
- 前記半導体素子の電極部または前記布製印刷回路基板のリード部に突出部が設けられており、前記半導体素子の電極部と前記布製印刷回路基板のリード部とが、前記突出部を通じてフリップチップ接続されている請求項1に記載の布製半導体素子のパッケージ。
- 前記半導体素子が、半導体チップ、受動素子、および、集積回路チップセット(IC Chipset)からなる群から選ばれる1つ以上を含む請求項1に記載の布製半導体素子のパッケージ。
- 前記布製印刷回路基板にビアホール(via hole)が設けられ、前記成形部が前記ビアホールと前記布製印刷回路基板の上部および下部とに設けられ、前記布製印刷回路基板の上部に設けられた成形領域と、前記布製印刷回路基板の下部に設けられた成形領域が前記ビアホールに設けられた成形領域によって互いにつながっている請求項1に記載の布製半導体素子のパッケージ。
- 請求項1から6のいずれか一項に記載の布製半導体素子のパッケージの取り付け方法であって、前記布製印刷回路基板を、導電性繊維で縫って衣服に取り付けることを特徴とする布製半導体素子のパッケージの取り付け方法。
- 前記衣服に縫われた前記導電性繊維の導電体の一部が露出するようにレーザまたは刃物で前記導電性繊維の被膜を除去するステップと、
前記露出している導電体と前記布製印刷回路基板のリード部とを、導電性接着剤で接続させるステップと、
を含む請求項7に記載の布製半導体素子のパッケージの取り付け方法。 - 前記半導体素子が接続された前記布製印刷回路基板のリード部と、別の布製印刷回路基板のリードパターンとを、互いに接触させ、繊維で縫うステップを含む請求項7に記載の布製半導体素子のパッケージの取り付け方法。
- (a)織布上に導電材をパターニングしてリード部(lead)を形成することを含む、布製印刷回路基板を形成するステップ、
(b)半導体素子の電極部と、前記布製印刷回路基板のリード部とを接続させるステップ、および
(c)前記布製半導体素子のパッケージと前記半導体素子とを密封する成形部を形成するステップ
を含む布製半導体素子のパッケージの製造方法。 - 前記ステップ(a)における前記リード部の形成では、前記織布上に前記リード部のパターンに対応するパターンを有するスクリーンマスクを配置し;そして、前記スクリーンマスクを通じて前記織布上に前記導電材を塗布することを含む請求項10に記載の布製半導体素子のパッケージの製造方法。
- 前記導電材が、銀、ポリマー、溶剤であるソルベント(solvent)、ナイロン(polyester)、および、シクロヘキサノン(cyclohexanone)を含む請求項11に記載の布製半導体素子のパッケージの製造方法。
- 前記ステップ(a)における前記リード部の形成では、スパッタリングガスを高真空状態でターゲット材と衝突させてプラズマを発生させ、前記プラズマを前記リード部のパターンに対応するパターンを有するマスクを通じて前記布製印刷回路基板に蒸着させることを含む請求項10に記載の布製半導体素子のパッケージの製造方法。
- 前記半導体素子が、半導体チップ、受動素子、および、集積回路チップセット(IC Chipset)からなる群から選ばれる1つ以上を含む請求項10に記載の布製半導体素子のパッケージの製造方法。
- 前記ステップ(b)では、前記布製印刷回路基板上に液状のエポキシを塗布し、前記エポキシが塗布された前記布製印刷回路基板上に前記半導体素子を接続させて、前記半導体素子の電極部にワイヤを接続させ、前記半導体素子の電極部に接続されたワイヤを前記布製印刷回路基板のリード部に接続させることを含む請求項10に記載の布製半導体素子のパッケージの製造方法。
- 前記ステップ(b)では、前記布製印刷回路基板上に金属板を設けて、前記金属板上に前記半導体素子を実装させ、前記金属板上に実装された前記半導体素子の電極部にワイヤを接続させ、前記半導体素子の電極部に接続されたワイヤを前記金属板に接続させることを含む請求項10に記載の布製半導体素子のパッケージの製造方法。
- 前記ステップ(b)では、前記布製印刷回路基板のリード部と、前記半導体素子の電極部とをフリップチップ接続させることを含む請求項10に記載の布製半導体素子のパッケージの製造方法。
- 前記ステップ(c)では、前記半導体素子が接続された前記布製印刷回路基板に複数の穴を形成させ、前記穴を通じて、前記半導体素子が接続された布製印刷回路基板の上部と下部とが互いにつながるように前記成形部を形成することを含む請求項10に記載の布製半導体素子のパッケージの製造方法。
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20070037792 | 2007-04-18 | ||
KR10-2007-0037792 | 2007-04-18 | ||
KR10-2008-0002949 | 2008-01-10 | ||
KR1020080002949A KR100894624B1 (ko) | 2007-04-18 | 2008-01-10 | 직물형 반도체 소자 패키지와 그 설치방법 및 제조방법 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011148235A Division JP2011205134A (ja) | 2007-04-18 | 2011-07-04 | 布製半導体素子のパッケージ及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008270740A true JP2008270740A (ja) | 2008-11-06 |
JP4813506B2 JP4813506B2 (ja) | 2011-11-09 |
Family
ID=39777681
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008043931A Active JP4813506B2 (ja) | 2007-04-18 | 2008-02-26 | 布製半導体素子のパッケージおよびその製造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7638885B2 (ja) |
JP (1) | JP4813506B2 (ja) |
DE (1) | DE102008011187A1 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011193001A (ja) * | 2010-03-16 | 2011-09-29 | Korea Electronics Telecommun | 織物型電子素子パッケージ及びその製造方法と織物型電子素子パッケージの実装方法 |
JP2012024560A (ja) | 2010-07-20 | 2012-02-09 | King's Metal Fiber Technologies Co Ltd | 電子ボタン及び発光ダイオードボタンモジュール |
JP2015165307A (ja) * | 2008-12-09 | 2015-09-17 | コーニンクレッカ フィリップス エヌ ヴェ | 可撓性モジュラアセンブリ |
JP2018090946A (ja) * | 2016-12-01 | 2018-06-14 | イー・アイ・デュポン・ドウ・ヌムール・アンド・カンパニーE.I.Du Pont De Nemours And Company | 着用可能品および他の物品用の電気的連結体 |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101051311B1 (ko) * | 2008-04-22 | 2011-07-22 | 한국과학기술원 | 직물형 입력장치 |
DE102009031568A1 (de) * | 2009-06-29 | 2010-12-30 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren zur Erzeugung eines elektronischen Systems, Verfahren zur Erzeugung einer Freiformfläche mit einem solchen System, sowie elektronisches System und Freiformflächen mit einem solchen System |
US9554465B1 (en) | 2013-08-27 | 2017-01-24 | Flextronics Ap, Llc | Stretchable conductor design and methods of making |
US9674949B1 (en) | 2013-08-27 | 2017-06-06 | Flextronics Ap, Llc | Method of making stretchable interconnect using magnet wires |
US10015880B1 (en) | 2013-12-09 | 2018-07-03 | Multek Technologies Ltd. | Rip stop on flex and rigid flex circuits |
US9338915B1 (en) | 2013-12-09 | 2016-05-10 | Flextronics Ap, Llc | Method of attaching electronic module on fabrics by stitching plated through holes |
US9659478B1 (en) | 2013-12-16 | 2017-05-23 | Multek Technologies, Ltd. | Wearable electronic stress and strain indicator |
US9253884B2 (en) * | 2013-12-20 | 2016-02-02 | Intel Corporation | Electronic fabric with incorporated chip and interconnect |
US9560746B1 (en) | 2014-01-24 | 2017-01-31 | Multek Technologies, Ltd. | Stress relief for rigid components on flexible circuits |
KR101596580B1 (ko) * | 2014-06-09 | 2016-02-23 | 삼성디스플레이 주식회사 | 스트레처블 디스플레이 및 그의 제조방법 |
US9336476B1 (en) | 2014-09-10 | 2016-05-10 | Flextronics Ap Llc | Method of making RFID devices on fabrics by stitching metal wires |
US20160346608A1 (en) * | 2015-05-27 | 2016-12-01 | GestureLogic Inc. | Garments having articles secured thereto and methods for securing the articles to the garments |
US10548219B2 (en) | 2015-10-16 | 2020-01-28 | Japan Science And Technology Agency | Stress relaxation substrate and textile type device |
GB201520882D0 (en) * | 2015-11-26 | 2016-01-13 | Mas Innovation Private Ltd | Device |
US10993635B1 (en) | 2016-03-22 | 2021-05-04 | Flextronics Ap, Llc | Integrating biosensor to compression shirt textile and interconnect method |
CN105662401B (zh) * | 2016-03-31 | 2018-07-13 | 杭州优体科技有限公司 | 一种生理参数测量t恤衫 |
DE102017214286A1 (de) * | 2017-08-16 | 2019-02-21 | Robert Bosch Gmbh | Textil- und/oder Bekleidungsvorrichtung |
CN108505221B (zh) * | 2018-04-17 | 2020-06-30 | 深圳智能量科技服饰有限公司 | 纺织品上芯片无焊固定方法 |
US10985484B1 (en) * | 2018-10-01 | 2021-04-20 | Flex Ltd. | Electronic conductive interconnection for bridging across irregular areas in a textile product |
JPWO2020213681A1 (ja) * | 2019-04-18 | 2020-10-22 | ||
DE102022109327A1 (de) | 2022-04-14 | 2023-10-19 | Ntt New Textile Technologies Gmbh | Verfahren zum Aufbringen von Elstomer und einem Kabel auf eine Stofflage |
DE102022109330A1 (de) | 2022-04-14 | 2023-10-19 | Ntt New Textile Technologies Gmbh | Verfahren zum Aufbringen von Elastomer und einem Kabel auf eine Stofflage |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0878565A (ja) * | 1994-09-01 | 1996-03-22 | Yamaha Corp | 半導体装置 |
JPH08511354A (ja) * | 1993-05-28 | 1996-11-26 | ファーバー,アンドルー,アール. | 導電性組成物を有する光、音および電流関連集成体、付属品および装置 |
JP2002231762A (ja) * | 2001-02-01 | 2002-08-16 | Toppan Forms Co Ltd | Icチップの実装方法とicチップ実装体 |
JP2003069216A (ja) * | 2001-08-29 | 2003-03-07 | Toppan Forms Co Ltd | 導電接続部同士の接続方法 |
JP2004015068A (ja) * | 2003-08-29 | 2004-01-15 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
US20060289469A1 (en) * | 2005-04-21 | 2006-12-28 | Noble Fiber Technologies Llc | Flexible electrically conductive circuits |
-
2008
- 2008-02-26 US US12/037,203 patent/US7638885B2/en active Active
- 2008-02-26 JP JP2008043931A patent/JP4813506B2/ja active Active
- 2008-02-26 DE DE102008011187A patent/DE102008011187A1/de not_active Withdrawn
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08511354A (ja) * | 1993-05-28 | 1996-11-26 | ファーバー,アンドルー,アール. | 導電性組成物を有する光、音および電流関連集成体、付属品および装置 |
JPH0878565A (ja) * | 1994-09-01 | 1996-03-22 | Yamaha Corp | 半導体装置 |
JP2002231762A (ja) * | 2001-02-01 | 2002-08-16 | Toppan Forms Co Ltd | Icチップの実装方法とicチップ実装体 |
JP2003069216A (ja) * | 2001-08-29 | 2003-03-07 | Toppan Forms Co Ltd | 導電接続部同士の接続方法 |
JP2004015068A (ja) * | 2003-08-29 | 2004-01-15 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
US20060289469A1 (en) * | 2005-04-21 | 2006-12-28 | Noble Fiber Technologies Llc | Flexible electrically conductive circuits |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015165307A (ja) * | 2008-12-09 | 2015-09-17 | コーニンクレッカ フィリップス エヌ ヴェ | 可撓性モジュラアセンブリ |
JP2011193001A (ja) * | 2010-03-16 | 2011-09-29 | Korea Electronics Telecommun | 織物型電子素子パッケージ及びその製造方法と織物型電子素子パッケージの実装方法 |
JP2012024560A (ja) | 2010-07-20 | 2012-02-09 | King's Metal Fiber Technologies Co Ltd | 電子ボタン及び発光ダイオードボタンモジュール |
JP2018090946A (ja) * | 2016-12-01 | 2018-06-14 | イー・アイ・デュポン・ドウ・ヌムール・アンド・カンパニーE.I.Du Pont De Nemours And Company | 着用可能品および他の物品用の電気的連結体 |
JP7017383B2 (ja) | 2016-12-01 | 2022-02-08 | イー・アイ・デュポン・ドウ・ヌムール・アンド・カンパニー | 着用可能品および他の物品用の電気的連結体 |
Also Published As
Publication number | Publication date |
---|---|
US7638885B2 (en) | 2009-12-29 |
DE102008011187A1 (de) | 2008-10-30 |
JP4813506B2 (ja) | 2011-11-09 |
US20080258314A1 (en) | 2008-10-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4813506B2 (ja) | 布製半導体素子のパッケージおよびその製造方法 | |
JP6857690B2 (ja) | 柔軟性入出力構成要素を備えた電子デバイス | |
US20230225056A1 (en) | Fabric With Embedded Electrical Components | |
JP7116129B2 (ja) | フレキシブルデバイス用ファブリック信号経路構造 | |
US8752285B2 (en) | Method for manufacturing a textile-type electronic component package | |
CN1717147B (zh) | 柔性布线基板及制法、配芯片的柔性布线基板及电子设备 | |
US7651886B2 (en) | Semiconductor device and manufacturing process thereof | |
US7025596B2 (en) | Method and apparatus for solder-less attachment of an electronic device to a textile circuit | |
CN110554739A (zh) | 一种防水电子装置及其制造方法 | |
JP2011205134A (ja) | 布製半導体素子のパッケージ及びその製造方法 | |
CN100492270C (zh) | 输入装置 | |
JPH0923051A (ja) | 表面取付形パッケージとして用いられるマイクロモジュール | |
CN108519794A (zh) | 一种移动终端 | |
CN106252345A (zh) | 指纹传感器模组及其制作方法 | |
KR101635520B1 (ko) | 전도성사와 제어기판의 접속구조와 그 접속방법 | |
US20060265870A1 (en) | Printed circuit board and printed circuit board manufacturing method | |
KR101913855B1 (ko) | 투명 인쇄회로기판과 이의 제조방법 및 이를 이용한 led 모듈 | |
KR101027312B1 (ko) | 직물형 인쇄회로기판을 이용한 디스플레이 장치 및 그제조방법 | |
CN106611752A (zh) | 芯片正背面之间的电性连接结构及其制造方法 | |
WO2003013201A1 (en) | Method for forming device-landing pad of multi-layered printed circuit board | |
Lauterbach et al. | Integrated microelectronics for smart textiles | |
JP2001217352A (ja) | 回路基板 | |
CN211236874U (zh) | 触控模组和具有其的电子装置 | |
JP3264251B2 (ja) | プリント配線板 | |
TW201816565A (zh) | 觸控模組及其製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20101112 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20101116 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110215 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110405 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110704 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20110802 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20110824 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 4813506 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140902 Year of fee payment: 3 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |