JP2008256678A - Socket board circulating structure of semiconductor device testing system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a socket board circulating structure of a semiconductor device testing system capable of conveying a socket board to each test unit. <P>SOLUTION: The socket board circulating structure at least comprises a first path of conveyance for conveying a socket board to a socket board loader for carrying the socket board into each test unit of a test chamber from a device loader for fitting a semiconductor device to each socket; a second path of conveyance for conveying a socket board to a socket board unloader for carrying out the socket board from each test unit; a third path of conveyance for conveying the socket board to the device unloader for removing each semiconductor device, fitted to each socket of the socket board from the socket board unloader; and a fourth path of conveyance for conveying the socket board from the device unloader to the device loader. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a socket board circulation structure in a semiconductor device test system for performing various characteristic tests of semiconductor devices.

  Conventionally, a thermostatic chamber that applies a desired high or low temperature stress to a semiconductor device to be tested, and a semiconductor device that has been subjected to thermal stress in the thermostatic chamber are brought into electrical contact with the test head. There is a semiconductor chamber test apparatus (also referred to as an IC test apparatus) provided with a test chamber for testing a physical characteristic and a heat removal tank for removing a given thermal stress from a semiconductor device tested in the test chamber.

  In such a semiconductor device test apparatus, in order to simultaneously test a plurality of semiconductor devices, a socket board having a plurality of sockets on which the semiconductor devices are mounted is used.

  Furthermore, the semiconductor device test apparatus is provided with a device loader for mounting a semiconductor device as a test target on each socket of the socket board, and a device unloader for removing the tested semiconductor device from each socket of the socket board. Yes.

  By the way, in the semiconductor device test apparatus as described above, in order to efficiently test a large number of semiconductor devices, a plurality of socket boards are prepared, and the device loader → the thermostat → the test chamber → the heat removal tank. → It is desirable to provide a socket board circulation structure for circulating each socket board in the order of the device unloader.

  A configuration example of a semiconductor device test apparatus having such a socket board circulation structure is disclosed in Japanese Patent No. 3412114.

  The semiconductor device test apparatus and the circulation structure will be described with reference to FIG.

  In the semiconductor device test apparatus S100 shown in FIG. 9, a device loader unit 501 is disposed in front of the thermostat 500, the test chamber 502 is connected to the lower orthogonal surface of the thermostat 500, and the heat removal tank is in front of the test chamber 502. 503 is arranged, and the device unloader unit 504 is arranged above the heat removal tank 503.

  In the figure, reference numeral SB denotes a socket board, reference numeral 505a denotes a general-purpose tray for holding the semiconductor device D to be tested, and reference numeral 505b denotes a general-purpose tray for holding the tested semiconductor device D.

  The circulation structure C100 provided in the semiconductor device test apparatus S100 includes a transport path R101 for transporting the socket board SB from the device loader unit 501 to the thermostat 500, a transport path R102 for transporting the thermostat bath 500 to the test chamber 502, and a test chamber. The conveyance path R103 conveys from 502 to the heat removal tank 503, and the conveyance path R104 conveys from the heat removal tank 503 to the device loader unit 501. In addition, illustration of conveyance apparatuses, such as an arm-type robot provided in each conveyance path R101-R104, is abbreviate | omitted.

Therefore, in this circulation structure C100, the socket boards SB are circulated in the semiconductor device test system by transporting the socket boards SB in the order of the transport paths R101 → R102 → R103 → R104 → R101 →. There was a merit that the semiconductor device D could be efficiently tested.
Japanese Patent No. 3412114

  However, recent semiconductor devices tend to require a longer time to test one semiconductor device as the density and circuit complexity of the semiconductor device increase, and the test is performed in a test chamber to reduce the test cost. It is desired to further improve the efficiency of semiconductor device testing.

  In addition, since there is a growing tendency for variable production of various types of semiconductor devices, there is an increasing need to frequently change test environments such as temperature conditions according to the types of semiconductor devices.

  In particular, in order to test a wide range of characteristics of various semiconductor devices at once, it is necessary to conduct tests under low and high temperature conditions. However, conventional semiconductor device test systems use high-temperature test equipment and low-temperature test equipment. It was common to prepare a separate test apparatus for use.

  That is, regarding the semiconductor device test apparatus S100 of FIG. 9, it is necessary to separately provide a thermostatic bath 500, a test chamber 502, a heat removal bath 503, etc. for high temperature and low temperature, respectively. The reason is that even if the high temperature tank 500 and the heat removal tank 503 have a structure that can be switched between high temperature and low temperature, respectively, for example, from a high temperature state of 100 ° C. to a low temperature state of −30 ° C. This is because a considerable amount of time including the time required for the switching process and the heat removal time is required for the transition, and thus it is not possible to satisfy the demand for further improvement in the test of other types of semiconductor devices as described above. .

  Furthermore, the conventional semiconductor device test apparatus S100 does not assume the transfer of the socket board SB between the test apparatuses. That is, regarding the semiconductor device test apparatus S100 of FIG. 9, the circulation of the socket board SB is completed in one test apparatus, and the socket board SB is transferred between two or more semiconductor device test apparatuses S100. That is not taken into account.

  Therefore, even when testing a larger number of semiconductor devices, there is no other way than simply arranging a plurality of semiconductor device test apparatuses S100 in parallel, and a device loader unit 501 and a device unloader are provided for each test apparatus S100. It is necessary to provide the section 504, and it is necessary to provide the transport paths R101 to R104 for each circulation structure C100. Considering the entire system for testing semiconductor devices, there is an overlapping apparatus, so an extra installation space is required. In other words, the equipment cost and the test cost were increased.

  Further, in the semiconductor device test apparatus S100 of FIG. 9, since the socket boards SB are tested one by one in the test chamber 502, there is a limit to increasing the test efficiency.

  In order to solve these problems, the present applicant has one or more socket boards having a plurality of sockets for holding a semiconductor device in a removable manner, and a slot-shaped test unit capable of storing the socket boards. Temperature adjusting means for adjusting the ambient temperature of the semiconductor device mounted in each socket of each socket board to a predetermined test environment temperature, and each semiconductor device provided for each test unit and mounted in each socket At least a device inspection means for testing electrical characteristics of each semiconductor device by conducting electrical continuity with the electrode terminals, a housing for housing each test unit and each means, and a control means for controlling each means A semiconductor device test system having a novel configuration having a test chamber provided therein is proposed.

  According to this semiconductor device test system, it is possible to perform the test continuously by switching the temperature condition from the low temperature range to the high temperature range, or from the high temperature range to the low temperature range, and to simultaneously test the semiconductor devices on a plurality of socket boards. In parallel, efficient testing can be performed.

  By the way, the conventional socket board circulation structure cannot be simply applied to such a semiconductor device test system.

  That is, the semiconductor device test system includes a plurality of slot-shaped test units, and it is necessary to consider a configuration for transporting the socket board to each test unit. In addition, the system includes two or more test chambers. In this case, it is necessary to consider a configuration capable of efficiently transferring the socket board between the test chambers.

  Therefore, the present invention can transport the socket board to each test unit, and can efficiently transport the socket board even when two or more test chambers are installed. An object of the present invention is to provide a socket board circulation structure of a semiconductor device test system that can reduce costs and test costs.

  In order to solve the above-described problem, the socket board circulation structure of the semiconductor device test system according to the invention of claim 1 can store one or more socket boards having a plurality of sockets that hold the semiconductor device in a removable manner. A test unit, temperature adjusting means for adjusting the ambient temperature of the semiconductor device mounted in each socket of each socket board to a predetermined test environment temperature, and provided for each test unit and mounted in each socket. A test chamber having device inspection means for conducting electrical continuity with the electrode terminals of each semiconductor device to test the electrical characteristics of each semiconductor device; and control means for controlling the temperature adjustment means and the device inspection means. A socket board circulation structure of a semiconductor device test system, each socket board each A first transfer path for transferring a socket board from a device loader for mounting a semiconductor device to a socket to a socket board loader for carrying the socket board into each test unit of the test chamber, and each test from the socket board loader A second conveyance path for conveying the socket board to the unit, a third conveyance path for conveying the socket board to the socket board unloader for unloading the socket board from each test unit, and each of the socket board from the socket board unloader. It comprises at least a fourth transport path for transporting a socket board to a device unloader for removing each semiconductor device attached to the socket, and a fifth transport path for transporting the socket board from the device unloader to the device loader. And

  In the socket board circulation structure of the semiconductor device test system according to the second aspect of the present invention, two or more test chambers are provided in parallel, and the socket board loader and socket board unloader are provided for each test chamber. A sixth transport path for sequentially transporting the socket boards between the board loaders in a direction away from the device loader, and a seventh transport path for sequentially transporting the socket boards between the socket board unloaders in a direction approaching the device unloader. It is further provided with the feature.

  According to a third aspect of the present invention, there is provided a semiconductor board test system socket board circulation structure, wherein the socket board loader and the socket board unloader each include moving means for sequentially moving to positions of the test chamber facing the test units. It is characterized by that.

  In the socket board circulation structure of the semiconductor device test system according to a fourth aspect of the invention, the test units are arranged in a plurality of stages in the vertical direction, and the moving means moves up and down the socket board loader and the socket board unloader. It is characterized by comprising.

  In the socket board circulation structure of the semiconductor device test system according to the fifth aspect of the present invention, an accessory device for supplying at least one of a power source, a refrigerant, and a heat medium to each of the test chambers is provided next to each other, and the fifth transport path and At least one of the sixth transport paths is provided above or below the attachment device.

  In the socket board circulation structure of the semiconductor device test system according to the invention of claim 6, an accessory device for supplying at least one of a refrigerant and a heat medium to each test chamber is installed below each test chamber. It is characterized by.

  The socket board circulation structure of the semiconductor device test system according to claim 7 is such that the transfer means in each of the transport paths can move the socket board in at least one direction of the X axis direction, the Y axis direction, and the Z axis direction. It is composed of one or two or more arm type robots.

  The socket board circulation structure of the semiconductor device test system according to claim 8 is characterized in that each socket board is provided with an identification code that can identify each socket board, and each socket board at a predetermined position on the system. Code recognizing means for recognizing the identification code is provided, and the control means provides, for each socket board, one transport path comprising a predetermined combination of the transport paths based on information from the code recognizing means. It controls to select.

  In the socket board circulation structure of the semiconductor device test system according to claim 9, a plurality of the device inspection means are provided in a one-to-one relationship with each of the semiconductor devices, and a predetermined test signal is input to each of the semiconductor devices. And a device test means for inspecting the semiconductor device based on an output signal output from the semiconductor device in response to the test signal, and a contact portion capable of being in electrical contact with the electrode formed in each semiconductor device Are arranged, and have a connection means for electrically connecting the semiconductor device and the device test means corresponding to the semiconductor device via the contact portion, and the device test means is input to the semiconductor device Waveform generation means for generating a waveform is provided.

  The waveform generating means may be at least one of a pattern generator and a waveform generator.

  The device test means may further include a driver that inputs the generated waveform to the semiconductor device.

  The device test means may be composed of a single semiconductor device.

  The socket board circulation structure of the semiconductor device test system according to the invention of claim 13 is characterized in that the sixth transfer path and the seventh transfer path provided between the test chambers arranged in parallel are two or more. The sixth conveyance path and the seventh conveyance path provided between the test chambers arranged side by side or more include a conveyor means using a belt conveyor and a roller or a cam.

  In the semiconductor device test system socket board circulation structure according to the fourteenth aspect of the present invention, the partition part for partitioning between the two or more test chambers arranged in parallel is constituted by a shutter mechanism that can be opened and closed at a predetermined timing. It is characterized by that.

  A socket board circulation structure of a semiconductor device test system according to a fifteenth aspect of the present invention is characterized in that the two or more test chambers arranged in parallel are integrally configured.

  The socket board circulation structure of the semiconductor device test system according to claim 16 is characterized in that at least one of the socket board loader and the socket board unloader heats or cools the socket board to a predetermined temperature. Means are provided.

  According to the present invention, the following effects can be obtained.

  That is, according to the first aspect of the present invention, device loader → socket board loader → each test unit → socket board unloader → device unloader → device loader →... Via the first to fifth transport paths. The socket board can be sequentially circulated in the path, and the semiconductor device can be tested more efficiently.

  According to the second aspect of the present invention, when two or more test chambers are arranged in parallel, the socket board is transferred between the socket board loaders via the sixth transfer path. The socket board can be transported between the socket board unloaders via the socket, and the semiconductor device can be efficiently tested in each test chamber.

  According to the third aspect of the present invention, the socket board can be accurately conveyed to each test unit of the test chamber.

  According to the invention described in claim 4, when each test unit is arranged in a plurality of stages in the vertical direction, the socket board can be accurately conveyed to each test unit.

  According to the fifth aspect of the present invention, at least one of the sixth transport path and the seventh transport path is provided above or below the attached device adjacent to the test chamber. It is not necessary to provide an installation space, the space of the entire system can be saved, and the test cost can be reduced.

  According to the sixth aspect of the present invention, since an auxiliary device for supplying at least one of a refrigerant and a heat medium to each test chamber is installed below each test chamber, space can be saved. As a result, the test cost can be reduced.

  According to the seventh aspect of the present invention, the transfer means in each transport path is one or more arm type robots that can move the socket board in at least one of the X-axis direction, the Y-axis direction, and the Z-axis direction. Since it comprises, the freedom degree of design improves and it can respond to various installation conditions easily.

  According to the eighth aspect of the present invention, since a transfer path can be designated for each socket board, a desired test can be performed efficiently.

  According to the present invention, the device test means provided in a one-to-one relationship with the semiconductor device includes the waveform generation means for generating the waveform input to the semiconductor device, so that the semiconductor devices to be inspected are mutually There is also an advantage that the influence of the operation noise of the semiconductor device that is isolated and adjacently is greatly reduced.

  According to the thirteenth aspect of the present invention, the sixth transfer path and the seventh transfer path provided between two or more test chambers arranged in parallel are two or more of the test chambers arranged in parallel. Since the sixth transport path and the seventh transport path provided between them include a conveyor means using a belt conveyor and rollers or cams, the socket board can be transported with a simple configuration. And the size of the apparatus can be reduced.

  According to the invention described in claim 14, since the partition part that partitions between the two or more test chambers arranged side by side can be configured by a shutter mechanism that can be opened and closed at a predetermined timing, Inflow can be suppressed, and the semiconductor device can be tested more efficiently.

  According to the fifteenth aspect of the present invention, two or more test chambers arranged in parallel are integrally configured, so that the system can be miniaturized.

  According to the sixteenth aspect of the present invention, at least one of each socket board loader and each socket board unloader includes heating / cooling means for heating or cooling the socket board to a predetermined temperature. The temperature change of the socket board when it is carried in can be reduced, and the socket board carried out from each test chamber can be returned to room temperature in a short time, so that the semiconductor device can be tested more efficiently. .

  Hereinafter, the best mode for carrying out the present invention will be described more specifically with reference to the drawings. Here, in the accompanying drawings, the same reference numerals are given to the same members, and duplicate descriptions are omitted. In addition, since description here is the best form by which this invention is implemented, this invention is not limited to the said form.

  (First embodiment)

  FIG. 1 is a plan view (a), a front view (b), and an end view taken along line AA (c) showing a schematic configuration of a semiconductor device test system S1 having a socket board circulation structure according to a first embodiment of the present invention. 2 is a front sectional view (a) and a right sectional view (b) showing a configuration example of a test chamber applied to the semiconductor device test system S1, and FIG. 3 is a front view showing a configuration of a test unit of the test chamber. Sectional view (a) and side sectional view (b), FIG. 4 is a perspective view showing a conveying path in the socket board circulation structure, and FIG. 5 shows a case where three or more test chambers are arranged in parallel in the semiconductor device test system S1. FIG. 6 is a block diagram showing a control system of the semiconductor device test system S1, FIG. 7 is a block diagram showing a functional configuration of the test circuit module, and FIG. 8 is a socket board circulation configuration. It is a flowchart illustrating a processing procedure of the socket board circulation processing applied to.

  As shown in FIGS. 1A and 1B, a semiconductor device test system S1 including a socket board circulation structure C1 according to the present embodiment is provided with a test handler H and adjacent to the test handler H (in the drawing, The first test chamber T1 installed on the right side), the first auxiliary device A1 installed next to the first test chamber T1 (installed on the right side in the drawing), and the first auxiliary device A second test chamber T2 provided next to A1 (installed on the right side in the drawing) and a second accessory device A1 provided adjacent to (installed on the right side in the drawing) the second test chamber T2. It consists of and.

  Note that the socket board circulation structure according to the present embodiment can also be applied to a semiconductor device test system in which three or more test chambers and attached devices are arranged in parallel as shown in FIG.

  The test handler H removes the device loader 12 mounted on the socket portion (not shown) of the socket board SB from the loader tray 10a loaded with the semiconductor device D to be inspected, and the inspected semiconductor device D from the socket board SB. The device unloader 13 is loaded on the unloader tray 10b.

  In this embodiment, the semiconductor device D is not directly transferred from the loader tray 10a to the socket board SB, but the semiconductor device D is temporarily placed on the test tray 11 from the loader tray 10a, and the test tray 11 is attached to the socket. It is conveyed to the board SB. In the example shown in FIG. 1, five test trays 11 can be placed on one socket board SB.

  The same applies to the removal of the inspected semiconductor device D from the socket board SB. The semiconductor device D is temporarily placed on the test tray 11 from the socket board SB, and the semiconductor device D is transferred from the test tray 11 to the unloader tray 10b. It is designed to be loaded.

  Although not shown, the device loader 12 and the device unloader 13 can be configured by a so-called multi-joint type double arm robot. Specifically, a robot main body incorporating an electric motor, a speed change mechanism, and the like, a first arm connected to a rotating shaft that protrudes rotatably from the upper end side, and a small electric motor disposed at the tip of the first arm An arm type robot or the like that includes a second arm that is rotatably connected to a motor, and a semiconductor device holding means (picker) disposed on the tip side of the second arm can be used. The robot body may be provided with a lifting device such as a telescopic type (a telescopic structure like a telescope barrel) or the like as lifting means for lifting the robot body in the Z-axis direction.

  Next, the test chamber will be described. Here, since the configuration of each test chamber T1, T2 (in the case of three or more units, T3, T4...) Is the same, here, the first test chamber T1 will be described as an example.

  In the present embodiment, as shown in FIGS. 1 and 2, the housing 20 of the first test chamber T1 has a space for storing the socket board SB, and a test board for testing a semiconductor device, etc. A plurality of slot-shaped test units (10 in the present embodiment: U1 to U10) provided are arranged in a plurality of stages (10 stages in the present embodiment) in the vertical direction. Needless to say, the number of test units U is arbitrary, and the number of stages can be freely changed.

  Although not shown, cooling air, heated air, room temperature dry air, or the like generated by a chiller 30 of an attachment device A1 (A2), which will be described later, is provided in the housing 20 with a piping pipe (temperature adjusting means) or the like. It has come to be introduced through.

  Here, the configuration of the test unit U will be described with reference to FIG.

  Since each test unit U (U1 to U10) has the same configuration, the test unit U1 will be described as an example here.

  The test unit U1 includes a piping pipe 40 that introduces or exhausts the heated air or the like to a small space MC of the socket 202 of the socket board SB (hereinafter referred to as “mini-chamber”), and a piping. Below the pipe 40 is disposed so as to be able to move up and down, and disposed on the pressing frame 100 for closing the upper surface of the socket board SB, and on the left and right ends of the pressing frame 100 (only the left end is shown in FIG. 3). A test of an air cylinder 101 that applies a pressing force to the pressing frame 100 and a semiconductor device D that is disposed on the lower side of the socket board SB and attached to the socket 202 of the socket board SB via a connector portion (not shown). The tester board unit 300 that performs electrical connection, and the sheet contact that performs electrical connection between the socket board SB and the tester board unit 300 And 201, and a.

  The pressing frame 100 is made of a highly rigid material such as a steel plate, and an insertion hole (not shown) through which the pipe pipe 40 can be inserted and vented is formed at a position facing each pipe pipe 40.

  The air cylinder 100 includes a plunger 104a that can be expanded and contracted with a predetermined stroke (for example, 5 mm), and the plunger 104a is advanced downward by the control of a control device (control means: microcomputer (see FIG. 7)) 250, thereby pressing the frame. A downward pressing force is applied to the left and right ends of 100 (only the left end side is shown in FIG. 3, but a similar air cylinder is also provided on the right end side).

  The socket board SB is made of, for example, engineering plastic or aluminum. For example, 20 rows × 12 rows (total 240 pieces) of sockets 202 are arranged vertically and horizontally, and a semiconductor device D as a test target is placed in each socket 202 above. It is mounted through the opening. The number of sockets 202 arranged on the socket board SB is arbitrary, and the number of vertical and horizontal arrangements can be arbitrarily changed.

  Here, the relationship between the pressing frame 100 and the socket board SB will be described.

  The pressing frame 100 is pushed downward by the action of the air cylinder 104 that is operated at a predetermined timing (FIG. 3 shows a pushed state).

  And the lower surface of the press frame 100 is hold | maintained in the state closely_contact | adhered to the upper surface of socket board SB. In this state, the upper open surface of each socket 202 of the socket board SB is closed by the lower surface of the pressing frame 100 to form a small space that is blocked from the outside air. The inventors refer to these small spaces as “mini-chambers” because the semiconductor devices D can be regarded as individually testable chambers. That is, in the so-called mini-chamber formed by each socket 202, more precise temperature adjustment is performed in each mini-chamber, or individually under different conditions (for example, test conditions such as temperature conditions or input waveforms). The semiconductor device D can be tested.

  The seat contact 201 has a large number of contact pins 201a and 201b arranged upward and downward, and each contact pin 201a and 201b is configured to expand and contract by a predetermined stroke (for example, about 0.5 mm). Yes. The upper contact pin 201a is opposed to the bottom electrode (contact pad) pattern of the socket board SB on a one-to-one basis, and the lower contact pin 201b is an electrode on the upper surface of the test board unit 300. It is configured so as to face the contact pad pattern on a one-to-one basis.

  In the test board unit 300, electrodes (contact pads) that can contact the contact pins 201b below the sheet contacts 201 are formed in a predetermined pattern on the upper surface side of the mother board, and the LSI is formed on the bottom surface via a connector 302. The test circuit module 301 is mounted.

  Further, a protrusion 110 for positioning with the test board unit 300 is formed below the left and right end portions of the socket board SB, and the protrusion 110 can be engaged with the opposing surface of the end portion of the test board unit 300. A positioning hole 111 is formed. Thereby, the socket board SB and the test board unit 300 can be aligned with high accuracy.

  Each test circuit module 301 is configured so as to be located in a ventilation duct 400 into which cooling air can be introduced. As a result, the test circuit module 301 can be cooled, heat can be prevented from being transmitted to the socket board SB via the test board unit 300, and the test accuracy can be improved by eliminating the influence of heat. be able to.

  In addition, a carry-in port and a carry-out port of the socket board SB are provided at positions facing the test units U1 to U10 on the front side and the rear side of the housing 10, and external air is provided at the carry-in port and the carry-out port. A shutter mechanism 310 that can be controlled to be opened and closed is provided to prevent entry into the housing 10. By opening and closing the shutter mechanism 310 under the control of the control device 250, it is possible to reduce the temperature change in the chamber T1 (T2) by suppressing the inflow of outside air when the socket board SB is carried in and out, and the dew condensation. Can contribute to preventing the occurrence of Instead of providing the shutter mechanism 310, it is conceivable to prevent intrusion of outside air from the carry-in port and the carry-out port by increasing the air pressure in the housing 10.

  Next, the socket board circulation structure C1 according to the present embodiment will be described with reference to FIG. 1 and FIG.

  The socket board circulation structure C1 is configured such that the socket board SB is connected to each test unit U1 to U10 of the test chamber T1 (T2) from the device loader 12 that mounts the semiconductor device D in each socket 202 of each socket board SB. A first transport path R1 for transporting the socket board SB to the socket board loader 14 for carrying in, a second transport path R2 for transporting the socket board SB from the socket board loader 14 to each of the test units U1 to U10, and each test. A third transport path R3 for transporting the socket board SB to the socket board unloader 15 for unloading the socket board SB from the units U1 to U10, and each semiconductor device D mounted in each socket 202 of the socket board SB from the socket board unloader 15 Remove device enro A fourth transport path R4 in for conveying the socket board SB to 13, and a fifth transport path R5, which conveys the socket board SB from the device unloader 13 to the device the loader 12.

  Although illustration is omitted, each socket board loader 14a, 14b and each socket board unloader 15a, 15b can be constituted by what is called an articulated double arm robot. Specifically, a robot main body incorporating an electric motor, a speed change mechanism, and the like, a first arm connected to a rotating shaft that protrudes rotatably from the upper end side, and a small electric motor disposed at the tip of the first arm An arm type robot or the like that includes a second arm that is rotatably connected to the motor and a holding means for the socket board SB that is disposed on the distal end side of the second arm can be used.

  Further, the second transport path R2 and the third transport path R3 are provided in the vertical direction (Z-axis direction: figure) in order to deliver the socket board SB to the test units U1 to U10 of the test chambers T1 and T2. 1, movement in the R2a and R3a directions in FIG. 4 is also required. For this vertical movement, the robot body of the articulated double arm robot is provided with a lifting device such as a telescopic type (a telescopic structure like a telescope barrel) as lifting means that can be lifted in the Z-axis direction. It can be realized by being provided on the lower side.

  Further, the means for transporting the socket board SB in the first transport path R1 and the fourth transport path R4 may be combined with the above-mentioned articulated double arm robot, or a separate belt conveyor, air cylinder, or the like. A conventional transfer device may be provided.

  As for the transfer of the socket board SB in the fifth transfer path R5, the articulated double arm robot as described above may be used, or a transfer device using a belt conveyor, an air cylinder or the like is provided. You may make it do.

  Further, in the present embodiment, as shown in FIGS. 1A, 1B and 5, the sixth transport path R6 and the seventh transport path R7 pass above each attachment device A1. It has become. However, such a configuration is not essential, and can be changed depending on the structure of the test chambers T1, T2 (T3) and the attached devices A1, A2 (A3). In other words, in the present embodiment, the auxiliary devices A1, A2 (A3) are used for the refrigerant supplied to the test chambers T1, T2 (T3) in the casing 32 having a height lower than that of the test chambers T1, T2 (T3). A chiller 30 that cools and heats the heating medium and a power supply device 31 that supplies power to the test chambers T1, T2 (T3) and the like are housed. Then, when the auxiliary devices A1, A2 (A3) are arranged in parallel in the test chambers T1, T2 (T3), the sixth transport path R6 and the seventh transport path are located above the auxiliary devices A1, A2 (A3). It is designed so that a transfer space (board transfer area) 35 that can be used as R7 can be formed.

  Depending on the design of the accessory devices A1, A2 (A3), it may be possible to form a transport space (board transport area) below the accessory devices A1, A2 (A3).

  On the other hand, for example, when the chiller is stored in the lower part of the test chambers T1 and T2 or the power supply device is stored in a predetermined position of the test chambers T1 and T2, the above-described accessory devices A1 and A2 are omitted. In this case, the sixth transport path R6 and the seventh transport path R7 directly transfer the socket board SB between the socket board loaders 14a and 14b and between the socket board unloaders 15a and 15b (for example, It is also possible to adopt a configuration in which a socket board is transferred between arm robots.

  Here, through which transport path R1 to R7 is circulated through each socket board SB, or in this embodiment, the socket board SB is connected to the first test chamber T1 or the second test. An example of the selection method will be described as to which of the chambers T2 is transported to perform the test of the semiconductor device D.

  In the present embodiment, for example, a bar code (not shown) is attached to a predetermined position of each socket board SB as an identification code (ID), and the code recognition disposed at the predetermined position of the socket board circulation structure C1. It is read by a bar code reader 320 (see FIG. 6) as means, and the circulation path of the socket board SB is designated based on the read information. More specifically, for example, as the first circulation path, “first transport path R1 → second transport path R2 → third transport path R3 → fourth transport path R4 → fifth transport path R5” As a second circulation path, “the first transport path R1 → the sixth transport path R6 → the second transport path R2 → the third transport path R3 → the seventh transport path R7 → the fourth transport A combination of “path R4 → fifth transport path R5” is defined in advance, and a bar code corresponding to each circulation path is created. Then, the bar code is pasted to a designated portion of the desired socket board SB. Further, a storage control program corresponding to the first circulation path and the second circulation path is stored in advance in a storage device such as the microcomputer 250 as a control device, and a predetermined socket board is used by the bar code reader 320. When the SB barcode is read, it is identified which one of the first circulation path and the second circulation path based on the identification information, and the corresponding conveyance control program is read according to the identification result, The corresponding socket board SB is transported according to the program.

  As a result, each socket board SB can be transported by a designated circulation path (either the first circulation path or the second circulation path), and is transferred to the socket board SB by a designated test chamber (T1 or T2). The test of the loaded semiconductor device D can be performed easily and quickly.

  Next, a control system of the semiconductor device test system S1 according to the present embodiment will be briefly described with reference to FIG.

  In this control system, the air cylinder 101 that presses the pressing frame 100, the shutter mechanism 310, the test board unit 300, the bar code reader 320, and the arm robot and the like in each of the transfer paths R1 to R7 are transferred to the microcomputer 250 as a control device. Each of the devices 330 is connected, and each device is operated at a predetermined timing by a program built in the microcomputer 250 or a program supplied from the outside.

  Here, the functional configuration of the test circuit module 301 included in the test board unit 300 will be described with reference to FIG.

  The test circuit module 82 as a device test means inputs a predetermined test signal to each semiconductor device D mounted in the socket 202 and based on an output signal output from the semiconductor device D in response to the test signal. The semiconductor device D is inspected. The pattern generator 82-1, the driver 82-2, the comparator 82-3, the waveform generator 82-4, the interface 82-5, the test engine 82-6, and the memory 82-7. , A voltage regulator 82-8, and a voltage / current application measuring unit 82-9.

  Here, in correspondence with a plurality (for example, 10 to 20) of test circuit modules 301, sub-controllers 83 as sub-control units are provided. This sub-controller 83 is under the control of the host controller 123, transmits a test program to each corresponding test circuit module 301, manages the test results of the semiconductor device D, performs log management, status management, etc. Execute.

  Then, several types of voltages (± 15 V, +5 V, etc.) are supplied from the power supply device 130 to the test circuit module 301, and the voltage supplied from the power supply device 130 is supplied to the semiconductor device D by the test circuit module 301 with high accuracy. Control and supply. The test circuit module 301 may have a functional configuration other than these as long as it has a test function, and may have only a part of these functional configurations.

  Here, the pattern generator 82-1, which is one of the waveform generation means, extracts the waveform parameters from the tester language and inputs the waveform to the driver 82-2. The driver 82-2 buffers the waveform input from the pattern generator 82-1 at a predetermined voltage and inputs the buffered waveform to the semiconductor device D to be tested.

  The comparator 82-3 makes the output waveform from the semiconductor device D "high" or "low" based on a predetermined reference voltage, and sends it to the test engine 82-6. The test engine 82-6 compares the waveform from the comparator 82-3 with the expected value to determine the pass / fail (good or bad) of the semiconductor device D, and controls the external controller.

  The memory 82-7 stores the pass / fail information of the semiconductor device D determined by the test engine 82-6 in this way, the address position for each test pattern in which a defect has occurred, and the like. Further, when the semiconductor device D is a memory LSI, storage of defective bit positions, masking of defective bits, real-time counting of the number of defective bits, generation of ROM test patterns, and the like are performed.

  A waveform generator 82-4, which is another one of the waveform generating means, generates an arbitrary analog waveform such as a sine wave, a triangular wave, or a rectangular wave and inputs it to the semiconductor device D.

  The interface 82-5 is an interface between the host controller 23 and the test circuit module 82, and specifically, a serial interface or a parallel interface. The voltage regulator 82-8 is an input power source for the driver 82-2 and an input power source for the semiconductor device D, and supplies a power source having a predetermined voltage.

  Then, the voltage / current application measuring unit 82-9 applies a voltage or current to the semiconductor device D to measure the operating current or operating voltage of the semiconductor device D, or opens / shorts the wiring formed in the semiconductor device D. Measure.

  Next, a processing procedure of socket board circulation processing applied to the socket board circulation structure C1 according to the present embodiment configured as described above will be described with reference to the flowchart of FIG.

  First, in step S10, a barcode recognition process is performed in which the barcode attached to each socket board SB is read by the barcode reader 320.

  Next, the process proceeds to step S11, and it is determined whether or not the first circulation path. That is, based on the information identified by the barcode recognition process, it is determined whether the first circulation path or the second circulation path described above.

  If the determination result is Yes, the process proceeds to step S12, the first circulation control program is read, and the process proceeds to step S13. In step S13, the first circulation control process of the socket board SB is executed according to the first circulation control program. Specifically, first, the socket board SB on which the semiconductor device D as the test target is mounted by the device loader 12 according to a predetermined control program is transported to the socket board loader 14a via the first transport path R1. Then, after the vertical direction (Z-axis direction) R2a is aligned to the designated test unit (any of U1 to U10) of the first test chamber T1 according to the first circulation control program, the second The socket board SB is transported into the test unit designated by the transport path R2. When the test of the semiconductor device D on the socket board SB is completed in the first test chamber T1 in accordance with a predetermined control program, the socket board SB is carried out from the test unit via the third transport path R3 by the socket board unloader 15a. Then, it is transported to the device unloader 13 through the fourth transport path R4. Then, after the semiconductor device D is removed from the socket board SB by the device unloader 13, it is transported to the device loader 12 through the fifth transport path R5.

  Next, the process proceeds to step S16 to determine whether or not to continue the circulation of the socket board SB. If Yes, the process returns to step S10 to continue the process, and if No, the circulation process is terminated. .

  On the other hand, if it is determined No in step S11, the process proceeds to step S14, the second circulation control program is read, and the process proceeds to step S15. In step S15, the second circulation control process of the socket board SB is executed according to the second circulation control program. Specifically, first, the socket board SB on which the semiconductor device D as the test target is mounted by the device loader 12 according to a predetermined control program is transported to the socket board loader 14a via the first transport path R1. Subsequently, according to the 2nd circulation control program, it is conveyed to the socket board loader 14b via 6th conveyance path R6. Subsequently, alignment in the vertical direction (Z-axis direction) R2a is performed up to the designated test unit (any one of U1 to U10) of the second test chamber T2, and then designated by the second transport path R2. The socket board SB is transported into the test unit. When the test of the semiconductor device D on the socket board SB is completed in the second test chamber T2 in accordance with a predetermined control program, the socket board SB is removed from the test unit via the third transport path R3 by the socket board unloader 15b. Then, it is transported to the socket board unloader 15a via the seventh transport path R7, and then transported to the device unloader 13 via the fourth transport path R4. Then, after the semiconductor device D is removed from the socket board SB by the device unloader 13, it is transported to the device loader 12 through the fifth transport path R5.

  Next, the process proceeds to step S16 to determine whether or not to continue the circulation of the socket board SB. If Yes, the process returns to step S10 to continue the process, and if No, the circulation process is terminated. .

  According to the socket board circulation process described above, each socket board SB can be accurately conveyed, and the semiconductor device D can be efficiently tested in each test chamber T1, T2.

  (Second Embodiment)

  FIG. 10 is a plan view (a), a front view (b), and an end view taken along line AA (c) showing a schematic configuration of a semiconductor device test system S2 having a socket board circulation structure according to the second embodiment of the present invention. ).

  In addition, the same code | symbol is attached | subjected about the structure similar to semiconductor device test system S1 provided with the socket board circulation structure which concerns on 1st Embodiment, and description is abbreviate | omitted.

  The difference between the semiconductor device test systems S1 and S2 having the socket board circulation structure is that the test chamber T1 and the test chamber T2 are separated by a predetermined distance in the system S1, as can be seen from FIG. 1 and FIG. However, in the system S2, the test chamber T10 and the test chamber T11 are inseparably configured.

  In other words, two test parts of the socket board SB are provided in one test chamber.

  Note that the number of test units provided in one test chamber is not limited to two, and three or more test units may be provided.

  Thereby, the same measurement number of the semiconductor device D of the socket board SB can be increased, and the test of the semiconductor device D can be executed more efficiently. In addition, the overall configuration of the system S2 can be reduced in size, and the installation space can be reduced to reduce the cost.

  Each of the test chambers T10 and T11 is provided with a plurality of test units U1 to U4 in the vertical direction (four stages in FIG. 10), and the socket board SB is carried into and out of each of the test units U1 to U4. Can be performed in parallel.

  In addition, a shutter mechanism 310 that can be controlled to be opened and closed is provided at the entrances and exits (both sides) of the test chamber T10 and the test chamber T11 to prevent outside air from entering for the purpose of heat insulation.

  The shutter mechanism 310 may be provided only at either the entrance of the test chamber T10 or the exit of the test chamber T11.

  Also, the heating or cooling of the socket board SB can be performed at the timing shown in FIG. 12 via the socket board unloader 15a that also serves as the preheating unit 700 and the socket board unloader 15b that also serves as the heat removal unit 800.

  Thereby, the semiconductor device D of the socket board SB can be heated or cooled to a desired temperature during the transfer, and temperature conversion when the socket board SB is carried into and out of the test chamber T10 and the test chamber T11 is suppressed. Energy efficiency can be improved.

  Although not particularly limited, the central space 450 in FIG. 10A can be used for maintenance and inspection of the system S1.

  Further, a spare space PS for holding the socket board SB to be processed next can be provided on the entrance side of the socket board loader 14b.

  Further, an elevator E for conveying the socket board SB can be provided on the outlet side of the socket board loader 14b and the inlet side of the socket board unloader 15b.

  Further, the space 900 on the lower side portion of the test unit U in FIG.

  In FIG. 10, a space between the test handler H and the test unit including the preheating unit 700 and the heat removal unit 800 includes a spare space PS and an elevator E.

  The sixth transport path R6 and the seventh transport path R7 are the same in structure except for the board flow.

  Further, the lower portion of the spare space PS can be made to enter and leave the maintenance space 450 in the central portion as a passage from the side.

  It should be noted that only one of the sixth transport path R6 and the seventh transport path R7 may be allowed to enter and leave the maintenance space 450 in this way.

  Further, the upper portion of the spare space PS may be left empty, or it can be used as a mounting space for other units.

  Although the invention made by the present inventor has been specifically described based on the embodiments, the embodiments disclosed herein are illustrative in all respects and are not limited to the disclosed technology. Should not be considered. That is, the technical scope of the present invention should not be construed restrictively based on the description in the above embodiment, but should be construed according to the description of the scope of claims. All modifications that fall within the scope of the claims and the equivalent technology are included.

  For example, in the present embodiment, the case where a bar code is used as the identification code of the socket board SB has been described. Instead, a two-dimensional code (so-called QR code), an IC tag (RFID), or the like is used for the socket board SB. It may be arranged at a predetermined position. In response to these changes, a corresponding reading device instead of the barcode reader is disposed at a predetermined position of the circulation structure C1 and connected to the control device (microcomputer) 250. In this way, any system that can identify each socket board SB is applicable.

  Further, in addition to designating the circulation path (combination of the transport paths R1 to R7) in correspondence with the identification code such as the barcode of the socket board SB, the test conditions for the test units U1 to U10 for each socket board SB. It is also conceivable to specify (for example, temperature conditions or selection of a predetermined test program). Thereby, it becomes possible to test the semiconductor device D under different conditions for each socket board SB.

  The socket board circulation structure of the semiconductor device test system according to the present invention can be applied to various semiconductor device inspection apparatuses that require characteristic tests, such as SDRAM, static RAM, flash memory, logic device, and logic / analog mixed device. Various semiconductor devices can be applied as test targets.

BRIEF DESCRIPTION OF THE DRAWINGS It is a top view (a), front view (b), and AA line end view (c) which show schematic structure of semiconductor device test system S1 provided with the socket board circulation structure concerning the 1st Embodiment of this invention. . They are a front sectional view (a) and a right sectional view (b) showing a configuration example of a test chamber applied to a semiconductor device test system. They are a front sectional view (a) and a side sectional view (b) showing the configuration of the test unit of the test chamber. It is a perspective view which shows the conveyance path in a socket board circulation structure. It is a schematic explanatory drawing which shows the case where three or more test chambers are arranged in parallel in the semiconductor device test system. It is a block diagram which shows the control system of a semiconductor device test system. It is a block diagram which shows the function structure of a test circuit module. It is a flowchart which shows the process sequence of the socket board circulation process applied to a socket board circulation structure. It is a perspective view which shows the conventional socket board circulation structure. It is the top view (a), front view (b), and AA line end view (c) which show schematic structure of semiconductor device test system S2 provided with the socket board circulation structure concerning the 2nd Embodiment of this invention. . It is sectional drawing which shows a partial structure of test chamber T10, T11. It is explanatory drawing which shows the timing of heating and cooling in semiconductor device test system S2 provided with a socket board circulation structure.

Explanation of symbols

S1, S2 Semiconductor device test system C1 Socket board circulation structure T1, T2 Test chamber T10, T11 Test chamber U (U1-U10) Test unit A1, A2 Attached equipment SB Socket board D Semiconductor device R1 First transport path R2 Second Transport path R3 3rd transport path R4 4th transport path R5 5th transport path R6 6th transport path R7 7th transport path H Test handler 10a Loader tray 10b Unloader tray 11 Test tray 12 Device loader 13 Device Unloader 14a, 14b Socket board loader 15a, 15b Socket board unloader 20 Case 250 Control device (control means: microcomputer)
DESCRIPTION OF SYMBOLS 100 Pressing frame 104 Air cylinder 201 Seat contact 202 Socket 300 Test board unit 301 Test circuit module 310 Shutter mechanism 320 Bar code reader (code recognition means)
400 Ventilation duct 500 Piping pipe (heating / cooling means)
700 Preheating part 800 Heat removal part

Claims (16)

A test unit capable of storing one or more socket boards having a plurality of sockets for removably holding a semiconductor device;
Temperature adjusting means for adjusting the ambient temperature of the semiconductor device mounted in each socket of each socket board to a predetermined test environment temperature;
Device inspection means provided for each test unit, for conducting electrical continuity with the electrode terminals of each semiconductor device mounted in each socket and testing the electrical characteristics of each semiconductor device;
A socket board circulation structure of a semiconductor device test system having a test chamber provided with a temperature control means and a control means for controlling the device inspection means,
A first transport path for transporting a socket board from a device loader for mounting a semiconductor device to each socket of each socket board to a socket board loader for transporting the socket board to each test unit of the test chamber;
A second transport path for transporting a socket board from the socket board loader to each test unit;
A third transport path for transporting the socket board to a socket board unloader for unloading the socket board from each test unit;
A fourth transport path for transporting the socket board from the socket board unloader to a device unloader that removes each semiconductor device mounted in each socket of the socket board;
A socket board circulation structure for a semiconductor device test system, comprising: a fifth transfer path for transferring a socket board from the device unloader to the device loader. Two or more test chambers are provided side by side, and the socket board loader and socket board unloader are provided for each test chamber,
A sixth transport path for sequentially transporting the socket boards in a direction away from the device loader between the socket board loaders;
The socket board circulation structure of the semiconductor device test system according to claim 1, further comprising: a seventh conveyance path that sequentially conveys the socket boards in a direction approaching the device unloader between the socket board unloaders.   3. The semiconductor device test according to claim 1, wherein the socket board loader and the socket board unloader each include a moving unit that sequentially moves to a position facing each of the test units in the test chamber. System socket board circulation structure. Each test unit is arranged in a plurality of stages in the vertical direction,
4. The socket board circulating structure for a semiconductor device test system according to claim 3, wherein the moving means is configured by raising and lowering means for the socket board loader and the socket board unloader. An auxiliary device for supplying at least one of a power source, a refrigerant, and a heat medium to each test chamber is provided next to the test chamber.
5. The semiconductor device test system according to claim 2, wherein at least one of the fifth transport path and the sixth transport path is provided above or below the attachment device. 6. Socket board circulation structure.   5. The semiconductor according to claim 1, wherein an attachment device that supplies at least one of a refrigerant and a heat medium to each test chamber is installed below each test chamber. Socket board circulation structure of device test system.   The transfer means in each of the transport paths is composed of one or more arm type robots that can move the socket board in at least one of the X-axis direction, the Y-axis direction, and the Z-axis direction. The socket board circulation structure of the semiconductor device test system in any one of Claims 1-6. Each socket board is provided with an identification code that can identify each socket board, and
Code recognition means for recognizing the identification code of each socket board is provided at a predetermined position on the system,
The said control means controls for each said socket board to select one conveyance path | route which consists of the predetermined combination of each said conveyance path based on the information from the said code | symbol recognition means. The socket board circulation structure of the semiconductor device test system according to claim 1. The device inspection means includes
A plurality of semiconductor devices are provided with a one-to-one relationship with each of the semiconductor devices, and a predetermined test signal is input to each of the semiconductor devices, and the semiconductor device is configured based on an output signal output from the semiconductor device according to the test signal A device test means for performing the inspection;
A plurality of contact portions that can be electrically contacted with the electrodes formed in each semiconductor device, and a connection means that electrically connects the semiconductor device and the corresponding device test means via the contact portions And
The semiconductor device test system socket board circulation structure according to any one of claims 1 to 8, wherein the device test means includes waveform generation means for generating a waveform input to the semiconductor device.   10. The socket board circulation structure of a semiconductor device test system according to claim 9, wherein the waveform generating means is at least one of a pattern generator and a waveform generator.   11. The semiconductor device test system socket board circulation structure according to claim 9, wherein the device test means further includes a driver for inputting the generated waveform to the semiconductor device.   12. The socket board circulation structure of a semiconductor device test system according to claim 9, wherein the device test means is composed of a single semiconductor device.   The sixth transport path and the seventh transport path provided between two or more test chambers arranged side by side include a belt conveyor and transport means using a roller or a cam. The socket board circulation structure of the semiconductor device test system according to claim 2.   The partition part which partitions off between each said test chamber arranged in parallel by 2 or more units | sets is comprised with the shutter mechanism which can be opened and closed at predetermined timing, The Claim 1 characterized by the above-mentioned. Socket board circulation structure for semiconductor device test system.   15. The socket board circulation structure of a semiconductor device test system according to claim 2, wherein two or more test chambers arranged in parallel are integrally configured. 16. At least one of each socket board loader and each socket board unloader includes heating / cooling means for heating or cooling the socket board to a predetermined temperature. Socket board circulation structure of the semiconductor device test system described in 1.

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