JP2008153583A - Printed circuit board, and electronic apparatus - Google Patents

Printed circuit board, and electronic apparatus Download PDF

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Publication number
JP2008153583A
JP2008153583A JP2006342555A JP2006342555A JP2008153583A JP 2008153583 A JP2008153583 A JP 2008153583A JP 2006342555 A JP2006342555 A JP 2006342555A JP 2006342555 A JP2006342555 A JP 2006342555A JP 2008153583 A JP2008153583 A JP 2008153583A
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Prior art keywords
circuit board
printed circuit
semiconductor package
wiring board
printed wiring
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Japanese (ja)
Inventor
Ikko Murakami
壱皇 村上
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Toshiba Corp
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Toshiba Corp
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Priority to JP2006342555A priority Critical patent/JP2008153583A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/27011Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83909Post-treatment of the layer connector or bonding area
    • H01L2224/83951Forming additional members, e.g. for reinforcing, fillet sealant
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/10155Shape being other than a cuboid
    • H01L2924/10156Shape being other than a cuboid at the periphery

Abstract

<P>PROBLEM TO BE SOLVED: To provide a printed circuit board whose reliability of connection can be improved while keeping maintenance property. <P>SOLUTION: The printed circuit board 8 includes a printed wiring board 10 and an electronic component 20. The electronic component 20 has an almost-cubic-shaped component body 21 and a plurality of solder balls 23 located on its lower surface 21b. The printed wiring board 10 has a plurality of pads 11 on which the solder balls 23 of the electronic component 20 are mounted. The electronic component 20 and the printed wiring board 10 are joined by a bonding member 30 each other. An uneven portion 22 is formed in the portion where the bonding member 30 and the electronic component 20 are joined. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、プリント回路板に係り、特に半導体パッケージとプリント配線板とを接着剤で接合したプリント回路板に関する。   The present invention relates to a printed circuit board, and more particularly to a printed circuit board in which a semiconductor package and a printed wiring board are joined with an adhesive.

ノートPC等の電子機器には、プリント配線板上に電子部品を実装したプリント回路板が収容されている。電子機器の小型化が要求されるとともに、この電子部品はICパッケージ化され半導体パッケージとなって実装されているものも多い。   Electronic devices such as notebook PCs accommodate printed circuit boards in which electronic components are mounted on printed wiring boards. There is a demand for miniaturization of electronic devices, and many of these electronic components are packaged as IC packages and mounted as semiconductor packages.

半導体パッケージの多くは、BGA(Ball Grid Array)やCSP(Chip Sized Package)等に代表されるようにはんだボールを一方の面に有した形態のものが普及している。BGA等は、はんだボールによってプリント配線板上の電極と接続されている。   Many semiconductor packages have a form in which solder balls are provided on one surface, as represented by BGA (Ball Grid Array), CSP (Chip Size Package), and the like. BGA and the like are connected to electrodes on the printed wiring board by solder balls.

しかし、実装後に温度サイクルや衝撃、折り曲げ等の機械的応力が加わったときに、BGA等とプリント配線板との接続信頼性が保持できない場合がある。   However, when mechanical stress such as temperature cycle, impact, or bending is applied after mounting, the connection reliability between the BGA and the printed wiring board may not be maintained.

特許文献1には、半導体パッケージにおいて、側面及び回路が設けられている面における回路を除いた部分に凹凸を設け、封止用樹脂との接触面積を大きくし、半導体素子と封止樹脂との密着力を高め、寿命の劣化を抑える技術が開示されている。
特開平9−162229号公報(9頁、図1、図2参照)
In Patent Document 1, unevenness is provided in a portion of a semiconductor package excluding a circuit on a side surface and a surface where a circuit is provided, the contact area with a sealing resin is increased, and the semiconductor element and the sealing resin A technique for increasing the adhesion and suppressing the deterioration of the lifetime is disclosed.
JP-A-9-162229 (see page 9, FIG. 1 and FIG. 2)

BGAやCSP等の半導体パッケージをプリント配線板上に実装する場合、アンダーフィル樹脂でBGA間を封止して接合強度高める技術がある。一方、近年、保守性の観点から半導体パッケージの所定箇所に接着剤を塗布する実装方法が採用されることがある。   When a semiconductor package such as BGA or CSP is mounted on a printed wiring board, there is a technique for increasing the bonding strength by sealing the BGA with an underfill resin. On the other hand, in recent years, a mounting method in which an adhesive is applied to a predetermined portion of a semiconductor package may be employed from the viewpoint of maintainability.

しかし、このような実装方法を採用した場合には、上記アンダーフィルを採用した場合に比してパッケージとプリント配線板との接合強度が十分に確保されない場合も生じる。   However, when such a mounting method is adopted, there may be a case where the bonding strength between the package and the printed wiring board is not sufficiently ensured as compared with the case where the underfill is adopted.

そこで、本発明は上記問題を解決するためになされたもので、半導体パッケージの周辺を接着剤等の接合部材を塗布することで接合信頼性を確保するプリント回路板において、保守性を保ちつつ接続信頼性を高めることができるプリント回路板を提供することを目的とする。   Accordingly, the present invention has been made to solve the above problems, and in a printed circuit board that secures bonding reliability by applying a bonding member such as an adhesive around the periphery of a semiconductor package, the connection is maintained while maintaining maintainability. An object of the present invention is to provide a printed circuit board capable of improving reliability.

上記目的を達成するために、本発明のプリント回路板は、略方体形状の本体部と、前記本体部の1の面に設けられた複数のはんだボールとを有した半導体パッケージと、前記半導体パッケージの前記複数のはんだボールが実装されるパッドを有したプリント配線板とを備えたプリント回路基板であって、前記プリント配線板と前記半導体パッケージとが接着部材で接合されており、前記接着部材が接合されている領域の前記半導体パッケージまたは前記プリント配線板の少なくとも一方の形状の一部が凹凸形状になっていることを特徴としている。   In order to achieve the above object, a printed circuit board according to the present invention includes a semiconductor package having a substantially rectangular main body, and a plurality of solder balls provided on one surface of the main body, and the semiconductor A printed circuit board comprising a printed wiring board having a pad on which the plurality of solder balls of the package are mounted, wherein the printed wiring board and the semiconductor package are joined by an adhesive member, and the adhesive member A part of at least one of the shape of the semiconductor package or the printed wiring board in the region where the wire is bonded is an uneven shape.

また、本発明の電子機器は、筐体と、前記筐体に収容されたプリント回路板とを備えた電子機器であって、前記プリント回路板は、略方体形状の本体部と、前記本体部の1の面に設けられた複数のはんだボールとを有した半導体パッケージと、前記半導体パッケージの前記複数のはんだボールが実装されるパッドを有したプリント配線板と、前記プリント配線板と前記半導体パッケージとを接合する接着部材とを備え、前記接着部材が接合されている領域の前記半導体パッケージまたは前記プリント配線板の少なくとも一方の形状の一部が凹凸形状になっていることを特徴としている。   According to another aspect of the present invention, there is provided an electronic apparatus including a housing and a printed circuit board housed in the housing, wherein the printed circuit board includes a substantially rectangular main body portion and the main body. A semiconductor package having a plurality of solder balls provided on one surface of the portion, a printed wiring board having pads on which the plurality of solder balls of the semiconductor package are mounted, the printed wiring board, and the semiconductor And an adhesive member that joins the package, and a part of at least one of the shape of the semiconductor package or the printed wiring board in a region where the adhesive member is joined is uneven.

保守性を保ちつつ接続信頼性を高めることができる。   Connection reliability can be improved while maintaining maintainability.

以下に、図面を参照して、本発明のプリント回路板の実施の形態について、例えば、電子機器の1つであるポータブルコンピュータに適用した場合を例に説明する。   Hereinafter, an embodiment of a printed circuit board according to the present invention will be described with reference to the drawings, taking as an example a case where the printed circuit board is applied to a portable computer which is one of electronic devices.

図1は、本発明の実施の形態に係るポータブルコンピュータの斜視図を示す。図1において、ポータブルコンピュータ1の本体2には、表示部筐体3がヒンジ機構を介して回動自在に設けられている。本体2には、ポインティングデバイス4、キーボード5等の操作部が設けられている。表示部筐体3には例えばLCD等の表示デバイス6が設けられている。   FIG. 1 is a perspective view of a portable computer according to an embodiment of the present invention. In FIG. 1, a main body 2 of a portable computer 1 is provided with a display unit housing 3 so as to be rotatable via a hinge mechanism. The main body 2 is provided with operation units such as a pointing device 4 and a keyboard 5. The display unit housing 3 is provided with a display device 6 such as an LCD.

また本体2には、上記ポインティングデバイス4、キーボード5等の操作部および表示デバイス6を制御する制御回路を組み込んだプリント回路板(マザーボード)8が設けられている。   Further, the main body 2 is provided with a printed circuit board (mother board) 8 in which a control circuit for controlling the operation device such as the pointing device 4 and the keyboard 5 and the display device 6 is incorporated.

(プリント回路板の第1の実施の形態)
図2は、図1に示すポータブルコンピュータの筐体内部に収容されるプリント回路板の第1の実施の形態を示した図である。図2(a)は断面図、図2(b)は天面面を示す。
(First embodiment of printed circuit board)
FIG. 2 is a diagram showing a first embodiment of a printed circuit board housed inside the casing of the portable computer shown in FIG. 2A shows a cross-sectional view, and FIG. 2B shows a top surface.

プリント回路板8は、プリント配線板10と、電子部品20と、接着部材30とを有する。   The printed circuit board 8 includes a printed wiring board 10, an electronic component 20, and an adhesive member 30.

プリント配線板10は、第1の面10aと、第2の面10bとを有する。プリント配線板10には、後述する電子部品20のはんだボール23と対向した領域に複数のパッド11が設けられている。プリント配線板10は、単層板か多層板の別は問わない。プリント配線板10は、第1の面10aや第2の面10b若しくは多層板であれば内層に配線や電極を有していても良い。また、第1の面10aや第2の面10bにはソルダーレジストが塗布されていても良い。   The printed wiring board 10 has a first surface 10a and a second surface 10b. The printed wiring board 10 is provided with a plurality of pads 11 in a region facing a solder ball 23 of an electronic component 20 described later. The printed wiring board 10 may be a single-layer board or a multilayer board. The printed wiring board 10 may have wiring and electrodes in the inner layer as long as it is the first surface 10a, the second surface 10b, or a multilayer board. Moreover, the solder resist may be apply | coated to the 1st surface 10a and the 2nd surface 10b.

電子部品20は、例えば略直方体の形状を有する部品本体21と、この部品本体21の1の面から突出した複数のはんだボール23とを有している。即ち、部品本体21は、上面21aと、この上面に対向する下面21bと、上面21a及び下面21bの夫々の周辺を囲む側面21c,21d,21e,21fから構成されて偏平の略直方体を形成している。こここで略直方体と記載しているのは、少なくとも接着部材30が接合される領域は、凹凸部22が形成されていることにある。   The electronic component 20 includes, for example, a component main body 21 having a substantially rectangular parallelepiped shape, and a plurality of solder balls 23 protruding from one surface of the component main body 21. That is, the component main body 21 includes a top surface 21a, a bottom surface 21b opposite to the top surface, and side surfaces 21c, 21d, 21e, and 21f surrounding each of the top surface 21a and the bottom surface 21b to form a flat, substantially rectangular parallelepiped. ing. Here, what is described as a substantially rectangular parallelepiped is that at least a region where the adhesive member 30 is joined is formed with an uneven portion 22.

本実施例では、接着部材30a〜30dが塗布される部品本体21のコーナ付近に凹凸部22が形成されている。即ち、側面21cと側面21dとの接合部、側面21dと側面21eとの接合部、側面21eと側面21fとの接合部、側面21fと側面21cとの接合部に凹凸部22が形成されている。   In the present embodiment, the uneven portion 22 is formed in the vicinity of the corner of the component main body 21 to which the adhesive members 30a to 30d are applied. That is, the concavo-convex portion 22 is formed at the joint portion between the side surface 21c and the side surface 21d, the joint portion between the side surface 21d and the side surface 21e, the joint portion between the side surface 21e and the side surface 21f, and the joint portion between the side surface 21f and the side surface 21c. .

この凹凸部22は接着部材30の接合面積を確保するために設けられる。凹凸部22を設けることで接合面積が確保され、電子部品20と接着部材30とがより強固に接合されることとなる。従って、凹凸部22の数は多いほど好ましいが、部品本体21の大きさも考慮してその数は適宜調整しても良い。   The uneven portion 22 is provided to ensure a bonding area of the adhesive member 30. By providing the concavo-convex portion 22, a bonding area is ensured, and the electronic component 20 and the adhesive member 30 are bonded more firmly. Accordingly, it is preferable that the number of the concavo-convex portions 22 is larger, but the number may be appropriately adjusted in consideration of the size of the component main body 21.

上述した電子部品20は、例えばBGA型あるいはCSP型の半導体パッケージである。   The electronic component 20 described above is, for example, a BGA type or CSP type semiconductor package.

接着部材30は、電子部品20とプリント配線板10とを接合する部材である。接着部材30は絶縁性であることが好ましい。また、接着部材30は熱硬化性であることが好ましい。   The adhesive member 30 is a member that joins the electronic component 20 and the printed wiring board 10 together. The adhesive member 30 is preferably insulative. The adhesive member 30 is preferably thermosetting.

上述のように、電子部品20に凹凸部22を設けることにより、部品本体21と接着部材30との接合をより強固にすることができる。従って、従来と同量の接着部材30を塗布したとしても、部品本体21と接着部材30との接合面積がより広く取ることが可能となる。これにより、半導体パッケージの周辺を接合部材を塗布することで接合信頼性を確保するプリント回路板において、保守性を保ちつつ接続信頼性を高めることができる。   As described above, by providing the uneven portion 22 in the electronic component 20, the bonding between the component main body 21 and the adhesive member 30 can be further strengthened. Therefore, even if the same amount of the adhesive member 30 as that in the conventional case is applied, the bonding area between the component main body 21 and the adhesive member 30 can be increased. Thereby, in the printed circuit board which ensures joining reliability by apply | coating a joining member to the periphery of a semiconductor package, connection reliability can be improved, maintaining maintainability.

(プリント回路板の第2の実施の形態)
図3は、図1に示すポータブルコンピュータの筐体内部に収容されるプリント回路板の第2の実施の形態を示した図である。図3(a)は断面図、図3(b)は天面図を示す。
(Second embodiment of printed circuit board)
FIG. 3 is a diagram showing a second embodiment of a printed circuit board housed inside the casing of the portable computer shown in FIG. 3A is a cross-sectional view, and FIG. 3B is a top view.

図3において、図2の第1の実施の形態と同一部分は同一記号で示し、その説明は省略する。本実施の形態が、第1の実施の形態と異なる点は、接着部材30の塗布点数と、部品本体21における凹凸部22の設けられる領域である。   In FIG. 3, the same parts as those of the first embodiment of FIG. The present embodiment is different from the first embodiment in the number of application points of the adhesive member 30 and the region where the uneven portion 22 is provided in the component main body 21.

即ち、本実施の形態における接着部材30は、第1の実施の形態における接着部材30a〜30dに加え、接着部材30e,30f、30g,30h,30i,30j,30k,30lに示したように、夫々の周辺領域にも塗布している点である。また、これらの接着部材30の塗布の領域には接着部材30a〜30dと対応する部品本体21には凹凸部22が設けられており、結果として第1の実施の形態に比して凹凸部22が設けられた領域が広くなっている点である。   That is, the adhesive member 30 in the present embodiment includes the adhesive members 30e, 30f, 30g, 30h, 30i, 30j, 30k, and 30l in addition to the adhesive members 30a to 30d in the first embodiment. It is the point which has apply | coated also to each peripheral region. Further, in the region where the adhesive member 30 is applied, an uneven portion 22 is provided in the component main body 21 corresponding to the adhesive members 30a to 30d, and as a result, the uneven portion 22 as compared with the first embodiment. This is the point where the region where the is provided is widened.

上述のプリント回路板8においても、電子部品20に凹凸部22を設けることにより、部品本体21と接着部材30との接合をより強固にすることができる。従って、同量の接着部材30を塗布したとしても、部品本体21と接着部材30との接合面積がより広く取ることが可能となる。これにより、半導体パッケージの周辺を接合部材を塗布することで接合信頼性を確保するプリント回路板において、保守性を保ちつつ接続信頼性を高めることができる。   Also in the printed circuit board 8 described above, by providing the electronic component 20 with the concavo-convex portion 22, the bonding between the component main body 21 and the adhesive member 30 can be further strengthened. Therefore, even if the same amount of the adhesive member 30 is applied, the bonding area between the component main body 21 and the adhesive member 30 can be increased. Thereby, in the printed circuit board which ensures joining reliability by apply | coating a joining member to the periphery of a semiconductor package, connection reliability can be improved, maintaining maintainability.

(プリント回路板の第3の実施の形態)
図4は、図1に示すポータブルコンピュータの筐体内部に収容されるプリント回路板の第3の実施の形態を示した図である。図4(a)は断面図、図4(b)は天面図を示す。
(Third embodiment of printed circuit board)
FIG. 4 is a diagram showing a third embodiment of a printed circuit board housed inside the casing of the portable computer shown in FIG. 4A shows a cross-sectional view, and FIG. 4B shows a top view.

図4において、図2の第1の実施の形態と同一部分は同一記号で示し、その説明は省略する。本実施の形態が、第1の実施の形態と異なる点は、プリント配線板10上にも凹凸部12が形成されている点である。即ち、プリント配線板10上の接着部材30が塗布される領域に凹凸部12を設けている。これにより、接着部材30とプリント配線板10との接合面積が広く確保することができ、接着部材30とプリント配線板10とを強固に接合することが可能である。   4, the same parts as those in the first embodiment in FIG. 2 are denoted by the same symbols, and the description thereof is omitted. This embodiment is different from the first embodiment in that an uneven portion 12 is also formed on the printed wiring board 10. That is, the concavo-convex portion 12 is provided in a region where the adhesive member 30 is applied on the printed wiring board 10. Thereby, the joining area of the adhesive member 30 and the printed wiring board 10 can be ensured widely, and the adhesive member 30 and the printed wiring board 10 can be firmly joined.

上述のプリント回路板8においても、電子部品20に凹凸部22を設けるだけでなく、プリント配線板10にも凹凸部12を設けることにより、電子部品20とプリント配線板10とを接着部材30により更に強固にすることができる。従って、従来と同量の接着部材30を塗布したとしても、部品本体21と接着部材30との接合面積、及びプリント配線板10と接着部材30との接合面積がより広く取ることが可能となる。これにより、半導体パッケージの周辺を接合部材を塗布することで接合信頼性を確保するプリント回路板において、保守性を保ちつつ接続信頼性を高めることができる。   Also in the above-described printed circuit board 8, not only the uneven portion 22 is provided in the electronic component 20, but also the uneven portion 12 is provided in the printed wiring board 10, whereby the electronic component 20 and the printed wiring board 10 are bonded by the adhesive member 30. It can be further strengthened. Accordingly, even when the same amount of the adhesive member 30 as that in the conventional case is applied, the bonding area between the component main body 21 and the bonding member 30 and the bonding area between the printed wiring board 10 and the bonding member 30 can be increased. . Thereby, in the printed circuit board which ensures joining reliability by apply | coating a joining member to the periphery of a semiconductor package, connection reliability can be improved, maintaining maintainability.

図5は、凹凸部22及び凹凸部12の形状を示した図である。上述した第1の実施の形態〜第3の実施形態における凹凸部22や凹凸部12は、図5(a)に示したように矩形の凹凸を形成していても良いし、図5(b)に示したようにV字状の凹凸で形成していても良い。その他U字状等、接合面積が確保できれば特に形状は限定されない。   FIG. 5 is a diagram illustrating the shapes of the uneven portion 22 and the uneven portion 12. The uneven portion 22 and the uneven portion 12 in the first to third embodiments described above may form rectangular uneven portions as shown in FIG. 5A, or FIG. ) As shown in FIG. In addition, the shape is not particularly limited as long as a bonding area such as a U-shape can be secured.

(プリント回路板の製造方法)
以下に上述したプリント回路板の製造方法の実施の形態について説明する。図6は、本発明の実施の形態に係るプリント回路板の製造方法の実施の形態を示した図である。図6では、上述した第3の実施の形態のプリント回路板を例にとり説明している。
(Printed circuit board manufacturing method)
Embodiments of the method for manufacturing a printed circuit board described above will be described below. FIG. 6 is a diagram showing an embodiment of a method for manufacturing a printed circuit board according to an embodiment of the present invention. In FIG. 6, the printed circuit board according to the third embodiment described above is described as an example.

まず、図6(a)に示すように、電子部品20を実装するための複数のパッド11と、凹凸部12とを有したプリント配線板10を準備する(配線板準備工程,ステップS1)。   First, as shown to Fig.6 (a), the printed wiring board 10 which has the some pad 11 for mounting the electronic component 20 and the uneven | corrugated | grooved part 12 is prepared (wiring board preparation process, step S1).

次に、図6(b)に示すように、各パッド11に、はんだペーストHを塗布する(はんだ塗布工程,ステップS2)。このはんだ塗布工程は、はんだを塗布する領域に開口部を有したメタルマスクをプリント配線板10上に搭載し、このメタルマスクの上からはんだペースト塗布し、スキージ等の所定の工具を用いてメタルマスク上に塗布されたはんだを均一に塗り広げる。これにより開口部からはんだが塗布される。   Next, as shown in FIG. 6B, a solder paste H is applied to each pad 11 (solder application step, step S2). In this solder application process, a metal mask having an opening in the area where solder is applied is mounted on the printed wiring board 10, solder paste is applied from above the metal mask, and the metal is applied using a predetermined tool such as a squeegee. Uniformly spread the solder applied on the mask. Thereby, solder is applied from the opening.

次に、図6(c)に示すように、電子部品20をプリント配線板10上に実装する(実装工程、ステップS3)。この実装工程は、例えばマウンタ等の実装機を用いて電子部品20の上面21aを吸着し、はんだボール23をプリント配線板10上のパッド11に対向させる位置に移動し上からマウンタで搭載する。   Next, as shown in FIG.6 (c), the electronic component 20 is mounted on the printed wiring board 10 (mounting process, step S3). In this mounting process, for example, a mounting machine such as a mounter is used to suck the upper surface 21a of the electronic component 20, move the solder ball 23 to a position facing the pad 11 on the printed wiring board 10, and mount it with the mounter from above.

次に、図6(d)に示すように、熱硬化性の接着部材30を塗布する(接着剤塗布工程,ステップS4)。即ち、凹凸部12をマーキングとして用い、電子部品20とプリント配線板10上に接着部材30を塗布する。   Next, as shown in FIG. 6D, a thermosetting adhesive member 30 is applied (adhesive application step, step S4). That is, the adhesive member 30 is applied on the electronic component 20 and the printed wiring board 10 using the uneven portion 12 as a marking.

次に、図6(e)に示すように、接着部材30及び電子部品20とを実装したプリント配線板10を加熱してはんだ及び接着剤の接合を行う(加熱工程,ステップS5)。この加熱工程は例えばリフロー炉を使用して所定の温度プロファイルの加熱処理を行う。   Next, as shown in FIG. 6E, the printed wiring board 10 on which the adhesive member 30 and the electronic component 20 are mounted is heated to join the solder and the adhesive (heating process, step S5). In this heating step, for example, a reflow furnace is used to perform a heat treatment with a predetermined temperature profile.

上述したステップS1〜ステップS5の工程を経ることにより、はんだボール23により、電子部品20とプリント配線板10とが接合される。また、接着部材30によりプリント配線板10と電子部品20とが接合される。ここで、凹凸部22や凹凸部12により接着部材30と電子部品20との接合面積、及び接着部材30とプリント配線板10との接合面積が従来よりも広く確保できる。これにより、半導体パッケージの周辺を接合部材を塗布することで接合信頼性を確保するプリント回路板において、保守性を保ちつつ接続信頼性を高めることができる。   Through the steps S1 to S5 described above, the electronic component 20 and the printed wiring board 10 are joined by the solder balls 23. Further, the printed wiring board 10 and the electronic component 20 are joined by the adhesive member 30. Here, the unevenness portion 22 and the unevenness portion 12 can ensure a larger bonding area between the adhesive member 30 and the electronic component 20 and a larger bonding area between the adhesive member 30 and the printed wiring board 10 than before. Thereby, in the printed circuit board which ensures joining reliability by apply | coating a joining member to the periphery of a semiconductor package, connection reliability can be improved, maintaining maintainability.

本発明の実施の形態に係るポータブルコンピュータの斜視図。1 is a perspective view of a portable computer according to an embodiment of the present invention. 図1に示すポータブルコンピュータの筐体内部に収容されるプリント回路板の第1の実施の形態を示した図。The figure which showed 1st Embodiment of the printed circuit board accommodated in the inside of the housing | casing of the portable computer shown in FIG. 図1に示すポータブルコンピュータの筐体内部に収容されるプリント回路板の第2の実施の形態を示した図。The figure which showed 2nd Embodiment of the printed circuit board accommodated in the housing | casing of the portable computer shown in FIG. 図1に示すポータブルコンピュータの筐体内部に収容されるプリント回路板の第3の実施の形態を示した図。The figure which showed 3rd Embodiment of the printed circuit board accommodated in the inside of the housing | casing of the portable computer shown in FIG. 凹凸部22及び凹凸部12の形状を示した図。The figure which showed the shape of the uneven part 22 and the uneven part 12. FIG. 本発明の実施の形態に係るプリント回路板の製造方法の実施の形態を示した図。The figure which showed embodiment of the manufacturing method of the printed circuit board which concerns on embodiment of this invention.

符号の説明Explanation of symbols

1 ポータブルコンピュータ
2 本体
3 表示部筐体
4 ポインティングデバイス
5 キーボード
6 表示デバイス
8 プリント回路板
10 プリント配線板
10a 第1の面
10b 第2の面
11 パッド
12 凹凸部
20 電子部品
21 部品本体
21a 上面
21b 下面
21c〜21f 側面
22 凹凸部
23 はんだボール
30,30a〜30l 接着部材
DESCRIPTION OF SYMBOLS 1 Portable computer 2 Main body 3 Display part housing | casing 4 Pointing device 5 Keyboard 6 Display device 8 Printed circuit board 10 Printed wiring board 10a 1st surface 10b 2nd surface 11 Pad 12 Uneven part 20 Electronic component 21 Component main body 21a Upper surface 21b Lower surface 21c-21f Side 22 Uneven portion 23 Solder balls 30, 30a-30l Adhesive member

Claims (8)

略方体形状の本体部と、前記本体部の1の面に設けられた複数のはんだボールとを有した半導体パッケージと、
前記半導体パッケージの前記複数のはんだボールが実装されるパッドを有したプリント配線板とを備えたプリント回路基板であって、
前記プリント配線板と前記半導体パッケージとが接着部材で接合されており、
前記接着部材が接合されている領域の前記半導体パッケージまたは前記プリント配線板の少なくとも一方の形状の一部が凹凸形状になっていることを特徴とするプリント回路板。
A semiconductor package having a substantially rectangular main body, and a plurality of solder balls provided on one surface of the main body;
A printed circuit board comprising a printed wiring board having a pad on which the plurality of solder balls of the semiconductor package are mounted;
The printed wiring board and the semiconductor package are joined with an adhesive member,
A printed circuit board, wherein a part of at least one of the semiconductor package and the printed wiring board in a region where the adhesive member is bonded has an uneven shape.
前記凹凸形状は、前記半導体パッケージの本体部の側面に設けられていることを特徴とする請求項1に記載のプリント回路板。   The printed circuit board according to claim 1, wherein the uneven shape is provided on a side surface of a main body portion of the semiconductor package. 前記接着部材は、前記半導体パッケージのコーナ部に接合されることを特徴とする請求項1に記載のプリント回路板。   The printed circuit board according to claim 1, wherein the adhesive member is bonded to a corner portion of the semiconductor package. 前記接着部材は、前記半導体パッケージのコーナ部及びこのコーナ部の近傍に接合されることを特徴とする請求項1に記載のプリント回路板。   The printed circuit board according to claim 1, wherein the adhesive member is bonded to a corner portion of the semiconductor package and a vicinity of the corner portion. 筐体と、前記筐体に収容されたプリント回路板とを備えた電子機器であって、
前記プリント回路板は、
略方体形状の本体部と、前記本体部の1の面に設けられた複数のはんだボールとを有した半導体パッケージと、
前記半導体パッケージの前記複数のはんだボールが実装されるパッドを有したプリント配線板と、
前記プリント配線板と前記半導体パッケージとを接合する接着部材とを備え、
前記接着部材が接合されている領域の前記半導体パッケージまたは前記プリント配線板の少なくとも一方の形状の一部が凹凸形状になっていること
を特徴とする電子機器。
An electronic device comprising a housing and a printed circuit board accommodated in the housing,
The printed circuit board is:
A semiconductor package having a substantially rectangular main body, and a plurality of solder balls provided on one surface of the main body;
A printed wiring board having a pad on which the plurality of solder balls of the semiconductor package are mounted;
An adhesive member for joining the printed wiring board and the semiconductor package;
An electronic apparatus, wherein a part of at least one of the shape of the semiconductor package or the printed wiring board in a region where the adhesive member is bonded is an uneven shape.
前記凹凸形状は、前記半導体パッケージの本体部の側面に設けられていることを特徴とする請求項5に記載の電子機器。   The electronic device according to claim 5, wherein the uneven shape is provided on a side surface of a main body portion of the semiconductor package. 前記接着部材は、前記半導体パッケージのコーナ部に接合されることを特徴とする請求項5に記載の電子機器。   The electronic device according to claim 5, wherein the adhesive member is bonded to a corner portion of the semiconductor package. 前記接着部材は、前記半導体パッケージのコーナ部及びこのコーナ部の近傍に接合されることを特徴とする請求項5に記載の電子機器。   The electronic apparatus according to claim 5, wherein the adhesive member is bonded to a corner portion of the semiconductor package and a vicinity of the corner portion.
JP2006342555A 2006-12-20 2006-12-20 Printed circuit board, and electronic apparatus Pending JP2008153583A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010219346A (en) * 2009-03-17 2010-09-30 Toshiba Corp Printed circuit board and electronic apparatus equipped with the same
US7916496B2 (en) 2008-09-30 2011-03-29 Kabushiki Kaisha Toshiba Printed circuit board and electronic apparatus having printed circuit board
JP2011134750A (en) * 2009-12-22 2011-07-07 Panasonic Electric Works Co Ltd Semiconductor device
JP2012040495A (en) * 2010-08-19 2012-03-01 Panasonic Corp Paste application method
JP2012244034A (en) * 2011-05-23 2012-12-10 Panasonic Corp Mounting structure of semiconductor package component and manufacturing method thereof
JP2013004580A (en) * 2011-06-13 2013-01-07 Ngk Spark Plug Co Ltd Ceramic multilayer substrate

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7916496B2 (en) 2008-09-30 2011-03-29 Kabushiki Kaisha Toshiba Printed circuit board and electronic apparatus having printed circuit board
JP2010219346A (en) * 2009-03-17 2010-09-30 Toshiba Corp Printed circuit board and electronic apparatus equipped with the same
JP2011134750A (en) * 2009-12-22 2011-07-07 Panasonic Electric Works Co Ltd Semiconductor device
JP2012040495A (en) * 2010-08-19 2012-03-01 Panasonic Corp Paste application method
JP2012244034A (en) * 2011-05-23 2012-12-10 Panasonic Corp Mounting structure of semiconductor package component and manufacturing method thereof
JP2013004580A (en) * 2011-06-13 2013-01-07 Ngk Spark Plug Co Ltd Ceramic multilayer substrate

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