JP2007134448A - Method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the reliability of a semiconductor device wherein semiconductor chips are mounted to both surfaces of a tape substrate. <P>SOLUTION: A first semiconductor chip 2 is mounted to a tape substrate 5, and a second semiconductor chip 3 larger than the first semiconductor chip 2 is also mounted thereto. Then an underfilling material 4 is put into between the tape substrate 5 and the first semiconductor chip 2, and the underfilling material 4 is put into between the tape substrate 5 and the second semiconductor chip 3. Thus, a large chip is filled with the underfilling material 4 so as to fill a small chip with the underfilling material 4 first, in the state where the tape substrate 5 is curved a little. As a result, both small and large chips are surely filled with the underfilling material 4, and the reliability of a COF 1 (semiconductor device) is improved. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a technique effective when applied to a method for manufacturing a semiconductor device in which semiconductor chips are mounted on both sides of a tape substrate.

On one side of one film-like double-sided wiring board, a semiconductor integrated circuit chip having a small external dimension is mounted, and then on the other side of the film-like double-sided wiring board located on the bump of the semiconductor integrated circuit chip, There is a technique in which a semiconductor integrated circuit chip having a large external dimension is placed, and the semiconductor integrated circuit chip is connected and mounted while applying a weight (see, for example, Patent Document 1).
Japanese Patent Laid-Open No. 2003-7965 (FIG. 2)

  In a semiconductor device mounted on a small and thin portable electronic device such as a portable telephone, the mounting area is small and the mounting height is low. A technique using this is known. This is because the tape substrate is made of a soft material, so that a plurality of semiconductor chips such as a microcomputer and a memory can be mounted and then bent and mounted.

  By using the tape substrate in this manner, mounting can be realized even at a low mounting height, and a required mounting area can be reduced.

  However, the tape substrate has a higher material cost than a wiring substrate made of, for example, a glass epoxy material.

  Therefore, for example, as in Patent Document 1 (Japanese Patent Application Laid-Open No. 2003-7965), there is a technology for reducing the mounting area by mounting semiconductor chips on both sides of the tape substrate to reduce the amount of tape substrate used.

  As a result of examining the assembly of a semiconductor device in which semiconductor chips of different sizes (outer dimensions) are mounted on both surfaces of the tape substrate as in the above-mentioned Patent Document 1, the inventor filled the underfill material in the large and small chips. Found that it is necessary to consider.

  That is, when the underfill material is filled from a large chip, the amount of resin is larger than that of a small chip, so that a resin stress is generated and a warp is formed on the tape substrate. It is difficult to fill the small chip with the underfill material with the tape substrate warped.

  Also, as the underfill material, a material having low heat resistance is often used. Therefore, if the underfill material is filled in advance in the die bonding process, the temperature of the heat stage in the die bonding process is about 400 ° C. Therefore, there is a problem that an excessive curing action works and cracks are formed in the underfill material.

  In addition, the above-mentioned Patent Document 1 (Japanese Patent Laid-Open No. 2003-7965) does not disclose any filling method or filling order of the underfill material.

  An object of the present invention is to provide a technique capable of improving the reliability of a semiconductor device in which semiconductor chips are mounted on both sides of a tape substrate.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.

  That is, the present invention includes a step of mounting the first semiconductor chip on the first main surface of the tape substrate, and mounting a second semiconductor chip larger than the first semiconductor chip on the second main surface of the tape substrate. A step of filling an underfill material between the first main surface of the tape substrate and the first semiconductor chip, and then semi-curing the underfill material, and the second main surface of the tape substrate and the second semiconductor chip. It has a process of filling an underfill material in between and then semi-curing it.

  The present invention also includes a step of mounting the first semiconductor chip on the tape substrate such that the through hole of the tape substrate is disposed on the first semiconductor chip, and a second semiconductor chip larger than the first semiconductor chip. A step of mounting the second semiconductor chip on the tape substrate so that the through-hole is arranged on the top, dropping an underfill material from either one of the first or second semiconductor chip and passing it through the through-hole. And filling the space between the first and second semiconductor chips.

  The present invention further includes a step of mounting the first semiconductor chip on the tape substrate such that the through hole of the tape substrate is disposed on the first semiconductor chip, and the penetration from above the second main surface of the tape substrate. A step of applying an adhesive on the main surface of the first semiconductor chip through the hole; a second semiconductor chip larger than the first semiconductor chip on the second main surface of the tape substrate through the adhesive; It has the process of mounting.

  Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  Mounting a first semiconductor chip on the tape substrate, mounting a second semiconductor chip larger than the first semiconductor chip, and then filling an underfill material between the tape substrate and the first semiconductor chip; Furthermore, by filling the underfill material between the tape substrate and the second semiconductor chip, the underfill material is filled in the small chip first, so the large chip is filled with the tape substrate with little warpage. can do. As a result, both the large and small chips can be reliably filled with the underfill material, and the reliability of the semiconductor device can be improved.

  In the following embodiments, the description of the same or similar parts will not be repeated in principle unless particularly necessary.

  Further, in the following embodiment, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments, but they are not irrelevant to each other unless otherwise specified. The other part or all of the modifications, details, supplementary explanations, and the like are related.

  Also, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), particularly when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and it may be more or less than the specific number.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof will be omitted.

(Embodiment 1)
1 is a cross-sectional view showing an example of the structure of the semiconductor device according to the first embodiment of the present invention, FIG. 2 is a front view showing the structure of the semiconductor device shown in FIG. 1, and FIG. 3 is the structure of the semiconductor device shown in FIG. 4 is a front view showing the structure of the tape substrate shown in FIG. 1, FIG. 5 is a back view showing the structure of the tape substrate shown in FIG. 1, and FIG. 6 is an example of an assembly procedure of the semiconductor device shown in FIG. FIG. 7 is a schematic configuration diagram showing an example of the structure of the potting apparatus used in the assembly shown in FIG. 6, and FIG. 8 is a manufacturing process flow showing a modification of the assembly procedure of the semiconductor device shown in FIG. FIG.

  The semiconductor device according to the first embodiment shown in FIGS. 1 to 3 is called a COF (Chip On Film) 1 in which semiconductor chips (ICs (Integrated Circuits)) are mounted on both front and back surfaces of a tape substrate 5. For example, it is incorporated in a thin and small portable electronic device such as a portable telephone. The tape substrate 5 used for the COF 1 is obtained by forming a metal layer on the base material 5c by sputtering and then forming desired leads (electrodes, wirings, wiring patterns) by etching. Therefore, since the thickness of the tape substrate used in a semiconductor device called TCP (Tape Carrier Package) is thinner than that of the semiconductor device, the thickness of the entire semiconductor device can be reduced.

  Since the tape substrate 5 is thin and flexible, it can be bent and mounted in a portable electronic device, but the material cost is higher than a wiring substrate made of, for example, a glass epoxy material. . Accordingly, the COF 1 according to the first embodiment has a structure in which the semiconductor chip is mounted on both the front and back surfaces of the tape substrate 5 to reduce the chip mounting area and the usage amount of the tape substrate 5.

  The structure of the COF 1 will be described. The first semiconductor chip 2 mounted on the surface (first main surface) 5 a of the tape substrate 5 and the outer dimensions of the first semiconductor chip 2 are larger than those of the first semiconductor chip 2. Second semiconductor chip 3 mounted on back surface (second main surface) 5b, between front surface 5a of tape substrate 5 and first semiconductor chip 2, and back surface 5b of tape substrate 5 and second semiconductor An underfill material 4 filled between the chips 3 is provided. In addition to the first semiconductor chip 2, a chip component (electronic component) 7 is mounted on the surface 5 a of the tape substrate 5.

  As shown in FIG. 1, the tape substrate 5 is provided with leads (electrodes, wirings) 5d on the front and back surfaces of the base material 5c in flip chip connection portions (chip mounting regions) of large and small semiconductor chips. Yes. As shown in FIGS. 2 and 3, the leads 5d are provided by concentrating from a plurality of external terminals 5f formed at one end in the longitudinal direction of the tape substrate 5 toward the respective chip mounting areas. ing. The plurality of external terminals 5f are formed for electrical connection with a connector or the like. Further, a solder resist 5e, which is an insulating film for protecting each lead 5d, is provided in a region other than the flip chip connection portion of the lead 5d on both the front and back surfaces and a region other than the lead 5d on which the chip component 7 is soldered on the surface 5a. Is formed.

  The base material 5c of the tape substrate 5 is made of, for example, a polyimide resin, and the lead 5d is made of, for example, a copper alloy.

  The first semiconductor chip 2 mounted on the COF 1 is, for example, an IC including a memory circuit. On the other hand, the second semiconductor chip 3 having an outer dimension larger than that of the first semiconductor chip 2 is the first semiconductor chip 2. For controlling the operation of the semiconductor chip 2, for example, an IC including a microcomputer circuit. Accordingly, the COF 1 is also a system-in-package that can provide a system by mounting a plurality of semiconductor chips in one semiconductor device. The COF 1 is more in the direction of the second semiconductor chip 3 than the first semiconductor chip 2. However, it has a large number of pins and a large size (external dimension).

  The first semiconductor chip 2 and the second semiconductor chip 3 are respectively mounted on the tape substrate 5 by flip chip connection. That is, the main surface 2a of the first semiconductor chip 2 and the surface 5a of the tape substrate 5 are opposed to each other, the pad 2c that is a surface electrode of the main surface 2a of the first semiconductor chip 2 and the surface of the tape substrate 5 The lead 5d of 5a is electrically connected through an Au bump (bump electrode) 6.

  On the other hand, the main surface 3 a of the second semiconductor chip 3 and the back surface 5 b of the tape substrate 5 are opposed to each other, the pad 3 c that is a surface electrode of the main surface 3 a of the second semiconductor chip 3, and the back surface of the tape substrate 5. The lead 5d of 5b is electrically connected through the Au bump 6.

  The Au bumps 6 and the leads 5d of the tape substrate 5 of both chips are connected by, for example, Au—Sn thermal eutectic.

  An underfill material 4 is filled between the main surface 2 a of the first semiconductor chip 2 and the surface 5 a of the tape substrate 5, and further, the underfill material 4 is a side surface of the first semiconductor chip 2. 2d is also covered. As a result, the underfill material 4 protects the flip chip connecting portion of the first semiconductor chip 2 and also protects the first semiconductor chip 2. However, the back surface 2b of the first semiconductor chip 2 is exposed to the outside.

  Similarly, the underfill material 4 is filled between the main surface 3 a of the second semiconductor chip 3 and the back surface 5 b of the tape substrate 5, and the underfill material 4 further includes the underfill material 4 of the second semiconductor chip 3. The side surface 3d is also covered. As a result, the underfill material 4 protects the flip chip connecting portion of the second semiconductor chip 3 and also protects the second semiconductor chip 3. However, the back surface 3b of the second semiconductor chip 3 is exposed to the outside.

  As the underfill material 4, it is preferable to use, for example, a relatively inexpensive thermosetting epoxy resin. The thermosetting epoxy resin has low heat resistance, and when filled, the underfill material 4 has a lower viscosity than the paste. That is, when a thermosetting epoxy resin is adopted as the underfill material 4, the state at the time of filling is a state in which the fluidity is higher than that of the paste.

  Further, a chip component 7 is mounted on the surface 5a of the tape substrate 5 as shown in FIGS. The chip component 7 includes, for example, a resistance element or a capacitor element, and is electrically connected to the lead 5 d of the tape substrate 5 via the solder 8.

  Next, a method for manufacturing the semiconductor device (COF1) according to the first embodiment will be described with reference to a process flow diagram shown in FIG.

  First, a die bonding process for mounting two types of large and small semiconductor chips on the tape substrate 5 is performed.

  First, a tape substrate 5 as shown in FIGS. 4 and 5 is prepared. The tape substrate 5 is supplied to the apparatus in the state of a hoop wound around the reel 12f, and the tape substrate 5 drawn out from the reel 12f is inserted into a sprocket hole 5m provided at the edge of the base material 5c of the tape substrate 5. The sprocket of the feed mechanism is fitted and conveyed by the rotation of the feed mechanism. That is, a plurality of product regions are continuously formed on one base material 5c, and the tape substrate 5 shown in FIGS. 4 and 5 shows one of them. The planar shape intersecting with the thickness of the tape substrate 5 is, for example, a rectangle.

  On the surface 5 a side of the tape substrate 5, a plurality of external terminals 5 f are formed along one short side at one end in the longitudinal direction of the tape substrate 5. Furthermore, a plurality of leads (electrodes) 5d are formed which are gathered from the plurality of external terminals 5f toward the flip chip connecting portion on which the first semiconductor chip 2 is mounted. The plurality of leads 5d are formed to face each other. That is, the plurality of leads 5d are formed in two rows.

  A plurality of terminals (electrodes) 5h for mounting the chip component 7 are formed in a region adjacent to the flip connection portion. In addition, an insulating film is provided on the base material 5c so that the external terminals 5f for connecting to a connector or the like, the leads 5d that are flip chip connecting portions, and the plurality of terminals 5h that are chip component mounting portions are exposed. It is covered with solder resist 5e. That is, the plurality of leads 5d formed on the surface 5a side of the tape substrate 5 are exposed from the opening (first opening) 5i formed in the solder resist 5e. The plurality of terminals 5h are exposed from an opening (second opening) 5j formed in the solder resist 5e.

  On the other hand, the back surface 5b side of the tape substrate 5 is formed with a plurality of external terminals 5f along the short side at one end portion in the longitudinal direction of the tape substrate 5 in the same manner as the front surface 5a side. Furthermore, a plurality of leads (electrodes) 5d are formed which are gathered from the plurality of external terminals 5f toward the flip chip connecting portion on which the first semiconductor chip 2 is mounted. Here, since the semiconductor chip 3 mounted on the back surface 5b side of the tape substrate 5 has a larger outer size than the semiconductor chip 2 mounted on the front surface 5a side, a plurality of leads formed on the back surface 5b side of the tape substrate 5 is provided. The interval 5d facing (interval in the longitudinal direction) is formed larger than the surface 5a side.

  That is, the plurality of leads 5d formed on the back surface 5b side of the tape substrate 5 are exposed from the opening (third opening) 5k formed in the solder resist 5e. Furthermore, an opening (third opening) 5k formed in the solder resist 5e on the back surface 5b side of the tape substrate 5 is an opening (first opening) formed in the solder resist 5e on the front surface 5a side of the tape substrate 5. (Opening) larger than 5i.

  Next, as shown in ILB (inner lead bonding) 1 in step S1 of FIG. 6, the first semiconductor chip 2 which is a small chip is mounted. That is, the first semiconductor chip 2 is mounted on the surface (first main surface) 5a of the tape substrate 5 with the surface 5a and the main surface 2a of the first semiconductor chip 2 facing each other.

  Here, first, the first semiconductor chip 2 is disposed on the heat stage 10. At that time, the main surface 2a of the first semiconductor chip 2 is directed upward, and the surface 5a of the tape substrate 5 facing downward is opposed to the main surface 2a of the first semiconductor chip 2 on the heat stage 10. Deploy. At this time, the heat stage 10 is heated to 400 to 450 ° C., for example.

  Thereafter, the bonding tool 9 is lowered above the tape substrate 5, the heat stage 10 is raised below the tape substrate 5, and bonding is performed from the back surface (second main surface) 5 b side (above) of the tape substrate 5. The tape substrate 5 is pressed by the tool 9, and the Au bump 6 on the pad 2c of the main surface 2a of the first semiconductor chip 2 and the corresponding lead 5d on the surface 5a side of the tape substrate 5 are Au-Sn heat. Connect by eutectic thermocompression bonding.

  Thereby, the first semiconductor chip 2 which is a small chip is flip-chip connected to the surface 5a of the tape substrate 5 by inner lead bonding (ILB). In addition, the temperature of the bonding tool 9 at the time of inner lead bonding is about 100-275 degreeC, for example. At this time, the temperature of the Au—Sn thermal eutectic is, for example, 360 ° C.

  Thereafter, as shown in ILB2 in step S2 of FIG. 6, the second semiconductor chip 3 which is a large chip is mounted. That is, the second semiconductor chip 3 larger than the first semiconductor chip 2 is mounted on the back surface 5b of the tape substrate 5 with the main surface 3a and the back surface 5b of the tape substrate 5 facing each other.

  In that case, first, the front and back of the tape substrate 5 are reversed, the front surface 5a of the tape substrate 5 is directed upward, and the back surface 5b is directed downward. In this state, the second semiconductor chip 3 is disposed on the heat stage 10. Here, the main surface 3a of the second semiconductor chip 3 is directed upward, and the back surface 5b of the tape substrate 5 facing downward and the main surface 3a of the second semiconductor chip 3 face each other on the heat stage 10. Deploy.

  Thereafter, the bonding tool 9 is lowered above the tape substrate 5, the heat stage 10 is raised below the tape substrate 5, and the tape substrate 5 is moved by the bonding tool 9 from the surface 5 a side (above) of the tape substrate 5. The Au bump 6 on the pad 3c of the main surface 3a of the second semiconductor chip 3 and the corresponding lead 5d on the back surface 5b side of the tape substrate 5 are connected by thermocompression bonding of Au-Sn thermal eutectic. To do.

  At that time, a bonding tool 9 having a counterbore (concave portion) 9a is used. That is, the first semiconductor chip 2 is disposed in the counterbore 9 a of the bonding tool 9, and the second semiconductor chip 3 is placed on the second semiconductor chip 3 via the tape substrate 5 by the bonding tool 9 from the surface 5 a side (above) of the tape substrate 5. The second semiconductor chip 3 is mounted on the back surface 5 b of the tape substrate 5 by pressing the Au bump 6.

  Thereby, the Au bump 6 on the pad 3c of the main surface 3a of the second semiconductor chip 3 and the corresponding lead 5d on the back surface 5b side of the tape substrate 5 are connected by thermocompression bonding of Au-Sn thermal eutectic. Is done.

  That is, the second semiconductor chip 3, which is a large chip, is flip-chip connected to the back surface 5 b of the tape substrate 5 by inner lead bonding (ILB).

  As described above, the first semiconductor chip 2 that is a small chip is mounted on the front surface 5a side of the tape substrate 5, and the second semiconductor chip 3 that is a large chip is mounted on the back surface 5b side of the tape substrate 5. The process ends.

  Thereafter, a potting (hereinafter also referred to as POT) process is performed.

  First, as indicated by POT1 in step S3 of FIG. 6, the surface 5a of the tape substrate 5 on which the first semiconductor chip 2 is mounted faces upward, and the surface 5a of the tape substrate 5 and the first semiconductor chip 2 The underfill material 4 is filled between the main surface 2a. At that time, the underfill material 4 is dropped onto the tape substrate 5 from the potting nozzle 11 on the surface 5 a side (upper side) of the tape substrate 5. At this time, it is dropped along the periphery of the side surface of the first semiconductor chip 2.

  Thus, the underfill material 4 is filled so as to substantially cover the surface 5 a of the tape substrate 5 and the main surface 2 a of the first semiconductor chip 2 and the side surface 2 d of the first semiconductor chip 2.

  The underfill material 4 used in the first embodiment is, for example, a relatively inexpensive thermosetting epoxy resin. This thermosetting epoxy resin has relatively low heat resistance, and has a lower viscosity than that of a paste when filled. That is, when a thermosetting epoxy resin is adopted as the underfill material 4, the state at the time of filling is a state in which the fluidity is higher than that of the paste.

  Thereafter, the underfill material 4 filled below and around the first semiconductor chip 2 is heated and semi-cured (prebaked). As the semi-curing treatment, for example, a heat treatment is performed at about 130 ° C. for about 5 minutes.

  After the semi-curing, the front and back of the tape substrate 5 are reversed, and the back surface 5b side of the tape substrate 5 on which the second semiconductor chip 3 is mounted faces upward as shown in POT2 of step S4 in FIG. The underfill material 4 is filled between the back surface 5b of the semiconductor chip 5 and the main surface 3a of the second semiconductor chip 3.

  At this time, the underfill material 4 is dropped onto the tape substrate 5 from the potting nozzle 11 on the back surface 5b side (upper side) of the tape substrate 5 as in the case of potting on the first semiconductor chip 2. At this time, it is dropped along the periphery of the side surface of the second semiconductor chip 3.

  Thus, the underfill material 4 is filled so as to substantially cover the back surface 5b of the tape substrate 5 and the main surface 3a of the second semiconductor chip 3 and the side surface 3d of the second semiconductor chip 3.

  Thereafter, the underfill material 4 filled below and around the second semiconductor chip 3 is heated and semi-cured.

  Here, the potting apparatus 12 shown in FIG. 7 used in the potting process will be described.

  The potting device 12 according to the first embodiment draws out a plurality of long tape substrates 5 wound around the reel 12f, performs application of the underfill material 4 and pre-bake (semi-curing), and then winds it around the reel 12f again. The potting apparatus 12 shown in FIG. 7 described as an example in the first embodiment is a double-sided potting type manufacturing apparatus capable of applying to both sides of the tape substrate 5.

  The potting device 12 includes a loader 12a that pulls out a plurality of long tape substrates 5 wound around a reel 12f, a first potting portion 12b that applies an underfill material 4 to either the front or back surface of the tape substrate 5, A second potting portion 12d for applying the underfill material 4 to either the front or back surface of the tape substrate 5 and a drying furnace 12c for pre-baking the underfill material 4 applied to the tape substrate 5 are provided. Further, the potting device 12 rewinds the reversing roller 12g for reversing the front and back surfaces of the multiple tape substrates 5 and the multiple tape substrates 5 after the application and pre-baking of the underfill material 4 to the reel 12f. An unloader 12e for storing is provided.

  Therefore, in the assembly of the COF 1 shown in FIG. 6, after the die bonding of the large and small chips in step S1 and step S2, the small chip is formed in the first potting unit 12b of the potting device 12 shown in FIG. The underfill material 4 is applied to the surface 5a side of the tape substrate 5 on which the first semiconductor chip 2 is mounted.

  Subsequently, the tape substrate 5 is sent to the drying furnace 12c, and the underfill material 4 applied to the surface 5a side is pre-baked and semi-cured in the drying furnace 12c. Thereafter, the tape substrate 5 is turned upside down by the reversing roller 12g of the second potting portion 12d and the back surface 5b side is directed upward, and then the second potting portion 12d is a large chip as indicated by POT2 in step S4. An underfill material 4 is applied to the back surface 5b side of the tape substrate 5 on which the second semiconductor chip 3 is mounted.

  Thereafter, the tape substrate 5 is again sent to the drying furnace 12c, and the underfill material 4 applied to the back surface 5b side is pre-baked and semi-cured in the drying furnace 12c. As the semi-curing treatment, for example, a heat treatment is performed at about 130 ° C. for about 5 minutes.

  After pre-baking, the tape substrate 5 is turned upside down by the reversing roller 12g provided in the drying furnace 12c, the surface 5a side is directed upward again, and in this state, the tape substrate 5 is sent to the unloader 12e and potted by the unloader 12e. The multiple tape substrates 5 that have been pre-baked are wound around the reel 12f.

  Thus, by using the potting device 12 capable of potting on both surfaces, the number of times the tape substrate 5 is allowed to flow in the device can be reduced to one time.

  Thus, the potting process for filling the underfill material 4 on the front and back surfaces of the tape substrate 5 is completed.

  Thereafter, the reel 12f around which the tape substrate 5 has been wound is taken out from the potting device 12, transported to the baking device for performing the main baking (main curing), and the main baking process of the underfill material 4 is performed by the baking device. For example, the baking process is performed at about 150 ° C. for about 2 hours. Since the underfill material 4 is in a semi-cured state by pre-baking in the potting device 12, the large and small semiconductor chips mounted on the tape substrate 5 are not misaligned while being transported to the baking device for this baking. Can be.

  After the completion of this baking, the chip component 7 is mounted with solder 8 on the surface 5a side of the tape substrate 5 as shown in component mounting in step S5 of FIG. The chip component 7 is an electronic component having, for example, a resistance element or a capacitor element. The chip component 7 may be mounted not on the front surface 5a side but on the back surface 5b side, and may be mounted on the front and back surfaces if necessary.

  According to the manufacturing method of the COF (semiconductor device) 1 of the first embodiment, the first semiconductor chip 2 that is a small chip is mounted on the tape substrate 5, and the second semiconductor chip 3 that is a large chip is mounted. After that, the underfill material 4 is filled between the tape substrate 5 and the first semiconductor chip 2, and the underfill material 4 is filled between the tape substrate 5 and the second semiconductor chip 3. Thereby, since the underfill material 4 is filled in a small chip first, the underfill material 4 can be filled in a large chip with less warping of the tape substrate 5.

  As a result, both the large and small chips can be reliably filled with the underfill material 4, and the reliability of the COF (semiconductor device) 1 can be improved.

  In the first embodiment, the first semiconductor chip 2 is mounted on the tape substrate 5, the second semiconductor chip 3 is further mounted, and then the first semiconductor chip 2 is filled with the underfill material 4. Then, the second semiconductor chip 3 is filled with the underfill material 4. Thereby, since the underfill material 4 is filled after the die bonding on both sides of the tape substrate 5 is completed, it is possible to eliminate a phenomenon that a crack is formed in the underfill material 4 during the die bonding.

  Therefore, since no crack is formed in the underfill material 4, the reliability of the COF 1 can be improved.

  Further, in the first embodiment, by using a relatively inexpensive resin material such as a thermosetting epoxy resin as the underfill material 4, an adhesive such as a non-conductive paste or a conductive film described later is used. Compared with the case of using, the total cost of assembly can be kept low.

  Thereafter, a desired semiconductor device can be obtained by cutting the sprocket holes 5m provided at the edge of the base material 5c from the tape substrate 5.

  Next, a modification of the first embodiment shown in FIG. 8 will be described. FIG. 8 is a modified example of the assembly of the COF 1 shown in FIG. 6. The difference from the assembly of FIG. 6 is the ILB 2 in step S12, in which the second semiconductor chip 3 which is a large chip is replaced with the back surface 5b of the tape substrate 5. The first semiconductor chip 2 which is a small chip is arranged in the counterbore 10a of the heat stage 10 having the counterbore (concave portion) 10a when mounted on the top. Further, with the Au bump 6 on the second semiconductor chip 3 supported by the heat stage 10 via the tape substrate 5, the second semiconductor chip 3 is bonded by the bonding tool 9 from the back surface 5 b side (above) of the tape substrate 5. And the second semiconductor chip 3 is mounted on the back surface 5b of the tape substrate 5 by thermocompression bonding.

  That is, when mounting the second semiconductor chip 3 which is a large chip using the heat stage 10 in which the counterbore 10a is formed, the first semiconductor chip 2 is disposed in the counterbore 10a of the heat stage 10 and this state Then, the second semiconductor chip 3 is pressed from above by the bonding tool 9 to perform die bonding of the second semiconductor chip 3.

  Thereby, in the die bonding process, after mounting the first semiconductor chip 2 which is a small chip on the surface 5a side of the tape substrate 5 in ILB1 in step S11, the tape substrate 5 is kept in the same direction without being reversed. The second semiconductor chip 3 which is a large chip can be mounted on the back surface 5b side of the tape substrate 5 by the ILB 2 in step S12.

  As a result, compared with the assembly procedure shown in FIG. 6, the reversing operation of the tape substrate 5 in the die bonding process can be reduced once, and the assembly efficiency can be improved.

  Note that the ILB1 in step S11, the POT1 in step S13, the POT2 in step S14, and the component mounting in step S15 in the assembly shown in FIG. 8 are the ILB1 in step S1, the POT1 in step S3, and the step S4 in the assembly shown in FIG. This is exactly the same as the component mounting in POT2 and step S5.

  Therefore, the same effect as that of the assembly shown in FIG. 6 can be obtained by the assembly of the modification shown in FIG.

(Embodiment 2)
9 is a front view showing the structure of the tape substrate according to the second embodiment of the present invention, FIG. 10 is a rear view showing the structure of the tape substrate shown in FIG. 9, and FIG. 11 is a diagram of the semiconductor device according to the second embodiment of the present invention. FIG. 12 is a manufacturing process flow diagram showing a modification of the assembling procedure of the semiconductor device shown in FIG. 11.

  As shown in FIGS. 9 and 10, in the method of manufacturing the semiconductor device according to the second embodiment, the underfill material 4 is passed through the through hole 5g in the potting process using the tape substrate 5 on which the through hole 5g is formed. Thus, the underfill material 4 is filled on both the front and back surfaces of the tape substrate 5 by a single potting operation to reduce the number of times of potting. The difference from the first embodiment is that a through hole 5g is formed in the chip mounting area as shown in FIGS.

  First, a plurality of leads (electrodes) 5d corresponding to the pad arrangement of a semiconductor chip are arranged to face each other in two rows, and a tape substrate 5 in which through holes 5g are formed between the two rows of the plurality of leads 5d. Prepare.

  Thereafter, as indicated by ILB1 in step S21 of FIG. 11, the surface 5a and the main surface 2a of the first semiconductor chip 2 which is a small chip are opposed to each other on the surface 5a of the tape substrate 5, and the first The first semiconductor chip 2 is mounted so that the through hole 5g is arranged on the main surface 2a of the semiconductor chip 2.

  The first semiconductor chip 2 is flip-chip connected on the surface 5a of the tape substrate 5 by the same method as the Au—Sn thermal eutectic of step S1 in FIG. 6 of the first embodiment.

  Thereafter, the front and back sides of the tape substrate 5 are reversed, and the second semiconductor chip 3 which is a large chip is placed on the back surface 5b of the tape substrate 5 as shown in ILB2 of step S22 in FIG. 5 is mounted so that the back surface 5b is opposed to the main surface 3a of the second semiconductor chip 3 and the through hole 5g is disposed on the main surface 3a. Note that the second semiconductor chip 3 is also flip-chip connected to the back surface 5b of the tape substrate 5 by the same method as the Au—Sn thermal eutectic of step S2 of FIG.

  At that time, a bonding tool 9 having a counterbore 9a is used. That is, the first semiconductor chip 2 is disposed in the counterbore 9 a of the bonding tool 9, and the second semiconductor chip 3 is placed on the second semiconductor chip 3 via the tape substrate 5 by the bonding tool 9 from the surface 5 a side (above) of the tape substrate 5. The second semiconductor chip 3 is mounted on the back surface 5 b of the tape substrate 5 by pressing the Au bump 6.

  Thereby, the Au bump 6 on the pad 3c of the main surface 3a of the second semiconductor chip 3 and the corresponding lead 5d on the back surface 5b side of the tape substrate 5 are connected by thermocompression bonding of Au-Sn thermal eutectic. Is done.

  As described above, the first semiconductor chip 2 that is a small chip is mounted on the front surface 5a side of the tape substrate 5, and the second semiconductor chip 3 that is a large chip is mounted on the back surface 5b side of the tape substrate 5. The process ends. The through hole 5 g of the tape substrate 5 is disposed between the main surface 2 a of the first semiconductor chip 2 and the main surface 3 a of the second semiconductor chip 3.

  Thereafter, a potting process is performed.

  Here, as shown in POT of step S23 in FIG. 11, the underfill material 4 is dropped from the second semiconductor chip 3 side (back surface 5b side) which is a large chip. At that time, it is dropped along the periphery of the side surface of the second semiconductor chip 3.

  At this time, since the through-hole 5g is formed in the tape substrate 5 in the vicinity of the center of the portion where the first semiconductor chip 2 and the second semiconductor chip 3 face each other, the dropped underfill material 4 is added to the through-hole 5g. It also passes around the surface 5a side of the tape substrate 5 through. Thereby, the main surface 2a of the first semiconductor chip 2 and the main surface 3a of the second semiconductor chip 3 and the side surface 2d of the first semiconductor chip 2 and the side surface 3d of the second semiconductor chip 3 are substantially covered. Thus, the underfill material 4 is filled.

  That is, when the underfill material 4 is dropped from the first semiconductor chip 2 side which is a small chip, the underfill material 4 flows to the back surface 5b side of the tape substrate 5 through the through hole 5g. However, in order to cover the entire main surface of the second semiconductor chip 3 that is a large chip, it is possible to apply the underfill material 4 in an amount that covers the entire main surface of the first semiconductor chip 2 that is a small chip. is necessary. Therefore, if the application amount of the underfill material 4 is not sufficiently taken into consideration, there is a possibility that the entire main surface of the second semiconductor chip 3 cannot be covered. In other words, there is a possibility that a problem of unfilling failure (void failure) of the underfill material 4 may occur on the main surface of the second semiconductor chip 3. If there is an unfilled portion, the air in the unfilled portion expands in the subsequent baking process of the underfill material 4, which results in a reflow crack.

  On the other hand, as shown in FIG. 11, when the underfill material 4 is dropped from the second semiconductor chip 3 side which is a large chip, the first semiconductor chip 2 which is a small chip is formed on the lower side (surface 5a side). Since it is mounted, it is possible to easily cover the main surface of the first semiconductor chip 2 by applying an amount of the underfill material 4 that covers the entire main surface of the second semiconductor chip 3 that is a large chip. It is. Therefore, the problem of unfilling failure of the underfill material 4 can be suppressed.

  The underfill material 4 is, for example, a thermosetting epoxy resin.

  In the tape substrate 5, a through hole 5 g is formed between the main surface 2 a of the first semiconductor chip 2 and the main surface 3 a of the second semiconductor chip 3, and a part of the tape substrate 5 is bent. It is possible to prevent the chip from adhering to either the main surface 2a or the main surface 3a. Therefore, it is possible to prevent a void from being formed between the main surface 2 a of the first semiconductor chip 2 and the main surface 3 a of the second semiconductor chip 3.

  Thereafter, the underfill material 4 filled so as to substantially cover the main surface 2a of the first semiconductor chip 2 and the main surface 3a of the second semiconductor chip 3 and the side surfaces 2d and 3d is prebaked. Semi-cured.

  Thereafter, the chip component 7 is mounted on the tape substrate 5 via the solder 8 as shown in the component mounting in step S24 of FIG.

  According to the second embodiment, when the underfill material 4 is applied using the tape substrate 5 in which the through holes 5g are formed, one side of the tape substrate 5 is obtained by passing the underfill material 4 through the through holes 5g. The underfill material 4 can be filled on both the front and back surfaces of the tape substrate 5 by a single potting operation from the surface.

  Thereby, since the potting operation | movement in a potting process is only one time, the frequency | count of potting can reduce and the processing time in a potting process can be shortened.

  Other effects obtained by the manufacturing method of the semiconductor device of the second embodiment are the same as those of the first embodiment.

  Next, a modification of the second embodiment shown in FIG. 12 will be described. FIG. 12 is a modified example of the assembly of the COF 1 shown in FIG. 11. The difference from the assembly of FIG. 11 is that when the underfill material 4 is dropped by the POT in step S33 of FIG. The underfill material 4 is dropped from the semiconductor chip 2 side (surface 5a side). At that time, it is dropped along the periphery of the side surface of the first semiconductor chip 2.

  At this time, since the through-hole 5g is formed in the tape substrate 5 in the vicinity of the center of the portion where the first semiconductor chip 2 and the second semiconductor chip 3 face each other, the dropped underfill material 4 is added to the through-hole 5g. It also passes around the back surface 5 b side of the tape substrate 5. Thereby, the main surface 2a of the first semiconductor chip 2 and the main surface 3a of the second semiconductor chip 3 and the side surface 2d of the first semiconductor chip 2 and the side surface 3d of the second semiconductor chip 3 are substantially covered. Thus, the underfill material 4 is filled.

  That is, as shown in FIG. 11, when the underfill material 4 is dropped from the side of the second semiconductor chip 3 which is a large chip, the underfill material 4 passes through the through-hole 5g and is lower (surface 5a side) than necessary. When flowing to the first semiconductor chip 2 side, which is a small chip, it becomes difficult to keep the underfill material 4 on the main surface 2a of the first semiconductor chip 2 or on the side surface 2d. The underfill material 4 hangs down further from the chip 2 (on the surface 5a side). As a result, there is a possibility that the underfill material 4 is used wastefully, and further, a cleaning operation for the underfill material 4 hanging down is required.

  On the other hand, as shown in FIG. 12, if the underfill material 4 is dropped from the side of the first semiconductor chip 2 which is a small chip, the underfill material 4 passes through the through hole 5g and is lower than necessary. Even if it flows to the second semiconductor chip 3 side, which is a large chip arranged on the back surface 5b side, it remains on the main surface or the side surface 3d of the second semiconductor chip 3, and thus from the side surface 3d of the semiconductor chip 3 The underfill material 4 does not overflow and pollute the potting device.

  Note that the ILB1 in step S31, the ILB2 in step S32, and the component mounting in step S34 in the assembly shown in FIG. 12 are respectively the ILB1 in step S21, the ILB2 in step S22, and the component mounting in step S24 in the assembly shown in FIG. Exactly the same.

  Therefore, the same effect as that of the assembly shown in FIG. 11 can be obtained by the assembly of the modification shown in FIG.

(Embodiment 3)
FIG. 13 is a manufacturing process flowchart showing an example of the assembly procedure of the semiconductor device according to the third embodiment of the present invention, and FIG. 14 is a manufacturing process flowchart showing a modification of the assembly procedure of the semiconductor device shown in FIG.

  The manufacturing method of the semiconductor device according to the third embodiment uses the tape substrate 5 in which the through holes 5g are formed as in the second embodiment, and further flips the large chip in a state where the adhesive is previously disposed on the small chip. The number of processes is reduced by chip connection.

  First, a plurality of leads (electrodes) 5d corresponding to the pad arrangement of a semiconductor chip are arranged to face each other in two rows, and a tape substrate 5 in which through holes 5g are formed between the two rows of the plurality of leads 5d. Prepare.

  Thereafter, as indicated by ILB1 in step S41 of FIG. 13, the surface 5a and the main surface 2a of the first semiconductor chip 2 which is a small chip are opposed to each other on the surface 5a of the tape substrate 5, and the first The first semiconductor chip 2 is mounted so that the through hole 5g is arranged on the main surface 2a of the semiconductor chip 2.

  The first semiconductor chip 2 is flip-chip connected on the surface 5a of the tape substrate 5 by the same method as the Au—Sn thermal eutectic of step S1 in FIG. 6 of the first embodiment. At that time, the first semiconductor chip 2 is supported by the heat stage 10 heated to 250 ° C. to 400 ° C. and mounted on the tape substrate 5.

  Thereafter, as shown in POT of step S42 in FIG. 13, an adhesive is applied from the potting nozzle 11 onto the main surface 2a of the first semiconductor chip 2 from the back surface 5b side (upper side) of the tape substrate 5 through the through hole 5g. Apply.

  At that time, the adhesive applied through the through-hole 5g spreads on the main surface 2a of the first semiconductor chip 2, and the adhesive is applied to such an extent that the adhesive covers the through-hole 5g and its periphery. To do.

  The adhesive used in the third embodiment is, for example, NCP (Non-Conductive Paste) 13. Furthermore, since NCP13 is a paste, it has a higher viscosity than an underfill material such as a thermosetting epoxy resin. That is, the fluidity is low.

  Therefore, the NCP 13 applied on the main surface 2a of the first semiconductor chip 2 has low fluidity, so that it does not fall from the tape substrate 5 even if it protrudes outward from the first semiconductor chip 2.

  Thereafter, as shown in ILB2 of step S43 in FIG. 13, the second semiconductor chip 3 which is a large chip is placed on the back surface 5b of the tape substrate 5 via the NCP 13, and the main surface 3a and the back surface 5b of the tape substrate 5 are used. Are mounted facing each other.

  At that time, first, the first semiconductor chip 2 is arranged in the counterbore 10a of the heat stage 10 having the counterbore 10a, and the Au bump 6 on the second semiconductor chip 3 is interposed by the heat stage 10 through the tape substrate 5. The second semiconductor chip 3 is pressed by the bonding tool 9 from the back surface 5b side of the tape substrate 5 in a state where the above is supported. The bonding tool 9 is heated to, for example, 100 to 275 ° C., and the bonding of the second semiconductor chip 3 that is a large chip and the welding of the NCP 13 are performed together using the heat of the bonding tool 9. .

  NCP13 has high heat resistance and can withstand high temperatures. Therefore, the NCP 13 can be semi-cured after welding by heat when mounting the second semiconductor chip 3.

  Thereby, the second semiconductor chip 3 is mounted on the back surface 5b of the tape substrate 5 by thermocompression bonding.

  Thereafter, the chip component 7 is mounted on the tape substrate 5 via the solder 8 as shown in the component mounting in step S44 of FIG.

  According to the third embodiment, the potting of the adhesive is performed by flip-chip connecting the second semiconductor chip 3 which is a large chip in a state where the NCP 13 is previously arranged on the first semiconductor chip 2 which is a small chip. Thus, the number of assembly steps can be reduced.

  Furthermore, since the NCP 13 has high heat resistance, the NCP 13 can be semi-cured after being welded by using heat when the second semiconductor chip 3 is mounted. Thereby, the frequency | count of a prebaking process can also be reduced and the processing time in an assembly can be shortened.

  Other effects obtained by the semiconductor device manufacturing method of the third embodiment are the same as those of the first embodiment.

  Next, a modification of the third embodiment shown in FIG. 14 will be described. FIG. 14 is a modified example of the assembly of the COF 1 shown in FIG. 13. The difference from the assembly of FIG. 13 is that the ACF (Anisotropic Conductive Film) 14 is used as an adhesive in the POT of step S52 of FIG. Is to use.

  That is, in the POT of step S52, the ACF 14 is disposed on the through hole 5g of the back surface 5b of the tape substrate 5 on the main surface 2a of the first semiconductor chip 2. Thereafter, the first semiconductor chip 2 is arranged in the counterbore 10a of the heat stage 10 having the counterbore 10a by the ILB 2 in step S53, and the second semiconductor chip 3 is placed on the second semiconductor chip 3 via the tape substrate 5 by the heat stage 10. With the Au bump 6 supported, the second semiconductor chip 3 is pressed by the bonding tool 9 from the back surface 5 b side of the tape substrate 5.

  Thereby, the second semiconductor chip 3 is mounted on the back surface 5b of the tape substrate 5 by thermocompression bonding.

  Since the material cost of ACF 14 is lower than that of NCP 13, the assembly cost of the modified example using ACF 14 can be reduced as compared with the assembly using NCP 13.

  Further, regarding the ILB1 in step S51, the ILB2 in step S53, and the component mounting in step S54 in the assembly shown in FIG. 14, the ILB1 in step S41, the ILB2 in step S43, and the component mounting in step S44 in the assembly shown in FIG. Exactly the same.

  Therefore, the same effect as the assembly shown in FIG. 13 can be obtained by the assembly of the modification shown in FIG.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiments of the invention. However, the present invention is not limited to the embodiments of the invention, and various modifications can be made without departing from the scope of the invention. It goes without saying that it is possible.

  For example, in the first embodiment, the case where the potting device 12 shown in FIG. 5 is used to reverse the front and back of the tape substrate 5 by the reversing roller 12g in the potting process has been described. A potting device that does not have a reversing mechanism may be used. In this case, the front surface 5a side and the back surface 5b side of the tape substrate 5 may be processed by being divided into a potting apparatus once.

  The present invention is suitable for assembling a semiconductor device in which electronic components are mounted on both sides of a tape substrate.

It is sectional drawing which shows an example of the structure of the semiconductor device of Embodiment 1 of this invention. FIG. 2 is a surface view illustrating a structure of the semiconductor device illustrated in FIG. 1. FIG. 2 is a back view showing the structure of the semiconductor device shown in FIG. 1. FIG. 2 is a surface view showing the structure of the tape substrate shown in FIG. FIG. 2 is a back view showing the structure of the tape substrate shown in FIG. FIG. 2 is a manufacturing process flow diagram illustrating an example of an assembly procedure of the semiconductor device illustrated in FIG. 1. It is the structure schematic which shows an example of the structure of the potting apparatus used in the assembly shown in FIG. FIG. 10 is a manufacturing process flow diagram illustrating a modification of the assembly procedure of the semiconductor device illustrated in FIG. 1. It is a surface view which shows the structure of the tape board | substrate of Embodiment 2 of this invention. FIG. 10 is a back view showing the structure of the tape substrate shown in FIG. 9. It is a manufacturing process flowchart which shows an example of the assembly procedure of the semiconductor device of Embodiment 2 of this invention. FIG. 12 is a manufacturing process flowchart showing a modification of the assembly procedure of the semiconductor device shown in FIG. 11. It is a manufacturing process flowchart which shows an example of the assembly procedure of the semiconductor device of Embodiment 3 of this invention. FIG. 14 is a manufacturing process flowchart showing a modification of the assembly procedure of the semiconductor device shown in FIG. 13.

Explanation of symbols

1 COF (semiconductor device)
2 1st semiconductor chip 2a main surface 2b back surface 2c pad 2d side surface 3 2nd semiconductor chip 3a main surface 3b back surface 3c pad 3d side surface 4 underfill material 5 tape substrate 5a surface (first main surface)
5b Back surface (second main surface)
5c Base material 5d Lead (electrode)
5e Solder resist 5f External terminal 5g Through hole 5h Terminal (electrode)
5i opening (first opening)
5j opening (second opening)
5k opening (third opening)
5m sprocket hole 6 Au bump (bump electrode)
7 Chip parts (electronic parts)
8 Solder 9 Bonding tool 9a Counterbore (concave)
10 Heat stage 10a Counterbore (concave)
DESCRIPTION OF SYMBOLS 11 Potting nozzle 12 Potting apparatus 12a Loader 12b First potting part 12c Drying furnace 12d Second potting part 12e Unloader 12f Reel 12g Reversing roller 13 NCP (non-conductive paste)
14 ACF (conductive film)

Claims (20)

(A) mounting the first semiconductor chip on the first main surface of the tape substrate with the first main surface facing the main surface of the first semiconductor chip;
(B) After the step (a), on the second main surface opposite to the first main surface of the tape substrate, a second semiconductor chip larger than the first semiconductor chip is disposed on the main surface. And mounting the second main surface of the tape substrate facing each other,
(C) After the step (b), an underfill material is filled between the first main surface of the tape substrate and the main surface of the first semiconductor chip, and then the underfill material is semi-cured. A process of
(D) After the step (c), an underfill material is filled between the second main surface of the tape substrate and the main surface of the second semiconductor chip, and then the underfill material is semi-cured. A method of manufacturing a semiconductor device.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the second semiconductor chip is mounted on a heat stage when the second semiconductor chip is mounted on the second main surface of the tape substrate in the step (b). A chip is disposed, and then the first semiconductor chip is disposed in the concave portion of the bonding tool having a concave portion, and the bonding tool is inserted through the tape substrate from the first main surface side of the tape substrate. And pressing the bump electrode on the second semiconductor chip, and mounting the second semiconductor chip on the second main surface of the tape substrate by thermocompression bonding.   2. The method of manufacturing a semiconductor device according to claim 1, wherein, in the step (a), the first semiconductor chip is disposed on a heat stage, and the tape substrate is formed from a second main surface side of the tape substrate by a bonding tool. A bump electrode on the first semiconductor chip is pressed through the first semiconductor chip, and the first semiconductor chip is mounted on the first main surface of the tape substrate by thermocompression bonding. .   4. The method of manufacturing a semiconductor device according to claim 3, wherein the temperature of the heat stage is 400 to 450 ° C., and the temperature of the bonding tool is 100 to 275 ° C. lower than the temperature of the heat stage. A method for manufacturing a semiconductor device.   2. The method of manufacturing a semiconductor device according to claim 1, wherein when the second semiconductor chip is mounted on the second main surface of the tape substrate in the step (b), the recess of the heat stage having a recess. In the state where the first semiconductor chip is disposed inside and the bump electrode on the second semiconductor chip is supported by the heat stage via the tape substrate, from the second main surface side of the tape substrate. A method of manufacturing a semiconductor device, wherein the second semiconductor chip is pressed by a bonding tool, and the second semiconductor chip is mounted on a second main surface of the tape substrate by thermocompression bonding.   6. The method of manufacturing a semiconductor device according to claim 5, wherein the temperature of the heat stage is 400 to 450 ° C., and the temperature of the bonding tool is 100 to 275 ° C. lower than the temperature of the heat stage. A method for manufacturing a semiconductor device.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the underfill material is semi-cured at 130 [deg.] C. in each of the step (c) and the step (d).   2. The method of manufacturing a semiconductor device according to claim 1, wherein after the step (d), the underfill material is fully cured at 150.degree.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the underfill material has a lower viscosity than a paste.   2. The method of manufacturing a semiconductor device according to claim 1, wherein after the step (d), an electronic component is solder mounted on the first main surface of the tape substrate. (A) preparing a tape substrate having a plurality of electrodes and a through-hole formed between the plurality of electrodes;
(B) The first main surface of the tape substrate is opposed to the main surface of the first semiconductor chip, and the through hole is formed on the main surface of the first semiconductor chip. Mounting the first semiconductor chip so that is disposed;
(C) After the step (b), on the second main surface opposite to the first main surface of the tape substrate, a second semiconductor chip larger than the first semiconductor chip is disposed on the main surface. And mounting so that the through hole is disposed on the main surface of the second semiconductor chip, and the second main surface of the tape substrate facing each other,
(D) After the step (c), an underfill material is dropped from one side of the first semiconductor chip or the second semiconductor chip, and the first fill is passed through the underfill material to the through hole. A method of manufacturing a semiconductor device, comprising a step of filling the underfill material between a main surface of a semiconductor chip and a main surface of the second semiconductor chip.   12. The method of manufacturing a semiconductor device according to claim 11, wherein the underfill material is dropped from the first semiconductor chip side in the step (d).   12. The method of manufacturing a semiconductor device according to claim 11, wherein the underfill material is dropped from the second semiconductor chip side in the step (d).   12. The method of manufacturing a semiconductor device according to claim 11, wherein the second semiconductor chip is mounted on a heat stage when the second semiconductor chip is mounted on the second main surface of the tape substrate in the step (c). A chip is disposed, and then the first semiconductor chip is disposed in the recess of the bonding tool having a recess, and the bonding tool is inserted through the tape substrate from the first main surface side of the tape substrate. And pressing the bump electrode on the second semiconductor chip, and mounting the second semiconductor chip on the second main surface of the tape substrate by thermocompression bonding. (A) preparing a tape substrate having a plurality of electrodes and a through-hole formed between the plurality of electrodes;
(B) The first main surface of the tape substrate is opposed to the main surface of the first semiconductor chip, and the through hole is formed on the main surface of the first semiconductor chip. Mounting the first semiconductor chip so that is disposed;
(C) After the step (b), an adhesive is applied on the main surface of the first semiconductor chip from the second main surface opposite to the first main surface of the tape substrate through the through hole. A step of applying
(D) After the step (c), a second semiconductor chip larger than the first semiconductor chip is placed on the second main surface of the tape substrate via the adhesive, and the main surface and the tape A method of manufacturing a semiconductor device, comprising: mounting a second main surface of the substrate so as to face each other.   16. The method of manufacturing a semiconductor device according to claim 15, wherein the adhesive is a non-conductive paste.   17. The method of manufacturing a semiconductor device according to claim 16, wherein the non-conductive paste has a higher viscosity than an underfill material.   16. The method of manufacturing a semiconductor device according to claim 15, wherein the adhesive is a conductive film.   16. The method of manufacturing a semiconductor device according to claim 15, wherein when the first semiconductor chip is mounted on the tape substrate in the step (b), the first stage is heated by a heat stage heated to 250 ° C. to 400 ° C. A method of manufacturing a semiconductor device, comprising supporting the semiconductor chip and mounting the first semiconductor chip on the tape substrate.   16. The method of manufacturing a semiconductor device according to claim 15, wherein when the second semiconductor chip is mounted on the second main surface of the tape substrate in the step (d), the recess of the heat stage having a recess. Bonding from the second main surface side of the tape substrate in a state where the first semiconductor chip is disposed inside and the bump electrodes on the second semiconductor chip are supported by the heat stage via the tape substrate. A method of manufacturing a semiconductor device, wherein the second semiconductor chip is pressed by a tool, and the second semiconductor chip is mounted on a second main surface of the tape substrate by thermocompression bonding.

Images