JP2008130725A - Semiconductor device and method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device and a method for manufacturing the semiconductor device capable of improving an yield of a device characteristic and enabling its practical application. <P>SOLUTION: The semiconductor device (FET) has a semiconductor film (an active layer) comprising a diamond single crystal, and the surface 13a of the semiconductor film (the active layer) is inclined from at an angle of not smaller than 2° and not larger than 10° from a ä001} surface to a direction from a [110] direction within a direction at an angle of not smaller than -15° and not larger than 15° at the surface 13a of the semiconductor film (the active layer). The semiconductor film (the active layer) has a channel in the surface vertical to the off-directin of the semiconductor film (the active layer). <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device, for example, a semiconductor device using diamond such as a field effect transistor and a method for manufacturing the semiconductor device.

  Diamond has a high breakdown electric field, thermal conductivity, saturation rate, carrier mobility, etc., so that semiconductors using diamond have significantly higher device performance indicators at high power, high frequency, and high integration than other semiconductors. high. For this reason, diamond electronic devices utilizing these characteristics are expected to be applied to high power elements, high frequency elements and the like.

  As a field effect transistor (FET) using diamond, for example, a p-type diamond thin film layer doped with boron is used as a channel layer. As such a field effect transistor, Japanese Patent Laid-Open No. 3-94429 (Patent Document 1) discloses a metal-semiconductor junction type in which a gate electrode and a source electrode for forming a Schottky junction and an ohmic junction are formed on a channel layer. A (MES type) field effect transistor is disclosed. Japanese Patent Laid-Open No. 1-158774 (Patent Document 2) discloses a MIS field effect transistor having a two-dimensional spatial distribution using pulse doping. Japanese Patent Laid-Open No. 8-88236 (Patent Document 3) discloses an insulated gate (MIS type) field effect transistor in which a cap layer as an insulating layer is inserted between a gate electrode and an active layer as an operating layer. Is disclosed.

  In addition, an enhanced or depletion type FET using a high carrier density of the p-type conductive layer on the hydrogen termination surface formed on the surface and a low surface state density of the p-type conductive layer, instead of carriers due to impurity introduction, is provided. is there. For example, Japanese Patent Laid-Open No. 8-88235 (Patent Document 4) discloses an FET using hydrogen-terminated homoepitaxial diamond that operates in an enhanced mode. Japanese Unexamined Patent Publication No. 2003-188191 (Patent Document 5) discloses a hydrogen-terminated diamond depletion type MESFET.

  The diamond electronic devices disclosed in Patent Documents 1 to 5 are usually produced on a diamond single crystal substrate through processes such as epitaxial growth, electrode formation, oxide film formation, and etching. However, the electronic devices using diamond disclosed in Patent Documents 1 to 5 are easily affected by scratches and unevenness due to poor polishing of the surface of the diamond substrate used when manufacturing the device, and depend on the individual diamond substrate. Resulting in. Therefore, there has been a problem that a large difference appears in the characteristics of the electronic device using diamond. If there is a large difference in characteristics, the yield will deteriorate and there will be a problem that it will be difficult to put to practical use.

Japanese Laid-Open Patent Publication No. 5-24989 (Patent Document 6) discloses a diamond synthesis method for the purpose of providing a vapor phase synthesis method for epitaxially growing diamond having a flat surface shape. However, the diamond synthesis method disclosed in Patent Document 6 can synthesize single crystal diamond having excellent crystallinity and surface smoothness, but has not been disclosed for application to electronic devices using the diamond. . Therefore, there is a problem that practical application is difficult.
Japanese Patent Laid-Open No. 3-94429 Japanese Patent Laid-Open No. 1-158774 JP-A-8-88236 JP-A-8-88235 JP 2003-188191 A JP-A-5-24989

  SUMMARY OF THE INVENTION Therefore, an object of the present invention has been made to solve the above-described problems, and provides a semiconductor device and a method for manufacturing the semiconductor device that can improve the device characteristic yield and can be put into practical use. That is.

  The semiconductor device of the present invention includes a semiconductor film made of a diamond single crystal. The surface of the semiconductor film is characterized in that, in the {001} plane, the surface is inclined by 2 degrees or more and 10 degrees or less with respect to the {001} plane from a direction within a range of ± 15 degrees from the <110> direction. Yes.

  According to the semiconductor device of the present invention, since the surface of the semiconductor film is inclined at 2 degrees or more and 10 degrees or less with respect to the {001} plane, a large step is formed, so that it can be flattened at the atomic level. Since the interval does not become too short, it can be stabilized. In addition, since the direction is within ± 15 degrees from the <110> direction, the steps are easily arranged on a straight line. Therefore, scattering caused by surface irregularities can be reduced, and carrier mobility is improved. Therefore, it is possible to improve the device characteristic yield and put it to practical use.

  In the semiconductor device, the semiconductor film preferably has a channel in a plane perpendicular to the off direction of the semiconductor film.

  As a result, a channel parallel to the step formed on the surface of the semiconductor film flat at the atomic level can be formed. Therefore, the interface state density when the insulating film is formed can be lower than the interface state density of the conventional semiconductor device in which the channel is formed in the direction across many steps. Therefore, carrier mobility of a channel limited by the interface state density can be improved.

  In the semiconductor device, the semiconductor film is preferably an n-type or p-type epitaxial film doped with impurities. Thereby, the carrier mobility can be improved regardless of whether the carrier is p-type or n-type.

  In the semiconductor device, preferably, the semiconductor film is made of undoped diamond, and the channel is formed in the vicinity of the hydrogen termination surface.

  By using the p-type conductive layer formed on the surface of the hydrogen-terminated surface, a semiconductor device having p-type carriers can be obtained even when impurities are not doped.

  In the semiconductor device, preferably, the surface of the semiconductor film has a single domain 2 × 1 structure.

Thereby, since the step shape is linear, carrier scattering hardly occurs.
In the semiconductor device, preferably, the surface of the semiconductor film is formed with a macro step of 10 atomic layers or more.

  Thereby, the surface of the semiconductor film can be made flatter. Therefore, carrier mobility can be further improved.

  A method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device, comprising: preparing a substrate made of a diamond single crystal; and supplying a gas containing nitrogen atoms on the substrate to form a semiconductor film in a homoepitaxial atmosphere. And a phase growth step.

  According to the semiconductor device manufacturing method of the present invention, it is possible to manufacture a semiconductor device having a large step on the surface and including a semiconductor film flat at an atomic level. Therefore, scattering caused by surface irregularities is reduced and carrier mobility is improved. Therefore, it is possible to manufacture a semiconductor device that can improve the device characteristic yield and can be put to practical use.

  Preferably, the semiconductor device manufacturing method further includes a step of forming a channel in a direction perpendicular to the off direction of the semiconductor film in the semiconductor film obtained by the homoepitaxial growth step.

  As a result, a channel parallel to the step formed on the surface of the semiconductor film flat at the atomic level can be formed. Therefore, the interface state density when the insulating film is formed can be lower than the interface state density of the conventional semiconductor device in which the channel is formed in the direction across many steps. Therefore, a semiconductor device that can improve carrier mobility of a channel limited by the interface state density can be manufactured.

  According to the semiconductor device of the present invention, it is possible to improve the device characteristic yield and to put it to practical use.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, the same or corresponding parts are denoted by the same reference numerals, and description thereof will not be repeated. In the present specification, the individual orientation is indicated by [], the collective orientation is indicated by <>, the individual plane is indicated by (), and the collective plane is indicated by {}. As for the negative index, “−” (bar) is attached on the number in crystallography, but in this specification, a negative sign is attached before the number.

  FIG. 1 is a schematic top view showing a semiconductor device in an embodiment of the present invention. FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG. FIG. 3 is a schematic diagram showing the crystal orientation of the surface of the active layer of the semiconductor device in the embodiment of the present invention. FIG. 4 is a diagram for explaining the crystal orientation of the surface of the active layer of the semiconductor device in the embodiment of the present invention. A semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. As shown in FIGS. 1 and 2, the semiconductor device (FET 10) in the embodiment includes a semiconductor film (active layer 13) made of a diamond single crystal, and the surface 13a of the semiconductor film (active layer 13) is {001 } In the plane, it is inclined at 2 degrees or more and 10 degrees or less with respect to the {001} plane from the direction within ± 15 degrees from the <110> direction.

  Specifically, as shown in FIG. 2, the FET 10 includes a substrate 11, a buffer layer 12, an active layer 13, a cap layer 14, a gate electrode 15, a source electrode 16, and a drain electrode 17. Yes.

  The substrate 11 is made of a single crystal of diamond. The buffer layer 12 is formed on the substrate 11 and is made of a single crystal of diamond. The active layer 13 is formed on the buffer layer 12 and is made of, for example, p-type diamond. The cap layer 14 is formed on the active layer 13 and is made of undoped diamond.

  The active layer 13 is not limited to the p-type, and may be an n-type, or may be an undoped diamond that does not introduce impurities and may be a p-type electrically conductive layer with a hydrogen termination surface formed on the surface 13a. Good. An example of a dopant for forming a p-type semiconductor is boron (B). Examples of the n-type dopant include phosphorus (P) and sulfur (S).

  The gate electrode 15 is formed on the cap layer 14 and is made of, for example, aluminum (Al). The source electrode 16 and the drain electrode 17 are formed on the cap layer 14 with the gate electrode interposed therebetween, and are made of, for example, titanium (Ti).

  A region sandwiched between the source electrode 16 and the drain electrode 17 in the active layer 13 becomes a channel 18 of the FET 10.

  Next, the surface 13a of the active layer 13 of the FET 10 will be described. As shown in FIG. 3, the surface 13a in the embodiment is 2 degrees or more and 10 degrees with respect to the {001} plane from the direction within ± 15 degrees from the [110] direction in the (001) plane. Inclined below.

  As shown in FIG. 4A, the surface 13a is inclined at 2 degrees or more and 10 degrees or less, preferably 3 degrees or more and 7 degrees or less, more preferably 3.5 degrees or more and 5 degrees or less with respect to the (001) plane. ing. Since a normal diamond surface is not completely flat and has a surface with some undulations, when the inclination angle is smaller than 2 degrees, the surface is similar to the surface without inclination. By setting it to 3 degrees or more, even if the surface is uneven, a surface composed of steps in one direction can be obtained with high reproducibility, so that the electron mobility can be improved. By setting the angle to 3.5 degrees or more, the number of steps is increased, and a surface composed of a reliable step in one direction can be formed over the entire surface of the substrate. On the other hand, if the tilt angle is larger than 10 degrees, the step interval becomes too short, and other crystal planes appear and the surface shape becomes unstable. By setting it to 7 degrees or less, the step interval does not become too short, so that other crystal planes do not appear and the surface shape is stabilized. By setting it to 5 degrees or less, the surface shape becomes more stable.

  In the embodiment, the inclination is not less than 2 degrees and not more than 10 degrees with respect to the (001) plane, but is not particularly limited as long as the inclination is not less than 2 degrees and not more than 10 degrees with respect to the {001} plane. The surface 13a is inclined from the {001} plane where conditions for good epitaxial growth are known. The {001} plane means (001) plane, (010) plane, (100) plane, (00-1) plane, (0-10) plane, and (-100) plane.

  Further, as shown in FIG. 4B, the surface 13a in the embodiment is a direction within a range of ± 15 degrees from the [110] direction, and preferably a direction within a range of ± 7 degrees. More preferably, the direction is within a range of ± 3 degrees. By inclining in the [110] direction, the steps on the {001} plane of the diamond extend in parallel to the <110> direction and the <-1-10> direction, so that the steps can be arranged linearly. . If the surface 13a is in a direction exceeding the range of ± 15 degrees from the [110] direction, the step has a jagged shape, and when a semiconductor device is formed, the carriers are strongly scattered at the step edge, and the carrier mobility deteriorates. Resulting in. By setting the direction within a range of ± 7 degrees, the shape of the step becomes smooth, carriers are less likely to be scattered at the step edge when forming an element, and the mobility of the carrier can be improved. By setting the direction within a range of ± 3 degrees, carrier mobility can be further improved.

  In the embodiment, the direction is within a range of ± 15 degrees from the [110] direction, but is not particularly limited as long as the direction is within a range of ± 15 degrees from the <110> direction. The <110> direction means a [110] direction, a [1-10] direction, a [−110] direction, and a [−1-10] direction.

  The surface 13a preferably has a single domain 2 × 1 structure. The 2 × 1 structure means that electron diffraction such as low-energy electron diffraction (LEED) and reflection high-energy electron diffraction (RHEED) or a tunneling microscope (Scanning Tunneling Microscopy: STM). ) Etc. Usually, the diamond (001) surface has two domains of 2x1 and 1x2 formed after CVD growth. By making it a single domain surface consisting of only one domain, the step shape is zigzag. Instead, it has a linear shape.

  The surface 13a is preferably formed with a macro step of 10 atomic layers or more, preferably 50 atomic layers or more and 1000 atomic layers or less. Normally, when the active layer 13 which is a semiconductor film is turned off, steps of one to several atomic layers can be seen toward the off direction. However, when the surface 13a is set to the above direction, stepped steps are gathered. Macro steps of 10 to several hundred atomic layers can be formed by bunching. By using 10 atomic layers or more, a wider terrace can be formed on the surface 13a, and carrier mobility can be further improved. By using 50 atomic layers or more, the surface 13a can be made even more flat. On the other hand, by setting it to 1000 atomic layers or less, generation | occurrence | production of a non-single crystal component can be suppressed from a step slope.

  Next, the operation of the FET 10 will be described. The FET accumulates electrons in the channel 18 by the voltage applied to the gate electrode 15, whereby a current flows between the source electrode 16 and the drain electrode 17. At this time, the channel 18 becomes a flat portion between steps of the surface 13a. Therefore, carriers do not cross the step, and thus do not pass through a region where the interface state density is high due to the step and a region where scattering is high. Therefore, the carrier mobility is not limited, and the resistance of the entire channel 18 does not increase.

  In the embodiment, the current between the source electrode 16 and the drain electrode 17 flows through a channel 18 that is in a plane perpendicular to the off direction of the active layer 13. Therefore, the extending direction of the step formed in the direction perpendicular to the off direction is parallel to the carrier moving direction. As a result, the carrier mobility is higher.

  Next, a method for manufacturing the FET 10 in the embodiment will be described. First, a step of preparing a substrate 11 made of a diamond single crystal is performed.

  In this step, the surface of the substrate 11 is inclined 2 degrees or more and 10 degrees or less with respect to the {001} plane from the direction within ± 15 degrees from the <110> direction in the {001} plane. Grind.

Next, a process of epitaxial growth on the substrate 11 is performed. In this step, for example, methane (CH ₄ ) and hydrogen (H ₂ ) are supplied to a plasma CVD (chemical vapor deposition) apparatus. Thereby, the buffer layer 12 made of high resistance diamond is formed. Further, the surface of the buffer layer 12 is inclined at 2 degrees or more and 10 degrees or less with respect to the {001} plane from the direction within ± 15 degrees from the <110> direction in the {001} plane.

Next, a step of supplying a gas containing boron atoms onto the buffer layer 12 to make it homoepitaxial is performed. In this step, for example, methane, hydrogen, and diborane (B ₂ H ₆ ) are supplied to a plasma CVD apparatus. Thereby, the active layer 13 is formed. The surface 13a of the active layer 13 is inclined at 2 degrees or more and 10 degrees or less with respect to the {001} plane from the direction within ± 15 degrees from the <110> direction in the {001} plane. Note that boron is supplied to a plasma CVD apparatus for use as a dopant. Therefore, the active layer 13 is p-type.

  Then, a step of forming a channel 18 in the direction perpendicular to the off direction of the surface 13a of the active layer 13 is performed in the active layer 13 which is a semiconductor film obtained by the homoepitaxial growth step.

  Next, a step of homoepitaxial growth on the active layer 13 is performed. In this step, for example, methane and hydrogen are supplied to a plasma CVD apparatus. Thereby, the cap layer 14 made of high resistance diamond is formed.

  Next, a step of dividing the substrate 11 on which the buffer layer 12, the active layer 13, and the cap layer 14 are sequentially laminated into chips of a predetermined size is performed. Specifically, the substrate 11 on which the buffer layer 12, the active layer 13, and the cap layer 14 are sequentially stacked is taken out from the inside of the plasma CVD apparatus, and an etching mask having a predetermined pattern is formed on the buffer layer 12 based on normal photolithography. Form a layer. The substrate 11 processed in this way is moved into an RIE (Reactive Ion Etching) apparatus. Etching is performed by introducing an etching gas such as argon (Ar) into the interior. Note that this step may be omitted.

  Next, a step of forming the gate electrode 15 on the cap layer 14 is performed. Specifically, the etching mask layer is removed from the RIE apparatus. The chip thus processed is moved into a normal electron beam evaporation apparatus. Then, the evaporation material is irradiated with an electron beam and heated in a high vacuum state. As a result, a vapor deposition material such as evaporated Al is deposited on the cap layer 14 to form the gate electrode 15. Then, the chip is taken out from the electron beam evaporation apparatus, and an etching mask layer made of semicocrine or the like having a predetermined pattern is formed on the gate electrode 15 based on normal photolithography. Then, the gate electrode 15 is formed into a predetermined pattern based on normal wet etching.

  Next, a step of forming the source electrode 16 and the drain electrode 17 is performed. Specifically, the etching mask layer is removed from the chip and moved into a normal resistance heating vapor deposition apparatus. Then, the vapor deposition material is heated based on the operation of the heater in a high vacuum state. Thereby, a deposition material such as Ti deposited on the cap layer 14 is attached to form the source electrode 16 and the drain electrode 17. After this chip is taken out from the resistance overheating vapor deposition apparatus, an etching mask layer made of buffered hydrofluoric acid or the like having a predetermined pattern is formed on the source electrode 16 and the drain electrode 17 on the basis of ordinary photolithography, and ordinary wet etching is performed. Then, the source electrode 16 and the drain electrode 17 are formed into a predetermined pattern. Then, the etching mask layer is removed.

  By performing the above steps, the FET 10 in the embodiment of the present invention can be manufactured. In the embodiment, the semiconductor film is the active layer 13, but the present invention is not limited to this. Further, although the FET has been described as an example of the semiconductor device, it is not particularly limited to the FET.

  As described above, according to the semiconductor device in the embodiment of the present invention, the semiconductor film (active layer 13) made of diamond single crystal is provided, and the surface 13a of the active layer 13 is < It is characterized in that it is inclined at 2 degrees or more and 10 degrees or less with respect to the {001} plane from a direction within a range of ± 15 degrees from the 110> direction. Since it consists of a diamond single crystal, the surface 13a consists of diamond excellent in crystallinity. Further, by specifying the crystal orientation, a large step is formed on the surface 13a and it can be made flat at the atomic level. Therefore, scattering caused by unevenness on the surface 13a can be reduced, so that carrier mobility is improved. Therefore, it is possible to improve the device characteristic yield and put it to practical use.

  In the FET 10, the active layer 13 preferably has a channel 18 in a plane perpendicular to the off direction of the active layer 13. Thereby, the channel 18 parallel to the step formed on the surface 13a of the active layer 13 flat at the atomic level can be formed. Therefore, the interface state density when the insulating film is formed can also be reduced by the interface state density of the conventional semiconductor device in which the channel is formed in the direction crossing many steps. Therefore, the carrier mobility of the channel 18 limited by the interface state density can be improved.

  In the FET 10, the active layer 13 is preferably an n-type or p-type epitaxial film doped with impurities. Thereby, the carrier mobility can be improved regardless of whether the carrier is p-type or n-type.

  In the FET 10, the active layer 13 is preferably made of undoped diamond, and the channel 18 is formed in the vicinity of the hydrogen termination surface. By using the p-type conductive layer on the hydrogen-terminated surface formed on the surface 13a, a semiconductor device having p-type carriers can be obtained even when impurities are not doped.

  In the FET 10, the surface 13a of the active layer 13 is preferably formed with a single domain 2 × 1 structure. Thereby, the shape of the surface becomes more linear.

  In the FET 10, the surface 13a of the active layer 13 is preferably characterized in that a macro step of 10 atomic layers or more is formed. Thereby, the surface 13a of the active layer 13 can be made flatter. Therefore, carrier mobility can be further improved.

  The method for manufacturing the FET 10 of the present invention includes a step of preparing a substrate 11 made of a diamond single crystal, and a step of homoepitaxial growth by supplying a gas containing nitrogen atoms on the substrate 11. As a result, the surface 13a of the active layer 13 which is the semiconductor film after the homoepitaxial growth process is directed to the {001} plane from the direction within ± 15 degrees from the <110> direction in the {001} plane. 2 degrees or more and 10 degrees or less. As a result, a large step is formed on the surface 13a and the FET 10 including the active layer 13 flat at the atomic level can be manufactured. Therefore, scattering caused by the unevenness of the surface 13a is reduced, and carrier mobility is improved. Therefore, it is possible to manufacture the FET 10 that improves the device characteristic yield and enables practical use.

  Preferably, the method for manufacturing the FET 10 further includes a step of forming a channel 18 in a direction perpendicular to the off direction of the active layer 13 in the active layer 13 obtained by the homoepitaxial growth step. Thereby, the channel 18 parallel to the step formed on the surface 13a of the active layer 13 flat at the atomic level can be formed. Therefore, the interface state density when the insulating film is formed can be lower than the interface state density of the conventional semiconductor device in which the channel is formed in the direction across many steps. Therefore, the FET 10 that can improve the carrier mobility of the channel 18 limited by the interface state density can be manufactured.

[Example]
EXAMPLES Hereinafter, although an Example is given and this invention is demonstrated in detail, this invention is not limited to these.

(Example 1)
The semiconductor device (FET) of Example 1 was manufactured according to the manufacturing method of the semiconductor device in the first embodiment. Specifically, first, a substrate made of 4 mm square diamond single crystal obtained by a high pressure synthesis method was prepared. And it grind | polished so that the normal line direction of the surface of a board | substrate might become the azimuth | direction which shifted | deviated 5 degrees from the <001> direction to the <110> direction. That is, in the {001} plane, polishing was performed so as to be inclined by 5 degrees with respect to the {001} plane from the <110> direction. Then, epitaxial growth was performed on the substrate in the order of a 0.2 μm buffer layer, a 0.04 μm active layer, and a 0.05 μm cap layer by a methane-hydrogen microwave plasma CVD method.

The conditions for the plasma CVD method were a pressure of 40 Torr, a substrate temperature of 880 degrees, and a microwave power of 400 W. The gas introduced into the buffer layer and the cap layer was 3 sccm of methane and 500 sccm of hydrogen. In addition, the introduced gas of the active layer is doped with 3 sccm of methane, 500 sccm of hydrogen and boron (B), and charged with 10,000 ppm of B (ratio of the number of B atoms in the introduced gas to the number of C atoms) Diborane (B ₂ H ₆ ) was used.

Then, the surface of the active layer after growth was observed using a normalsky microscope. As a result, the density of secondary grain growth was 1 / mm ² or less, and it was confirmed that the grain was flat.

  Further, when the surface was observed by LEED, it was confirmed that a single domain 2 × 1 structure was formed in one direction. The fact that the 2 × 1 structure of a single domain can be confirmed by LEED is shown, for example, in Applied Physics Letter. Appl. Phys. Lett. 64, 572 (1994).

  Moreover, when the surface was observed using a scanning tunneling microscope (STM) and RHEED (Reflection High Energy Electron Diffraction), a single domain 2 × 1 structure aligned in one direction could be confirmed. .

  Further, since the surface has been treated in an atmosphere containing atomic hydrogen, it is estimated that the surface is a hydrogen-terminated surface.

  Next, a gate electrode, a source electrode, and a drain electrode were formed on the chip on which the obtained substrate, buffer layer, active layer, and cap layer were stacked using photolithography. The gate electrode was made of aluminum, the thickness was 150 nm, the gate length was 5 μm, and the gate width was 40 μm. The source electrode was made of titanium and the thickness was 120 nm. The drain electrode was made of titanium and had a thickness of 100 nm. In addition, with the channel direction set to [100], 100 FET elements were formed in a square lattice pattern at intervals of 0.2 mm on the substrate. And each was divided | segmented by engraving a 0.35-micrometer groove | channel from the surface using photolithography and reactive ion etching. Note that the gas introduced during the etching was argon and oxygen (O), and the volume ratio of oxygen to argon was 1%.

(Example 2)
In the second embodiment, an FET is manufactured basically in the same manner as in the first embodiment, but the only difference is that the channel direction is the [110] direction, which is a direction perpendicular to off.

(Comparative Example 1)
In Comparative Example 1, an FET was manufactured basically in the same manner as in Example 1. However, the difference was only in that the surface of the substrate was within ± 0.5 degrees from the (001) plane. Specifically, the surface of the substrate was polished in the {001} plane so as to be inclined at 2 degrees or more and 10 degrees or less with respect to the {001} plane from the <110> direction. Then, a buffer layer, an active layer, and a cap layer were formed on the substrate in the same manner as in Example 1. Note that the surface of the active layer had an inclination in the same direction as the surface of the substrate.

(Measuring method)
For the FETs of Examples 1 and 2 and Comparative Example 1, the rectification ratio was measured for 100 elements when the gate voltage was −2 V and the source-drain voltage was ± 50 V.

(Measurement result)
Of the 100 elements, the number of elements having a rectification ratio of 300 times or more was 92 elements in Example 1, 98 elements in Example 2, and 59 elements in Comparative Example 1. Therefore, it was found that Examples 1 and 2 can improve the device characteristic yield as compared with Comparative Example 1.

  As described above, according to Example 1, the surface of the active layer, which is a semiconductor film, is in the {001} plane from the direction within ± 15 degrees from the <110> direction in the {001} plane. Therefore, it was confirmed that the semiconductor device can be put into practical use by improving the yield of device characteristics because it is tilted by 2 degrees or more and 10 degrees or less.

  In addition, according to the second embodiment, since the channel is provided in the plane perpendicular to the off direction of the active layer that is a semiconductor film, the device characteristic yield is further improved compared to the first embodiment, and the practical use is improved. It was confirmed that the semiconductor device was made possible.

(Example 3)
In Example 3, first, the surface is inclined 3 ± 1 degree with respect to the {001} plane from the direction within the range of ± 2 degrees from the <110> direction in the {001} plane, and 5 mm × A 3 mm substrate was prepared. And the gas which added nitrogen was supplied on the board | substrate, and the epitaxial growth was performed by the microwave plasma CVD method. Film formation was performed for 30 minutes at an introduction gas of 2.5 sccm of methane, 500 sccm of hydrogen, nitrogen diluted 1% in 2.5 sccm of hydrogen, a pressure of 60 Torr, and a substrate temperature of 870 degrees. The film thickness formed is estimated to be 0.5 μm.

  And the said surface was observed using the scanning tunnel microscope. As a result, steps having a height of 2 to 3 nm were formed in parallel at intervals of 50 nm to 100 nm. Further, the terrace region was flat at the atomic level. In addition to steps such as monoatomic steps or diatomic steps, there were many islands of monoatomic layers and diatomic layers.

  Then, a film was formed on the surface for 30 minutes at 2.5 sccm of methane and 500 sccm of hydrogen, a pressure of 60 Torr, and a substrate temperature of 870 degrees. Thereby, a semiconductor film was formed.

  And the said surface was observed using the scanning tunnel microscope. As a result, the macro step was almost maintained, and the monoatomic layer and diatomic islands on the terrace were hardly observed.

  Further, since the surface has been treated in an atmosphere containing atomic hydrogen, it is estimated that the surface is a hydrogen-terminated surface.

  Then, a silicon oxide film was formed on the surface of the semiconductor film by sputtering, and oxygen plasma treatment was performed using this as a mask. In FIG. 1, the inner side indicated by a dotted line was covered with a mask during the oxygen plasma treatment, so that the hydrogen-terminated surface was maintained. Thereafter, the silicon oxide film was removed by hydrofluoric acid (HF) treatment, and a source electrode, a drain electrode, and a gate electrode were formed using a lithography technique. Specifically, the source electrode and drain electrode were made of platinum (Pt). The gate electrode was made of nickel (Ni), the gate length was 5 μm, and the gate width was 60 μm. In addition, 100 channels were formed in the semiconductor film at intervals of 0.1 μm so as to be perpendicular to the steps (having channels in a plane perpendicular to the off direction of the semiconductor film).

  For all 100, the gate-source voltage was set to 0 V and 0.4 V, and the drain-source VI characteristics (Vds-Ids) were measured. As a result, a depletion type operation having a clear saturation characteristic was confirmed for all 100 pieces.

  As described above, according to the third embodiment, the surface of the semiconductor film is 2 with respect to the {001} plane from the direction within ± 15 degrees from the <110> direction in the {001} plane. Since the inclination is not less than 10 degrees and not more than 10 degrees, it has been confirmed that the yield of device characteristics is improved and the semiconductor device can be put into practical use.

  It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is shown not by the above-described embodiment but by the scope of claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of claims.

1 is a schematic top view showing a semiconductor device in an embodiment of the present invention. It is a schematic sectional drawing in alignment with line segment II-II in FIG. It is a schematic diagram which shows the crystal orientation of the surface of the active layer of the semiconductor device in embodiment of this invention. It is a figure for demonstrating the crystal orientation of the surface of the active layer of the semiconductor device in embodiment of this invention.

Explanation of symbols

  10 FET, 11 substrate, 12 buffer layer, 13 active layer, 13a surface, 14 cap layer, 15 gate electrode, 16 source electrode, 17 drain electrode, 18 channel.

Claims (8)

It has a semiconductor film made of diamond single crystal,
The surface of the semiconductor film is inclined at 2 degrees or more and 10 degrees or less with respect to the {001} plane from a direction within ± 15 degrees from the <110> direction in the {001} plane. A semiconductor device is characterized.   The semiconductor device according to claim 1, wherein the semiconductor film has a channel in a plane perpendicular to an off direction of the semiconductor film.   The semiconductor device according to claim 1, wherein the semiconductor film is an n-type or p-type epitaxial film doped with impurities. The semiconductor film is made of undoped diamond,
The semiconductor device according to claim 1, wherein the channel is formed in the vicinity of a hydrogen termination surface.   5. The semiconductor device according to claim 1, wherein a surface of the semiconductor film is formed with a single domain 2 × 1 structure. 6.   The semiconductor device according to claim 1, wherein the surface of the semiconductor film is formed with a macro step of 10 atomic layers or more. A method for manufacturing a semiconductor device according to claim 1,
Preparing a substrate made of a diamond single crystal;
Supplying a gas containing nitrogen atoms onto the substrate to homoepitaxially grow the semiconductor film.   The method for manufacturing a semiconductor device according to claim 7, further comprising forming a channel in the semiconductor film in a direction perpendicular to an off direction of the semiconductor film.

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