JP2008096699A - Electro-optic device, method for driving electro-optic device and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To easily carry out a black insert display with low electric power. <P>SOLUTION: An electro-optic device 10 using a liquid crystal in a normally black mode is provided, in which a voltage at one end of a storage capacitor mounted in each pixel is varied to thereby reduce the absolute value of application voltage of the pixel in a part of one frame period. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a technique for suppressing blurring of moving images with a simple configuration in an electro-optical device such as a liquid crystal.

  An electro-optical device such as a liquid crystal is a hold-type display device that is constant until the brightness of each pixel is rewritten. When a moving image is displayed on the hold type display device, the display is blurred. In order to improve this, a black insertion technique has been proposed in which the brightness of each pixel corresponding to an actual display image (hereinafter referred to as an actual image) is forcibly set to black (see Patent Documents 1 and 2). . In addition, a technique for making an image in which the brightness of each pixel corresponding to actual display instead of black is darker (hereinafter referred to as a dark image) has been proposed.

Japanese Patent No. 3734629 JP 2002-350810 A

  By the way, in the technique of Patent Document 1, black display is performed in the first half of one selection period, and each pixel capacitor is charged with a pixel voltage corresponding to an actual image in the second half. The pixel voltage of the actual image is precharged to some extent during the black writing time. However, when the number of display rows increases, the writing time becomes short and writing becomes insufficient. Further, the timing control for supplying the black writing data and the actual display data is complicated and the control circuit is complicated. In particular, the control circuit becomes very complicated when implementing a method of suppressing blurring of a moving image by inserting a dark image instead of complete black display data by providing a timing for writing a dark image. That is, the data signal corresponding to the dark image must be generated each time based on the real image information. Further, the voltage of the data line in the panel is frequently switched, and the power consumption due to the parasitic capacitance of the data line is increased, which is not particularly suitable for portable device use.

  Further, in the technique of Patent Document 2, it is necessary to increase the voltage change of the storage capacitor line in order to bring the pixel to the black state, and the power consumption due to the parasitic capacitance of the data line of the storage capacitor line increases. Not suitable for portable device applications. In addition, in order to control a large voltage change, it is necessary to increase the breakdown voltage of the circuit, which increases the size of the device.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide an electro-optical device that can suppress blurring of moving images with a simple configuration and low power consumption, and a driving method thereof. And providing electronic equipment.

  To achieve the above object, an electro-optical device according to the present invention includes a plurality of rows of scanning lines, a plurality of columns of data lines, and a plurality of capacitance lines provided corresponding to the plurality of rows of scanning lines, Provided corresponding to the intersection of the plurality of rows of scanning lines and the plurality of columns of data lines, each of which has one end connected to the data line corresponding to itself and the scanning line corresponding to itself selected A pixel switching element that is sometimes in a conductive state, one end connected to the other end of the pixel switching element, the other end provided as a common electrode, one end of the pixel capacitor, and the scanning line An electro-optical device having a pixel including a storage capacitor interposed between the capacitance lines and being driven in a normally black mode, wherein the scanning lines are selected in a predetermined order A scanning line driving circuit for applying a voltage; and A capacitor line driving circuit that applies a voltage that changes at least once within a period in which the scanning line is selected to a capacitance line provided corresponding to the inspection line, and a pixel corresponding to the selected scanning line On the other hand, a data line driving circuit for supplying a data signal corresponding to the gradation of the pixel through the data line is provided.

  According to the present invention, it is possible to change the brightness of the pixels related to the capacitance line only by changing the voltage of the capacitance line with a small amplitude, and to mutually change to a black image, a real image, and a dark image display, Improve blurring of videos.

  Here, in the electro-optical device according to the aspect of the invention, it is preferable that the capacitor line driving circuit supplies a voltage that decreases an absolute value of a voltage applied to the pixel capacitor related to the capacitor line. By supplying a voltage at which the absolute value of the voltage applied to the capacitor is such that the pixel displays black, the actual image is changed to a black image, and black can be inserted.

  In addition, the capacitor line driving circuit supplies an absolute value of a voltage applied to the pixel capacitor related to the capacitor line to a voltage from which an original white display becomes an intermediate display, thereby supplying a dark image from an actual image. It becomes possible to.

  Further, the data line driving circuit adds or subtracts a predetermined voltage from a voltage necessary for gradation display of the pixel as the data signal to be supplied to each data line when the scanning line is selected, By supplying a voltage whose absolute value is reduced, a black image and a dark image can be generated at the time of writing.

  Further, the data line driving circuit adds or subtracts a predetermined voltage from a voltage necessary for gradation display of the pixel as the data signal supplied to each data line when the scanning line is selected, An actual image can be generated from a black image and a dark image by supplying a pixel whose absolute value is reduced to such an extent that the voltage causes the pixel to display black.

  In addition, the capacitor line driving circuit supplies a voltage for decreasing the absolute value of the voltage applied to the pixel capacitor associated with the capacitor line to a plurality of capacitor lines at the same time, so that the black insertion time and the actual display time can be increased. At the same time for all pixels, the number of divisions of the backlight can be reduced when the backlight is blinked and black is inserted.

  Further, the capacitor line driving circuit selects a voltage for increasing or decreasing an absolute value of a voltage applied to the pixel capacitor related to the capacitor line, after the scanning line related to the capacitor line is selected. By supplying the capacitive lines before and after the half of the period until they are mixed, the display of the actual image and the black or dark image is dispersed, and flickering can be prevented.

  Further, the capacitor line driving circuit is configured such that a voltage change that decreases an absolute value of a voltage applied to the pixel capacitor related to the capacitor line is half of a period from when the scan line is selected to when it is next selected. It is preferable that the period before and after the period is periodically changed to suppress flickering more.

  Further, the capacitor line driving circuit is a voltage change that inverts the polarity of the voltage applied to the pixel capacitor related to the capacitor line with respect to at least one voltage change of the voltage supplied to the capacitor line. It is possible to apply both positive and negative voltages of the pixel capacitance while suppressing the amplitude of the data signal supplied to the data signal line.

  The present invention can be conceptualized not only as an electro-optical device, but also as a driving method of the electro-optical device, and also as an electronic apparatus having the electro-optical device.

  Embodiments of the present invention will be described below with reference to the drawings.

<First Embodiment>
First, a first embodiment of the present invention will be described. FIG. 1 is a block diagram showing the configuration of the electro-optical device according to the first embodiment of the invention.

  As shown in this figure, the electro-optical device 10 has a display area 100, and a control circuit 20, a scanning line driving circuit 140, a capacitor line driving circuit 150, and a data line driving circuit 190 are arranged around the display area 100. The arrangement is arranged. Among these, the display area 100 is an area in which the pixels 110 are arranged. In the present embodiment, 320 scanning lines 112 extend in the row (X) direction, while 240 data lines 114 are arranged in the column (Y The pixels 110 are arranged corresponding to the intersections of the scanning lines 112 in the 1st to 320th rows and the data lines 114 in the 1st to 240th columns. In the present embodiment, the pixels 110 are arranged in a matrix of 320 rows × 240 columns in the display region 100, but the present invention is not limited to this arrangement.

  In addition, corresponding to the scanning lines 112 in the first to 320th rows, capacitance lines 132 are provided extending in the X direction, respectively. For this reason, in the present embodiment, the capacity line 132 is provided for 1 to 320 rows.

  Here, a detailed configuration of the pixel 110 will be described.

  FIG. 2 is a diagram illustrating the configuration of the pixel 110, and 2 × 2 total 4 corresponding to the intersections of the i row and the (i + 1) row adjacent thereto, the j column and the (j + 1) column adjacent thereto. A configuration for pixels is shown.

  Note that i is a symbol generally indicating a row in which the pixels 110 are arranged, and is an integer of 1 to 320, and j and (j + 1) generally indicate a column in which the pixels 110 are arranged. The symbol of the case, which is an integer from 1 to 240.

  As shown in FIG. 2, each pixel 110 includes an n-channel thin film transistor (hereinafter simply referred to as “TFT”) 116 that functions as a pixel switching element, a pixel capacitor (liquid crystal capacitor) 120, And a storage capacitor 130. Since each pixel 110 has the same configuration, a description will be given by representatively assuming that the pixel 110 is located in the i row and j column. In the pixel 110 in the i row and j column, the gate electrode of the TFT 116 is connected to the scanning line 112 in the i row. On the other hand, the source electrode is connected to the data line 114 in the j-th column, and the drain electrode is connected to the pixel electrode 118 that is one end of the pixel capacitor 120.

  The other end of the pixel capacitor 120 is a common electrode 108. The common electrode 108 is common to all the pixels 110 as shown in FIG. 1, and a common signal Com is supplied thereto. In the present embodiment, the common signal Com is constant at the voltage Vcom over time as will be described later.

  In FIG. 2, Yi and Y (i + 1) indicate scanning signals supplied to the i and (i + 1) th scanning lines 112, respectively, and Ci and C (i + 1) indicate i and (i + 1), respectively. ) The voltage of the capacitor line 132 in the row is shown.

  In the display region 100, a pair of substrates, an element substrate on which the pixel electrode 118 is formed and a counter substrate on which the common electrode 108 is formed, are bonded to each other with a certain gap so that the electrode formation surfaces face each other. In this gap, a normally black mode liquid crystal 115 is sealed. Therefore, the pixel capacitor 120 has a structure in which the pixel electrode 118 and the common electrode 108 sandwich the liquid crystal 115 which is a kind of dielectric, and holds a differential voltage between the pixel electrode 118 and the common electrode 108. . In this configuration, in the normally black mode, the pixel capacitor 120 transmits light if the amount of transmitted light changes according to the effective value of the holding voltage and the effective voltage value held in the pixel capacitor 120 is close to zero. While the rate is minimized and black display is achieved, the amount of transmitted light increases as the effective voltage value increases, and finally the white display with the maximum transmittance is obtained.

  The storage capacitor 130 in the pixel 110 in the i row and j column has one end connected to the pixel electrode 118 (the drain electrode of the TFT 116) and the other end connected to the i-th capacitor line 132. Here, the capacitance values in the pixel capacitor 120 and the storage capacitor 130 are Cpix and Cs, respectively.

  Returning to FIG. 1 again, the control circuit 20 outputs various control signals to control each part in the electro-optical device 10 and supplies the common signal Com to the common electrode 108.

  Around the display area 100, peripheral circuits such as a scanning line driving circuit 140, a capacitor line driving circuit 150, and a data line driving circuit 190 are provided. Among these, the scanning line driving circuit 140 sends the scanning signals Y1, Y2, Y3,..., Y319, Y320 to 1, 2, 3,. This is supplied to the scanning line 112 in the row. That is, the scanning line driving circuit 140 selects the scanning lines in the order of the first, second, third,..., 319, and 320th rows, and sets the scanning signal to the selected scanning line to the H level corresponding to the selection voltage Vdd. The scanning signals for the other scanning lines are set to the L level corresponding to the non-selection voltage (ground potential Gnd).

  Specifically, as shown in FIG. 4, the scanning line driving circuit 140 sequentially shifts the signal Dy supplied from the control circuit 20 in accordance with the clock signal CK, etc., so that the scanning signals Y1, Y2, Y3 , Y4,..., Y319, Y320 are output.

  In the present embodiment, as shown in FIG. 4, the period of one frame is an effective scanning period Fa from when the scanning signal Y1 becomes H level until the scanning signal Y320 becomes L level, and scanning from this point onward. And a blanking period Fb until the signal Y1 becomes H level again. In addition, a period during which one row of scanning lines 112 is selected is a horizontal scanning period (H).

  In addition, the capacitance line driving circuit 150 supplies the capacitance signals C1, C2, C3,..., C319, C320 to the first, second, third,. The capacitor line 132 is supplied.

  Specifically, as shown in FIG. 4, the voltage waveform composed of at least the voltage Vsh and the voltage Vsl is converted into capacitance signals C1, C2 by sequentially shifting the signal Dc supplied from the control circuit 20 in accordance with the clock signal CK. , C3, C4,..., C319, C320 are output. Here, in the n frame period, when the scanning signal Yi of the i-th scanning line is selected, the voltage of the capacitance signal Ci of the i-th capacitance line becomes the voltage Vsh, and then, as shown in FIG. When the time tdly elapses, the voltage changes to a voltage Vsl lower than the voltage Vsh. In the (n + 1) frame period, when the scanning signal Yi of the i-th scanning line is selected, the voltage of the capacitance signal Ci of the i-th capacitance line becomes the voltage Vsl, and then a predetermined time tdly elapses. The voltage changes to a voltage Vsh higher than the voltage Vsl.

  The data line driving circuit 190 is a voltage corresponding to the gray level of the pixel 110 located on the scanning line 112 selected by the scanning line driving circuit 140 and has a polarity voltage data signal X1 designated by the polarity instruction signal Pol. , X2, X3,..., X240 are supplied to the data lines 114 in the 1, 2, 3,.

  Here, the data line driving circuit 190 has storage areas (not shown) corresponding to a matrix arrangement of 320 rows × 240 columns, and each storage area has a gradation value (brightness) of the corresponding pixel 110. The display data Da for designating is stored. The display data Da stored in each storage area is rewritten by the display circuit Da after the change together with the address by the control circuit 20 when the display contents are changed.

  The data line driving circuit 190 reads out the display data Da of the pixel 110 located on the selected scanning line 112 from the storage area, and converts it into a data signal having a voltage corresponding to the gradation value and having a specified polarity. The operation of converting and supplying to the data line 114 is executed for each of the 1 to 240 columns positioned on the selected scanning line 112.

  Here, the polarity instruction signal Pol is a signal for designating the positive polarity writing if it is at the H level, and for designating the negative polarity writing if it is the L level. In this embodiment, as shown in FIG. The polarity is inverted every frame period. That is, in this embodiment, the surface inversion method is used in which all the polarities to be written to the pixels in the period of one frame are the same, and the writing polarity is inverted every period of one frame. The reason for polarity inversion is to prevent deterioration of the liquid crystal due to application of a direct current component.

  As for the writing polarity in the present embodiment, when the voltage corresponding to the gradation is held in the pixel capacitor 120, the potential of the pixel electrode 118 is higher than the voltage Vcom of the common electrode 108. It is called positive polarity, and the case of the lower side is called negative polarity. On the other hand, the voltage is based on the ground potential Gnd of the power supply unless otherwise specified.

  Note that the control circuit 20 supplies the latch pulse Lp to the data line driving circuit 190 at the timing when the logic level of the clock signal CK transitions. As described above, the scanning line driving circuit 140 outputs the scanning signals Y1, Y2, Y3, Y4,..., Y320, Y321 by sequentially shifting the signal Dy according to the clock signal CK. The start timing of the selected period is a timing at which the logic level of the clock signal CK transitions. Therefore, the data line driving circuit 190 starts the selection depending on, for example, which row scanning line is selected by continuously counting the latch pulse Lp over the period of one frame and the supply timing of the latch pulse Lp. You can know the timing.

  In this embodiment, the scanning line 112, the data line 114, the capacitor line 132, the TFT 116, the pixel electrode 118, the storage capacitor 130, and the like in the display region 100 are formed on the element substrate.

  FIG. 3 is a plan view showing the configuration of the display region 100 of such an element substrate.

  As shown in this figure, in this embodiment, the TFT 116 is an amorphous silicon type, and is a bottom gate type in which the gate electrode is positioned below the semiconductor layer. More specifically, the scanning line 112 and the capacitor line 132 are formed by patterning the gate electrode layer serving as the first conductive layer, a gate insulating film (not shown) is formed thereon, and the semiconductor layer of the TFT 116 is formed in an island shape. Is formed. On the semiconductor layer, a rectangular pixel electrode 118 is formed by patterning an ITO (indium tin oxide) layer serving as a second conductive layer via a protective layer, and further aluminum or the like serving as a third conductive layer. By patterning the metal layer, the data line 114 and the like serving as the source / drain electrodes of the TFT 116 are formed.

  FIG. 3 is merely an example, and the TFT type may be another structure, for example, the top gate type in terms of the arrangement of the gate electrodes, or the polysilicon type in terms of the process.

  When the present embodiment is a reflective type instead of a transmissive type, the reflective conductive layer may be patterned for the pixel electrode 118, or a separate reflective metal layer may be provided. Furthermore, a so-called transflective type that combines both a transmissive type and a reflective type may be used.

  Next, the operation of the electro-optical device 10 according to this embodiment will be described.

  As described above, in this embodiment, the surface inversion method is used. Therefore, the control circuit 20 designates the positive polarity writing as the H level in the period of a certain frame (denoted as “n frame”) for the polarity instruction signal Pol as shown in FIG. The negative polarity writing is designated as the L level during the period of (n + 1) frames, and the writing polarity is similarly reversed every frame period thereafter.

  In the n frame, the scanning signal driving circuit 140 first sets the scanning signal Y1 to the H level.

  On the other hand, when the latch pulse Lp is output at the timing when the scanning signal Y1 becomes the H level, the data line driving circuit 190 displays the display data of the pixels in the first row and in the first, second, third,. Da is read, and only the voltage designated by the display data Da is converted into voltage data signals X1, X2, X3,..., X240 with the voltage Vcom as a reference, and 1, 2, 3,. , 240 data lines 114 are supplied.

  Thus, for example, a positive voltage that is higher than the voltage Vcom by a voltage specified by the display data Da of the pixel 110 in the 1st row and jth column is applied to the jth data line 114 as the data signal Xj. The

  Now, when the scanning signal Y1 becomes the H level, the TFTs 116 in the pixels in the first row and the first column to the first row and the 240th column are turned on, so that the data signals X1, X2, X3,. Is done. For this reason, a positive voltage corresponding to each gradation is written in the pixel capacitors 120 in the first row and the first column to the first row and the 240th column. That is, assuming that the voltage of the signal line in the j-th row is the voltage Vj, the pixel voltage Vpix is Vj−Vcom, and this is set as the pixel voltage Vpix0. However, the influence of each parasitic capacitance is ignored. On the other hand, during the period in which the scanning signal Y1 is at the H level, the capacitor line driving circuit 150 supplies the voltage Vsh to the capacitor line 132 in the first row. For this reason, the differential voltage between the positive voltage and the voltage Vsh corresponding to each gradation is written in the storage capacitor 130 in the first row and the first column to the first row and the 240th column.

  Next, the scanning signal Y1 becomes L level and the scanning signal Y2 becomes H level.

  When the scanning signal Y1 becomes L level, the TFTs 116 in the pixels in the first row and first column to the first row and 240th column are turned off. At this time, the voltage of the capacitor line in the first row remains unchanged at the voltage Vsh. For this reason, even if the scanning signal Y2 becomes H level, the voltage held in the pixel capacitor 120 and the storage capacitor 130 in the 1st row and 1st column to the 1st row and 240th column does not change.

  However, when the time tdly elapses, the voltage of the capacitor line in the first row changes from the voltage Vsh to the voltage Vsl. Then, the pixel voltage Vpix becomes Vpix = Vpix0− {Cs / {Cs + Cpix}} (Vsh−Vsl) because of the relationship between the capacitance Cs of the storage capacitor 130 and the capacitance Cpix of the pixel capacitor 120. Here, since the pixel voltage Vpix0 is a positive value and the second term on the right side is a negative value, an appropriate capacitance ratio between the capacity Cs of the storage capacitor 130 and the capacity Cpix of the pixel capacity 120 and an appropriate capacity line voltage are set. Thus, the absolute value of the pixel voltage Vpix is smaller than that of the original pixel voltage Vpix0.

  That is, | Vpix | <Vth is set. However, the threshold voltage Vth is a threshold voltage of the liquid crystal, and when the pixel voltage is smaller than the threshold voltage Vth, black display is performed.

  This will be described with reference to FIG. FIG. 5A is a voltage waveform diagram showing the scanning signal Y1 of the scanning line, the capacitance signal C1 of the capacitance line, and the pixel voltage Vpix of the pixel capacitance 120 (referenced to the voltage Vcom). The reason why the voltage of the pixel capacitor 120 is two is to indicate the maximum and minimum voltages in each period. FIG. 5B shows the relationship between the voltage of the pixel capacitance and the transmittance (brightness) of the pixel. The vertical axis represents the voltage of the pixel capacitance, and the horizontal axis represents the transmittance. Here, the voltages of the pixel capacitors in FIGS. 5A and 5B have the same scale. However, the scale of the voltage of the scanning line, the capacity line, and the pixel capacity in the voltage waveform diagram is appropriately changed.

  From FIG. 5A, when the scanning line scanning signal Y1 is selected at the beginning of the n frame (positive writing period), the pixel capacitance voltage on the scanning line scanning signal Y1 corresponds to black-white display. The voltage is written and an actual image is displayed. (Hereinafter, the pixel voltage at the time of actual image display is referred to as the actual image voltage.) Then, when the time tdly elapses, the voltage of the capacitor line 132 changes from the voltage Vsh to the voltage Vsl, and these pixel voltages are totally changed. Decrease to the negative side. All pixel voltages are between -Vth and + Vth, and all pixel voltages are black and display a black image.

  The scanning lines in the second and subsequent rows are sequentially selected, but the pixels in the row perform the actual image display for the time tdly in the same manner as the pixels in the first row, and then the black image display.

  Next, the control circuit 20 will explain the operation of the (n + 1) frame in which the polarity instruction signal Pol becomes L level. The scanning signal drive circuit 140 first sets the scanning signal Y1 to the H level. (Negative Write Period) On the other hand, when the latch pulse Lp is output at the timing when the scanning signal Y1 becomes H level, the data line driving circuit 190 is in the first row and the first, second, third,. The pixel display data Da is read out and converted into data signals X1, X2, X3,..., X240 having a voltage higher than the voltage Vcom by the voltage specified by the display data Da. , 240 are supplied to the data lines 114 in 240 columns.

  Thus, for example, a negative voltage that is lower than the voltage Vcom by the voltage specified by the display data Da of the pixel 110 in the first row and j column is applied to the jth data line 114 as the data signal Xj. The

  Now, when the scanning signal Y1 becomes the H level, the TFTs 116 in the pixels in the first row and the first column to the first row and the 240th column are turned on, so that the data signals X1, X2, X3,. Is done. For this reason, a positive voltage corresponding to each gradation is written in the pixel capacitors 120 in the first row and the first column to the first row and the 240th column. That is, if the voltage of the signal line in the j-th row is −Vj, the pixel voltage Vpix is − (Vj−Vcom), which is redefined as the pixel voltage Vpix0. However, the influence of each parasitic capacitance is ignored. On the other hand, when the scanning signal Y1 is at the H level, the capacitor line driving circuit 150 supplies the voltage Vsl to the capacitor line 132 in the first row. For this reason, the differential voltage between the negative voltage and the voltage Vsl corresponding to each gradation is written in the storage capacitor 130 in the first row and the first column to the first row and the 240th column.

  Next, the scanning signal Y1 becomes L level and the scanning signal Y2 becomes H level.

  When the scanning signal Y1 becomes L level, the TFTs 116 in the pixels in the first row and first column to the first row and 240th column are turned off. At this time, the voltage of the capacitor line in the first row remains unchanged at the voltage Vsl. For this reason, even if the scanning signal Y2 becomes H level, the voltage held in the pixel capacitor 120 and the storage capacitor 130 in the 1st row and 1st column to the 1st row and 240th column does not change.

  However, when the time tdly elapses, the voltage of the capacitor line in the first row changes from the voltage Vsl to the voltage Vsh. Then, the pixel voltage Vpix becomes Vpix = Vpix0 + {Cs / {Cs + Cpix}} (Vsh−Vsl) because of the relationship between the capacitance ratio of the capacitor Cs of the storage capacitor 130 and the capacitor Cpix of the pixel capacitor 120. Here, since the pixel voltage Vpix0 is a negative value and the second term on the right side is a positive value, an appropriate capacitance ratio between the capacity Cs of the storage capacitor 130 and the capacity Cpix of the pixel capacity 120 and an appropriate capacity line voltage are set. Thus, the absolute value of the pixel voltage Vpix is smaller than that of the original pixel voltage Vpix0.

  This will be described with reference to FIG. 5. When the scanning signal Y1 of the scanning line is selected at the beginning of the (n + 1) frame, the voltage corresponding to the black to white display is written as the voltage of the pixel capacitance on the scanning signal Y1 of the scanning line. The real image is displayed. Then, when the time tdly elapses, these pixel voltages generally increase to the positive side, the pixel voltages enter between −Vth and + Vth, become black at all pixel voltages, and display a black image.

  The scanning lines in the second and subsequent rows are sequentially selected, but the pixels in the row perform the actual image display for the time tdly in the same manner as the pixels in the first row, and then the black image display.

  Now, consider a case where the liquid crystal has electro-optical characteristics such that the threshold voltage Vth for black becomes 1.5 V and the voltage Vsat for white becomes 4.5 V. Further, the capacitance ratio between the capacitance Cpix value of the pixel capacitor 120 and the capacitance Cs value of the storage capacitor 130 is 1: 2.

  Then, in the case of positive writing, from Vpix = Vpix0− {Cs / {Cs + Cpix}} (Vsh−Vsl), the pixel voltage at the time of actual image display is changed from 4.5V of white to a threshold voltage of 1.5V at the time of black image display. In order to change, it is only necessary to set (Vsh−Vsl) = 4.5V from 1.5V = 4.5V− (2/3) (Vsh−Vsl). At this time, the pixel voltage of 1.5 V at the time of actual image display is −1.5 V at the time of black image display and falls within the threshold voltage to display black.

  Since the above operation is performed, the pixels in each row display an actual image for each time tdly, and then display a black image. Accordingly, it is possible to eliminate blurring of the moving image. At this time, the black insertion operation can realize the capacitor line driving circuit 150 with a simple shift register or the like. Further, since the voltage applied to each capacitor line 132 can be switched by the data amplitude, an unnecessarily high withstand voltage circuit configuration is not required. Further, the power consumption associated with this change can be reduced.

  It is easy to display a dark image instead of a black image. For example, the pixel voltage which is 1.5V to 4.5V at the time of actual image display is reduced to −0.5V after time tdly only by reducing the voltage difference from 3V to (Vsh−Vsl) = 4.5V. It can be easily changed to a voltage of ˜2.5 V, enabling dark image display, improving blurring of moving images and providing a relatively bright display with little flicker. Since only the amount of change between the voltage Vsh and the voltage Vsl is affected, these voltages may be in an arbitrary voltage relationship with other voltages.

<Second Embodiment>
In the second embodiment, the structure of the electro-optical device 10 is the same as that of the first embodiment, and a description thereof will be omitted. The difference is how to supply a data signal at the time of writing and how to apply the voltage of the capacitor line, which will be described with reference to FIG. Note that the symbols and the like in the figure are the same as those in FIG.

  When the scanning line of the first row is selected in n frames and the corresponding pixel capacity is written, a voltage obtained by subtracting a predetermined positive voltage from a pixel voltage necessary for displaying a positive actual image is supplied to the data line 114. For example, when the pixel voltage required for positive white display is 4.5 V and the pixel voltage required for black display is 1.5 V, +1.5 V and −1.5 V are supplied by subtracting 3.0 V uniformly. To do. Therefore, when the scanning signal Y1 becomes H level, each pixel capacitor 120 in the first row is written with a voltage of +1.5 V to -1.5 V (hereinafter referred to as a black image voltage), which is below the threshold voltage of the liquid crystal. . At this time, the voltage Vsl is applied to the capacitor line 132 in the first row.

  Next, the scanning signal Y1 becomes L level and the scanning signal Y2 becomes H level.

  When the scanning signal Y1 becomes L level, the TFTs 116 in the pixels in the first row and first column to the first row and 240th column are turned off. At this time, the voltage of the capacitor line in the first row remains Vsl and does not change. For this reason, even if the scanning signal Y2 becomes H level, the voltage held in the pixel capacitor 120 and the storage capacitor 130 in the 1st row and 1st column to the 1st row and 240th column does not change. Therefore, a black image is displayed.

  However, when the time tdly elapses, the voltage of the capacitor line in the first row changes from the voltage Vsl to the voltage Vsh. Then, the pixel voltage Vpix becomes Vpix = Vpix0 + {Cs / {Cs + Cpix}} (Vsh−Vsl) because of the relationship between the capacitance ratio of the capacitor Cs of the storage capacitor 130 and the capacitor Cpix of the pixel capacitor 120. Here, by setting an appropriate capacitance ratio of the capacitance Cs of the storage capacitor 130 and the capacitance Cpix of the pixel capacitor 120 and the voltage difference (Vsh−Vsl) of the capacitor capacitor so that the value of the second term on the right side becomes + 3V. The pixel voltage Vpix is a positive pixel voltage for actual image display.

  Similarly, the operation of (n + 1) frames will be described.

  When the scanning line of the first row is selected in the (n + 1) frame and the corresponding pixel capacity is written, a voltage obtained by adding a predetermined positive voltage from the pixel voltage necessary for the negative actual image display is supplied to the data line 114. . For example, when the pixel voltage required for positive white display is −4.5 V and the pixel voltage required for black display is −1.5 V, −1.5 V obtained by uniformly adding 3.0 V, +1. Supply 5V. Accordingly, when the scanning signal Y1 becomes H level, each pixel capacitor 120 in the first row is written with a voltage of −1.5V to + 1.5V, which is below the threshold voltage of the liquid crystal. At this time, the voltage Vsh is applied to the capacitor line 132 in the first row.

  Next, the scanning signal Y1 becomes L level and the scanning signal Y2 becomes H level.

  When the scanning signal Y1 becomes L level, the TFTs 116 in the pixels in the first row and first column to the first row and 240th column are turned off. At this time, the voltage of the capacitor line in the first row remains unchanged at the voltage Vsl. For this reason, even if the scanning signal Y2 becomes H level, the voltage held in the pixel capacitor 120 and the storage capacitor 130 in the 1st row and 1st column to the 1st row and 240th column does not change. Therefore, the display is black.

  However, when the time tdly elapses, the voltage of the capacitor line in the first row changes from the voltage Vsh to the voltage Vsl, so that the pixel voltage Vpix becomes a negative pixel voltage for actual image display.

  With the above operation, the black image is displayed for the time tdly immediately after writing, and then the actual image is displayed, and the blur can be eliminated.

  In this embodiment, it is easy to display a dark image instead of a black image. For example, the pixel voltage which is 1.5V to 4.5V at the time of actual image display is reduced to −0.5V after time tdly only by reducing the voltage difference from 3V to (Vsh−Vsl) = 4.5V. It can be easily changed to a voltage of ˜2.5 V, enabling dark image display, improving blurring of moving images and providing a relatively bright display with little flicker. Since only the amount of change between the voltage Vsh and the voltage Vsl is affected, these voltages may be in an arbitrary voltage relationship with other voltages.

  As described above, in the second embodiment, a predetermined voltage is added to or subtracted from a pixel voltage of actual image data, a pixel voltage of black image and dark image data is written, and a capacitance line is changed after a predetermined time. Thus, the same effect as in the first embodiment can be obtained by changing the pixel voltage to the voltage of the actual image.

  Furthermore, in the first embodiment, a positive white pixel voltage (for example, −4.5 V) to a negative white pixel voltage (for example, −4.5 V) is required as the voltage amplitude of the data signal. Although the withstand voltage was increased accordingly, in the second embodiment, the voltage amplitude of the data signal is about a positive black pixel voltage (for example, +1.5 V) to a negative black pixel voltage (for example, -1.5 V). Thus, the withstand voltage of the data line driving circuit 190 can be lowered, the circuit configuration can be simplified, and the power consumption can be reduced.

<Third Embodiment>
In the first embodiment and the second embodiment, the number of changes of the capacitance line is one time, but may be a plurality of times. This will be described, but the structure of the electro-optical device 10 is the same as that of the first embodiment, and the description thereof is omitted. The difference is how to supply a data signal at the time of writing and how to apply the voltage of the capacitor line, which will be described with reference to FIG.

  FIG. 7 is a voltage waveform diagram showing the scanning signal Y1 of the scanning line, the capacitance signal C1 of the capacitance line, and the pixel voltage Vpix (referenced to the voltage Vcom) of the pixel capacitance. The reason why the pixel capacitance voltage is two is to indicate the maximum and minimum voltages in each period. Further, the voltage state of the pixel capacitance is indicated by Psate, the black image voltage is indicated by cross hatching, and the actual image voltage is indicated by white. In addition, the scale of each voltage is changed suitably.

  In the figure, when the scanning line of the first row is selected at time t0 and the corresponding pixel capacity is written, a voltage obtained by subtracting a predetermined positive voltage from the pixel voltage necessary for displaying a positive actual image is supplied to the data line 114. To do. For example, when the pixel voltage required for positive white display is 4.5 V and the pixel voltage required for black display is 1.5 V, +1.5 V and −1.5 V are supplied by subtracting 3.0 V uniformly. To do. Therefore, when the scanning signal Y1 becomes H level, each pixel capacitor 120 in the first row is written with a voltage of + 1.5V to -1.5V, which is below the threshold voltage of the liquid crystal. At this time, the voltage Vsl is applied to the capacitor line 132 in the first row.

  Next, the scanning signal Y1 becomes L level and the scanning signal Y2 becomes H level.

  When the scanning signal Y1 becomes L level, the TFTs 116 in the pixels in the first row and first column to the first row and 240th column are turned off. At this time, the voltage of the capacitor line in the first row remains unchanged at the voltage Vsl. For this reason, even if the scanning signal Y2 becomes H level, the voltage held in the pixel capacitor 120 and the storage capacitor 130 in the 1st row and 1st column to the 1st row and 240th column does not change. Therefore, a black image is displayed. This is indicated by cross hatching in Psate.

  However, at time t1, the voltage of the capacitor line in the first row changes from the voltage Vsl to the voltage Vsh. Then, the pixel voltage Vpix becomes Vpix = Vpix0 + {Cs / {Cs + Cpix}} (Vsh−Vsl) because of the relationship between the capacitance ratio of the capacitor Cs of the storage capacitor 130 and the capacitor Cpix of the pixel capacitor 120. Here, by setting an appropriate capacitance ratio of the capacitance Cs of the storage capacitor 130 and the capacitance Cpix of the pixel capacitor 120 and the voltage difference (Vsh−Vsl) of the capacitor capacitor so that the value of the second term on the right side becomes + 3V. The pixel voltage Vpix becomes a positive pixel voltage for actual image display and continues until time t2. It is shown in white in Psate.

  At time t2, the voltage of the capacitor line in the first row changes from Vsh to voltage Vsl, so that a black image is displayed again and continues until time t3. This is indicated by cross hatching in Psate.

  At time t3, the voltage of the capacitor line in the first row changes again from the voltage Vsl to the voltage Vsh, so that an actual image is displayed again and continues until time t4. It is shown in white in Psate.

  When the scanning line of the first row is selected at time t4 and the corresponding pixel capacity is written, a voltage obtained by adding a predetermined positive voltage to the pixel voltage necessary for the negative actual image display is supplied to the data line 114. For example, when the pixel voltage necessary for positive white display is −4.5 V and the pixel voltage necessary for black display is −1.5 V, −1.5 V and +1.5 V are uniformly added by 3.0 V. Supply. Accordingly, when the scanning signal Y1 becomes H level, each pixel capacitor 120 in the first row is written with a voltage of −1.5V to + 1.5V, which is below the threshold voltage of the liquid crystal. At this time, the voltage Vsh is applied to the capacitor line 132 in the first row.

  Next, the scanning signal Y1 becomes L level and the scanning signal Y2 becomes H level.

  When the scanning signal Y1 becomes L level, the TFTs 116 in the pixels in the first row and first column to the first row and 240th column are turned off. At this time, the voltage of the capacitor line in the first row remains unchanged at the voltage Vsh. For this reason, even if the scanning signal Y2 becomes H level, the voltage held in the pixel capacitor 120 and the storage capacitor 130 in the 1st row and 1st column to the 1st row and 240th column does not change. Therefore, the display is black. This is indicated by cross hatching in Psate.

  However, at time t5, the voltage of the capacitor line in the first row changes from the voltage Vsh to the voltage Vsl. Then, the pixel voltage Vpix becomes a negative pixel voltage for actual image display, and continues until time t6. It is shown in white in Psate.

  At time t6, the voltage of the capacitor line in the first row changes from Vsl to voltage Vsh, so that a black image is displayed again and continues until time t7. This is indicated by cross hatching in Psate.

  At time t7, the voltage of the capacitor line in the first row changes from the voltage Vsh to the voltage Vsl again, so that an actual image is displayed again and continues until time t8. It is shown in white in Psate.

  The above is repeated and the other rows are driven in the same manner.

  Such an operation makes it possible to divide the black insertion portion and prevent flickering.

  In the present embodiment, the black image display may be a dark image display, and the black and the dark image display may be mixed by setting the capacity line change to 3 or more instead of binary. It can be done easily and flickering can be prevented.

<Fourth embodiment>
In the fourth embodiment, the structure of the electro-optical device 10 is the same as that of the first embodiment, and a description thereof will be omitted. The difference is how to supply a data signal at the time of writing and how to apply the voltage of the capacitor line, which will be described with reference to FIG.

  FIG. 8 is a diagram showing voltage waveforms and voltage states of pixels. Scanning signals Y1, Y2,..., Y320 of scanning lines, capacitance signals C1, C2,. P1, P2,... Here, the time when the voltage is a black image or a dark image is indicated by cross hatching, and the time when the voltage is an actual image voltage is indicated by white. In addition, the scale of each voltage is changed suitably.

  First, at time t1, n frames start, but immediately before that, the pixel states of all the rows are negative real image displays. At time t1, the voltages of all the capacitive lines 132 except for the first row change from the voltage Vsl to the voltage Vsh. Therefore, the pixels in all rows except the first row are displayed as black images.

  The first row is selected, and a positive pixel voltage for black image display is written to the capacitor line 132 with the voltage Vsl applied. Thereafter, other rows are selected in order, and the voltage of the capacitor line 132 is changed from the voltage Vsh to the voltage Vsl and applied, and a positive pixel voltage for black image display is written.

  The voltage Vsl of the capacitor line 132 is maintained until time t2, which will be described later.

  Then, at time t2 after all the rows are selected and the positive pixel voltage is written, the voltages of all the capacitor lines 132 are changed from the voltage Vsl to the voltage Vsh. Then, the pixel capacities of all the rows are displayed as real images at the same time.

  This state is maintained until time t3 when the (n + 1) frame starts.

  At time t3, the (n + 1) frame starts, but immediately before that, the pixel states of all the rows are both positive real image displays. At time t3, the voltages of all the capacitive lines 132 except for the first row change from the voltage Vsh to the voltage Vsl. Therefore, the pixels in all rows except the first row are displayed as black images.

  Then, the first row is selected, and a negative pixel voltage for black image display is written to the capacitor line 132 with the voltage Vsh applied. Thereafter, another row is selected in order, and the voltage of the capacitor line 132 is applied by changing from the voltage Vsl to the voltage Vsh, and a negative pixel voltage for black image display is written.

  The voltage Vsl of the capacitor line 132 is maintained until time t4 described later.

  Then, at time t4 after all rows are selected and the negative pixel voltage is written, the voltages of all the capacitor lines 132 are changed from the voltage Vsh to the voltage Vsl. Then, the pixel capacities of all the rows are displayed as real images at the same time. This state is maintained until time t5 when the (n + 2) frame starts.

  The above operation is repeated.

  Then, a backlight (not shown) is provided on the back surface of the electro-optical device 10 in FIG. 1, and blurring can be prevented by emitting light intermittently from time t2 to time t3 and from time t4 to time t5. At that time, since the timing of optical change from the black image display to the real image display and the real image display to the black image display of the pixels in all rows is the same, for example, display unevenness in the vertical direction occurs. Can be prevented.

  In this embodiment, after all lines are selected and writing is completed, all lines are changed simultaneously from black image display to real image display. For example, for each of 10 blocks with 32 lines as one block, After selecting all the lines in the block and completing the writing, all the lines may be changed simultaneously from the black image display to the real image display. At this time, the backlight also has a plurality of backlights extending in a strip shape in the display row direction corresponding to this block, and the corresponding backlight is changed at the timing when each block changes from the black image display to the actual image display. To emit light.

  Then, it is possible to prevent display unevenness in the vertical direction in each block. In other words, blur and flicker can be eliminated without increasing the number of blocks more than necessary in order to avoid the occurrence of uneven display in the vertical direction.

<Fifth Embodiment>
In the fifth embodiment, the structure of the electro-optical device 10 is the same as that of the first embodiment, and a description thereof will be omitted. The difference is how to supply a data signal at the time of writing and how to apply the voltage of the capacitor line, which will be described with reference to FIG. Symbols and the like are the same as those in FIG.

  First, in the n frame, when an odd-numbered row is selected, the voltage of the capacitor line 132 is set as the voltage Vsl, a negative actual image voltage is written, and an actual image is displayed. After the selection of the row, when the time ta elapses, the voltage of the capacitor line 132 is changed from the voltage Vsl to the voltage Vsh to obtain a negative black (or dark) image.

  On the other hand, when an even-numbered row is selected, the voltage of the capacitor line 132 is set as the voltage Vsl, and a positive black (or dark) image voltage is written to display a black (or dark) image. After the selection of the row, when the time tb has elapsed, the voltage of the capacitor line 132 is changed from the voltage Vsl to the voltage Vsh to obtain a positive real image. Here, the sum of the times ta and tb is one frame period.

  Next, in the (n + 1) frame, when an odd row is selected, the voltage of the capacitor line 132 is set as the voltage Vsh, and a positive actual image voltage is written to display an actual image. After the selection of the row, when the time ta elapses, the voltage of the capacitor line 132 is changed from the voltage Vsh to the voltage Vsl to obtain a positive black (or dark) image.

  On the other hand, when an even-numbered row is selected, the voltage of the capacitor line 132 is set as the voltage Vsl, and a positive black (or dark) image voltage is written to display a black (or dark) image. After the selection of the row, when the time tb has elapsed, the voltage of the capacitor line 132 is changed from the voltage Vsl to the voltage Vsh to obtain a positive real image. Thereafter, the same operation is repeated.

  Since the above operation is performed, flickering is reduced because one side displays a black (or dark) image in the first half of each frame and the other side displays a black (or dark) image in the second half.

  Therefore, blurring can be eliminated and flickering can be eliminated.

<Sixth Embodiment>
In the sixth embodiment, the structure of the electro-optical device 10 is the same as that of the first embodiment, and a description thereof will be omitted. The difference is how to supply a data signal at the time of writing and how to apply the voltage of the capacitor line, which will be described with reference to FIG. Symbols and the like are the same as those in FIG.

  First, in the n frame, when an odd-numbered row is selected, the voltage of the capacitor line 132 is set as the voltage Vsl, a negative actual image voltage is written, and an actual image is displayed. After the selection of the row, when the time ta elapses, the voltage of the capacitor line 132 is changed from the voltage Vsl to the voltage Vsh to obtain a negative black (or dark) image.

  On the other hand, when an even-numbered row is selected, the voltage of the capacitor line 132 is set as the voltage Vsl, and a positive black (or dark) image voltage is written to display a black (or dark) image. After the selection of the row, when the time tb has elapsed, the voltage of the capacitor line 132 is changed from the voltage Vsl to the voltage Vsh to obtain a positive real image. Here, the sum of the times ta and tb is one frame period.

  Next, in the (n + 1) frame, when an odd row is selected, a positive black (or dark) image voltage is written with the voltage of the capacitor line 132 as the voltage Vsl to display a black (or dark) image. Then, when the time tb has elapsed after the selection of the row is completed, the voltage of the capacitor line 132 is changed from the voltage Vsl to the voltage Vsh to obtain a positive actual image display.

  On the other hand, when an even-numbered row is selected, the voltage of the capacitor line 132 is set as the voltage Vsl, a negative actual image voltage is written, and an actual image is displayed. After the selection of the row, when the time tb elapses, the voltage of the capacitor line 132 is changed from the voltage Vsl to the voltage Vsh to display a black (or dark) image. Thereafter, the same operation is repeated.

  In order to perform the operation as described above, one side displays a black (or dark) image in the first half of each frame and the other side displays a black (or dark) image in the second half and black (or black) for each frame. (Or dark) The timing at which the image comes alternates between the first half and the second half for each row.

  Therefore, as with the fifth embodiment, blurring can be eliminated and flicker can be eliminated. Furthermore, the voltage amplitude of the data line may be in the range between the maximum and minimum values of the voltage corresponding to the positive (negative) black (or dark) image and the voltage corresponding to the negative (positive) actual image. The voltage corresponding to the image and the voltage corresponding to the negative actual image may be narrower than the range of the maximum and minimum values, and the withstand voltage of the data line driving circuit 190 can be lowered.

<Seventh embodiment>
In the seventh embodiment, the structure of the electro-optical device 10 is the same as that of the first embodiment, and a description thereof will be omitted. The difference is how to supply a data signal at the time of writing and how to apply the voltage of the capacitor line, which will be described with reference to FIG. Symbols and the like are the same as those in FIG. However, the voltage value to be applied to each capacitor line 132 is a three value obtained by adding a voltage Vshh higher than the voltage Vsh.

  When the first scanning line is selected in n frames and the corresponding pixel capacity is written, a pixel voltage necessary for displaying a positive real image is supplied to the data line 114. At this time, the voltage Vsh is applied to the capacitor line 132 in the first row.

  Next, the scanning signal Y1 becomes L level and the scanning signal Y2 becomes H level.

  When the scanning signal Y1 becomes L level, the TFTs 116 in the pixels in the first row and first column to the first row and 240th column are turned off. At this time, the voltage of the capacitor line in the first row remains unchanged at the voltage Vsh. For this reason, even if the scanning signal Y2 becomes H level, the voltage held in the pixel capacitor 120 and the storage capacitor 130 in the 1st row and 1st column to the 1st row and 240th column does not change. Therefore, a positive real image display is obtained. However, when the time tdly elapses, the voltage of the capacitor line in the first row changes from the voltage Vsh to the voltage Vsl, so that a positive black (or dark) image is displayed.

Next, the operation of (n + 1) frames will be described.
When the scanning line of the first row is selected in the (n + 1) frame and the corresponding pixel capacity is written, a voltage obtained by adding a predetermined positive voltage from the pixel voltage necessary for the negative actual image display is supplied to the data line 114. . For example, when the pixel voltage required for positive white display is −4.5 V and the pixel voltage required for black display is −1.5 V, +1.5 V and +4.5 V obtained by uniformly adding 6.0 V Supply. Therefore, when the scanning signal Y1 becomes H level, each pixel capacitor 120 in the first row is written with a voltage of + 1.5V to + 4.5V. At this time, the voltage Vshh is applied to the capacitor line 132 in the first row.

  Next, the scanning signal Y1 becomes L level and the scanning signal Y2 becomes H level. At this time, the voltage Vshh applied to the capacitor line 132 in the first row is changed to the voltage Vsl. Then, the voltage of each pixel capacitor 120 changes from +1.5 V to +4.5 V to −4.5 V to −1.5 V. In other words, the voltage between the voltage Vshh and the voltage Vsl is set so as to change in this way. As a result, the pixel capacity becomes a negative actual image display. When the time tdly elapses, the voltage of the capacitor line in the first row changes from the voltage Vsl to the voltage Vsh, so that a negative black (or dark) image is displayed. This is repeated.

  The other lines have the same operation.

  As described above, in the second embodiment, a predetermined voltage is added to or subtracted from a pixel voltage of actual image data, a pixel voltage of black image and dark image data is written, and a capacitance line is changed after a predetermined time. Thus, the same effect as in the first embodiment can be obtained by changing the pixel voltage to the voltage of the actual image.

  Further, in the first embodiment, a positive white pixel voltage (for example, +4.5 V) to a negative white pixel voltage (for example, −4.5 V) is required as the voltage amplitude of the data signal, and the data line driving circuit 190 In the second embodiment, the voltage amplitude of the data signal is changed from the positive white pixel voltage (for example, +4.5 V) to the positive black pixel voltage (for example, +1.5 V). The withstand voltage of the data line driving circuit 190 can be lowered, the circuit configuration can be simplified, and the power consumption can be reduced.

  This is applicable to other embodiments, for example, the seventh embodiment.

  Further, in the above-described embodiment, the description has been made mainly on the surface polarity reversal. However, as shown in the seventh embodiment, the row polarity may be reversed.

<Electronic equipment>
Next, an electronic apparatus having the electro-optical device 10 according to the above-described embodiment as a display device will be described. FIG. 12 is a diagram illustrating a configuration of a mobile phone 1200 using the electro-optical device 10 according to any of the embodiments.

  As shown in this figure, a cellular phone 1200 includes the electro-optical device 10 described above together with a plurality of operation buttons 1202, an earpiece 1204 and a mouthpiece 1206. Note that, in the electro-optical device 10, the display area 100 appears as an appearance as a display unit of the mobile phone 1200.

  In addition to the mobile phone shown in FIG. 12, the electronic apparatus to which the electro-optical device 10 is applied includes a digital still camera, a notebook computer, a liquid crystal television, and a viewfinder type (or monitor direct view type) video recorder. , Car navigation devices, pagers, electronic notebooks, calculators, word processors, workstations, videophones, POS terminals, devices equipped with touch panels, and the like. The electro-optical device 10 described above can be applied as a display device for these various electronic devices.

1 is a diagram illustrating a configuration of an electro-optical device according to a first embodiment of the invention. FIG. FIG. 3 is a diagram illustrating a configuration of a pixel in the electro-optical device. FIG. 3 is a diagram illustrating a configuration of a display area of the electro-optical device. FIG. 6 is a diagram for explaining the operation of the electro-optical device. FIG. 6 is a voltage waveform diagram for explaining the operation of the electro-optical device. FIG. 6 is a diagram for explaining another operation (part 1) of the electro-optical device. FIG. 6 is a diagram for explaining another operation (part 2) of the electro-optical device. FIG. 6 is a diagram for explaining another operation (part 3) of the electro-optical device. FIG. 6 is a diagram for explaining another operation (part 4) of the electro-optical device. FIG. 6 is a diagram for explaining another operation (part 5) of the electro-optical device. FIG. 6 is a diagram for explaining another operation (No. 6) of the electro-optical device. 1 is a diagram showing a configuration of a mobile phone using an electro-optical device according to an embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Electro-optical apparatus, 20 ... Control circuit, 100 ... Display area, 108 ... Common electrode, 110 ... Pixel, 112 ... Scan line, 114 ... Data line, 116 ... TFT, 120 ... Pixel capacity, 130 ... Storage capacity, 132 ... capacitor line, 140 ... scan line driver circuit, 150 ... capacitor line driver circuit, 1200 ... mobile phone.

Claims (13)

Multiple rows of scanning lines;
Multiple columns of data lines;
A plurality of capacitance lines provided corresponding to the plurality of rows of scanning lines;
Provided corresponding to the intersection of the plurality of rows of scanning lines and the plurality of columns of data lines,
Each is
A pixel switching element having one end connected to a data line corresponding to the pixel and a conductive state when a scanning line corresponding to the data line is selected;
A pixel capacitor having one end connected to the other end of the pixel switching element and the other end being a common electrode;
A storage capacitor interposed between one end of the pixel capacitor and a capacitor line provided corresponding to the scanning line;
And an electro-optical device that is driven in a normally black mode,
A scanning line driving circuit for applying a selection voltage for selecting the scanning lines in a predetermined order;
A capacitive line driving circuit that applies a voltage that changes at least once within a period in which the scanning line is selected to a capacitive line provided corresponding to the scanning line;
A data line driving circuit for supplying a data signal corresponding to the gradation of the pixel to the pixel corresponding to the selected scanning line via the data line;
An electro-optical device comprising:   The electro-optical device according to claim 1, wherein the capacitor line driving circuit supplies a voltage that decreases an absolute value of a voltage applied to a pixel capacitor associated with the capacitor line.   3. The electro-optical device according to claim 2, wherein the capacitor line driving circuit supplies an absolute value of a voltage applied to a pixel capacitor related to the capacitor line to a voltage that causes the pixel to display black.   3. The capacitance line driving circuit supplies an absolute value of a voltage applied to a pixel capacitor related to the capacitance line to a voltage at which the original white display becomes an intermediate display. Electro-optic device.   The data line driving circuit adds or subtracts a predetermined voltage from a voltage necessary for gradation display of the pixel as the data signal to be supplied to each data line when the scanning line is selected. The electro-optical device according to claim 1, wherein a device having a smaller absolute value is supplied.   The data line driving circuit adds or subtracts a predetermined voltage from a voltage necessary for gradation display of the pixel as the data signal to be supplied to each data line when the scanning line is selected. 6. The electro-optical device according to claim 5, wherein a voltage having a smaller absolute value of the voltage is supplied to such an extent that the pixel displays black.   The data line driving circuit adds or subtracts a predetermined voltage from a voltage necessary for gradation display of the pixel as the data signal supplied to each data line when the scanning line is selected, 6. The electro-optical device according to claim 5, wherein the pixel is supplied with a voltage whose absolute value is reduced to such an extent that what is displayed in white at the voltage before addition / subtraction becomes halftone display.   8. The capacitor line driving circuit according to claim 1, wherein a voltage that decreases an absolute value of a voltage applied to a pixel capacitor associated with the capacitor line is simultaneously supplied to a plurality of capacitor lines. The electro-optical device according to Item.   The capacitance line driving circuit selects a voltage for increasing or decreasing an absolute value of a voltage applied to the pixel capacitance related to the capacitance line, after the scanning line related to the capacitance line is selected, and then selecting the voltage. 8. The electro-optical device according to claim 1, wherein the capacitive line is supplied in a mixed manner before and after the capacitive line before half of the period until.   In the capacitor line driving circuit, a voltage change that decreases an absolute value of a voltage applied to the pixel capacitor related to the capacitor line is less than half of a period from when the scan line is selected to when it is next selected. 8. The electro-optical device according to claim 1, wherein the period in step 1 and the subsequent period are periodically alternated.   The capacitance line driving circuit is a voltage change that inverts a polarity of a voltage applied to the pixel capacitor related to the capacitance line with respect to at least one voltage change of a voltage supplied to the capacitance line. Item 10. The electro-optical device according to any one of Items 1 to 8. Multiple rows of scanning lines;
Multiple columns of data lines;
A plurality of capacitance lines provided corresponding to the plurality of rows of scanning lines;
Provided corresponding to the intersection of the plurality of rows of scanning lines and the plurality of columns of data lines,
Each is
A pixel switching element having one end connected to a data line corresponding to the pixel and a conductive state when a scanning line corresponding to the data line is selected;
A pixel capacitor having one end connected to the other end of the pixel switching element and the other end being a common electrode;
A storage capacitor interposed between one end of the pixel capacitor and a capacitor line provided corresponding to the scanning line;
And a driving method of an electro-optical device that is driven in a normally black mode,
A selection voltage is applied to the scanning lines in a predetermined order,
A voltage that changes at least once within a period in which the scanning line is selected is applied to a capacitor line provided corresponding to the scanning line,
Supplying a data signal corresponding to the gradation of the pixel to the pixel corresponding to the selected scanning line via the data line;
A method for driving an electro-optical device.   An electronic apparatus comprising the electro-optical device according to claim 1.

Images