JP2008091418A - Semiconductor device, and its manufacturing method - Google Patents

Semiconductor device, and its manufacturing method Download PDF

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JP2008091418A
JP2008091418A JP2006267963A JP2006267963A JP2008091418A JP 2008091418 A JP2008091418 A JP 2008091418A JP 2006267963 A JP2006267963 A JP 2006267963A JP 2006267963 A JP2006267963 A JP 2006267963A JP 2008091418 A JP2008091418 A JP 2008091418A
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resin body
lead
semiconductor device
electronic component
frame
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JP5378643B2 (en
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Toshihiko Usami
俊彦 宇佐見
Hidehiro Takeshima
英宏 竹嶋
Toru Saga
徹 嵯峨
Fumitomo Watanabe
文友 渡辺
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Micron Memory Japan Ltd
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Elpida Memory Inc
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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technology for manufacturing a semiconductor device having a greater integration density with a high yield. <P>SOLUTION: The semiconductor device is provided with a rectangular first resin body made of insulative resin; a second resin body that is made of insulative resin and is integrated by overlapping the second surface of the first resin body over the first surface thereof and integrating them together; a plurality of conductive leads that are located in the first resin body and of which tip end is located inside and is exposed over the second surface of the resin body and of which the other end is located on the peripheral surface of the first rein body and is exposed over the first surface of the first resin body; at least one first electronic part that is located in the first resin body and wherein an electrode is electrically connected with a lead; at least one second electronic part that is located in the second resin body and wherein an electrode is electrically connected with a lead exposing over the first surface of the first resin body; and an external electrode terminal that is formed in a lead part exposing over the second surface of the first resin body. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明はＢＧＡ（Ball Grid Array ）型及びＬＧＡ（Land Grid Array ）の半導体装置及びその製造方法に係わり、特に、一括モールド方式を採用する半導体装置の製造方法に適用して有効な技術に関する。   The present invention relates to a BGA (Ball Grid Array) type and an LGA (Land Grid Array) semiconductor device and a manufacturing method thereof, and more particularly to a technique effectively applied to a manufacturing method of a semiconductor device employing a batch molding method.

ＢＧＡ型の樹脂封止型半導体装置の製造方法の一つとして、いわゆる一括モールド方式を採用する半導体装置の製造方法が知られている。この方法は、一つの半導体装置が形成される製品形成部を整列配置した配線基板（配線母基板）を使用する。半導体装置の製造においては、最初に、配線基板（配線母基板）の各製品形成部に、半導体チップを固定するとともに、半導体チップの電極と配線を導電性のワイヤで接続する。つぎに、配線基板の一面に絶縁性樹脂からなる樹脂層を形成して各半導体チップ及びワイヤを被う。つぎに、配線基板の裏面に外部電極端子（ボール電極）を形成し、その後、配線基板を樹脂層共々縦横に切断して複数の半導体装置を製造する（例えば、特許文献１、２）。   As one of methods for manufacturing a BGA type resin-encapsulated semiconductor device, a method for manufacturing a semiconductor device employing a so-called batch molding method is known. This method uses a wiring board (wiring mother board) in which product forming portions on which one semiconductor device is formed are arranged and arranged. In manufacturing a semiconductor device, first, a semiconductor chip is fixed to each product forming portion of a wiring board (wiring mother board), and the electrodes of the semiconductor chip and the wiring are connected by a conductive wire. Next, a resin layer made of an insulating resin is formed on one surface of the wiring board to cover each semiconductor chip and wire. Next, external electrode terminals (ball electrodes) are formed on the back surface of the wiring board, and then the wiring board is cut vertically and horizontally together with the resin layer to manufacture a plurality of semiconductor devices (for example, Patent Documents 1 and 2).

特許文献１には、「配線基板上に１つの領域を封止樹脂により封止すると封止樹脂と配線基板が一体となった基板は配線基板、封止樹脂、半導体チップの物性値の違いにより反りが発生し、樹脂封止する領域が大きくなる程、配線基板全体の反りは大きくなる。」、旨記載されている。   Patent Document 1 states that “when a region on a wiring board is sealed with a sealing resin, the board in which the sealing resin and the wiring board are integrated is due to a difference in physical properties of the wiring board, the sealing resin, and the semiconductor chip. It is described that the warpage occurs and the warpage of the entire wiring board increases as the resin sealing region increases.

特許文献２には、「複数の半導体素子を配線基板に搭載して封止を行うと、加熱時に封止体が反ってしまい、封止体の裏面の外部電極が平坦な位置からずれてしまうので、ボール電極を外部電極に高精度に搭載することが困難となる。」、旨記載されている。   Patent Document 2 states that “when a plurality of semiconductor elements are mounted on a wiring board and sealing is performed, the sealing body warps during heating, and the external electrode on the back surface of the sealing body shifts from a flat position. Therefore, it is difficult to mount the ball electrode on the external electrode with high accuracy. "

特開２００１−４４２２９号公報JP 2001-44229 A 特開２００２−２５２２３７公報JP 2002-252237 A

ＢＧＡ型半導体装置の製造においては、製品形成部をマトリックス状に配置した配線基板（配線母基板）が使用される。この配線母基板は、絶縁性樹脂板からなる基材と、この基材に設ける配線とからなっている。配線の一部は、半導体チップ等の電子部品を固定するための固定用パッド、ワイヤを接続するためのワイヤ接続パッド、ボール電極等の外部電極端子を形成するための電極接続パッド等ともなる。配線母基板として多用されるものの一つとして、ガラス・エポキシ樹脂配線基板がある。このガラス・エポキシ樹脂配線基板は、ガラス・エポキシ樹脂板の表面等に配線が形成されている。配線は、例えば、ガラス・エポキシ樹脂板の表面に接着した銅箔をエッチングして形成される。   In manufacturing a BGA type semiconductor device, a wiring board (wiring mother board) in which product forming portions are arranged in a matrix is used. The wiring mother board includes a base material made of an insulating resin plate and wiring provided on the base material. A part of the wiring also serves as a fixing pad for fixing an electronic component such as a semiconductor chip, a wire connection pad for connecting a wire, and an electrode connection pad for forming an external electrode terminal such as a ball electrode. One of the frequently used wiring mother boards is a glass / epoxy resin wiring board. In this glass / epoxy resin wiring board, wiring is formed on the surface of a glass / epoxy resin plate. The wiring is formed, for example, by etching a copper foil bonded to the surface of a glass / epoxy resin plate.

また、半導体装置の製造において、配線母基板の一面に半導体チップを固定し、かつこの半導体チップの電極と配線母基板の配線を電気的に接続し、さらに配線母基板の一面に半導体チップ等を被うように樹脂層を形成した段階では、材質の熱膨張係数の違いによって配線母基板が反り返ることがある。即ち、半導体装置を構成する配線母基板はガラス・エポキシ樹脂の基材であり、半導体チップはシリコン等の半導体であり、半導体チップを被う樹脂層はエポキシ樹脂等の樹脂である。このため、各部材の熱膨張係数の違いから、特許文献にも記載されているように樹脂層付きの配線母基板が反りやすくなる。また、一度に多数の半導体装置を製造するために、より多く製品形成部を配置した配線母基板では、その反りは大きくなる。従って、配線母基板の一面に樹脂層を形成した後、配線母基板の他の一面に治具を用いてボール電極（金属ボール）を一括して接続する際、配線母基板の反りによってボール電極接続位置のピッチが変化し、一部のボール電極が配線母基板の電極接続パッドに接続できなくなることもある。   In manufacturing a semiconductor device, a semiconductor chip is fixed to one surface of the wiring mother board, and the electrodes of the semiconductor chip and the wiring of the wiring mother board are electrically connected. At the stage where the resin layer is formed so as to cover, the wiring mother board may warp due to the difference in thermal expansion coefficient of the material. That is, the wiring mother board constituting the semiconductor device is a glass / epoxy resin base material, the semiconductor chip is a semiconductor such as silicon, and the resin layer covering the semiconductor chip is a resin such as epoxy resin. For this reason, the wiring mother board with a resin layer tends to warp due to the difference in thermal expansion coefficient of each member as described in the patent literature. Further, the warpage of the wiring mother board on which more product forming portions are arranged in order to manufacture a large number of semiconductor devices at once increases. Therefore, after a resin layer is formed on one surface of the wiring mother board, when ball electrodes (metal balls) are collectively connected to the other surface of the wiring mother board using a jig, the ball electrode is caused by warping of the wiring mother board. The pitch of the connection position may change, and some ball electrodes may not be connected to the electrode connection pads on the wiring motherboard.

一方、樹脂封止型半導体装置の製造においては、鉄−ニッケル系金属や銅等によるリードフレームが使用されている。リードフレームは、ガラス・エポキシ樹脂配線基板に比較して安価である。そこで、本発明者はリードフレームを樹脂で封止して形成する配線母基板を使用することによって半導体装置のコスト低減が可能になることに気が付き、既に特許出願をしている（特願2006-70180) 。   On the other hand, lead frames made of iron-nickel metal or copper are used in the manufacture of resin-encapsulated semiconductor devices. Lead frames are less expensive than glass / epoxy resin wiring boards. Therefore, the present inventor has noticed that the cost of the semiconductor device can be reduced by using a wiring mother board formed by sealing a lead frame with a resin, and has already filed a patent application (Japanese Patent Application No. 2006- 70180).

本願発明は既に提案している発明をさらに発展させたものである。即ち、本発明者は、リードフレームを樹脂で封止して形成したものを配線母基板とする半導体装置の製造方法において、前記配線母基板の樹脂内に、リードフレームの所定のリードに電極が接続される電子部品を埋め込んでおくことにより、製造される半導体装置をより高集積化できることに気が付き本発明をなした。   The present invention is a further development of the previously proposed invention. That is, the present inventor, in a manufacturing method of a semiconductor device using a wiring mother board formed by sealing a lead frame with a resin, an electrode is placed on a predetermined lead of the lead frame in the resin of the wiring mother board. By embedding the electronic parts to be connected, it was realized that the semiconductor device to be manufactured can be further integrated, and the present invention was made.

本発明の目的は半導体装置をより高集積化できかつ歩留りの高い半導体装置の製造技術を提供することにある。
本発明の他の目的は製造コストの低減が達成できる半導体装置の製造技術を提供することにある。
本発明の他の目的は、半導体装置の製造においてリードフレームと樹脂体からなる封止体部分の反りの発生を抑止して高歩留りに半導体装置を製造する技術を提供することにある。
本発明の前記ならびにそのほかの目的と新規な特徴は、本明細書の記述および添付図面からあきらかになるであろう。 SUMMARY OF THE INVENTION An object of the present invention is to provide a manufacturing technique of a semiconductor device capable of further integrating a semiconductor device and having a high yield.
Another object of the present invention is to provide a semiconductor device manufacturing technique capable of achieving a reduction in manufacturing cost.
Another object of the present invention is to provide a technique for manufacturing a semiconductor device at a high yield by suppressing the occurrence of warpage of a sealing body portion made of a lead frame and a resin body in the manufacture of the semiconductor device.
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

本願において開示される発明のうち代表的なものの概要を簡単に説明すれば、下記のとおりである。   The following is a brief description of an outline of typical inventions disclosed in the present application.

（１）半導体装置は、
第１の面及びこの第１の面の反対面となる第２の面を有する絶縁性樹脂で形成される四角形状の第１の樹脂体と、
第１の面及びこの第１の面の反対面となる第２の面を有し前記第２の面が前記第１の樹脂体の前記第１の面に一致して重ねられて一体となる絶縁性樹脂で形成される四角形状の第２の樹脂体と、
前記第１の樹脂体内に階段状に一段折れ曲がるように延在して位置し、先端部が前記第１の樹脂体の前記四角形状の内側に位置するとともに前記第１の樹脂体の前記第２の面に第２の面が露出し、他端部が前記第１の樹脂体の周面に位置するとともに前記第１の樹脂体の前記第１の面に第１の面が露出する複数の導電性のリードと、
前記第１の樹脂体内に位置し、複数の電極を有し、前記各電極が所定の前記リードに第１の接続手段を介して電気的に接続される少なくとも一つの第１の電子部品と、
前記第２の樹脂体内に位置し、複数の電極を有し、前記各電極が前記第１の樹脂体の前記第１の面に露出する所定の前記リード部分（リード）に第２の接続手段を介して電気的に接続される少なくとも一つの第２の電子部品と、
前記第１の樹脂体の前記第２の面に露出する前記リード部分に形成された外部電極端子とを有することを特徴とする。 (1) The semiconductor device
A rectangular first resin body formed of an insulating resin having a first surface and a second surface opposite to the first surface;
It has a first surface and a second surface opposite to the first surface, and the second surface coincides with and overlaps with the first surface of the first resin body. A quadrangular second resin body formed of an insulating resin;
The first resin body is positioned so as to be bent in a stepped manner in the first resin body, the distal end portion is located inside the square shape of the first resin body, and the second of the first resin body. The second surface is exposed on the first surface, the other end is positioned on the peripheral surface of the first resin body, and the first surface is exposed on the first surface of the first resin body. Conductive leads,
At least one first electronic component located in the first resin body, having a plurality of electrodes, each electrode being electrically connected to a predetermined lead via a first connecting means;
The second connecting means is located in the second resin body, has a plurality of electrodes, and each electrode is exposed to the first lead portion (lead) exposed on the first surface of the first resin body. At least one second electronic component electrically connected via
And an external electrode terminal formed on the lead portion exposed on the second surface of the first resin body.

前記外部電極端子として一定厚さの金属メッキ膜を形成する場合はＬＧＡ（Land Grid Array ）型の半導体装置とすることができる。また、前記外部電極端子としてバンプ電極等による突起電極を形成する場合はＢＧＡ（Ball Grid Array ）型の半導体装置とすることができる。   When a metal plating film having a certain thickness is formed as the external electrode terminal, an LGA (Land Grid Array) type semiconductor device can be formed. Further, when a bump electrode or the like is formed as the external electrode terminal, a BGA (Ball Grid Array) type semiconductor device can be formed.

また、第１の電子部品の厚さ（高さ）の選択によって、第１の樹脂体の第１の面に露出することなく第１の樹脂体内に第１の電子部品を埋没させる構造、または第１の電子部品を第１の樹脂体の第１の面に露出させる構造が取り得る。   Further, by selecting the thickness (height) of the first electronic component, a structure in which the first electronic component is buried in the first resin body without being exposed on the first surface of the first resin body, or A structure in which the first electronic component is exposed on the first surface of the first resin body may be employed.

また、少なくとも一つ配置される前記第１の電子部品の一つは、第１の面に複数の電極を有する半導体チップ、絶縁性の封止体の周面から複数のリードを突出させる半導体装置及び絶縁性の封止体の両端にそれぞれ電極を有するチップ部品のうちのいずれか一つとすることができる。そして、第１の電子部品の電極と前記リードを接続する第１の接続手段は、導電性の接合材（接着剤）で構成され、第１の電子部品の電極がリードの先端部の第１の面に前記接合材を介して重ねて接続される構成になる。   Further, at least one of the first electronic components arranged is a semiconductor chip having a plurality of electrodes on a first surface, a semiconductor device in which a plurality of leads protrude from the peripheral surface of an insulating sealing body And a chip component having electrodes at both ends of the insulating sealing body, respectively. The first connecting means for connecting the electrode of the first electronic component and the lead is composed of a conductive bonding material (adhesive), and the electrode of the first electronic component is the first of the tip of the lead. It becomes the structure connected in piles via the said bonding | jointing material.

また、少なくとも一つ配置される前記第２の電子部品の一つは、第１の面に複数の電極を有する半導体チップ又は絶縁性の封止体の両端にそれぞれ電極を有するチップ部品のうちのいずれか一つとすることができる。そして、第２の電子部品の電極と前記リードを接続する第２の接続手段は、第２の電子部品が半導体チップの場合は導電性のワイヤで構成され、ワイヤの一端が第２の電子部品の電極に接続され、他端が第１の樹脂体の第１の面に露出するリード部分の第１の面に接続される構成になる。また、第２の電子部品がチップ部品の場合は、第２の接続手段は導電性の接合材（接着剤）で構成され、第２の電子部品の各電極が第１の樹脂体の第１の面に露出する所定のリード部分の第１の面に接合材を介して重ねて接続される構成になる。   Further, at least one of the second electronic components arranged is a semiconductor chip having a plurality of electrodes on the first surface or a chip component having electrodes on both ends of an insulating sealing body. Either one can be used. The second connection means for connecting the electrode of the second electronic component and the lead is formed of a conductive wire when the second electronic component is a semiconductor chip, and one end of the wire is the second electronic component. The other end is connected to the first surface of the lead portion exposed on the first surface of the first resin body. When the second electronic component is a chip component, the second connecting means is made of a conductive bonding material (adhesive), and each electrode of the second electronic component is the first resin body first. The first lead surface of the predetermined lead portion exposed on the first surface is overlapped and connected via the bonding material.

第１の電子部品が第１の樹脂体内に埋没する構造では、第１の樹脂体の第１の面に接合材を介して第２の電子部品を搭載することが可能である。この場合、第２の電子部品として半導体チップが電極を有する面を上にして第１の樹脂体の第１の面に接合材を介して固定することができる。   In the structure in which the first electronic component is buried in the first resin body, the second electronic component can be mounted on the first surface of the first resin body via a bonding material. In this case, the semiconductor chip as the second electronic component can be fixed to the first surface of the first resin body via the bonding material with the surface having the electrodes facing up.

第１の電子部品が第１の樹脂体の第１の面に露出する構造の場合、第１の電子部品としてフリップ・チップ接続構造の半導体チップを使用することができる。半導体チップの各電極を所定リードの先端部の第１の面にフリップ・チップ接続する。この際、半導体チップは厚いものを使用することによって半導体チップを形成する半導体基板の上面（第２の面）を第１の樹脂体の第１の面に露出させることができる。従って、露出するこの半導体基板面に絶縁性の接合材（絶縁性あるいは導電性）によって第２の電子部品としての半導体チップを電極を有する第１の面を上面として固定することができる。第１の電子部品としての半導体チップはその半導体基板が半導体チップにおいて所定の電位を有する構造となるものが多い。そこで、第１の電子部品である半導体チップの半導体基板に第２の電子部品である半導体チップの半導体基板を固定する場合、固定のための接合材は絶縁性の接合材が使用されるが、電気的に支障がない場合は導電性の接合材で第１の電子部品である半導体チップに第２の電子部品である半導体チップを固定してもよい。   In the case of a structure in which the first electronic component is exposed on the first surface of the first resin body, a semiconductor chip having a flip chip connection structure can be used as the first electronic component. Each electrode of the semiconductor chip is flip-chip connected to the first surface of the tip of the predetermined lead. At this time, by using a thick semiconductor chip, the upper surface (second surface) of the semiconductor substrate on which the semiconductor chip is formed can be exposed to the first surface of the first resin body. Therefore, the semiconductor chip as the second electronic component can be fixed to the exposed surface of the semiconductor substrate by the insulating bonding material (insulating or conductive) with the first surface having the electrodes as the upper surface. Many semiconductor chips as first electronic components have a structure in which the semiconductor substrate has a predetermined potential in the semiconductor chip. Therefore, when fixing the semiconductor substrate of the semiconductor chip as the second electronic component to the semiconductor substrate of the semiconductor chip as the first electronic component, an insulating bonding material is used as the bonding material for fixing, When there is no electrical problem, the semiconductor chip as the second electronic component may be fixed to the semiconductor chip as the first electronic component with a conductive bonding material.

また、第１の樹脂体及び第２の樹脂体は同じ材質の絶縁性樹脂（物性値が同じとなる樹脂）で形成されている。   Further, the first resin body and the second resin body are formed of insulating resin (resin having the same physical property value) of the same material.

また、リードフレームにおいて、前記第１の接続手段及び前記第２の接続手段が接続される前記リードの表面には金属メッキ膜が形成され、前記外部電極端子が形成される前記リードの表面には金属メッキ膜が形成されている。これら金属メッキ膜によって接続性を良好にする。   In the lead frame, a metal plating film is formed on a surface of the lead to which the first connection means and the second connection means are connected, and on the surface of the lead on which the external electrode terminal is formed. A metal plating film is formed. These metal plating films improve the connectivity.

また、リードの厚さは７５〜１００μｍ、第１の樹脂体の厚さは２５０〜３００μｍ、第２の樹脂体の厚さは３００〜４００μｍである。   The lead has a thickness of 75 to 100 μm, the first resin body has a thickness of 250 to 300 μm, and the second resin body has a thickness of 300 to 400 μm.

このような半導体装置は以下の方法によって製造することができる。
半導体装置の製造方法は、
（ａ）第１の面及びこの第１の面の反対面となる第２の面を有し、かつ前記第１の面に製品形成部をマトリックス状に複数配置した金属からなるリードフレームであり、前記製品形成部は、四角形枠からなる平坦な枠と、前記枠の内側から突出し先端部分を前記枠の内側に突出する複数のリードとからなり、前記突出する各リードは途中から前記第１の面から前記第２の面に向かって階段状に一段低く折れ曲がる構造となるリードフレームを準備する工程、
（ｂ）複数の電極を有する少なくとも一つの第１の電子部品を前記リードに固定する工程、
（ｃ）前記リードフレームの前記枠の第１の面から前記リードの先端部分の前記第２の面に至る厚さ部分を絶縁性の樹脂で被って第１の樹脂体を形成するとともに、前記第１の樹脂体の第１の面に前記枠及び枠に連なる前記リード部分を露出させ、前記第２の樹脂体の第２の面に前記リードの先端部分を露出させる工程、
（ｄ）前記各製品形成部において、複数の電極を有する少なくとも一つの第２の電子部品を前記リード部分または前記第１の樹脂体に固定するとともに、前記各電極を前記第１の樹脂体の前記第１の面に露出する前記リード部分に電気的に接続する工程、
（ｅ）前記リードフレームの前記第１の面に絶縁性の樹脂からなる第２の樹脂体を一定厚さ形成して前記各製品形成部の前記第２の電子部品を被う工程、
（ｆ）前記第１の樹脂体の前記第２の面に露出する前記リード表面に外部電極端子を形成する工程、
（ｇ）前記リードフレーム、前記第１の樹脂体及び前記第２の樹脂体を前記各製品形成部が分離されるように縦横に切断する工程、
とを有し、
前記工程（ｂ）では、前記第１の電子部品の前記各電極を導電性の接合材を介して所定の前記リードの先端部分の前記第１の面に接続し、
前記工程（ｄ）では、
前記第２の電子部品が第１の面に複数の電極を有する半導体チップの場合は、前記半導体チップの前記第１の面の反対面となる第２の面を前記第１の樹脂体の第１の面に絶縁性の接合材を介して固定し、かつ前記各電極と前記リード部分を導電性のワイヤによって接続し、
前記第２の電子部品が絶縁性の封止体の両端にそれぞれ電極を有するチップ部品の場合は、前記チップ部品の前記各電極を導電性の接合材を介して前記リード部分に接続することを特徴とする。 Such a semiconductor device can be manufactured by the following method.
The manufacturing method of the semiconductor device is as follows:
(A) A lead frame made of metal having a first surface and a second surface opposite to the first surface, and a plurality of product forming portions arranged in a matrix on the first surface. The product forming portion includes a flat frame made of a quadrangular frame and a plurality of leads protruding from the inside of the frame and projecting a tip end portion to the inside of the frame. A step of preparing a lead frame having a structure that is bent stepwise downward from the surface toward the second surface in a stepwise manner;
(B) fixing at least one first electronic component having a plurality of electrodes to the leads;
(C) forming a first resin body by covering a thickness portion from the first surface of the frame of the lead frame to the second surface of the leading end portion of the lead with an insulating resin; Exposing the frame and the lead portion connected to the frame to the first surface of the first resin body, and exposing the leading end portion of the lead to the second surface of the second resin body;
(D) In each of the product forming portions, at least one second electronic component having a plurality of electrodes is fixed to the lead portion or the first resin body, and each electrode is fixed to the first resin body. Electrically connecting to the lead portion exposed on the first surface;
(E) forming a second resin body made of an insulating resin on the first surface of the lead frame to a certain thickness and covering the second electronic component of each product forming portion;
(F) forming an external electrode terminal on the lead surface exposed on the second surface of the first resin body;
(G) cutting the lead frame, the first resin body, and the second resin body vertically and horizontally so that the product forming portions are separated;
And
In the step (b), each electrode of the first electronic component is connected to the first surface of the tip portion of the predetermined lead via a conductive bonding material,
In the step (d),
When the second electronic component is a semiconductor chip having a plurality of electrodes on the first surface, the second surface of the semiconductor chip opposite to the first surface is the second surface of the first resin body. Fixed to one surface via an insulating bonding material, and each electrode and the lead portion are connected by a conductive wire;
When the second electronic component is a chip component having electrodes at both ends of the insulating sealing body, the electrodes of the chip component are connected to the lead portion via a conductive bonding material. Features.

前記工程（ａ）におけるリードフレームを準備する工程では、リードの厚さが７５〜１００μｍとなるものであり、かつ第１の接続手段及び第２の接続手段並びに外部電極端子が形成されるリードの表面に金属メッキ膜を形成したものを準備する。   In the step of preparing the lead frame in the step (a), the thickness of the lead is 75 to 100 μm, and the first connecting means, the second connecting means, and the lead on which the external electrode terminal is formed are formed. Prepare a metal plating film on the surface.

前記工程（ｂ）では、少なくとも一つの第１の電子部品の各電極を導電性の接合材を介して所定のリードの先端部分の第１の面に接続するが、この少なくとも一つ接続される第１の電子部品の一つは、第１の面に複数の電極を有する半導体チップ、絶縁性の封止体の周面から複数のリードを突出させる半導体装置及び絶縁性の封止体の両端にそれぞれ電極を有するチップ部品のうちのいずれか一つを選択とすることができる。そして、第１の電子部品の電極とリードを接続する第１の接続手段は、導電性の接合材で構成され、第１の電子部品の電極がリードの先端部の第１の面に前記接合材を介して重ねて接続される構成になる。また、前記工程（ｂ）では、第１の電子部品の厚さ（高さ）を選択することによって、第１の樹脂体の第１の面に第１の電子部品を露出させることなく第１の樹脂体内に第１の電子部品を埋没させる構造、または第１の電子部品を第１の樹脂体の第１の面に露出させる構造とすることができる。   In the step (b), each electrode of at least one first electronic component is connected to the first surface of the tip portion of a predetermined lead via a conductive bonding material. At least one of the electrodes is connected. One of the first electronic components is a semiconductor chip having a plurality of electrodes on the first surface, a semiconductor device in which a plurality of leads protrude from the peripheral surface of the insulating sealing body, and both ends of the insulating sealing body Any one of chip parts each having an electrode can be selected. The first connecting means for connecting the electrode of the first electronic component and the lead is made of a conductive bonding material, and the electrode of the first electronic component is bonded to the first surface of the tip of the lead. It becomes the structure connected in piles through a material. In the step (b), the thickness (height) of the first electronic component is selected so that the first electronic component is not exposed on the first surface of the first resin body. A structure in which the first electronic component is buried in the resin body or a structure in which the first electronic component is exposed on the first surface of the first resin body can be employed.

前記工程（ｃ）では、第１の樹脂体の厚さを２５０〜３００μｍに形成する。   In the step (c), the thickness of the first resin body is formed to 250 to 300 μm.

前記工程（ｄ）では、少なくとも一つの第２の電子部品を第１の樹脂体の第１の面に露出するリード部分または第１の樹脂体に固定するが、この少なくとも一つ固定される第２の電子部品の一つは、第１の面に複数の電極を有する半導体チップ又は絶縁性の封止体の両端にそれぞれ電極を有するチップ部品のうちのいずれか一つとすることができる。そして、第２の電子部品が半導体チップの場合は、この半導体チップの第１の面の反対面となる第２の面を第１の樹脂体の第１の面に絶縁性の接合材を介して固定し、かつ各電極とリード部分を導電性のワイヤによって接続する。また、第２の電子部品がチップ部品の場合は、チップ部品の各電極を導電性の接合材を介してリード部分に接続する。   In the step (d), at least one second electronic component is fixed to the lead portion exposed on the first surface of the first resin body or the first resin body. One of the two electronic components can be any one of a semiconductor chip having a plurality of electrodes on the first surface or a chip component having electrodes at both ends of the insulating sealing body. When the second electronic component is a semiconductor chip, the second surface, which is the opposite surface of the first surface of the semiconductor chip, is connected to the first surface of the first resin body via an insulating bonding material. And each electrode and the lead portion are connected by a conductive wire. When the second electronic component is a chip component, each electrode of the chip component is connected to the lead portion via a conductive bonding material.

第１の電子部品が第１の樹脂体内に埋没する構造では、第１の樹脂体の第１の面に接合材を介して第２の電子部品を搭載することが可能である。この場合、第２の電子部品として第１の面に電極を有する半導体チップの前記第１の面の反対面となる第２の面を第１の樹脂体の第１の面に接合材を介して固定することができる。   In the structure in which the first electronic component is buried in the first resin body, the second electronic component can be mounted on the first surface of the first resin body via a bonding material. In this case, the second surface, which is the surface opposite to the first surface of the semiconductor chip having the electrode on the first surface as the second electronic component, is bonded to the first surface of the first resin body via a bonding material. Can be fixed.

第１の電子部品が第１の樹脂体の第１の面に露出する構造の場合、第１の電子部品としてフリップ・チップ接続構造の半導体チップを使用することができる。第１の電子部品としての半導体チップの各電極を所定リードの先端部の第１の面にフリップ・チップ接続する。この際、半導体チップは厚いものを使用することによって半導体チップを形成する半導体基板面（半導体チップの第２の面に相当）が第１の樹脂体の第１の面に露出する。従って、露出する半導体基板面に絶縁性の接合材によって第２の電子部品としての半導体チップの電極を有さない第２の面を接合材を用いて固定することができる。一般に、半導体チップはその半導体チップを構成する半導体基板が所定の電位を有する構造となるものが多い。そこで、第１の電子部品である半導体チップの半導体基板に第２の電子部品である半導体チップの半導体基板を固定する場合、固定のための接合材は絶縁性の接合材を使用する。しかし、電気的に支障がない構造の場合は導電性の接合材を使用してもよい。   In the case of a structure in which the first electronic component is exposed on the first surface of the first resin body, a semiconductor chip having a flip chip connection structure can be used as the first electronic component. Each electrode of the semiconductor chip as the first electronic component is flip-chip connected to the first surface of the tip of the predetermined lead. At this time, by using a thick semiconductor chip, a semiconductor substrate surface (corresponding to a second surface of the semiconductor chip) on which the semiconductor chip is formed is exposed on the first surface of the first resin body. Therefore, the second surface that does not have the electrode of the semiconductor chip as the second electronic component can be fixed to the exposed semiconductor substrate surface by the bonding material. In general, many semiconductor chips have a structure in which a semiconductor substrate constituting the semiconductor chip has a predetermined potential. Therefore, when fixing the semiconductor substrate of the semiconductor chip as the second electronic component to the semiconductor substrate of the semiconductor chip as the first electronic component, an insulating bonding material is used as the bonding material for fixing. However, in the case of a structure that does not cause an electrical problem, a conductive bonding material may be used.

前記工程（ｅ）では、第２の樹脂体の厚さを３００〜４００μｍに形成する。   In the step (e), the thickness of the second resin body is formed to 300 to 400 μm.

前記工程（ｃ）及び前記工程（ｅ）では、第１の樹脂体及び第２の樹脂体を同じ材質の絶縁性樹脂（物性値が同じとなる樹脂）で形成する。   In the step (c) and the step (e), the first resin body and the second resin body are formed of the same insulating resin (resin having the same physical property value).

前記工程（ｆ）では、第１の樹脂体の第２の面に露出するリード表面に外部電極端子を形成する際、前記リード表面に一定厚さの金属メッキ膜を形成することによってＬＧＡ型の半導体装置とすることができる。また、第１の樹脂体の第２の面に露出するリード表面に外部電極端子を形成する際、前記リード表面にバンプ電極等によって突起電極を形成することによってＢＧＡ型の半導体装置とすることができる。   In the step (f), when forming the external electrode terminal on the lead surface exposed on the second surface of the first resin body, an LGA type metal plating film is formed on the lead surface to form an LGA type. A semiconductor device can be obtained. Further, when forming the external electrode terminal on the lead surface exposed on the second surface of the first resin body, a bump electrode or the like is formed on the lead surface to form a BGA type semiconductor device. it can.

（２）上記（１）の半導体装置において、
前記第１の樹脂体内であって前記各リードの前記先端部に囲まれる領域に設けられるタブと、
前記第１の樹脂体内に階段状に一段折れ曲がるように延在して位置し、一端部が前記タブの周縁に連なり、他端部が前記第１の樹脂体の周面に位置しかつ前記第１の樹脂体の前記第１の面に第１の面が露出する複数のタブ吊りリードとをさらに有し、
前記第１の電子部品の少なくとも一つは第１の面に複数の電極を有する半導体チップからなり、前記半導体チップは前記第１の面の反対面となる第２の面が前記タブの前記第１の面に固定され、前記半導体チップの前記電極は前記第１の接続手段としての導電性のワイヤによって所定の前記リードに接続されていることを特徴とする。 (2) In the semiconductor device of (1) above,
A tab provided in a region surrounded by the tip of each lead in the first resin body;
The first resin body is positioned so as to be bent in a stepped manner, one end portion is connected to the peripheral edge of the tab, the other end portion is positioned on the peripheral surface of the first resin body, and the first resin body is bent. A plurality of tab suspension leads, the first surface of which is exposed on the first surface of one resin body;
At least one of the first electronic components comprises a semiconductor chip having a plurality of electrodes on a first surface, and the semiconductor chip has a second surface opposite to the first surface, the second surface of the tab being the first surface. The electrode of the semiconductor chip is connected to a predetermined lead by a conductive wire as the first connecting means.

このような半導体装置は、上記（１）の半導体装置の製造方法において、
前記工程（ａ）では、第１の面及びこの第１の面の反対面となる第２の面を有し、かつ前記第１の面に製品形成部をマトリックス状に複数配置した金属からなるリードフレームであり、前記製品形成部は、四角形枠からなる平坦な枠と、前記枠の内側から突出し先端部分を前記枠の内側に突出する複数のリードと、前記各リードの前記先端部分に囲まれる領域に位置するタブと、前記タブを支持する前記枠から延在する複数のタブ吊りリードとからなり、前記突出する各リードは途中から前記第１の面から前記第２の面に向かって階段状に一段低く折れ曲がる構造となり、前記タブ吊りリードは途中から前記第１の面から前記第２の面に向かって階段状に一段低く折れ曲がり一端部で前記タブを支持する構造となるリードフレームを準備する。 Such a semiconductor device is the method of manufacturing a semiconductor device according to (1) above.
The step (a) is made of a metal having a first surface and a second surface opposite to the first surface, and a plurality of product forming portions arranged in a matrix on the first surface. A lead frame, wherein the product forming portion is surrounded by a flat frame made of a quadrangular frame, a plurality of leads protruding from the inside of the frame and protruding at the tip portion inside the frame, and the tip portion of each lead And a plurality of tab suspension leads extending from the frame supporting the tab, and each of the protruding leads extends from the first surface to the second surface from the middle. The lead frame has a structure that bends stepwise in a stepwise manner, and the tab suspension lead is bent in a stepwise manner from the first surface toward the second surface from the middle, and has a structure that supports the tab at one end. prepare

そして、前記工程（ｂ）では、前記第１の電子部品として少なくとも前記タブに固定される第１の面に複数の電極を有する半導体チップを準備し、前記半導体チップの前記第１の面の反対面となる第２の面を前記タブの前記第１の面に固定し、前記半導体チップの前記電極と所定の前記リードを導電性のワイヤによって接続し、前記半導体チップ以外の前記第１の電子部品にあっては、前記各電極を導電性の接合材を介して所定の前記リードの先端部分の前記第１の面に接続させることをさらに行うことを特徴とする。   In the step (b), a semiconductor chip having a plurality of electrodes on at least a first surface fixed to the tab is prepared as the first electronic component, and is opposite to the first surface of the semiconductor chip. A second surface to be a surface is fixed to the first surface of the tab, the electrode of the semiconductor chip and a predetermined lead are connected by a conductive wire, and the first electrons other than the semiconductor chip In the component, each of the electrodes is further connected to the first surface of the tip portion of the predetermined lead via a conductive bonding material.

本願において開示される発明のうち代表的なものによって得られる効果を簡単に説明すれば、下記のとおりである。   The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

前記（１）の手段によれば、（ａ）半導体装置の製造においては、リードフレームの各製品形成部に対して、少なくとも一つの第１の電子部品をリードに搭載した後第１の樹脂体を形成する。つぎに、第１の樹脂体から露出するリード部分または第１の樹脂体に少なくとも一つの第２の電子部品を搭載する。つぎに、第２の電子部品を第２の樹脂体で被う。つぎに、第１の樹脂体の第２の面に露出するリード部分に外部電極端子を形成する。さらに、リードフレーム及び第１の樹脂体並びに第２の樹脂体を縦横に切断して各製品形成部を分離させて複数の半導体装置を製造する。このようにして製造された半導体装置は、第１の樹脂体内に少なくとも一つの第１の電子部品を位置させ、第１の樹脂体に重ねて形成される第２の樹脂体内に少なくとも一つの第２の電子部品を位置させる構造となることから、半導体装置の高集積化が達成できる。   According to the means of (1), (a) in manufacturing a semiconductor device, a first resin body is mounted after at least one first electronic component is mounted on a lead for each product forming portion of the lead frame. Form. Next, at least one second electronic component is mounted on the lead portion exposed from the first resin body or the first resin body. Next, the second electronic component is covered with the second resin body. Next, external electrode terminals are formed on the lead portions exposed on the second surface of the first resin body. Further, the lead frame, the first resin body, and the second resin body are cut vertically and horizontally to separate the respective product forming portions, thereby manufacturing a plurality of semiconductor devices. In the semiconductor device manufactured as described above, at least one first electronic component is positioned in the first resin body, and at least one first resin is formed in the second resin body formed to overlap the first resin body. Since the second electronic component is positioned, high integration of the semiconductor device can be achieved.

（ｂ）半導体装置は上記（ａ）に記載する方法で製造される。そして、第１の電子部品を搭載した後、第１の樹脂体を形成することから、リードフレームと第１の樹脂体は第１の電子部品を含んで一枚の封止体となるため、この封止体は機械強度が大きくなり、反り難くなる。この結果、製造された半導体装置は反り難くなり、半導体装置の下面に配置された外部電極端子の下端の高さが一定し、実装が良好に行える半導体装置（実装性能が高い半導体装置）となる。外部電極端子がＬＧＡ構造である半導体装置ではこの実装性能の良好さは重要である。   (B) The semiconductor device is manufactured by the method described in (a) above. Since the first resin body is formed after mounting the first electronic component, the lead frame and the first resin body include the first electronic component and become a single sealed body. This sealing body has high mechanical strength and is difficult to warp. As a result, the manufactured semiconductor device is unlikely to warp, and the height of the lower end of the external electrode terminal disposed on the lower surface of the semiconductor device is constant, so that the semiconductor device can be satisfactorily mounted (a semiconductor device with high mounting performance). . In a semiconductor device in which the external electrode terminal has an LGA structure, this good mounting performance is important.

封止体が反り難くなる構成は幾つかある。その一つは、リードフレームにおいてマトリックス状に配置される四角形状の製品形成部では、第１の樹脂体との一体化によって封止体の下面（第１の樹脂体の第２の面）の前記四角形状の内側から封止体の上面（第１の樹脂体の第１の面）の前記四角形状の周縁に向かって複数のリードが延在する。これらリードは四角形状の中央よりの位置から四角形状の各辺に向かって傾斜して延在することから、各リードはすじかいの役割を果たし、封止体が反り難くなる。   There are several configurations in which the sealing body is less likely to warp. One of them is that in the rectangular product forming portion arranged in a matrix in the lead frame, the lower surface of the sealing body (the second surface of the first resin body) is integrated with the first resin body. A plurality of leads extend from the inner side of the rectangular shape toward the peripheral edge of the rectangular shape on the upper surface of the sealing body (the first surface of the first resin body). Since these leads extend from the position from the center of the quadrangular shape toward each side of the quadrangular shape, the respective leads play a role of being hard and the sealing body is difficult to warp.

他の一つは、製品形成部の内側に突出する各リードの先端部分には第１の電子部品の電極が接続されるため、先端が自由端となるリード部分は第１の電子部品によって支持される。第１の電子部品がチップ部品や半導体装置の場合は第１の電子部品の機械的強度が大きいことから、チップ部品や半導体装置によって連結される片持梁状に突出している各リードの機械的強度が向上し、封止体が反り難くなる。   The other is that the electrode of the first electronic component is connected to the tip portion of each lead protruding inside the product forming portion, so the lead portion whose tip is the free end is supported by the first electronic component. Is done. When the first electronic component is a chip component or a semiconductor device, the mechanical strength of each lead protruding in a cantilever shape connected by the chip component or the semiconductor device is high because the mechanical strength of the first electronic component is large. The strength is improved and the sealing body is hardly warped.

他の一つは、厚さが２５０〜３００μｍとなる第１の樹脂体（封止体）に対して、封止体の１／３程度の７５〜１００μｍとなる厚さのリード（リードフレーム）が埋め込まれることから、リード（リードフレーム）は充分な強度部材となり、封止体の反りを抑止することができる。   The other one is a lead (lead frame) having a thickness of 75 to 100 μm, which is about 1/3 of the sealing body, with respect to the first resin body (sealing body) having a thickness of 250 to 300 μm. Since the lead is embedded, the lead (lead frame) becomes a sufficiently strong member, and the warping of the sealing body can be suppressed.

（ｃ）前記（ｂ）で説明した反り難い構造の封止体に第２の電子部品を搭載し、さらに第２の樹脂体を形成した段階において、第１の樹脂体と第２の樹脂体との接着界面部分には、リードフレームの前記四角形状の枠と、この枠の内側から突出するリードが、第１の樹脂体と第２の樹脂体とから構成される樹脂部の中段（中層）の心材となるため、樹脂部は反り難くなる。即ち、第１の樹脂体の第１の面部分の高さ（中段）においては、リード部分の下側には２５０〜３００μｍの厚さに第１の樹脂体が重なり、リード部分の上側には３００〜４００μｍの厚さの第２の樹脂体が重なることになり、樹脂部の厚さ方向の樹脂のバランスが良好となり、金属のリードと樹脂体との熱膨張係数の違いによっても反り難くなる。   (C) The first resin body and the second resin body at the stage where the second electronic component is mounted on the sealing body having the structure that is difficult to warp described in (b) and the second resin body is formed. The lead interface projecting from the inside of the rectangular frame of the lead frame, and the lead protruding from the inside of the frame, are formed in the middle stage (intermediate layer) of the resin portion composed of the first resin body and the second resin body. ), The resin part is less likely to warp. That is, at the height (middle stage) of the first surface portion of the first resin body, the first resin body overlaps with a thickness of 250 to 300 μm below the lead portion, and above the lead portion. The second resin body having a thickness of 300 to 400 μm is overlapped, the resin balance in the thickness direction of the resin portion is improved, and it is difficult to warp due to the difference in thermal expansion coefficient between the metal lead and the resin body. .

特に、第１の樹脂体と第２の樹脂体を同じ材質の樹脂で形成した場合には、樹脂部の中段に位置するリードフレーム部分の上下面側にそれぞれ同じ機械的強度を有する樹脂（第１の樹脂体及び第２の樹脂体）が位置することになり、樹脂部の反り発生がより一層抑えられることになる。   In particular, when the first resin body and the second resin body are formed of the same material resin, the resin having the same mechanical strength on the upper and lower surfaces of the lead frame portion located in the middle stage of the resin portion (first 1 resin body and 2nd resin body) will be located, and the curvature generation | occurrence | production of the resin part will be suppressed further.

（ｄ）前記（ｃ）で説明したように、第１の樹脂体に第２の樹脂体を重ねて形成して樹脂部を形成した段階では樹脂部は反り難く、平坦を維持することから、第１の樹脂体の第２の面に外部電極端子を形成する場合、外部電極端子の形成部分であるリード部分の位置のズレがない、あるいは小さいので、外部電極端子を高精度に形成することができる。例えば、ボール電極を治具を使用して供給して、バンプ電極（突起電極）を形成する場合、樹脂部に反りがない場合、あるいは反りが小さい場合、治具を用いて供給する全てのボール電極は高精度に各リード部分に供給されることになり、接続の信頼性が高い外部電極端子を高歩留りに形成することができる。従って、品質の優れた半導体装置を高歩留りに製造することができ、半導体装置の製造コストの低減が達成できる。   (D) As explained in the above (c), the resin part is hardly warped at the stage of forming the resin part by overlapping the second resin body on the first resin body, and the flatness is maintained. When the external electrode terminal is formed on the second surface of the first resin body, the position of the lead portion, which is the external electrode terminal forming portion, is not misaligned or small, so the external electrode terminal is formed with high accuracy. Can do. For example, if a ball electrode is supplied using a jig to form a bump electrode (projection electrode), if there is no warpage in the resin part, or if the warpage is small, all balls supplied using the jig The electrodes are supplied to each lead portion with high accuracy, and external electrode terminals with high connection reliability can be formed with high yield. Therefore, a semiconductor device with excellent quality can be manufactured with a high yield, and a reduction in manufacturing cost of the semiconductor device can be achieved.

（ｅ）樹脂部をリードフレーム共々切断（個片化）することによって半導体装置が複数製造される。製造された半導体装置の外周部分（四角形状の４辺部分）の第１の樹脂体と第２の樹脂体との接着面部分には、リード部分が密に配置されている。この密に配置されたリード部分は、四角形状の第１の樹脂体の周辺全体の機械的強度部材として作用すること、また第１の樹脂体と第２の樹脂体とからなる樹脂部の中段に位置することから、半導体装置の反りも防止することができる。従って、半導体装置の反りに伴う実装時の実装不良の発生を抑止することができる。   (E) A plurality of semiconductor devices are manufactured by cutting (separating) the resin portion together with the lead frame. Lead portions are densely arranged on the bonding surface portion between the first resin body and the second resin body of the outer peripheral portion (four sides of the square shape) of the manufactured semiconductor device. The densely arranged lead portions act as a mechanical strength member for the entire periphery of the first resin body having a quadrangular shape, and the middle portion of the resin portion composed of the first resin body and the second resin body. Therefore, the warp of the semiconductor device can be prevented. Therefore, it is possible to suppress the occurrence of mounting defects during mounting due to warpage of the semiconductor device.

（ｆ）第１の樹脂体の第２の面に露出するリード部分に外部電極端子を形成する場合、一定厚さの金属メッキ膜を形成することによってＬＧＡ型の半導体装置を製造することができ、また、バンプ電極等による突起電極を形成することによってＢＧＡ型の半導体装置を製造することができる。   (F) When forming the external electrode terminal on the lead portion exposed on the second surface of the first resin body, an LGA type semiconductor device can be manufactured by forming a metal plating film having a certain thickness. In addition, a BGA type semiconductor device can be manufactured by forming protruding electrodes such as bump electrodes.

（ｇ）第１の電子部品の厚さ（高さ）を選択することによって、第１の樹脂体内に第１の電子部品を埋没させる構造とすることができる。この場合、第２の電子部品として半導体チップを接合材によって第１の樹脂体の第１の面に固定する構造が採用できる。半導体チップの各電極は所定のリードに導電性のワイヤで接続される。この構造の採用によって、半導体チップ及びチップを第２の電子部品として使用することができる。チップ部品の電極は第１の樹脂体の第１の面に露出するリード部分に接合材を介して接続される。この場合、露出するリード部分はチップ部品の電極に対応して幅広としておくことが望ましい。この構造によれば、第２の電子部品を第１の樹脂体上に搭載できるとともに、第１の樹脂体の第１の面に露出する複数のリード部分に第２の電子部品を搭載することができるため、半導体装置の高集積化が可能になる。   (G) By selecting the thickness (height) of the first electronic component, the first electronic component can be embedded in the first resin body. In this case, a structure in which a semiconductor chip is fixed to the first surface of the first resin body by a bonding material as the second electronic component can be employed. Each electrode of the semiconductor chip is connected to a predetermined lead by a conductive wire. By adopting this structure, the semiconductor chip and the chip can be used as the second electronic component. The electrode of the chip component is connected to a lead portion exposed on the first surface of the first resin body via a bonding material. In this case, it is desirable that the exposed lead portions be wide corresponding to the electrodes of the chip component. According to this structure, the second electronic component can be mounted on the first resin body, and the second electronic component is mounted on the plurality of lead portions exposed on the first surface of the first resin body. Therefore, the semiconductor device can be highly integrated.

また、第１の電子部品を第１の樹脂体の第１の面に露出させる構造の場合には、第１の電子部品に第２の電子部品を搭載することができる。即ち、第１の電子部品として半導体チップの各電極を所定リードの先端部の第１の面にフリップ・チップ接続し、第１の樹脂体の第１の面に露出する半導体チップの半導体基板上に絶縁性の接合材によって半導体チップを固定する。そして、半導体チップの電極と第１の樹脂体の第１の面に露出するリード部分を導電性のワイヤで接続する。この構造によれば、薄型化、高集積化の効果を有する。   Further, in the case of a structure in which the first electronic component is exposed on the first surface of the first resin body, the second electronic component can be mounted on the first electronic component. That is, each electrode of the semiconductor chip as the first electronic component is flip-chip connected to the first surface of the tip portion of the predetermined lead, and the semiconductor chip is exposed on the first surface of the first resin body. The semiconductor chip is fixed with an insulating bonding material. And the lead part exposed to the 1st surface of the electrode of a semiconductor chip and the 1st resin body is connected with a conductive wire. This structure has the effect of reducing the thickness and increasing the integration.

前記（２）の手段によれば、上記（ａ）乃至（ｇ）に記載の効果を得ることができるとともに、第１の樹脂体内に配置したタブの第１の面に第１の電子部品としての半導体チップを搭載することができる。この場合、半導体チップの電極とリード先端部は導電性のワイヤで接続されるが、ワイヤが接続されないリード先端部に他の第２の電子部品、例えば、チップ部品の電極を接合材を介して接続することもでき、半導体装置の高集積化も可能になる。   According to the means (2), the effects described in the above (a) to (g) can be obtained, and the first electronic component is provided on the first surface of the tab disposed in the first resin body. The semiconductor chip can be mounted. In this case, the electrode of the semiconductor chip and the lead tip are connected by a conductive wire, but the other second electronic component, for example, the electrode of the chip component is connected to the lead tip to which the wire is not connected via a bonding material. Connections can also be made, and high integration of the semiconductor device is also possible.

以下、図面を参照して本発明の実施の形態を詳細に説明する。なお、発明の実施の形態を説明するための全図において、同一機能を有するものは同一符号を付け、その繰り返しの説明は省略する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment of the invention, and the repetitive description thereof is omitted.

図１乃至図１６は本発明の実施例１である半導体装置及びその製造方法に係わる図である。図１及び図２は半導体装置の構造に係わる図であり、図３乃至図１６は半導体装置の製造方法に係わる図である。   1 to 16 are diagrams relating to a semiconductor device and a manufacturing method thereof according to Embodiment 1 of the present invention. 1 and 2 are diagrams related to the structure of a semiconductor device, and FIGS. 3 to 16 are diagrams related to a method for manufacturing the semiconductor device.

実施例１においては、ＢＧＡ型の半導体装置及びその製造方法に本発明を適用した例について説明する。半導体装置１は図１及び図２に示すような構造になっている。図１は半導体装置の平面図であり、かつ底面に配置される外部電極端子、内部に配置されるリード、第１の電子部品及び第２の電子部品を透視して示す図である。図２は図１のＡ−Ａ線に沿う断面図である。   In the first embodiment, an example in which the present invention is applied to a BGA type semiconductor device and a manufacturing method thereof will be described. The semiconductor device 1 has a structure as shown in FIGS. FIG. 1 is a plan view of a semiconductor device, and is a view illustrating an external electrode terminal disposed on a bottom surface, leads disposed inside, a first electronic component, and a second electronic component. FIG. 2 is a cross-sectional view taken along line AA in FIG.

実施例１の半導体装置１は、図１及び図２に示すように、外観的には、四角形状（四角形）の第１の樹脂体２と、第１の樹脂体２の第１の面２ａ上に一致して重ねて形成された四角形状（四角形）の第２の樹脂体３と、第１の樹脂体２の第１の面２ａの反対面となる第２の面２ｂに取り付けられた複数の外部電極端子４とからなっている。   As shown in FIGS. 1 and 2, the semiconductor device 1 according to the first embodiment has a rectangular (quadrangle) first resin body 2 and a first surface 2 a of the first resin body 2 in appearance. The second resin body 3 having a quadrangular shape (quadrangle) formed to overlap with the upper surface and the second surface 2b opposite to the first surface 2a of the first resin body 2 are attached. It consists of a plurality of external electrode terminals 4.

第１の樹脂体２は、第１の面２ａ及びこの第１の面２ａの反対面となる第２の面２ｂを有する絶縁性樹脂で形成される四角形状（四角形）となっている。第２の樹脂体３は第１の面３ａ及び第１の面３ａの反対面となる第２の面３ｂを有し前記第２の面３ｂが第１の樹脂体２の第１の面２ａに一致して重ねられて一体となる絶縁性樹脂で形成される四角形状（四角形）となっている。外部電極端子４は、特に限定はされないが、図１に示すように、四角形の第１の樹脂体２の各辺に沿って２列に配置された構造になっている。   The first resin body 2 has a quadrangular shape (quadrangle) formed of an insulating resin having a first surface 2a and a second surface 2b opposite to the first surface 2a. The second resin body 3 has a first surface 3a and a second surface 3b opposite to the first surface 3a, and the second surface 3b is the first surface 2a of the first resin body 2. It is a quadrangular shape (quadrangle) formed of an insulating resin that is overlapped and integrated with each other. The external electrode terminals 4 are not particularly limited, but have a structure in which the external electrode terminals 4 are arranged in two rows along each side of the rectangular first resin body 2 as shown in FIG.

第１の樹脂体２内には、図２に示すように導電性（金属）からなる複数のリード５が封止されている。リード５は、例えば、階段状に一段折れ曲がるように屈曲延在している。リード５の先端部５ｃは第１の樹脂体２の四角形状の内側に位置するとともに、リード５の先端部５ｃの第２の面は第１の樹脂体２の第２の面２ｂに露出している。また、リード５の他端部５ｄは第１の樹脂体２の周面にまで延在位置するとともに、リード５の他端部５ｄの第１の面は第１の樹脂体２の第１の面２ａに露出している。   A plurality of leads 5 made of a conductive material (metal) are sealed in the first resin body 2 as shown in FIG. The lead 5 is bent and extended so as to be bent in a stepped manner, for example. The leading end portion 5c of the lead 5 is located inside the square shape of the first resin body 2, and the second surface of the leading end portion 5c of the lead 5 is exposed to the second surface 2b of the first resin body 2. ing. Further, the other end portion 5 d of the lead 5 extends to the peripheral surface of the first resin body 2, and the first surface of the other end portion 5 d of the lead 5 is the first surface of the first resin body 2. It is exposed on the surface 2a.

第１の樹脂体２内には第１の電子部品６が位置している。本発明においては、第１の電子部品６としては、各種の電子部品を使用することができる。例えば、第１の面に複数の電極を有する半導体チップ、絶縁性の封止体の周面から複数のリードを突出させる半導体装置及び絶縁性の封止体の両端にそれぞれ電極を有するチップ部品を使用することができる。また、本発明では、第１の樹脂体２内に複数の電子部品を配置することが可能であるが、実施例１の場合は図２に示すように、半導体チップ７を一つ配置した例とする。実施例１の半導体チップ７は第１の面に複数の電極８を有するが、この電極８には突起電極９が設けられてフリップ・チップ接続構造になっている。電極８は第１の樹脂体２の第２の面２ｂに２列に配置される内側の１列の各リード５の先端部５ｃにフリップ・チップ接続されている。即ち、突起電極９は、例えば、半田ボール電極で形成され、リフロー（再加熱処理）によって突起電極９を溶融させて電極８とリード５の先端部５ｃを電気的に接続するようになっている。実施例１では、第１の電子部品６の電極８とリード５を接続する第１の接続手段は導電性の接合材（接着剤）、即ち、半田からなる突起電極９で形成されていることになる。   A first electronic component 6 is located in the first resin body 2. In the present invention, various electronic components can be used as the first electronic component 6. For example, a semiconductor chip having a plurality of electrodes on the first surface, a semiconductor device in which a plurality of leads protrude from the peripheral surface of the insulating sealing body, and a chip component having electrodes on both ends of the insulating sealing body, respectively. Can be used. In the present invention, it is possible to arrange a plurality of electronic components in the first resin body 2, but in the case of Example 1, an example in which one semiconductor chip 7 is arranged as shown in FIG. And The semiconductor chip 7 of the first embodiment has a plurality of electrodes 8 on the first surface, and the electrode 8 is provided with a protruding electrode 9 to form a flip chip connection structure. The electrodes 8 are flip-chip connected to the tip portions 5c of the respective leads 5 in the inner row arranged in two rows on the second surface 2b of the first resin body 2. That is, the protruding electrode 9 is formed of, for example, a solder ball electrode, and the protruding electrode 9 is melted by reflow (reheating treatment) to electrically connect the electrode 8 and the tip 5c of the lead 5. . In the first embodiment, the first connecting means for connecting the electrode 8 and the lead 5 of the first electronic component 6 is formed of a conductive bonding material (adhesive), that is, a protruding electrode 9 made of solder. become.

リード５において、外部電極端子４が接続されるリード表面部分、電極８が重ねて接続されるリード表面部分及び第１の樹脂体２の第１の面２ａに露出するリード部分の表面にはそれぞれ金属メッキ膜１０が形成されている。これら金属メッキ膜１０はいずれも同じものであってもよく、また異なっていてもよい。接続するものが良好に接続される材質のものであればよい。例えば、外部電極端子４を形成する場合、及び電極を接合材（半田等）を使用して重ねてリードに接続する場合は、金属メッキ膜１０は厚さ５．０μｍのＮｉ層（下層）と、厚さ０．５μｍのＡｕ層からなっている。ワイヤを接続する場合には、金属メッキ膜１０は厚さ１．０μｍのＣｕ層（下層）と、厚さ１．５μｍのＡｇ層からなっている。   In the lead 5, the lead surface portion to which the external electrode terminal 4 is connected, the lead surface portion to which the electrode 8 is overlapped and connected, and the surface of the lead portion exposed on the first surface 2 a of the first resin body 2, respectively. A metal plating film 10 is formed. These metal plating films 10 may be the same or different. Any material can be used as long as it is well connected. For example, when the external electrode terminal 4 is formed and when the electrode is overlapped with a bonding material (solder or the like) and connected to the lead, the metal plating film 10 is formed with a Ni layer (lower layer) having a thickness of 5.0 μm. The Au layer has a thickness of 0.5 μm. In the case of connecting wires, the metal plating film 10 includes a Cu layer (lower layer) having a thickness of 1.0 μm and an Ag layer having a thickness of 1.5 μm.

実施例１では、半導体チップ７は第１の面に配列した各電極８をリード５の先端部５ｃにフリップ・チップ接続することによってリード５に搭載されている。半導体チップ７の第２の面は第１の樹脂体２の第１の面２ａに露出する構造となっている。半導体チップ７は、半導体基板の第１の面側に各種回路素子を形成することから、半導体チップ７の第１の面の反対面となる第２の面は半導体基板面となる。一般に、半導体チップを構成する半導体基板は所定の電位を有する構造となるものが多い。そこで、第１の電子部品６である半導体チップ７の半導体基板に、第２の電子部品１６である半導体チップ１７を絶縁性の接合材１５によって搭載する。実施例１の半導体チップ１７は第１の面に複数の電極１８を有し、第１の面の反対面となる第２の面が半導体基板面となる半導体チップである。このため、半導体チップ１７の第２の面が接合材１５によって半導体チップ７の第２の面に固定される。   In the first embodiment, the semiconductor chip 7 is mounted on the lead 5 by flip-chip connecting the electrodes 8 arranged on the first surface to the tip portion 5 c of the lead 5. The second surface of the semiconductor chip 7 has a structure exposed to the first surface 2 a of the first resin body 2. Since the semiconductor chip 7 forms various circuit elements on the first surface side of the semiconductor substrate, the second surface which is the opposite surface of the first surface of the semiconductor chip 7 is the semiconductor substrate surface. Generally, a semiconductor substrate constituting a semiconductor chip often has a structure having a predetermined potential. Therefore, the semiconductor chip 17 as the second electronic component 16 is mounted on the semiconductor substrate of the semiconductor chip 7 as the first electronic component 6 with the insulating bonding material 15. The semiconductor chip 17 of Example 1 is a semiconductor chip having a plurality of electrodes 18 on a first surface and a second surface opposite to the first surface being a semiconductor substrate surface. For this reason, the second surface of the semiconductor chip 17 is fixed to the second surface of the semiconductor chip 7 by the bonding material 15.

図２に示すように、半導体チップ１７の第１の面の各電極１８と、第１の樹脂体２の第１の面２ａに露出するリード部分は導電性のワイヤ１９で電気的に接続されている。   As shown in FIG. 2, each electrode 18 on the first surface of the semiconductor chip 17 and the lead portion exposed on the first surface 2 a of the first resin body 2 are electrically connected by a conductive wire 19. ing.

半導体装置１においては、第１の樹脂体２は厚さ２５０〜３００μｍのエポキシ樹脂で形成され、第２の樹脂体３は厚さ３００〜４００μｍのエポキシ樹脂で形成され、リード５は厚さ７５〜１００μｍの銅で形成される。実施例１では、第１の樹脂体２の厚さは３００μｍであり、第２の樹脂体３の厚さは４００μｍであり、リード５の厚さは１００μｍである。外部電極端子４は、例えば、０．２５ｍｍの直径のボール電極で形成されている。外部電極端子４のピッチは０．４ｍｍである。ボール電極（金属ボール）は鉛を含まない半田ボール、あるいは鉛を含む半田ボールのいずれでもよい。   In the semiconductor device 1, the first resin body 2 is formed of an epoxy resin having a thickness of 250 to 300 μm, the second resin body 3 is formed of an epoxy resin having a thickness of 300 to 400 μm, and the lead 5 has a thickness of 75. Formed with ~ 100 μm copper. In Example 1, the thickness of the first resin body 2 is 300 μm, the thickness of the second resin body 3 is 400 μm, and the thickness of the lead 5 is 100 μm. The external electrode terminal 4 is formed of a ball electrode having a diameter of 0.25 mm, for example. The pitch of the external electrode terminals 4 is 0.4 mm. The ball electrode (metal ball) may be either a solder ball containing no lead or a solder ball containing lead.

つぎに、実施例１の半導体装置１の製造方法について、図３乃至図１６を参照して説明する。実施例１の半導体装置は、図３のフローチャートで示すように、リードフレーム準備（Ｓ１０１）、第１の電子部品搭載（Ｓ１０２）、第１の樹脂体形成（Ｓ１０３）、第２の電子部品搭載（Ｓ１０４）、第２の樹脂体形成（Ｓ１０５）、外部電極端子形成（Ｓ１０６）、個片化（Ｓ１０７）の各工程を経て製造される。図４（ａ）〜（ｇ）は半導体装置の製造方法における各工程での製造品の模式的断面図である。   Next, a method for manufacturing the semiconductor device 1 according to the first embodiment will be described with reference to FIGS. As shown in the flowchart of FIG. 3, the semiconductor device according to the first embodiment prepares a lead frame (S101), mounts a first electronic component (S102), forms a first resin body (S103), and mounts a second electronic component. (S104), second resin body formation (S105), external electrode terminal formation (S106), and individualization (S107). 4A to 4G are schematic cross-sectional views of a manufactured product in each step in the method for manufacturing a semiconductor device.

半導体装置１の製造においては、図４（ａ）及び図５に示すように、最初にリードフレーム２５を準備する（Ｓ１０１）。一括モールド方式で使用するリードフレーム２５は、半導体装置を製造する製品形成部２６をマトリックス状に配列した構造になっていて、製造の最終段階で樹脂体とリードフレーム２５を縦横に切断して複数の半導体装置１を製造する。   In manufacturing the semiconductor device 1, as shown in FIGS. 4A and 5, first, the lead frame 25 is prepared (S101). The lead frame 25 used in the collective molding method has a structure in which product forming portions 26 for manufacturing semiconductor devices are arranged in a matrix, and a plurality of resin bodies and the lead frame 25 are cut vertically and horizontally at the final stage of manufacturing. The semiconductor device 1 is manufactured.

図５はリードフレーム２５の平面図である。図６はリードフレーム２５の製品形成部２６の拡大平面図、図７は図６のＢ−Ｂ線に沿う断面図である。リードフレーム２５は、鉄−ニッケル系合金、あるいは銅等、半導体装置の製造に用いる金属が使用される。実施例では銅系の金属からなるリードフレームを使用する。リードフレームも厚さ７５〜１００μｍ程度のものを使用するが、実施例では１００μｍの厚さのリードフレームを使用する。リードフレーム２５は一定厚さの金属板を精密プレスあるいはエッチングによってパターニングして所定のリードパターンを有する製品形成部２６を形成する。   FIG. 5 is a plan view of the lead frame 25. 6 is an enlarged plan view of the product forming portion 26 of the lead frame 25, and FIG. 7 is a cross-sectional view taken along the line BB of FIG. For the lead frame 25, a metal used for manufacturing a semiconductor device such as an iron-nickel alloy or copper is used. In the embodiment, a lead frame made of a copper-based metal is used. A lead frame having a thickness of about 75 to 100 μm is used, but in the embodiment, a lead frame having a thickness of 100 μm is used. The lead frame 25 forms a product forming portion 26 having a predetermined lead pattern by patterning a metal plate having a constant thickness by precision pressing or etching.

リードフレーム２５は、図５に示すように、単位リードパターンからなる製品形成部２６を縦横にマトリックス状に整列配置した構造になっている。また、リードフレーム２５の外周枠２７部分には、リードフレーム２５を移送したり、位置決めしたりする際使用するガイド孔２８が所定箇所にそれぞれ設けられている。また、外周枠２７には樹脂部付きのリードフレーム２５を切断する際の目印になる切断マーク２９ａ，２９ｂが設けられている。   As shown in FIG. 5, the lead frame 25 has a structure in which product forming portions 26 each having a unit lead pattern are arranged in a matrix in the vertical and horizontal directions. In addition, guide holes 28 used for transferring and positioning the lead frame 25 are provided at predetermined positions in the outer peripheral frame 27 portion of the lead frame 25, respectively. The outer peripheral frame 27 is provided with cutting marks 29a and 29b that serve as marks when cutting the lead frame 25 with a resin portion.

製品形成部２６を構成する単位リードパターンは図６に示すようになっている。製品形成部２６は四角形枠からなる枠３１と、枠３１の内側から枠内側に片持ち梁状に突出する複数のリード５とからなっている。実施例１では、リード５は四角形枠の各辺内側からそれぞれ四角形枠の内側に向かって突出する構造となっているが、例えば、対面する一対の辺の内側からそれぞれリードを突出させる構造でもよい。枠３１の各辺は隣接する製品形成部２６の枠を構成している。従って、隣接する製品形成部２６同士の境界線は枠３１の中心線ということになる。しかしながら、製品状態ではこの枠３１は除去され、各リード５は分離状態となる。   The unit lead pattern constituting the product forming unit 26 is as shown in FIG. The product forming unit 26 includes a frame 31 formed of a rectangular frame and a plurality of leads 5 protruding in a cantilever shape from the inside of the frame 31 to the inside of the frame. In the first embodiment, the lead 5 has a structure that protrudes from the inner side of each side of the rectangular frame toward the inner side of the rectangular frame. For example, the lead 5 may protrude from the inner side of a pair of facing sides. . Each side of the frame 31 constitutes a frame of the adjacent product forming unit 26. Therefore, the boundary line between adjacent product forming portions 26 is the center line of the frame 31. However, in the product state, the frame 31 is removed, and each lead 5 is in a separated state.

リードフレーム２５は、図５乃至図７に示すように、第１の面２５ａと、この第１の面２５ａの反対面となる第２の面２５ｂを有する平板となっている。また、各製品形成部２６において、前記枠３１の各辺の内側から枠内に片持ち梁状に突出するリード５は、図７に示すように、途中から階段状に一段折れ曲がる屈曲構造となるとともに、リード５の先端部５ｃは再び第１の面に平行な面となり、かつ図６に示すように、ボール電極等の外部電極端子４を接続できるような円形のパターンになっている。前記階段状の折れ曲がりは、例えば、プレス機械による折り曲げによって形成される。また、一部のリード５に対して一部のリード５は長く延在し、先端部５ｃが枠３１の各辺に沿って２列に並んで位置するようになっている。リード５の先端部５ｃを２列にするため、一部のリード５は平面的にも屈曲している。実施例では外部電極端子を形成する先端部５ｃは２列であるが、さらに多列とすることも可能である。   As shown in FIGS. 5 to 7, the lead frame 25 is a flat plate having a first surface 25a and a second surface 25b which is the opposite surface of the first surface 25a. Further, in each product forming portion 26, the lead 5 protruding in a cantilever shape from the inside of each side of the frame 31 into the frame has a bent structure that is bent stepwise from the middle as shown in FIG. At the same time, the tip 5c of the lead 5 becomes a plane parallel to the first surface again, and as shown in FIG. 6, has a circular pattern to which the external electrode terminal 4 such as a ball electrode can be connected. The step-like bending is formed, for example, by bending with a press machine. In addition, some leads 5 extend longer than some leads 5, and the tip portions 5 c are arranged in two rows along each side of the frame 31. Some leads 5 are also bent in plan view in order to form the leading ends 5c of the leads 5 in two rows. In the embodiment, the front end portions 5c forming the external electrode terminals are arranged in two rows, but it is also possible to form a plurality of rows.

なお、既に説明した半導体装置１におけるリード５の呼称部分と一致させるため、枠３１から突出するリード部分、即ち、枠３１の付け根部分のリード部分を他端部５ｄとも呼称する。また、当然のことであるが、リードフレーム２５の第１の面２５ａはリード５の第１の面になり、リードフレーム２５の第２の面２５ｂはリード５の第２の面になる。   In addition, in order to make it correspond with the designation | designated part of the lead 5 in the semiconductor device 1 already demonstrated, the lead part which protrudes from the frame 31, ie, the lead part of the base part of the frame 31, is also called the other end 5d. As a matter of course, the first surface 25 a of the lead frame 25 becomes the first surface of the lead 5, and the second surface 25 b of the lead frame 25 becomes the second surface of the lead 5.

前記リード５の他端部５ｄの第１の面は、枠３１の第１の面と同じ平面上に位置し、リードフレーム２５の第１の面２５ａとなる。リード５の一段下がった先端部５ｃの第２の面（下面）から前記枠３１の第１の面までの高さ（厚さ）は３００μｍになっている。   The first surface of the other end portion 5 d of the lead 5 is located on the same plane as the first surface of the frame 31, and becomes the first surface 25 a of the lead frame 25. The height (thickness) from the second surface (lower surface) of the tip portion 5c lowered by one step to the first surface of the frame 31 is 300 μm.

リードフレーム２５においては、電極やワイヤを接続するリード５の表面には金属メッキ膜１０が形成されている。実施例１では、金属メッキ膜１０は、図７に示すように、２列の先端部５ｃにおいて内側の列の先端部５ｃでは表裏面（第１・第２の面）に設けられている。また、外側の列の先端部５ｃでは下面（第２の面）に設けられている。さらにリード５の他端部５ｄでは上面（第１の面）に設けられている。実施例１では、先端部５ｃの下面には外部電極端子４が接続されて形成され、内側の列の先端部５ｃの上面にはフリップ・チップ接続構造の半導体チップの突起電極が接続される。この電極が重ねて接続される部分の金属メッキ膜１０は、例えば、０．５μｍの厚さのＮｉ層と、このＮｉ層上に設けられる厚さ０．５μｍのＡｕ層とからなっている。また、このＮｉ層とＡｕ層とからなる金属メッキ膜１０の場合、一定厚さの金属メッキ膜を形成してＬＧＡ用の外部電極端子を形成する際にも使用できる。また、リード５の他端部５ｄの上面には導電性のワイヤ（金線）が接続される。従って、リード５の他端部５ｄの上面の金属メッキ膜１０は、厚さ１．０μｍのＣｕ層（下層）と、厚さ１．５μｍのＡｇ層からなっている。実施例１では使用しないが、他の実施例で使用する、両端に電極を有するチップ部品、パッケージの周囲から金属製のリード（電極）を突出させる半導体装置をリードに搭載するときは前記Ｎｉ層とＡｕ層からなる金属メッキ膜１０をリード５の表面に形成する。なお、図４では金属メッキ膜は省略してある。また、他の図でも一部で金属メッキ膜１０を示すのみであり、多くの図で省略してある。   In the lead frame 25, a metal plating film 10 is formed on the surface of the lead 5 to which the electrodes and wires are connected. In the first embodiment, as shown in FIG. 7, the metal plating film 10 is provided on the front and back surfaces (first and second surfaces) of the front end portions 5c of the inner row in the front end portions 5c of the two rows. Further, the front end portion 5c of the outer row is provided on the lower surface (second surface). Further, the other end portion 5d of the lead 5 is provided on the upper surface (first surface). In the first embodiment, the external electrode terminal 4 is connected to the lower surface of the tip portion 5c, and the protruding electrode of the semiconductor chip having the flip-chip connection structure is connected to the upper surface of the tip portion 5c of the inner row. The portion of the metal plating film 10 to which the electrodes are connected in an overlapping manner is composed of, for example, a Ni layer having a thickness of 0.5 μm and an Au layer having a thickness of 0.5 μm provided on the Ni layer. Further, in the case of the metal plating film 10 composed of the Ni layer and the Au layer, the metal plating film of a certain thickness can be formed to form an external electrode terminal for LGA. In addition, a conductive wire (gold wire) is connected to the upper surface of the other end 5 d of the lead 5. Therefore, the metal plating film 10 on the upper surface of the other end portion 5d of the lead 5 is composed of a Cu layer (lower layer) having a thickness of 1.0 μm and an Ag layer having a thickness of 1.5 μm. Although not used in the first embodiment, a chip component having electrodes on both ends, which is used in other embodiments, and the Ni layer when mounting a semiconductor device in which a metal lead (electrode) protrudes from the periphery of the package is mounted on the lead. And a metal plating film 10 made of an Au layer is formed on the surface of the lead 5. In FIG. 4, the metal plating film is omitted. In other drawings, the metal plating film 10 is only partially shown, and is omitted in many drawings.

つぎに、図４（ｂ）、図８及び図９に示すように、各製品形成部２６に第１の電子部品６を搭載する（Ｓ１０２）。図８は製品形成部２６の拡大平面図であり、図９は図８のＣ−Ｃ線に沿う断面図である。実施例では第１の電子部品６として各製品形成部２６の内側の先端部５ｃにフリップ・チップ接続構造の半導体チップ７を搭載する。この半導体チップ７は第１の面に複数の電極３３を有するとともに、この電極３３に重ねて突起電極３４を形成した構造になっている。突起電極３４はリフロー（一次加熱処理）によって溶融する半田で形成されている。リード５の内側の先端部５ｃは半導体チップ７の突起電極３４に対応するように形成されている。そこで、半導体チップ７の突起電極３４を内側の先端部５ｃの第１の面に重ね、リフローすることによって半導体チップ７をリード５に搭載することができる。半導体チップ７をリード５に搭載する際、半導体チップ７の第２の面が枠３１の第１の面と同じ面となるように搭載を行う。   Next, as shown in FIGS. 4B, 8 and 9, the first electronic component 6 is mounted on each product forming section 26 (S102). 8 is an enlarged plan view of the product forming portion 26, and FIG. 9 is a cross-sectional view taken along the line CC of FIG. In the embodiment, a semiconductor chip 7 having a flip-chip connection structure is mounted as the first electronic component 6 on the inner end portion 5 c of each product forming portion 26. The semiconductor chip 7 has a structure in which a plurality of electrodes 33 are provided on the first surface and a protruding electrode 34 is formed on the electrodes 33. The protruding electrode 34 is formed of solder that melts by reflow (primary heat treatment). A tip portion 5 c inside the lead 5 is formed so as to correspond to the protruding electrode 34 of the semiconductor chip 7. Therefore, the semiconductor chip 7 can be mounted on the lead 5 by overlapping the protruding electrode 34 of the semiconductor chip 7 on the first surface of the inner front end portion 5c and performing reflow. When the semiconductor chip 7 is mounted on the lead 5, the mounting is performed so that the second surface of the semiconductor chip 7 is the same surface as the first surface of the frame 31.

つぎに、図４（ｃ）及び図１１に示すように、各製品形成部２６に第１の樹脂体２を形成する（Ｓ１０３）。即ち、半導体チップ７を搭載したリードフレーム２５を、図１０（ａ）に示すように、トランスファモールディング装置の下型３５と上型３６とからなる成形金型３７に弾力性のあるシート３８，３９を介して型締めする。その後、図１０（ｂ）に示すように、ゲート４０から下型３５と上型３６によって形成されたキャビティ４１内に樹脂４２（エポキシ樹脂）を圧入させ、かつ樹脂をキュアーさせることによって硬化した第１の樹脂体２を形成する。このモールディング（封止）では、図１４に示すように、第１の樹脂体２の第１の面２ａにリード５の他端部５ｄの第１の面を露出させるとともに、半導体チップ７の第２の面も露出させ、かつ、第１の樹脂体２の第２の面２ｂに先端部５ｃの第２の面を露出させる。トランスファモールディングでは、シートを使用するシートモールディングであることから、第１の樹脂体２の第１及び第２の面に露出するリード表面及び半導体チップ７の表面には樹脂が付着しなくなる。   Next, as shown in FIG.4 (c) and FIG. 11, the 1st resin body 2 is formed in each product formation part 26 (S103). That is, as shown in FIG. 10A, the lead frame 25 on which the semiconductor chip 7 is mounted is elastically formed on a molding die 37 composed of a lower mold 35 and an upper mold 36 of the transfer molding apparatus. The mold is clamped through. Thereafter, as shown in FIG. 10B, a resin 42 (epoxy resin) is press-fitted from the gate 40 into the cavity 41 formed by the lower mold 35 and the upper mold 36, and cured by curing the resin. 1 resin body 2 is formed. In this molding (sealing), as shown in FIG. 14, the first surface of the other end portion 5 d of the lead 5 is exposed to the first surface 2 a of the first resin body 2 and the first surface of the semiconductor chip 7 is exposed. The second surface is exposed, and the second surface 2b of the first resin body 2 is exposed on the second surface 2b of the first resin body 2. In the transfer molding, since the sheet molding uses a sheet, the resin does not adhere to the surface of the lead exposed on the first and second surfaces of the first resin body 2 and the surface of the semiconductor chip 7.

このように、半導体チップ７（第１の電子部品６）を搭載した後、第１の樹脂体２を形成することから、第２の面２５ｂと第１の樹脂体２は半導体チップ７を含んで一枚の封止体となるため、金属からなるリードフレーム２５、半導体からなる半導体チップ７、樹脂からなる第１の樹脂体２の熱膨張係数の違いによる熱応力に対しても封止体はその構造上機械強度が大きくなり、反り難くなる。   As described above, since the first resin body 2 is formed after the semiconductor chip 7 (first electronic component 6) is mounted, the second surface 25b and the first resin body 2 include the semiconductor chip 7. Therefore, the sealing body is also resistant to thermal stress due to the difference in thermal expansion coefficient between the lead frame 25 made of metal, the semiconductor chip 7 made of semiconductor, and the first resin body 2 made of resin. Due to its structure, the mechanical strength is increased and it is difficult to warp.

即ち、第２の面２５ｂにおいてマトリックス状に配置される四角形状の製品形成部２６では、第１の樹脂体２との一体化によって封止体の下面（第１の樹脂体２の第２の面２ｂ）の前記四角形状の内側から封止体の上面（第１の樹脂体２の第１の面２ａ）の前記四角形状の周縁に向かって複数のリード５が延在する。これらリード５は四角形状の中央よりの位置から四角形状の各辺に向かって傾斜して延在することから、各リード５はすじかいの役割を果たし、封止体が反り難くなる。   That is, in the quadrangular product forming portion 26 arranged in a matrix on the second surface 25b, the lower surface of the sealing body (the second of the first resin body 2 is integrated by integration with the first resin body 2). A plurality of leads 5 extend from the inner side of the rectangular shape of the surface 2b) toward the peripheral edge of the rectangular shape of the upper surface of the sealing body (the first surface 2a of the first resin body 2). Since these leads 5 are inclined and extended from the position from the center of the quadrangular shape toward the respective sides of the quadrangular shape, the respective leads 5 play a role of being hard and the sealing body is hardly warped.

また、厚さが３００μｍとなる第１の樹脂体２（封止体）に対して、封止体の１／３程度の１００μｍとなる厚さのリード５（リードフレーム２５）が埋め込まれることから、リード５（リードフレーム２５）は充分な強度部材となり、封止体の反りを抑止することができる。   Further, the lead 5 (lead frame 25) having a thickness of about 100 μm, which is about 1/3 of the sealing body, is embedded in the first resin body 2 (sealing body) having a thickness of 300 μm. The lead 5 (lead frame 25) becomes a sufficiently strong member and can suppress warping of the sealing body.

つぎに、図４（ｄ）及び図１５に示すように、第１の樹脂体２の第１の面２ａ及び半導体チップ７の第２の面に絶縁性の接合材１５を介して第２の電子部品１６である半導体チップ１７を固定し、かつワイヤボンディングを行う（Ｓ１０４）。半導体チップ１７は第１の面に複数の電極１８を有していることから、第１の面の反対面となる電極が存在しない第２の面を接合材１５で半導体チップ７の第２の面及び第１の樹脂体２の第１の面に固定する。半導体チップ１７を固定した後、半導体チップ１７の電極１８と第１の樹脂体２の第１の面２ａに露出するリード部分、即ち、他端部５ｄを導電性のワイヤ１９で電気的に接続する。ワイヤ１９は、例えば、直径２５μｍの金線を使用する。   Next, as shown in FIG. 4D and FIG. 15, the second surface of the first resin body 2 and the second surface of the semiconductor chip 7 are connected to the second surface via an insulating bonding material 15. The semiconductor chip 17 as the electronic component 16 is fixed and wire bonding is performed (S104). Since the semiconductor chip 17 has the plurality of electrodes 18 on the first surface, the second surface of the semiconductor chip 7 is bonded with the bonding material 15 on the second surface where the electrode opposite to the first surface does not exist. The surface and the first surface of the first resin body 2 are fixed. After fixing the semiconductor chip 17, the electrode 18 of the semiconductor chip 17 and the lead portion exposed on the first surface 2 a of the first resin body 2, that is, the other end 5 d are electrically connected by the conductive wire 19. To do. For the wire 19, for example, a gold wire having a diameter of 25 μm is used.

つぎに、図４（ｅ）及び図１６に示すように、第１の樹脂体２の第１の面２ａ側に第２の樹脂体３を形成する（Ｓ１０５）。第２の樹脂体３は、例えばトランスファモールディング装置によって全ての製品形成部２６を被うように形成される。各製品形成部２６の半導体チップ１７及びワイヤ１９はエポキシ樹脂からなる第２の樹脂体３によって被われる。このエポキシ樹脂は、第１の樹脂体２を形成する樹脂と同じ樹脂、即ち、同じ物性値を有する樹脂である。   Next, as shown in FIGS. 4E and 16, the second resin body 3 is formed on the first surface 2a side of the first resin body 2 (S105). The 2nd resin body 3 is formed so that all the product formation parts 26 may be covered with a transfer molding apparatus, for example. The semiconductor chip 17 and the wire 19 of each product forming part 26 are covered with the second resin body 3 made of epoxy resin. This epoxy resin is the same resin as the resin forming the first resin body 2, that is, a resin having the same physical property value.

この第２の樹脂体３の形成においても、第１の樹脂体２が形成されたリードフレーム２５が前述のように機械的強度が高いことから、第１の樹脂体２及び第２の樹脂体３が形成されたリードフレーム２５は反り難くなる。また、反りが発生した場合でもその反り量は小さい（例えば、１００ｍｍ当たり１〜２ｍｍ程度以下の反り）。なお、リードフレーム２５、第１の樹脂体２及び第２の樹脂体３が一体化したものを積層封止体４４と呼称する。   Also in the formation of the second resin body 3, since the lead frame 25 on which the first resin body 2 is formed has high mechanical strength as described above, the first resin body 2 and the second resin body 3 are formed. The lead frame 25 formed with 3 becomes difficult to warp. Even when warping occurs, the amount of warping is small (for example, warping of about 1 to 2 mm or less per 100 mm). The lead frame 25, the first resin body 2, and the second resin body 3 integrated together are referred to as a laminated sealing body 44.

つぎに、図４（ｆ）に示すように、各製品形成部２６の第１の樹脂体２の第２の面２ｂに露出する先端部５ｃ（第２の面）に外部電極端子４を形成する（Ｓ１０６）。即ち、図４（ｆ）に示すように、第２の樹脂体３の第１の面にダイシングテープ４５を接着し、ダイシングテープ４５によって積層封止体４４を支持する。その後、第１の樹脂体２の第２の面２ｂに露出するリード５の先端部５ｃに外部電極端子４を形成する。例えば、先端部５ｃの第２の面にボール電極（半田）を供給して外部電極端子４を形成し、ＢＧＡの半導体装置を製造するようにする。積層封止体４４は、上述のように反りがないあるいは反りが小さいことから、第１の樹脂体２の第２の面２ｂに露出する先端部５ｃの位置関係は大きくずれることがない。従って、ボール電極を治具を使用して積層封止体４４に供給した場合、積層封止体４４の各先端部５ｃにボール電極は適正に供給できることになり、良好に外部電極端子４を形成することができる。   Next, as shown in FIG. 4 (f), the external electrode terminals 4 are formed on the distal end portion 5 c (second surface) exposed on the second surface 2 b of the first resin body 2 of each product forming portion 26. (S106). That is, as shown in FIG. 4F, the dicing tape 45 is bonded to the first surface of the second resin body 3, and the laminated sealing body 44 is supported by the dicing tape 45. Thereafter, the external electrode terminal 4 is formed at the tip 5c of the lead 5 exposed on the second surface 2b of the first resin body 2. For example, a ball electrode (solder) is supplied to the second surface of the tip 5c to form the external electrode terminal 4, and a BGA semiconductor device is manufactured. Since the laminated sealing body 44 is not warped or is not warped as described above, the positional relationship of the tip portion 5c exposed on the second surface 2b of the first resin body 2 is not greatly deviated. Therefore, when the ball electrode is supplied to the laminated sealing body 44 using a jig, the ball electrode can be properly supplied to each end portion 5c of the laminated sealing body 44, and the external electrode terminal 4 is formed satisfactorily. can do.

なお、第１の樹脂体２の第２の面２ｂに露出するリード部分（先端部５ｃの第２の面）に、メッキによって一定厚さ（例えば、０．２ｍｍ程度）の金属メッキ膜を形成することによって、外部電極端子４をＬＧＡ構造とする半導体装置１を製造することができる。   A metal plating film having a certain thickness (for example, about 0.2 mm) is formed on the lead portion (second surface of the tip 5c) exposed on the second surface 2b of the first resin body 2 by plating. As a result, the semiconductor device 1 having the LGA structure as the external electrode terminal 4 can be manufactured.

つぎに、図４（ｇ）に示すように、ダイシングテープ４５に固定された積層封止体４４を図示しないダイシングブレードで縦横に切断して積層封止体４４を個片化して、複数の半導体装置１を形成する（Ｓ１０７）。ダイシングブレードによる切断によって形成される切断溝４６の底はダイシングテープ４５の表面または途中深さまでとされる。これにより、個片化された半導体装置１はダイシングテープ４５に支持されることになる。そこで、ダイシング終了後、ダイシングテープ４５を剥がすことによって、図１及び図２に示す半導体装置１を複数製造することができる。リードフレーム２５の枠３１は切断除去され、第１の樹脂体２内には独立したリード５が位置する。   Next, as shown in FIG. 4G, the laminated sealing body 44 fixed to the dicing tape 45 is cut vertically and horizontally with a dicing blade (not shown) to separate the laminated sealing body 44 into a plurality of semiconductors. The device 1 is formed (S107). The bottom of the cutting groove 46 formed by the cutting with the dicing blade is made to the surface of the dicing tape 45 or to a halfway depth. Thereby, the separated semiconductor device 1 is supported by the dicing tape 45. Therefore, a plurality of semiconductor devices 1 shown in FIGS. 1 and 2 can be manufactured by removing the dicing tape 45 after the dicing is completed. The frame 31 of the lead frame 25 is cut and removed, and the independent lead 5 is located in the first resin body 2.

図１７（ａ），（ｂ）は実施例１の半導体装置の製造方法の変形例を示す図であり、第１の樹脂体２に埋め込まれた半導体チップ７の第２の面を第１の樹脂体２の第１の面２ａに露出させる方法を示す断面図である。この変形例の製造方法では、図１７（ａ）に示すように、第１の樹脂体２で半導体チップ７を完全に被うようにする。その後、第１の樹脂体２の第１の面２ａを研削することによって半導体チップ７の第２の面を露出させる。この場合、半導体チップ７の第２の面を併せて所定厚さ研削すれば半導体チップ７の薄型化が図れ、半導体装置１の薄型化も図ることができる。   FIGS. 17A and 17B are diagrams showing a modification of the method for manufacturing the semiconductor device according to the first embodiment. The second surface of the semiconductor chip 7 embedded in the first resin body 2 is the first surface. 4 is a cross-sectional view showing a method of exposing the first surface 2a of the resin body 2. FIG. In the manufacturing method of this modified example, the semiconductor chip 7 is completely covered with the first resin body 2 as shown in FIG. Thereafter, the second surface of the semiconductor chip 7 is exposed by grinding the first surface 2 a of the first resin body 2. In this case, if the second surface of the semiconductor chip 7 is also ground to a predetermined thickness, the semiconductor chip 7 can be thinned and the semiconductor device 1 can be thinned.

実施例１の半導体装置の製造技術によれば、以下の効果を有する。   The semiconductor device manufacturing technique according to the first embodiment has the following effects.

（１）半導体装置１の製造においては、リードフレーム２５の各製品形成部２６に対して、第１の電子部品６（半導体チップ７）をリード５の先端部５ｃに搭載した後第１の樹脂体２を形成する。つぎに、第１の樹脂体２の第１の面２ａ及び第１の電子部品６に第２の電子部品（半導体チップ７）を搭載する。つぎに、第１の電子部品６（半導体チップ７）を第２の樹脂体３で被う。つぎに、第１の樹脂体２の第２の面２ｂに露出するリード部分（他端部５ｄ）に外部電極端子４を形成する。さらに、リードフレーム２５及び第１の樹脂体２並びに第２の樹脂体３を縦横に切断して各製品形成部２６を分離させて複数の半導体装置１を製造する。   (1) In the manufacture of the semiconductor device 1, after mounting the first electronic component 6 (semiconductor chip 7) on the leading end portion 5 c of the lead 5 for each product forming portion 26 of the lead frame 25, the first resin Form body 2. Next, the second electronic component (semiconductor chip 7) is mounted on the first surface 2 a of the first resin body 2 and the first electronic component 6. Next, the first electronic component 6 (semiconductor chip 7) is covered with the second resin body 3. Next, the external electrode terminal 4 is formed on the lead portion (the other end portion 5 d) exposed on the second surface 2 b of the first resin body 2. Further, the lead frame 25, the first resin body 2, and the second resin body 3 are cut vertically and horizontally to separate the product forming portions 26, thereby manufacturing a plurality of semiconductor devices 1.

このようにして製造された半導体装置１は、第１の樹脂体２内に第１の電子部品６を位置させ、第１の樹脂体２に重ねて形成される第２の樹脂体３内に第２の電子部品１６を位置させる構造となることから、半導体装置１の高集積化が達成できる。   In the semiconductor device 1 manufactured in this way, the first electronic component 6 is positioned in the first resin body 2, and the second resin body 3 is formed so as to overlap the first resin body 2. Since the second electronic component 16 is positioned, the semiconductor device 1 can be highly integrated.

（２）半導体装置１は上記（１）に記載する方法で製造される。そして、第１の電子部品６（半導体チップ７）を搭載した後、第１の樹脂体２を形成することから、リードフレーム２５と第１の樹脂体２は第１の電子部品６（半導体チップ７）を含んで一枚の封止体となるため、この封止体は機械強度が大きくなり、反り難くなる。この結果、製造された半導体装置１は反り難くなり、半導体装置１の下面に配置された外部電極端子の下端の高さが一定し、実装が良好に行える半導体装置（実装性能が高い半導体装置）となる。外部電極端子４がＬＧＡ構造である半導体装置１ではこの実装性能の良好さは重要である。   (2) The semiconductor device 1 is manufactured by the method described in (1) above. Since the first resin body 2 is formed after the first electronic component 6 (semiconductor chip 7) is mounted, the lead frame 25 and the first resin body 2 are connected to the first electronic component 6 (semiconductor chip). 7), the sealing body becomes a single sealing body. Therefore, the sealing body has high mechanical strength and is difficult to warp. As a result, the manufactured semiconductor device 1 is difficult to warp, the height of the lower end of the external electrode terminal arranged on the lower surface of the semiconductor device 1 is constant, and the semiconductor device that can be mounted satisfactorily (semiconductor device with high mounting performance). It becomes. In the semiconductor device 1 in which the external electrode terminal 4 has an LGA structure, this good mounting performance is important.

封止体が反り難くなる構成は幾つかある。その一つは、リードフレーム２５においてマトリックス状に配置される四角形状の製品形成部２６では、第１の樹脂体２との一体化によって封止体の下面（第１の樹脂体２の第２の面２ｂ）の前記四角形状の内側から封止体の上面（第１の樹脂体２の第１の面２ａ）の前記四角形状の周縁に向かって複数のリード５が延在する。これらリード５は四角形状の中央よりの位置から四角形状の各辺に向かって傾斜して延在することから、各リード５はすじかいの役割を果たし、封止体が反り難くなる。   There are several configurations in which the sealing body is less likely to warp. One of them is that the rectangular product forming portion 26 arranged in a matrix in the lead frame 25 is integrated with the first resin body 2 to form a lower surface of the sealing body (second of the first resin body 2). A plurality of leads 5 extend from the inner side of the rectangular shape of the surface 2b) toward the peripheral edge of the rectangular shape of the upper surface of the sealing body (the first surface 2a of the first resin body 2). Since these leads 5 are inclined and extended from the position from the center of the quadrangular shape toward the respective sides of the quadrangular shape, the respective leads 5 play a role of being hard and the sealing body is hardly warped.

他の一つは、製品形成部２６の内側に突出する各リード５の先端部分（先端部５ｃ）には第１の電子部品６（半導体チップ７）の電極８が突起電極９を介して接続されるため、先端が自由端となるリード部分（先端部５ｃ）は第１の電子部品６（半導体チップ７）によって支持される。第１の電子部品６がチップ部品や半導体装置の場合は第１の電子部品６の機械的強度が大きいことから、チップ部品や半導体装置によって連結される片持梁状に突出している各リードの機械的強度が向上し、封止体が反り難くなる。応力に対して比較的脆弱な半導体チップ７であっても効果はある。   The other is that the electrode 8 of the first electronic component 6 (semiconductor chip 7) is connected via the protruding electrode 9 to the tip portion (tip portion 5 c) of each lead 5 protruding inside the product forming portion 26. Therefore, the lead portion (tip portion 5c) whose tip is a free end is supported by the first electronic component 6 (semiconductor chip 7). When the first electronic component 6 is a chip component or a semiconductor device, since the mechanical strength of the first electronic component 6 is large, each lead protruding in a cantilever shape connected by the chip component or the semiconductor device is used. The mechanical strength is improved and the sealing body is hardly warped. Even the semiconductor chip 7 that is relatively vulnerable to stress is effective.

他の一つは、厚さが２５０〜３００μｍとなる第１の樹脂体２（封止体）に対して、封止体の１／３程度の７５〜１００μｍとなる厚さのリード５（リードフレーム２５）が埋め込まれることから、リード５（リードフレーム２５）は充分な強度部材となり、封止体の反りを抑止することができる。   The other is a lead 5 (lead) having a thickness of 75 to 100 μm, which is about 1/3 of the sealing body, with respect to the first resin body 2 (sealing body) having a thickness of 250 to 300 μm Since the frame 25) is embedded, the lead 5 (lead frame 25) becomes a sufficiently strong member, and the warping of the sealing body can be suppressed.

（３）前記（２）で説明した反り難い構造の封止体に第２の電子部品１６（半導体チップ１７）を搭載し、さらに第２の樹脂体３を形成した段階において、第１の樹脂体２と第２の樹脂体３との接着界面部分には、リードフレーム２５の前記四角形状の枠３１と、この枠３１の内側から突出するリード５が、第１の樹脂体２と第２の樹脂体３とから構成される樹脂部の中段（中層）の心材となるため、樹脂部は反り難くなる。即ち、第１の樹脂体２の第１の面２ａ部分の高さ（中段）においては、リード部分の下側には３００μｍの厚さに第１の樹脂体２が重なり、リード部分の上側には４００μｍの厚さの第２の樹脂体３が重なることになり、樹脂部の厚さ方向の樹脂の厚さバランスが良好となり、金属のリード５と樹脂体との熱膨張係数の違いによっても反り難くなる。   (3) At the stage where the second electronic component 16 (semiconductor chip 17) is mounted on the sealing body having a structure that is difficult to warp described in (2) and the second resin body 3 is formed, the first resin is formed. At the bonding interface between the body 2 and the second resin body 3, the rectangular frame 31 of the lead frame 25 and the lead 5 protruding from the inside of the frame 31 are connected to the first resin body 2 and the second resin body 2. Therefore, the resin portion is less likely to warp. That is, at the height (middle stage) of the first surface 2a portion of the first resin body 2, the first resin body 2 overlaps with a thickness of 300 μm below the lead portion, and above the lead portion. The second resin body 3 having a thickness of 400 μm is overlapped, the resin thickness balance in the thickness direction of the resin portion is improved, and the difference in thermal expansion coefficient between the metal lead 5 and the resin body It becomes difficult to warp.

特に、第１の樹脂体２と第２の樹脂体３を同じ材質の樹脂で形成した場合には、樹脂部の中段に位置するリードフレーム部分の上下面側にそれぞれ同じ機械的強度を有する樹脂（第１の樹脂体２及び第２の樹脂体３）が位置することになり、樹脂部の反り発生がより一層抑えられることになる。   In particular, when the first resin body 2 and the second resin body 3 are formed of the same material resin, the resin having the same mechanical strength on the upper and lower surfaces of the lead frame portion located in the middle of the resin portion. (The first resin body 2 and the second resin body 3) are positioned, and the warpage of the resin portion is further suppressed.

（４）前記（３）で説明したように、第１の樹脂体２に第２の樹脂体３を重ねて形成して樹脂部を形成した段階では樹脂部は反り難く、平坦を維持することから、第１の樹脂体２の第２の面２ｂに外部電極端子４を形成する場合、外部電極端子４の形成部分であるリード部分（先端部５ｃ）の位置のズレがない、あるいは小さいので、外部電極端子４を高精度に形成することができる。例えば、ボール電極を治具を使用して供給して、バンプ電極（突起電極）を形成する際、樹脂部に反りがない、あるいは反りが小さい場合、治具を用いて供給する全てのボール電極は高精度に各リード部分（先端部５ｃ）に供給されることになり、接続の信頼性が高い外部電極端子４を高歩留りに形成することができる。従って、品質の優れた半導体装置１を高歩留りに製造することができる。   (4) As explained in the above (3), the resin part is hardly warped at the stage where the second resin body 3 is formed on the first resin body 2 to form the resin part, and the flatness is maintained. Therefore, when the external electrode terminal 4 is formed on the second surface 2b of the first resin body 2, the position of the lead portion (tip portion 5c), which is the formation portion of the external electrode terminal 4, is not shifted or small. The external electrode terminal 4 can be formed with high accuracy. For example, when a ball electrode is supplied using a jig to form a bump electrode (projection electrode), if there is no warpage in the resin part or the warpage is small, all the ball electrodes supplied using the jig Is supplied to each lead portion (tip portion 5c) with high accuracy, and the external electrode terminal 4 having high connection reliability can be formed with high yield. Therefore, the semiconductor device 1 with excellent quality can be manufactured with a high yield.

また、樹脂部が反りがないあるいは小さいので、前記樹脂部の切断も良好に行うことができる。これにより外形寸法が高精度な半導体装置を製造することができる。   Further, since the resin portion has no warp or is small, the resin portion can be cut well. As a result, a semiconductor device having a highly accurate outer dimension can be manufactured.

（５）樹脂部をリードフレーム２５共々切断（個片化）することによって半導体装置１が複数製造される。製造された半導体装置１の外周部分（四角形状の４辺部分）の第１の樹脂体２と第２の樹脂体３との接着面部分には、リード部分（他端部５ｄ）が密に配置されている。この密に配置されたリード部分（他端部５ｄ）は、四角形状の第１の樹脂体２の周辺全体の機械的強度部材として作用すること、また第１の樹脂体２と第２の樹脂体３とからなる樹脂部の中段に位置することから、半導体装置１の反りも防止することができる。従って、半導体装置１の反りに伴う実装時の実装不良の発生を抑止することができる。   (5) A plurality of semiconductor devices 1 are manufactured by cutting (separating) the resin portion together with the lead frame 25. The lead portion (the other end portion 5d) is densely attached to the bonding surface portion between the first resin body 2 and the second resin body 3 in the outer peripheral portion (four sides of the square shape) of the manufactured semiconductor device 1. Has been placed. This closely arranged lead portion (the other end portion 5d) functions as a mechanical strength member for the entire periphery of the square-shaped first resin body 2, and the first resin body 2 and the second resin. Since it is located in the middle stage of the resin part composed of the body 3, warping of the semiconductor device 1 can also be prevented. Therefore, it is possible to suppress the occurrence of mounting defects during mounting due to warpage of the semiconductor device 1.

（６）半導体装置１は、第１の電子部品６を第１の樹脂体２の第１の面２ａに露出させる構造としている。この構造の場合には、第１の電子部品６に第２の電子部品１６を搭載することができる。即ち、第１の電子部品６として半導体チップ７の各電極を所定リードの先端部５ｃの第１の面にフリップ・チップ接続し、第１の樹脂体２の第１の面２ａに露出する半導体チップ７の半導体基板上に絶縁性の接合材１５によって半導体チップ１７を固定する。そして、半導体チップ１７の電極１８と第１の樹脂体２の第１の面２ａに露出するリード部分（他端部５ｄ）を導電性のワイヤ１９で接続する。この構造によれば、薄型化、高集積化の効果を有する。   (6) The semiconductor device 1 has a structure in which the first electronic component 6 is exposed on the first surface 2 a of the first resin body 2. In the case of this structure, the second electronic component 16 can be mounted on the first electronic component 6. That is, each electrode of the semiconductor chip 7 as the first electronic component 6 is flip-chip connected to the first surface of the tip portion 5c of the predetermined lead, and the semiconductor exposed to the first surface 2a of the first resin body 2 A semiconductor chip 17 is fixed on the semiconductor substrate of the chip 7 by an insulating bonding material 15. Then, the electrode 18 of the semiconductor chip 17 and the lead portion (the other end portion 5 d) exposed on the first surface 2 a of the first resin body 2 are connected by a conductive wire 19. This structure has the effect of reducing the thickness and increasing the integration.

図１８乃至図２４は本発明の実施例２である半導体装置及びその製造方法に係わる図である。図１８は半導体装置の断面図であり、図１９乃至図２４は実施例２の半導体装置の製造方法に係わる図である。   18 to 24 are diagrams relating to a semiconductor device which is Embodiment 2 of the present invention and a method for manufacturing the same. FIG. 18 is a cross-sectional view of a semiconductor device, and FIGS. 19 to 24 are diagrams relating to a method of manufacturing a semiconductor device according to a second embodiment.

実施例２の半導体装置１は、実施例１の半導体装置１において、第１の電子部品６を実施例１の半導体チップ７に代えてチップ部品５０としたものである。また、第２の電子部品１６は実施例１と同様に第１の接続手段がワイヤとなる半導体チップ１７である。半導体装置１は、図１８に示すように、四角形状の第１の樹脂体２の各辺に沿って２列に先端部５ｃを配列するリード５群において、内側の列の隣接する一対の先端部５ｃにチップ部品５０が搭載される構造になっている。   The semiconductor device 1 according to the second embodiment is the same as the semiconductor device 1 according to the first embodiment except that the first electronic component 6 is replaced with the semiconductor chip 7 according to the first embodiment and a chip component 50 is used. The second electronic component 16 is a semiconductor chip 17 in which the first connecting means is a wire as in the first embodiment. As shown in FIG. 18, the semiconductor device 1 includes a pair of adjacent tips in an inner row in a group of leads 5 in which tip portions 5 c are arranged in two rows along each side of the first resin body 2 having a rectangular shape. The chip component 50 is mounted on the part 5c.

実施例２の半導体装置１について、図１８の半導体装置１の断面図と、図１９乃至図２４の半導体装置の製造方法を説明する図を用いて説明する。半導体装置１は、図１８に示すように、四角形状の第１の樹脂体２の各辺に沿って２列に先端部５ｃを配列するリード５群において、内側の列の隣接する一対の先端部５ｃにチップ部品５０が搭載される構造になっている。   The semiconductor device 1 according to the second embodiment will be described with reference to the cross-sectional view of the semiconductor device 1 in FIG. 18 and the drawings for explaining the method of manufacturing the semiconductor device in FIGS. As shown in FIG. 18, the semiconductor device 1 includes a pair of adjacent tips in an inner row in a group of leads 5 in which tip portions 5 c are arranged in two rows along each side of the first resin body 2 having a rectangular shape. The chip component 50 is mounted on the part 5c.

半導体装置１は実施例１と同様に図３のフローチャートに従って製造される。半導体装置１の製造においては、図１９に製品形成部２６を示すリードフレーム２５が準備される。このリードフレーム２５は実施例１で用いたリードフレーム２５と同じパターンである。図１９は半導体装置の製造に用いるリードフレームの製品形成部の拡大平面図であり、図２０は図１９のＥ−Ｅ線に沿う断面図である。   The semiconductor device 1 is manufactured according to the flowchart of FIG. In manufacturing the semiconductor device 1, a lead frame 25 showing the product forming unit 26 in FIG. 19 is prepared. The lead frame 25 has the same pattern as the lead frame 25 used in the first embodiment. 19 is an enlarged plan view of a product forming portion of a lead frame used for manufacturing a semiconductor device, and FIG. 20 is a cross-sectional view taken along line EE of FIG.

つぎに、図１９及び図２０に示すように、各製品形成部２６の内側の先端部５ｃの第１の面にチップ部品５０の両端の電極５１を導電性の接合材５２によって接続する。先端部５ｃの第１の面には金属メッキ膜１０（図１８参照）が形成されていることから、例えば、先端部５ｃの第１の面にクリーム半田等の接合材５２を塗布しておき、チップ部品５０を位置決めして先端部５ｃ上に載置し、かつリフローすることによってチップ部品５０の電極５１を先端部５ｃに固定することができる。   Next, as shown in FIGS. 19 and 20, the electrodes 51 at both ends of the chip component 50 are connected to the first surface of the tip portion 5 c inside each product forming portion 26 by a conductive bonding material 52. Since the metal plating film 10 (see FIG. 18) is formed on the first surface of the tip 5c, for example, a bonding material 52 such as cream solder is applied to the first surface of the tip 5c. The electrode 51 of the chip component 50 can be fixed to the tip portion 5c by positioning the chip component 50, placing it on the tip portion 5c, and reflowing.

実施例２では、図１９に示すように、６個のチップ部品５０がリード５に搭載される。チップ部品５０は、チップコンデンサ、チップ抵抗、チップインダクタ等の電子部品である。   In the second embodiment, as shown in FIG. 19, six chip components 50 are mounted on the leads 5. The chip component 50 is an electronic component such as a chip capacitor, a chip resistor, or a chip inductor.

また、チップ部品５０の寸法によっては１本乃至数本のリード５を跨ぐようにしてそれぞれ所定の先端部５ｃに電極５１を固定するような実装構造でもよい。   Further, depending on the size of the chip component 50, a mounting structure in which the electrode 51 is fixed to a predetermined tip portion 5c so as to straddle one or several leads 5 may be employed.

つぎに、実施例１と同様に第１の樹脂体２を形成する。図２１は前記チップ部品を封止する第１の樹脂体を形成した製品形成部の拡大平面図、図２２は図２１のＦ−Ｆ線に沿う断面図である。第１の樹脂体２の第１の面２ａには、図２１に示すように、リードフレーム２５の枠３１（第１の面）及びこの枠３１から突出するリード５の他端部５ｄ（第１の面）が露出し、第１の樹脂体２の第２の面２ｂには、図２２に示すように、リード５の先端部５ｃの第２の面が露出する。第１の電子部品６であるチップ部品５０は第１の樹脂体２内に埋没する。   Next, the first resin body 2 is formed in the same manner as in the first embodiment. FIG. 21 is an enlarged plan view of a product forming portion on which a first resin body for sealing the chip component is formed, and FIG. 22 is a cross-sectional view taken along line FF in FIG. As shown in FIG. 21, the first surface 2 a of the first resin body 2 includes a frame 31 (first surface) of the lead frame 25 and the other end 5 d (first) of the lead 5 protruding from the frame 31. 1), and the second surface 2b of the first resin body 2 exposes the second surface of the tip 5c of the lead 5 as shown in FIG. The chip component 50 which is the first electronic component 6 is buried in the first resin body 2.

つぎに、図２３に示すように、絶縁性樹脂からなる第１の樹脂体２の第１の面２ａに絶縁性の接合材１５によって半導体チップ１７の第２の面を固定する。その後、半導体チップ１７の第１の面に設けられた各電極１８と第１の樹脂体２の第１の面２ａに露出するリード５の他端部５ｄを導電性のワイヤ１９で接続する。他端部５ｄの第１の面には金属メッキ膜１０が設けられていることから、ワイヤ１９は良好に接続されることになる。ワイヤ１９のループ高さも第２の樹脂体３の第１の面に露出しないように低く形成する。   Next, as shown in FIG. 23, the second surface of the semiconductor chip 17 is fixed to the first surface 2 a of the first resin body 2 made of an insulating resin by the insulating bonding material 15. Thereafter, each electrode 18 provided on the first surface of the semiconductor chip 17 and the other end portion 5 d of the lead 5 exposed on the first surface 2 a of the first resin body 2 are connected by a conductive wire 19. Since the metal plating film 10 is provided on the first surface of the other end 5d, the wire 19 is well connected. The loop height of the wire 19 is also made low so as not to be exposed on the first surface of the second resin body 3.

つぎに、図２４に示すように、実施例１と同様に半導体チップ１７及びワイヤ１９等を被うように第２の樹脂体３を形成する。   Next, as shown in FIG. 24, the second resin body 3 is formed so as to cover the semiconductor chip 17, the wire 19, and the like as in the first embodiment.

つぎに、図示はしないが、実施例１と同様に第１の樹脂体２の第２の面２ｂに露出するリード５の先端部５ｃの第２の面に外部電極端子４を形成した後、第１の樹脂体２、リードフレーム２５及び第２の樹脂体３と重なる積層封止体４４を縦横に切断分離して、図１８に示す半導体装置１を複数製造する。   Next, although not shown, after forming the external electrode terminal 4 on the second surface of the tip portion 5c of the lead 5 exposed on the second surface 2b of the first resin body 2 as in the first embodiment, A plurality of semiconductor devices 1 shown in FIG. 18 are manufactured by cutting and separating the laminated sealing body 44 overlapping the first resin body 2, the lead frame 25 and the second resin body 3 in the vertical and horizontal directions.

実施例２によれば、実施例１の効果に加えてチップ部品５０を多数組み込むことができることから、半導体装置１の多機能化及び高集積化が達成できる。実施例２の半導体装置１は、複数のチップ部品５０を使用する構造であることからシステムインパッケージも可能になる。   According to the second embodiment, in addition to the effects of the first embodiment, a large number of chip components 50 can be incorporated, so that the multi-function and high integration of the semiconductor device 1 can be achieved. Since the semiconductor device 1 according to the second embodiment has a structure using a plurality of chip components 50, system-in-package is also possible.

実施例２は第１の電子部品６を第１の樹脂体２内に埋没させる構造の半導体装置の製造方法である。図２５は実施例２の変形例であり、実施例１の半導体装置１において、第１の樹脂体２内の半導体チップ７を薄い構造のものとして半導体チップ７を第１の樹脂体２内に埋没させたものである。この構造でも、実施例２と同様に半導体チップ１７を第１の樹脂体２の第１の面２ａに接合材１５によって固定することができる。   The second embodiment is a method for manufacturing a semiconductor device having a structure in which the first electronic component 6 is buried in the first resin body 2. FIG. 25 is a modification of the second embodiment. In the semiconductor device 1 of the first embodiment, the semiconductor chip 7 in the first resin body 2 is thin and the semiconductor chip 7 is placed in the first resin body 2. It is buried. Even in this structure, the semiconductor chip 17 can be fixed to the first surface 2a of the first resin body 2 by the bonding material 15 as in the second embodiment.

図２６乃至図３０は本発明の実施例３である半導体装置及びその製造方法に係わる図である。図２６は半導体装置の断面図であり、図２７乃至図３０は半導体装置の製造方法に係わる図である。実施例３の半導体装置１について、図２６の半導体装置１の断面図と、図２７乃至図３０の半導体装置の製造方法を説明する図を用いて説明する。   26 to 30 are diagrams relating to a semiconductor device which is Embodiment 3 of the present invention and a method for manufacturing the same. FIG. 26 is a cross-sectional view of a semiconductor device, and FIGS. 27 to 30 are diagrams related to a method for manufacturing a semiconductor device. A semiconductor device 1 of Example 3 will be described with reference to the cross-sectional view of the semiconductor device 1 in FIG. 26 and the drawings for explaining the method of manufacturing the semiconductor device in FIGS.

半導体装置１は、実施例１の半導体装置１において、図２６に示すように、中央に四角形状のタブ５５を配置し、かつこのタブ５５上に第１の電子部品６としてワイヤ接続構造の半導体チップ７を搭載した構造になっている。タブ５５は、図２７の半導体装置の製造方法に使用するリードフレーム２５における製品形成部２６に示すように、枠３１の内側から突出する細いタブ吊りリード５６で支持されている。リードフレーム２５は、実施例１で使用するリードフレーム２５において、２列に配置されるリード５の先端部５ｃを外側の１列だけとし、その内側に四角形状のタブ５５を配置した構造になっている。タブ５５の半導体チップ７を固定する第１の面には金属メッキ膜１０が設けられている。タブ吊りリード５６は、リード５と同様に、半導体装置の製造の最終段階で行われる個片化時に切断されて枠３１から分離される。また、半導体チップ７の第１の面に設けられた各電極８とリード５の先端部５ｃは導電性のワイヤ１９によって電気的に接続されている。   As shown in FIG. 26, the semiconductor device 1 in the semiconductor device 1 according to the first embodiment has a rectangular tab 55 disposed at the center, and a semiconductor having a wire connection structure as the first electronic component 6 on the tab 55. The chip 7 is mounted. The tab 55 is supported by thin tab suspension leads 56 protruding from the inside of the frame 31 as shown in the product forming portion 26 in the lead frame 25 used in the method for manufacturing the semiconductor device of FIG. The lead frame 25 has a structure in which, in the lead frame 25 used in the first embodiment, the tip portions 5c of the leads 5 arranged in two rows are only one row on the outer side, and a rectangular tab 55 is arranged on the inner side. ing. A metal plating film 10 is provided on the first surface of the tab 55 for fixing the semiconductor chip 7. Similarly to the lead 5, the tab suspension lead 56 is cut off and separated from the frame 31 at the time of singulation performed at the final stage of manufacturing the semiconductor device. Further, each electrode 8 provided on the first surface of the semiconductor chip 7 and the tip 5 c of the lead 5 are electrically connected by a conductive wire 19.

半導体装置１は実施例１と同様に図３のフローチャートに従って製造される。半導体装置１の製造においては、図２７に製品形成部２６を示すリードフレーム２５が準備される。このリードフレーム２５は前述のように、実施例１で用いたリードフレーム２５において、内側の先端部５ｃを有するリード５を廃止し、その代わりにタブ５５及びこのタブ５５を支持するタブ吊りリード５６を有する構造になっている。タブ５５の高さはタブ５５の外側に位置する先端部５ｃと同じ高さである。また、タブ５５の第１の面（上面）には、半導体チップ７を固定するため金属メッキ膜１０（図２８参照）が設けられている。図２７は半導体装置の製造に用いるリードフレームの製品形成部の拡大平面図であり、図２８は図２７のＧ−Ｇ線に沿う断面図である。   The semiconductor device 1 is manufactured according to the flowchart of FIG. In manufacturing the semiconductor device 1, a lead frame 25 showing the product forming unit 26 in FIG. 27 is prepared. As described above, the lead frame 25 is the same as the lead frame 25 used in the first embodiment, except that the lead 5 having the inner front end portion 5c is eliminated, and a tab 55 and a tab suspension lead 56 that supports the tab 55 are used instead. It has the structure which has. The height of the tab 55 is the same height as the tip portion 5 c located outside the tab 55. A metal plating film 10 (see FIG. 28) is provided on the first surface (upper surface) of the tab 55 in order to fix the semiconductor chip 7. 27 is an enlarged plan view of a product forming portion of a lead frame used for manufacturing a semiconductor device, and FIG. 28 is a cross-sectional view taken along the line GG of FIG.

つぎに、図２７及び図２８に示すように、各製品形成部２６のタブ５５の上面（第１の面）に接合材１５ａを介して第１の電子部品６としての半導体チップ７が固定される。接合材１５ａは導電性または絶縁性のものが使用される。タブ５５の第１の面には金属メッキ膜１０が形成されていることから半導体チップ７はタブ５５に良好に接続される。   Next, as shown in FIGS. 27 and 28, the semiconductor chip 7 as the first electronic component 6 is fixed to the upper surface (first surface) of the tab 55 of each product forming section 26 via the bonding material 15a. The As the bonding material 15a, a conductive or insulating material is used. Since the metal plating film 10 is formed on the first surface of the tab 55, the semiconductor chip 7 is well connected to the tab 55.

つぎに、半導体チップ７の第１の面（上面）の各電極８と所定のリード５の先端部５ｃ（第１の面）を導電性のワイヤ１９で電気的に接続する。   Next, each electrode 8 on the first surface (upper surface) of the semiconductor chip 7 and the tip portion 5 c (first surface) of the predetermined lead 5 are electrically connected by a conductive wire 19.

つぎに、実施例１と同様に第１の樹脂体２を形成する。図２９は半導体チップ７及びワイヤ１９を封止する第１の樹脂体２を形成した製品形成部２６の拡大平面図、図３０は図２９のＨ−Ｈ線に沿う断面図である。第１の樹脂体２の第１の面２ａには、図２９に示すように、リードフレーム２５の枠３１（第１の面）及びこの枠３１から突出するリード５の他端部５ｄ（第１の面）が露出し、第１の樹脂体２の第２の面２ｂには、図３０に示すように、リード５の先端部５ｃの第２の面が露出する。第１の電子部品６である半導体チップ７、ワイヤ１９及びタブ５５は第１の樹脂体２内に埋没する。   Next, the first resin body 2 is formed in the same manner as in the first embodiment. FIG. 29 is an enlarged plan view of the product forming portion 26 on which the first resin body 2 for sealing the semiconductor chip 7 and the wire 19 is formed, and FIG. 30 is a cross-sectional view taken along the line HH in FIG. As shown in FIG. 29, the first surface 2 a of the first resin body 2 has a frame 31 (first surface) of the lead frame 25 and the other end 5 d (first) of the lead 5 protruding from the frame 31. 1) and the second surface 2 b of the first resin body 2 exposes the second surface of the tip 5 c of the lead 5 as shown in FIG. 30. The semiconductor chip 7, the wire 19 and the tab 55, which are the first electronic components 6, are buried in the first resin body 2.

つぎに、実施例２と同様に、図示はしないが、第１の樹脂体２の第１の面２ａに第２の電子部品１６としての半導体チップ１７を固定するとともに、半導体チップ１７の電極１８とリード５の他端部５ｄをワイヤ１９で接続し、ついで半導体チップ１７及びワイヤ１９を第２の樹脂体３で被う。その後、外部電極端子形成（Ｓ１０６）及び個片化（Ｓ１０７）を行って、図２６に示す半導体装置１を複数製造する。   Next, as in the second embodiment, although not shown, the semiconductor chip 17 as the second electronic component 16 is fixed to the first surface 2a of the first resin body 2, and the electrode 18 of the semiconductor chip 17 is fixed. The other end 5 d of the lead 5 is connected by a wire 19, and then the semiconductor chip 17 and the wire 19 are covered with the second resin body 3. Thereafter, external electrode terminal formation (S106) and separation (S107) are performed to manufacture a plurality of semiconductor devices 1 shown in FIG.

実施例３の半導体装置１及びその製造方法によれば、実施例１の効果に加えて下記の効果がある。即ち、実施例３の半導体装置１は、タブ５５を有し、このタブ５５上に半導体チップ７を搭載する構造となっている。従って、メモリＩＣ等において、同一チップ（半導体チップ）を複数搭載し、上下のチップで共通ピン（リード、外部電極端子）を共通化できる。このため、半導体装置１のメモリ容量の増大を図ることができる。   According to the semiconductor device 1 of the third embodiment and the manufacturing method thereof, in addition to the effects of the first embodiment, the following effects can be obtained. That is, the semiconductor device 1 according to the third embodiment has a tab 55, and the semiconductor chip 7 is mounted on the tab 55. Therefore, in a memory IC or the like, a plurality of identical chips (semiconductor chips) can be mounted, and common pins (leads, external electrode terminals) can be shared by the upper and lower chips. For this reason, the memory capacity of the semiconductor device 1 can be increased.

また、半導体装置１は、タブ５５の下には第１の樹脂体２を構成する樹脂が薄く存在するだけであることから（金属メッキ膜１０の厚さ分）、放熱性が高い。また、第１の樹脂体２を形成する際、タブ５５の第２の面（下面）を成形金型３７の下型３５のキャビティ（窪み）の底面に押し付けてトランスファモールディングすれば、第１の樹脂体２の第２の面２ｂ（下面）にタブ５５の第２の面（下面）を露出させることができる。この場合は、半導体装置１はさらに放熱性が良好なものとなる。下型３５のキャビティ（窪み）の底面にタブ５５を押し付ける方法としては、例えば、下型３５のキャビティの底に真空吸引用の孔を設ける方法がある。この方法では、トランスファモールディング時真空吸引によって下型３５のキャビティの底面にタブ５５を吸いつける。   In addition, the semiconductor device 1 has high heat dissipation because the resin constituting the first resin body 2 is thinly present under the tab 55 (the thickness of the metal plating film 10). Further, when the first resin body 2 is formed, if the second surface (lower surface) of the tab 55 is pressed against the bottom surface of the cavity (recess) of the lower mold 35 of the molding die 37, transfer molding is performed. The second surface (lower surface) of the tab 55 can be exposed on the second surface 2 b (lower surface) of the resin body 2. In this case, the semiconductor device 1 is further improved in heat dissipation. As a method of pressing the tab 55 against the bottom surface of the cavity (depression) of the lower mold 35, for example, there is a method of providing a vacuum suction hole at the bottom of the cavity of the lower mold 35. In this method, the tab 55 is sucked to the bottom surface of the cavity of the lower mold 35 by vacuum suction during transfer molding.

図３１は本発明の実施例４である半導体装置の断面図であり、図３２は実施例４の半導体装置の第１の電子部品の配置状態を示す模式的平面図である。   FIG. 31 is a cross-sectional view of a semiconductor device that is Embodiment 4 of the present invention, and FIG. 32 is a schematic plan view showing an arrangement state of first electronic components of the semiconductor device of Embodiment 4.

実施例４の半導体装置１は、実施例２の半導体装置１において、第１の樹脂体２内に第１の電子部品６として、チップ部品５０及び半導体装置６０を組み込んだ構造である。半導体装置６０は絶縁性の封止体６１と、この封止体６１の周面から突出する複数のリード６２とを有している。リード６２は表面実装が可能なガルウィング構造となっている。図示はしないが、封止体６１の内部には所定の回路が形成された半導体チップが組み込まれているとともに、半導体チップの電極とリード６２の内端は接続手段を介して電気的に接続されているものである。   The semiconductor device 1 according to the fourth embodiment has a structure in which the chip component 50 and the semiconductor device 60 are incorporated as the first electronic component 6 in the first resin body 2 in the semiconductor device 1 according to the second embodiment. The semiconductor device 60 has an insulating sealing body 61 and a plurality of leads 62 protruding from the peripheral surface of the sealing body 61. The lead 62 has a gull wing structure that can be surface-mounted. Although not shown, a semiconductor chip in which a predetermined circuit is formed is incorporated in the sealing body 61, and the electrodes of the semiconductor chip and the inner ends of the leads 62 are electrically connected through connection means. It is what.

半導体装置６０は、図３１及び図３２に示すように、２列に配置される内側の列の所定の先端部５ｃの第１の面にリード６２の先端部分を載置しかつ導電性の接合材１５ｄによって固定されている。   As shown in FIGS. 31 and 32, the semiconductor device 60 has the leading end portion of the lead 62 mounted on the first surface of the predetermined leading end portion 5c in the inner row arranged in two rows and is electrically conductive. It is fixed by a material 15d.

また、実施例４の半導体装置１では、外側の列の各一対の先端部５ｃにチップ部品５０を搭載してある。実施例２の半導体装置１では、チップ部品５０は内側の列の各一対の先端部５ｃにチップ部品５０を搭載してあるが、特定されるものではない。   In the semiconductor device 1 according to the fourth embodiment, the chip component 50 is mounted on each pair of tip portions 5c in the outer row. In the semiconductor device 1 according to the second embodiment, the chip components 50 are mounted on the pair of tip portions 5c in the inner row, but are not specified.

実施例４によれば、実施例１の効果に加えて半導体装置６０及びチップ部品５０を組み込むことができることから、半導体装置１の多機能化及び高集積化が達成できる。実施例４の半導体装置１は、複数のチップ部品５０と半導体装置６０を使用する構造であることからシステムインパッケージも可能になる。   According to the fourth embodiment, since the semiconductor device 60 and the chip component 50 can be incorporated in addition to the effects of the first embodiment, the multi-function and high integration of the semiconductor device 1 can be achieved. Since the semiconductor device 1 according to the fourth embodiment has a structure using a plurality of chip components 50 and the semiconductor device 60, system-in-package is also possible.

図３３は本発明の実施例５である半導体装置の断面図であり、図３４は実施例５の半導体装置において、第２の電子部品の配置状態を示す模式的平面図である。   FIG. 33 is a cross-sectional view of a semiconductor device that is Embodiment 5 of the present invention, and FIG. 34 is a schematic plan view showing an arrangement state of second electronic components in the semiconductor device of Embodiment 5.

実施例５の半導体装置１は、実施例２の半導体装置１において、第２の樹脂体３内に位置する第２の電子部品１６として、ワイヤ接続構造の複数の半導体チップ１７と複数のチップ部品５０を配置した例である。第１の樹脂体２内に配置する第１の電子部品６は実施例２の半導体装置１のままである。   The semiconductor device 1 according to the fifth embodiment is different from the semiconductor device 1 according to the second embodiment in that a plurality of semiconductor chips 17 having a wire connection structure and a plurality of chip components are used as the second electronic components 16 located in the second resin body 3. 50 is an example of arrangement. The first electronic component 6 disposed in the first resin body 2 remains the semiconductor device 1 of the second embodiment.

半導体装置１は、図３３及び図３４に示すように、第１の樹脂体２の第１の面２ａに細長い４個の半導体チップ１７を四角形状の第１の樹脂体２の各辺に沿って延在するように固定し、かつ各半導体チップ１７の各電極１８とリード５の他端部５ｄを導電性のワイヤ１９で接続した構造になっている。また、四角形状の第２の面２ｂの４隅に位置する隣接するリード５の他端部５ｄを幅広い電極固定部６５とし、これら一対の電極固定部６５にチップ部品５０の両端の電極５１を図示しない接合材５２で電気的に接続した構造になっている。   As shown in FIGS. 33 and 34, the semiconductor device 1 includes four semiconductor chips 17 that are elongated on the first surface 2a of the first resin body 2 along each side of the first resin body 2 having a rectangular shape. In this structure, each electrode 18 of each semiconductor chip 17 and the other end 5d of the lead 5 are connected by a conductive wire 19. The other end 5d of the adjacent lead 5 positioned at the four corners of the quadrangular second surface 2b is a wide electrode fixing portion 65, and the electrodes 51 at both ends of the chip component 50 are connected to the pair of electrode fixing portions 65. The structure is electrically connected by a bonding material 52 (not shown).

実施例５によれば、実施例１の効果に加えて複数の半導体チップ１７、複数のチップ部品５０を組み込むことができることから、半導体装置１の多機能化及び高集積化が達成できる。これにより、実施例５の半導体装置１はシステムインパッケージもさらに可能になる。   According to the fifth embodiment, since a plurality of semiconductor chips 17 and a plurality of chip components 50 can be incorporated in addition to the effects of the first embodiment, the multi-function and high integration of the semiconductor device 1 can be achieved. As a result, the semiconductor device 1 according to the fifth embodiment can further be system-in-packaged.

図３５は本発明の実施例６の半導体装置の平面図であり、第２の電子部品の配置状態を示す模式図である。
実施例６の半導体装置１は、実施例３の半導体装置１において、第１の樹脂体２内に位置する第１の電子部品６である半導体チップ７は対面する一対の辺には電極を配置しない構造としたものである。さらに、この電極を配置しない辺（図３５において上辺と下辺）に対応して延在するリード５の一対の先端部５ｃにチップ部品５０を搭載したものである。図示はしないが、第２の樹脂体３内には実施例２の半導体装置１と同様にワイヤ接続構造の半導体チップ１７が位置している。 FIG. 35 is a plan view of the semiconductor device according to the sixth embodiment of the present invention, and is a schematic diagram showing an arrangement state of second electronic components.
The semiconductor device 1 according to the sixth embodiment is similar to the semiconductor device 1 according to the third embodiment in that the semiconductor chip 7 that is the first electronic component 6 located in the first resin body 2 is provided with electrodes on a pair of sides facing each other. It has a structure that does not. Further, the chip component 50 is mounted on the pair of tip portions 5c of the lead 5 extending corresponding to the sides where the electrodes are not disposed (upper side and lower side in FIG. 35). Although not shown, a semiconductor chip 17 having a wire connection structure is located in the second resin body 3 as in the semiconductor device 1 of the second embodiment.

実施例６によれば、実施例１の効果に加えて複数の半導体チップ１７、複数のチップ部品５０を組み込むことができることから、半導体装置１の多機能化及び高集積化が達成できる。これにより、実施例６の半導体装置１はシステムインパッケージもさらに可能になる。   According to the sixth embodiment, since a plurality of semiconductor chips 17 and a plurality of chip components 50 can be incorporated in addition to the effects of the first embodiment, the multi-function and high integration of the semiconductor device 1 can be achieved. As a result, the semiconductor device 1 according to the sixth embodiment can further be system-in-packaged.

図３６は本発明の実施例７である半導体装置の断面図である。
実施例７の半導体装置１は、実施例２の半導体装置１において、第２の樹脂体３内に位置する第２の電子部品１６を実施例１のようなフリップ・チップ接続構造の半導体チップ７としたものである。実施例７の半導体装置１の半導体チップ７は、実施例１の半導体チップ７に比較して大型となり、半導体チップ７の第１の面の電極８に設けた突起電極９が第１の樹脂体２の第１の面２ａに露出するリード５の他端部５ｄに直接重なって電気的に接続される構造になっている。 FIG. 36 is a cross-sectional view of a semiconductor device that is Embodiment 7 of the present invention.
The semiconductor device 1 according to the seventh embodiment is different from the semiconductor device 1 according to the second embodiment in that the second electronic component 16 located in the second resin body 3 is replaced with the semiconductor chip 7 having the flip chip connection structure as in the first embodiment. It is what. The semiconductor chip 7 of the semiconductor device 1 of Example 7 is larger than the semiconductor chip 7 of Example 1, and the protruding electrode 9 provided on the electrode 8 on the first surface of the semiconductor chip 7 is the first resin body. The second end 5d of the lead 5 exposed on the second first surface 2a is directly overlapped and electrically connected.

実施例７によれば、実施例１の効果に加えて複数の半導体チップ１７、複数のチップ部品５０を組み込むことができること、また大型の半導体チップ７を組み込むことができることから、半導体装置１のさらなる多機能化及び高集積化が達成できる。これにより、実施例７の半導体装置１はシステムインパッケージもさらに可能になる。   According to the seventh embodiment, in addition to the effects of the first embodiment, a plurality of semiconductor chips 17 and a plurality of chip components 50 can be incorporated, and a large semiconductor chip 7 can be incorporated. Multifunctionality and high integration can be achieved. As a result, the semiconductor device 1 according to the seventh embodiment can further be system-in-packaged.

以上本発明者によってなされた発明を実施例に基づき具体的に説明したが、本発明は上記実施例に限定されるものではなく、その要旨を逸脱しない範囲で種々変更可能であることはいうまでもない。   The invention made by the present inventor has been specifically described based on the embodiments. However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Nor.

本発明の実施例１である半導体装置の模式的平面図である。1 is a schematic plan view of a semiconductor device that is Embodiment 1 of the present invention. 図１のＡ−Ａ線に沿う拡大断面図である。It is an expanded sectional view which follows the AA line of FIG. 実施例１の半導体装置の製造方法を示すフローチャートである。3 is a flowchart illustrating a method for manufacturing the semiconductor device according to the first embodiment. 実施例１の半導体装置の製造方法における各工程での製造品の模式的断面図である。FIG. 5 is a schematic cross-sectional view of a manufactured product at each step in the method for manufacturing a semiconductor device according to Example 1. 実施例１の半導体装置の製造で用いるリードフレームの平面図である。3 is a plan view of a lead frame used in manufacturing the semiconductor device of Example 1. FIG. 前記リードフレームの製品形成部の拡大平面図である。It is an enlarged plan view of the product formation part of the lead frame. 図６のＢ−Ｂ線に沿う断面図である。It is sectional drawing which follows the BB line of FIG. 前記製品形成部のリードに第１の電子部品である半導体チップをフリップ・チップ接続によって搭載した状態を示す拡大平面図である。FIG. 4 is an enlarged plan view showing a state where a semiconductor chip as a first electronic component is mounted on a lead of the product forming portion by flip chip connection. 図８のＣ−Ｃ線に沿う断面図である。It is sectional drawing which follows the CC line of FIG. 前記リードフレームに第１の樹脂体を形成する方法を示す模式的断面図である。FIG. 3 is a schematic cross-sectional view showing a method for forming a first resin body on the lead frame. 前記第１の樹脂体を形成したリードフレームの模式的平面図である。FIG. 3 is a schematic plan view of a lead frame on which the first resin body is formed. 前記第１の樹脂体を形成したリードフレームの製品形成部を示す拡大平面図である。It is an enlarged plan view showing a product formation portion of a lead frame in which the first resin body is formed. 前記第１の樹脂体を形成したリードフレームの製品形成部を示す拡大底面図である。It is an enlarged bottom view which shows the product formation part of the lead frame in which the said 1st resin body was formed. 図１２のＤ−Ｄ線に沿う断面図である。It is sectional drawing which follows the DD line | wire of FIG. 第１の電子部品上に接合材を介して第２の電子部品である半導体チップを搭載し、かつワイヤ接続を行った状態を示す製品形成部の断面図である。It is sectional drawing of the product formation part which shows the state which mounted the semiconductor chip which is a 2nd electronic component on the 1st electronic component via the joining material, and performed the wire connection. 第２の電子部品及びワイヤを第１の樹脂体で被った状態を示す製品形成部の断面図である。It is sectional drawing of the product formation part which shows the state which covered the 2nd electronic component and the wire with the 1st resin body. 実施例１の半導体装置の製造方法の変形例を示す図であり、第１の樹脂体に埋め込まれた半導体チップの第２の面を第１の樹脂体の第１の面に露出させる方法を示す断面図である。It is a figure which shows the modification of the manufacturing method of the semiconductor device of Example 1, and is the method of exposing the 2nd surface of the semiconductor chip embedded in the 1st resin body to the 1st surface of the 1st resin body. It is sectional drawing shown. 本発明の実施例２である半導体装置の断面図である。It is sectional drawing of the semiconductor device which is Example 2 of this invention. 実施例２の半導体装置の製造に用いるリードフレームの製品形成部にチップ部品を搭載した状態を示す拡大平面図である。6 is an enlarged plan view showing a state in which chip parts are mounted on a product forming portion of a lead frame used for manufacturing a semiconductor device of Example 2. FIG. 図１９のＥ−Ｅ線に沿う断面図である。It is sectional drawing which follows the EE line | wire of FIG. 前記チップ部品を封止する第１の樹脂体を形成した製品形成部の拡大平面図である。It is an enlarged plan view of the product formation part in which the 1st resin body which seals the said chip component was formed. 図２１のＦ−Ｆ線に沿う断面図である。It is sectional drawing which follows the FF line | wire of FIG. 第１の樹脂体上に接合材を介して第２の電子部品である半導体チップを搭載し、かつワイヤ接続を行った状態を示す製品形成部の断面図である。It is sectional drawing of the product formation part which shows the state which mounted the semiconductor chip which is a 2nd electronic component on the 1st resin body via the bonding material, and performed the wire connection. 第２の電子部品及びワイヤを第２の樹脂体で封止した状態を示す製品形成部の断面図である。It is sectional drawing of the product formation part which shows the state which sealed the 2nd electronic component and the wire with the 2nd resin body. 実施例２の半導体装置の製造方法の変形例によって製造された半導体装置の断面図である。FIG. 10 is a cross-sectional view of a semiconductor device manufactured by a modification of the semiconductor device manufacturing method of Example 2. 本発明の実施例３である半導体装置の断面図である。It is sectional drawing of the semiconductor device which is Example 3 of this invention. 実施例３の半導体装置の製造に用いるリードフレームの製品形成部のタブ上に半導体チップを搭載しかつワイヤ接続を行った状態を示す拡大平面図である。FIG. 9 is an enlarged plan view showing a state in which a semiconductor chip is mounted on a tab of a product forming portion of a lead frame used for manufacturing a semiconductor device of Example 3 and wire connection is performed. 図２７のＧ−Ｇ線に沿う断面図である。It is sectional drawing which follows the GG line of FIG. 前記半導体チップ及びワイヤを封止する第１の樹脂体を形成した製品形成部の拡大平面図である。It is an enlarged plan view of the product formation part in which the 1st resin body which seals the said semiconductor chip and a wire was formed. 図２９のＨ−Ｈ線に沿う断面図である。It is sectional drawing which follows the HH line of FIG. 本発明の実施例４である半導体装置の断面図である。It is sectional drawing of the semiconductor device which is Example 4 of this invention. 実施例４の半導体装置の第１の電子部品の配置状態を示す模式的平面図である。FIG. 10 is a schematic plan view showing the arrangement state of first electronic components of a semiconductor device of Example 4. 本発明の実施例５である半導体装置の断面図である。It is sectional drawing of the semiconductor device which is Example 5 of this invention. 実施例５の半導体装置において、第２の電子部品の配置状態を示す模式的平面図である。In the semiconductor device of Example 5, it is a schematic plan view showing the arrangement state of the second electronic component. 本発明の実施例６の半導体装置の平面図であり、第２の電子部品の配置状態を示す模式図である。It is a top view of the semiconductor device of Example 6 of this invention, and is a schematic diagram which shows the arrangement | positioning state of a 2nd electronic component. 本発明の実施例７である半導体装置の断面図である。It is sectional drawing of the semiconductor device which is Example 7 of this invention.

符号の説明Explanation of symbols

１…半導体装置、２…第１の樹脂体、２ａ…第１の面、２ｂ…第２の面、３…第２の樹脂体、３ａ…第１の面、３ｂ…第２の面、４…外部電極端子、５…リード、５ｃ…先端部、５ｄ…他端部、６…第１の電子部品、７…半導体チップ、８…電極、９…突起電極、１０…金属メッキ膜、１５、１５ａ、１５ｄ…接合材、１６…第２の電子部品、１７…半導体チップ、１８…電極、１９…ワイヤ、２５…リードフレーム、２６…製品形成部、２７…外周枠、２８…ガイド孔、２９ａ，２９ｂ…切断マーク、３１…枠、３３…電極、３４…突起電極、３５…下型、３６…上型、３７…成形金型、３８，３９…シート、４０…ゲート、４１…キャビティ、４２…樹脂、４４…積層封止体、４５…ダイシングテープ、４６…切断溝、５０…チップ部品、５１…電極、５２…接合材、５５…タブ、５６…タブ吊りリード、６０…半導体装置、６１…封止体、６２…リード。   DESCRIPTION OF SYMBOLS 1 ... Semiconductor device, 2 ... 1st resin body, 2a ... 1st surface, 2b ... 2nd surface, 3 ... 2nd resin body, 3a ... 1st surface, 3b ... 2nd surface, 4 ... external electrode terminal, 5 ... lead, 5c ... tip, 5d ... other end, 6 ... first electronic component, 7 ... semiconductor chip, 8 ... electrode, 9 ... projection electrode, 10 ... metal plating film, 15, 15a, 15d ... bonding material, 16 ... second electronic component, 17 ... semiconductor chip, 18 ... electrode, 19 ... wire, 25 ... lead frame, 26 ... product forming part, 27 ... outer peripheral frame, 28 ... guide hole, 29a , 29b ... cutting mark, 31 ... frame, 33 ... electrode, 34 ... protruding electrode, 35 ... lower die, 36 ... upper die, 37 ... molding die, 38, 39 ... sheet, 40 ... gate, 41 ... cavity, 42 ... Resin, 44 ... Laminated sealing body, 45 ... Dicing tape, 46 ... Cutting groove, 50 ... Chip component 51 ... electrode, 52 ... bonding material, 55 ... tab 56 ... tab suspending lead, 60 ... semiconductor device, 61 ... sealing member, 62 ... lead.

Claims (32)

第１の面及びこの第１の面の反対面となる第２の面を有する絶縁性樹脂で形成される四角形状の第１の樹脂体と、
第１の面及びこの第１の面の反対面となる第２の面を有し前記第２の面が前記第１の樹脂体の前記第１の面に一致して重ねられて一体となる絶縁性樹脂で形成される四角形状の第２の樹脂体と、
前記第１の樹脂体内に階段状に一段折れ曲がるように延在して位置し、先端部が前記第１の樹脂体の前記四角形状の内側に位置するとともに前記第１の樹脂体の前記第２の面に第２の面が露出し、他端部が前記第１の樹脂体の周面に位置するとともに前記第１の樹脂体の前記第１の面に第１の面が露出する複数の導電性のリードと、
前記第１の樹脂体内に位置し、複数の電極を有し、前記各電極が所定の前記リードに第１の接続手段を介して電気的に接続される少なくとも一つの第１の電子部品と、
前記第２の樹脂体内に位置し、複数の電極を有し、前記各電極が前記第１の樹脂体の前記第１の面に露出する所定の前記リード部分に第２の接続手段を介して電気的に接続される少なくとも一つの第２の電子部品と、
前記第１の樹脂体の前記第２の面に露出する前記リード部分に形成された外部電極端子と、を有することを特徴とする半導体装置。 A rectangular first resin body formed of an insulating resin having a first surface and a second surface opposite to the first surface;
It has a first surface and a second surface opposite to the first surface, and the second surface coincides with and overlaps with the first surface of the first resin body. A quadrangular second resin body formed of an insulating resin;
The first resin body is positioned so as to be bent in a stepped manner in the first resin body, the distal end portion is located inside the square shape of the first resin body, and the second of the first resin body. The second surface is exposed on the first surface, the other end is positioned on the peripheral surface of the first resin body, and the first surface is exposed on the first surface of the first resin body. Conductive leads,
At least one first electronic component located in the first resin body, having a plurality of electrodes, each electrode being electrically connected to a predetermined lead via a first connecting means;
It has a plurality of electrodes located in the second resin body, and each electrode is exposed to the first surface of the first resin body via a second connecting means. At least one second electronic component electrically connected;
An external electrode terminal formed on the lead portion exposed on the second surface of the first resin body. 前記外部電極端子は一定厚さの金属メッキ膜からなり、前記半導体装置はＬＧＡ型の半導体装置を構成することを特徴とする請求項１に記載の半導体装置。 2. The semiconductor device according to claim 1, wherein the external electrode terminal is made of a metal plating film having a constant thickness, and the semiconductor device constitutes an LGA type semiconductor device. 前記外部電極端子は突起電極からなり、前記半導体装置はＢＧＡ型の半導体装置を構成することを特徴とする請求項１に記載の半導体装置。 The semiconductor device according to claim 1, wherein the external electrode terminal includes a protruding electrode, and the semiconductor device constitutes a BGA type semiconductor device. 前記第１の接続手段は導電性の接合材で構成され、前記第１の電子部品の前記電極が前記リードの前記先端部の前記第１の面に前記接合材を介して重ねて接続されていることを特徴とする請求項１に記載の半導体装置。 The first connecting means is composed of a conductive bonding material, and the electrode of the first electronic component is overlapped and connected to the first surface of the tip portion of the lead via the bonding material. The semiconductor device according to claim 1, wherein: 前記第２の接続手段は導電性のワイヤで構成され、前記ワイヤの一端が前記第２の電子部品の前記電極に接続され、他端が前記第１の樹脂体の前記第１の面に露出する前記リード部分の前記第１の面に接続されていることを特徴とする請求項１に記載の半導体装置。 The second connection means is composed of a conductive wire, one end of the wire is connected to the electrode of the second electronic component, and the other end is exposed to the first surface of the first resin body. The semiconductor device according to claim 1, wherein the semiconductor device is connected to the first surface of the lead portion. 前記第２の接続手段は導電性の接合材で構成され、前記第２の電子部品の前記電極が前記第１の樹脂体の前記第１の面に露出する前記リード部分の前記第１の面に前記接合材を介して重ねて接続されていることを特徴とする請求項１に記載の半導体装置。 The second connecting means is made of a conductive bonding material, and the first surface of the lead portion where the electrode of the second electronic component is exposed on the first surface of the first resin body. 2. The semiconductor device according to claim 1, wherein the semiconductor device is connected to each other through the bonding material. 前記第１の電子部品は、第１の面に複数の電極を有する半導体チップ、絶縁性の封止体の周面から複数のリードを突出させる半導体装置及び絶縁性の封止体の両端にそれぞれ電極を有するチップ部品のうちのいずれか一つであることを特徴とする請求項１に記載の半導体装置。 The first electronic component includes a semiconductor chip having a plurality of electrodes on a first surface, a semiconductor device in which a plurality of leads protrude from the peripheral surface of the insulating sealing body, and both ends of the insulating sealing body, respectively. The semiconductor device according to claim 1, wherein the semiconductor device is any one of chip parts having electrodes. 前記第２の電子部品は、第１の面に複数の電極を有する半導体チップ及び絶縁性の封止体の両端にそれぞれ電極を有するチップ部品のうちのいずれか一つであることを特徴とする請求項１に記載の半導体装置。 The second electronic component is any one of a semiconductor chip having a plurality of electrodes on a first surface and a chip component having electrodes at both ends of an insulating sealing body. The semiconductor device according to claim 1. 前記第２の電子部品は前記第１の電子部品に絶縁性の接合材を介して固定されていることを特徴とする請求項１に記載の半導体装置。 The semiconductor device according to claim 1, wherein the second electronic component is fixed to the first electronic component via an insulating bonding material. 前記第１の電子部品は前記第１の樹脂体の前記第１の面に露出することなく前記第１の樹脂体内に埋没していることを特徴とする請求項１に記載の半導体装置。 2. The semiconductor device according to claim 1, wherein the first electronic component is buried in the first resin body without being exposed on the first surface of the first resin body. 前記第１の電子部品は前記第１の樹脂体の前記第１の面に露出することなく前記第１の樹脂体内に埋没し、前記第２の電子部品は前記第１の樹脂体の前記第１の面に接合材を介して固定されていることを特徴とする請求項１に記載の半導体装置。 The first electronic component is buried in the first resin body without being exposed on the first surface of the first resin body, and the second electronic component is embedded in the first resin body. The semiconductor device according to claim 1, wherein the semiconductor device is fixed to the surface of 1 through a bonding material. 前記第１の樹脂体及び前記第２の樹脂体は同じ材質の絶縁性樹脂で形成されていることを特徴とする請求項１に記載の半導体装置。 The semiconductor device according to claim 1, wherein the first resin body and the second resin body are formed of an insulating resin of the same material. 前記第１の接続手段及び前記第２の接続手段が接続される前記リードの表面には金属メッキ膜が形成され、前記外部電極端子が形成される前記リードの表面には金属メッキ膜が形成されていることを特徴とする請求項１に記載の半導体装置。 A metal plating film is formed on the surface of the lead to which the first connection means and the second connection means are connected, and a metal plating film is formed on the surface of the lead on which the external electrode terminal is formed. The semiconductor device according to claim 1, wherein: 前記リードの厚さは７５〜１００μｍ、前記第１の樹脂体の厚さは２５０〜３００μｍ、前記第２の樹脂体の厚さは３００〜４００μｍであることを特徴とする請求項１に記載の半導体装置。 The thickness of the lead is 75 to 100 µm, the thickness of the first resin body is 250 to 300 µm, and the thickness of the second resin body is 300 to 400 µm. Semiconductor device. 第１の面及びこの第１の面の反対面となる第２の面を有する絶縁性樹脂で形成される四角形状の第１の樹脂体と、
第１の面及びこの第１の面の反対面となる第２の面を有し前記第２の面が前記第１の樹脂体の前記第１の面に一致して重ねられて一体となる絶縁性樹脂で形成される四角形状の第２の樹脂体と、
前記第１の樹脂体内に階段状に一段折れ曲がるように延在して位置し、先端部が前記第１の樹脂体の前記四角形状の内側に位置するとともに前記第１の樹脂体の前記第２の面に第２の面が露出し、他端部が前記第１の樹脂体の周面に位置するとともに前記第１の樹脂体の前記第１の面に第１の面が露出する複数の導電性のリードと、
前記第１の樹脂体内であって前記各リードの前記先端部に囲まれる領域に設けられるタブと、
前記第１の樹脂体内に階段状に一段折れ曲がるように延在して位置し、一端部が前記タブの周縁に連なり、他端部が前記第１の樹脂体の周面に位置しかつ前記第１の樹脂体の前記第１の面に第１の面が露出する複数のタブ吊りリードと、
前記第１の樹脂体内に位置し、複数の電極を有し、前記各電極が所定の前記リードに第１の接続手段を介して電気的に接続される少なくとも一つの第１の電子部品と、
前記第２の樹脂体内に位置し、複数の電極を有し、前記各電極が前記第１の樹脂体の前記第１の面に露出する所定の前記リード部分に第２の接続手段を介して電気的に接続される少なくとも一つの第２の電子部品と、
前記第１の樹脂体の前記第２の面に露出する前記リード部分に形成された外部電極端子と、を有し、
前記第１の電子部品の少なくとも一つは第１の面に複数の電極を有する半導体チップからなり、前記半導体チップは前記第１の面の反対面となる第２の面が前記タブの前記第１の面に固定され、前記半導体チップの前記電極は前記第１の接続手段としての導電性のワイヤによって所定の前記リードに接続されていることを特徴とする半導体装置。 A rectangular first resin body formed of an insulating resin having a first surface and a second surface opposite to the first surface;
It has a first surface and a second surface opposite to the first surface, and the second surface coincides with and overlaps with the first surface of the first resin body. A quadrangular second resin body formed of an insulating resin;
The first resin body is positioned so as to be bent in a stepped manner in the first resin body, the distal end portion is located inside the square shape of the first resin body, and the second of the first resin body. The second surface is exposed on the first surface, the other end is positioned on the peripheral surface of the first resin body, and the first surface is exposed on the first surface of the first resin body. Conductive leads,
A tab provided in a region surrounded by the tip of each lead in the first resin body;
The first resin body is positioned so as to be bent in a stepped manner, one end portion is connected to the peripheral edge of the tab, the other end portion is positioned on the peripheral surface of the first resin body, and the first resin body is bent. A plurality of tab suspension leads whose first surface is exposed on the first surface of one resin body;
At least one first electronic component located in the first resin body, having a plurality of electrodes, each electrode being electrically connected to a predetermined lead via a first connecting means;
It has a plurality of electrodes located in the second resin body, and each electrode is exposed to the first surface of the first resin body via a second connecting means. At least one second electronic component electrically connected;
An external electrode terminal formed on the lead portion exposed on the second surface of the first resin body,
At least one of the first electronic components comprises a semiconductor chip having a plurality of electrodes on a first surface, and the semiconductor chip has a second surface opposite to the first surface, the second surface of the tab being the first surface. The semiconductor device is fixed to one surface, and the electrode of the semiconductor chip is connected to the predetermined lead by a conductive wire as the first connecting means. （ａ）第１の面及びこの第１の面の反対面となる第２の面を有し、かつ前記第１の面に製品形成部をマトリックス状に複数配置した金属からなるリードフレームであり、前記製品形成部は、四角形枠からなる平坦な枠と、前記枠の内側から突出し先端部分を前記枠の内側に突出する複数のリードとからなり、前記突出する各リードは途中から前記第１の面から前記第２の面に向かって階段状に一段低く折れ曲がる構造となるリードフレームを準備する工程、
（ｂ）複数の電極を有する少なくとも一つの第１の電子部品を前記リードに固定する工程、
（ｃ）前記リードフレームの前記枠の第１の面から前記リードの先端部分の前記第２の面に至る厚さ部分を絶縁性の樹脂で被って第１の樹脂体を形成するとともに、前記第１の樹脂体の第１の面に前記枠及び枠に連なる前記リード部分を露出させ、前記第２の樹脂体の第２の面に前記リードの先端部分を露出させる工程、
（ｄ）前記各製品形成部において、複数の電極を有する少なくとも一つの第２の電子部品を前記リード部分または前記第１の樹脂体に固定するとともに、前記各電極を前記第１の樹脂体の前記第１の面に露出する前記リード部分に電気的に接続する工程、
（ｅ）前記リードフレームの前記第１の面に絶縁性の樹脂からなる第２の樹脂体を一定厚さ形成して前記各製品形成部の前記第２の電子部品を被う工程、
（ｆ）前記第１の樹脂体の前記第２の面に露出する前記リード表面に外部電極端子を形成する工程、
（ｇ）前記リードフレーム、前記第１の樹脂体及び前記第２の樹脂体を前記各製品形成部が分離されるように縦横に切断する工程、とを有し、
前記工程（ｂ）では、前記第１の電子部品の前記各電極を導電性の接合材を介して所定の前記リードの先端部分の前記第１の面に接続し、
前記工程（ｄ）では、
前記第２の電子部品が第１の面に複数の電極を有する半導体チップの場合は、前記半導体チップの前記第１の面の反対面となる第２の面を前記第１の樹脂体の第１の面に絶縁性の接合材を介して固定し、かつ前記各電極と前記リード部分を導電性のワイヤによって接続し、
前記第２の電子部品が絶縁性の封止体の両端にそれぞれ電極を有するチップ部品の場合は、前記チップ部品の前記各電極を導電性の接合材を介して前記リード部分に接続することを特徴とする半導体装置の製造方法。 (A) A lead frame made of metal having a first surface and a second surface opposite to the first surface, and a plurality of product forming portions arranged in a matrix on the first surface. The product forming portion includes a flat frame made of a quadrangular frame and a plurality of leads protruding from the inside of the frame and projecting a tip end portion to the inside of the frame. A step of preparing a lead frame having a structure that is bent stepwise downward from the surface toward the second surface in a stepwise manner;
(B) fixing at least one first electronic component having a plurality of electrodes to the leads;
(C) forming a first resin body by covering a thickness portion from the first surface of the frame of the lead frame to the second surface of the leading end portion of the lead with an insulating resin; Exposing the frame and the lead portion connected to the frame to the first surface of the first resin body, and exposing the leading end portion of the lead to the second surface of the second resin body;
(D) In each of the product forming portions, at least one second electronic component having a plurality of electrodes is fixed to the lead portion or the first resin body, and each electrode is fixed to the first resin body. Electrically connecting to the lead portion exposed on the first surface;
(E) forming a second resin body made of an insulating resin on the first surface of the lead frame to a certain thickness and covering the second electronic component of each product forming portion;
(F) forming an external electrode terminal on the lead surface exposed on the second surface of the first resin body;
(G) cutting the lead frame, the first resin body, and the second resin body vertically and horizontally so that the product forming portions are separated, and
In the step (b), each electrode of the first electronic component is connected to the first surface of the tip portion of the predetermined lead via a conductive bonding material,
In the step (d),
When the second electronic component is a semiconductor chip having a plurality of electrodes on the first surface, the second surface of the semiconductor chip opposite to the first surface is the second surface of the first resin body. Fixed to one surface via an insulating bonding material, and each electrode and the lead portion are connected by a conductive wire;
When the second electronic component is a chip component having electrodes at both ends of the insulating sealing body, the electrodes of the chip component are connected to the lead portion via a conductive bonding material. A method of manufacturing a semiconductor device. 前記工程（ｂ）では、前記枠の第１の面から前記リードの低くなった前記先端部分の前記第１の面に至る厚さよりも薄い前記第１の電子部品を前記リードに固定して前記第１の電子部品を前記第１の樹脂体内に埋没させることを特徴とする請求項１６に記載の半導体装置の製造方法。 In the step (b), the first electronic component thinner than the thickness from the first surface of the frame to the first surface of the lower end portion of the lead is fixed to the lead. The method of manufacturing a semiconductor device according to claim 16, wherein the first electronic component is buried in the first resin body. 前記工程（ｂ）では、前記第１の電子部品として前記第１の樹脂体の前記第１の面に露出するような厚さのものを前記リードに固定し、
前記工程（ｄ）では、前記第２の電子部品を絶縁性の接合材を介して前記第１の電子部品に重ねて固定することを特徴とする請求項１６に記載の半導体装置の製造方法。 In the step (b), the first electronic component having a thickness that is exposed on the first surface of the first resin body is fixed to the lead,
The method of manufacturing a semiconductor device according to claim 16, wherein in the step (d), the second electronic component is overlapped and fixed to the first electronic component through an insulating bonding material. 前記工程（ｃ）及び前記工程（ｆ）では、同じ材質の絶縁性樹脂を使用して、前記第１の樹脂体及び前記第２の樹脂体を形成することを特徴とする請求項１６に記載の半導体装置の製造方法。 The said 1st resin body and the said 2nd resin body are formed using the insulating resin of the same material in the said process (c) and the said process (f), It is characterized by the above-mentioned. Semiconductor device manufacturing method. 前記工程（ａ）では、前記リードの厚さが７５〜１００μｍになる前記リードフレームを準備し、
前記工程（ｃ）では、前記第１の樹脂体の厚さを２５０〜３００μｍに形成し、
前記工程（ｅ）では、前記第２の樹脂体の厚さを３００〜４００μｍに形成することを特徴とする請求項１６に記載の半導体装置の製造方法。 In the step (a), the lead frame having a thickness of 75 to 100 μm is prepared,
In the step (c), the first resin body is formed to a thickness of 250 to 300 μm,
The method of manufacturing a semiconductor device according to claim 16, wherein in the step (e), the thickness of the second resin body is formed to be 300 to 400 μm. （ａ）第１の面及びこの第１の面の反対面となる第２の面を有し、かつ前記第１の面に製品形成部をマトリックス状に複数配置した金属からなるリードフレームであり、前記製品形成部は、四角形枠からなる平坦な枠と、前記枠の内側から突出し先端部分を前記枠の内側に突出する複数のリードとからなり、前記突出する各リードは途中から前記第１の面から前記第２の面に向かって階段状に一段低く折れ曲がる構造となるリードフレームを準備する工程、
（ｂ）複数の電極を有する少なくとも一つの第１の電子部品を前記リードに固定する工程、
（ｃ）前記リードフレームの前記枠の第１の面から前記リードの先端部分の前記第２の面に至る厚さ部分を絶縁性の樹脂で被って第１の樹脂体を形成するとともに、前記第１の樹脂体の第１の面に前記枠及び枠に連なる前記リード部分を露出させ、前記第２の樹脂体の第２の面に前記リードの先端部分を露出させる工程、
（ｄ）前記各製品形成部において、複数の電極を有する少なくとも一つの第２の電子部品を前記リードに固定する工程、
（ｅ）前記リードフレームの前記第１の面に絶縁性の樹脂からなる第２の樹脂体を一定厚さ形成して前記各製品形成部の前記第２の電子部品を被う工程、
（ｆ）前記第１の樹脂体の前記第２の面に露出する前記リード表面に外部電極端子を形成する工程、
（ｇ）前記リードフレーム、前記第１の樹脂体層及び前記第２の樹脂体を前記各製品形成部が分離されるように縦横に切断する工程、とを有し、
前記工程（ｂ）では、前記第１の電子部品の前記各電極を導電性の接合材を介して所定の前記リードの先端部分の前記第１の面に接続し、
前記工程（ｄ）では、前記第２の電子部品の前記各電極を導電性の接合材を介して前記第１の樹脂体の前記第１の面に露出する所定の前記リード部分に接続することを特徴とする半導体装置の製造方法。 (A) A lead frame made of metal having a first surface and a second surface opposite to the first surface, and a plurality of product forming portions arranged in a matrix on the first surface. The product forming portion includes a flat frame made of a quadrangular frame and a plurality of leads protruding from the inside of the frame and projecting a tip end portion to the inside of the frame. A step of preparing a lead frame having a structure that is bent stepwise downward from the surface toward the second surface in a stepwise manner;
(B) fixing at least one first electronic component having a plurality of electrodes to the leads;
(C) forming a first resin body by covering a thickness portion from the first surface of the frame of the lead frame to the second surface of the leading end portion of the lead with an insulating resin; Exposing the frame and the lead portion connected to the frame to the first surface of the first resin body, and exposing the leading end portion of the lead to the second surface of the second resin body;
(D) a step of fixing at least one second electronic component having a plurality of electrodes to the leads in each of the product forming portions;
(E) forming a second resin body made of an insulating resin on the first surface of the lead frame to a certain thickness and covering the second electronic component of each product forming portion;
(F) forming an external electrode terminal on the lead surface exposed on the second surface of the first resin body;
(G) cutting the lead frame, the first resin body layer, and the second resin body vertically and horizontally so that the respective product forming portions are separated, and
In the step (b), each electrode of the first electronic component is connected to the first surface of the tip portion of the predetermined lead via a conductive bonding material,
In the step (d), each electrode of the second electronic component is connected to a predetermined lead portion exposed on the first surface of the first resin body through a conductive bonding material. A method of manufacturing a semiconductor device. 前記工程（ｂ）では、前記枠の第１の面から前記リードの低くなった前記先端部分の前記第１の面に至る厚さよりも薄い前記第１の電子部品を前記リードに固定して前記第１の電子部品を前記第１の樹脂体内に埋没させることを特徴とする請求項２１に記載の半導体装置の製造方法。 In the step (b), the first electronic component thinner than the thickness from the first surface of the frame to the first surface of the lower end portion of the lead is fixed to the lead. The method of manufacturing a semiconductor device according to claim 21, wherein the first electronic component is buried in the first resin body. 前記工程（ｃ）及び前記工程（ｅ）では、同じ材質の絶縁性樹脂を使用して、前記第１の樹脂体及び前記第２の樹脂体を形成することを特徴とする請求項２１に記載の半導体装置の製造方法。 The said 1st resin body and the said 2nd resin body are formed using the insulating resin of the same material in the said process (c) and the said process (e), It is characterized by the above-mentioned. Manufacturing method of the semiconductor device. 前記工程（ａ）では、前記リードの厚さが７５〜１００μｍになる前記リードフレームを準備し、
前記工程（ｃ）では、前記第１の樹脂体の厚さを２５０〜３００μｍに形成し、
前記工程（ｅ）では、前記第２の樹脂体の厚さを３００〜４００μｍに形成することを特徴とする請求項２１に記載の半導体装置の製造方法。 In the step (a), the lead frame having a thickness of 75 to 100 μm is prepared,
In the step (c), the first resin body is formed to a thickness of 250 to 300 μm,
The method of manufacturing a semiconductor device according to claim 21, wherein in the step (e), the second resin body is formed to a thickness of 300 to 400 µm. （ａ）第１の面及びこの第１の面の反対面となる第２の面を有し、かつ前記第１の面に製品形成部をマトリックス状に複数配置した金属からなるリードフレームであり、前記製品形成部は、四角形枠からなる平坦な枠と、前記枠の内側から突出し先端部分を前記枠の内側に突出する複数のリードと、前記各リードの前記先端部分に囲まれる領域に位置するタブと、前記タブを支持する前記枠から延在する複数のタブ吊りリードとからなり、前記突出する各リードは途中から前記第１の面から前記第２の面に向かって階段状に一段低く折れ曲がる構造となり、前記タブ吊りリードは途中から前記第１の面から前記第２の面に向かって階段状に一段低く折れ曲がり一端部で前記タブを支持する構造となるリードフレームを準備する工程、
（ｂ）複数の電極を有する少なくとも一つの第１の電子部品を前記リードに固定する工程、
（ｃ）前記リードフレームの前記枠の第１の面から前記リードの先端部分の前記第２の面に至る厚さ部分を絶縁性の樹脂で被って第１の樹脂体を形成するとともに、前記第１の樹脂体の第１の面に前記枠及び枠に連なる前記リード部分を露出させ、前記第２の樹脂体の第２の面に前記リードの先端部分を露出させる工程、
（ｄ）前記各製品形成部において、複数の電極を有する少なくとも一つの第２の電子部品を前記リード部分または前記第１の樹脂体に固定するとともに、前記各電極を前記第１の樹脂体の前記第１の面に露出する前記リード部分に電気的に接続する工程、
（ｅ）前記リードフレームの前記第１の面に絶縁性の樹脂からなる第２の樹脂体を一定厚さ形成して前記各製品形成部の前記第２の電子部品を被う工程、
（ｆ）前記第１の樹脂体の前記第２の面に露出する前記リード表面に外部電極端子を形成する工程、
（ｇ）前記リードフレーム、前記第１の樹脂体及び前記第２の樹脂体を前記各製品形成部が分離されるように縦横に切断する工程、とを有し、
前記工程（ｂ）では、
前記第１の電子部品として少なくとも前記タブに固定される第１の面に複数の電極を有する半導体チップを準備し、前記半導体チップの前記第１の面の反対面となる第２の面を前記タブの前記第１の面に固定し、前記半導体チップの前記電極と所定の前記リードを導電性のワイヤによって接続し、
前記半導体チップ以外の前記第１の電子部品にあっては、前記各電極を導電性の接合材を介して所定の前記リードの先端部分の前記第１の面に接続させ、
前記工程（ｄ）では、
前記第２の電子部品が第１の面に複数の電極を有する半導体チップの場合は、前記半導体チップの前記第１の面の反対面となる第２の面を前記第１の樹脂体の第１の面に絶縁性の接合材を介して固定し、かつ前記各電極と前記リード部分を導電性のワイヤによって接続し、
前記第２の電子部品が絶縁性の封止体の両端にそれぞれ電極を有するチップ部品の場合は、前記チップ部品の前記各電極を導電性の接合材を介して前記リード部分に接続することを特徴とする半導体装置の製造方法。 (A) A lead frame made of metal having a first surface and a second surface opposite to the first surface, and a plurality of product forming portions arranged in a matrix on the first surface. The product forming portion is positioned in a region surrounded by a flat frame made of a quadrangular frame, a plurality of leads protruding from the inside of the frame and protruding a tip portion to the inside of the frame, and the tip portion of each lead And a plurality of tab suspension leads extending from the frame supporting the tab, and each protruding lead is stepped in a stepped manner from the first surface to the second surface in the middle. A step of preparing a lead frame that has a structure that bends low, the tab suspension lead is bent stepwise from the first surface toward the second surface from the middle, and has a structure that supports the tab at one end;
(B) fixing at least one first electronic component having a plurality of electrodes to the leads;
(C) forming a first resin body by covering a thickness portion from the first surface of the frame of the lead frame to the second surface of the leading end portion of the lead with an insulating resin; Exposing the frame and the lead portion connected to the frame to the first surface of the first resin body, and exposing the leading end portion of the lead to the second surface of the second resin body;
(D) In each of the product forming portions, at least one second electronic component having a plurality of electrodes is fixed to the lead portion or the first resin body, and each electrode is fixed to the first resin body. Electrically connecting to the lead portion exposed on the first surface;
(E) forming a second resin body made of an insulating resin on the first surface of the lead frame to a certain thickness and covering the second electronic component of each product forming portion;
(F) forming an external electrode terminal on the lead surface exposed on the second surface of the first resin body;
(G) cutting the lead frame, the first resin body, and the second resin body vertically and horizontally so that the product forming portions are separated, and
In the step (b),
A semiconductor chip having a plurality of electrodes on a first surface fixed to at least the tab as the first electronic component is prepared, and a second surface opposite to the first surface of the semiconductor chip is defined as the first surface. Fixing to the first surface of the tab, connecting the electrode of the semiconductor chip and the predetermined lead by a conductive wire,
In the first electronic component other than the semiconductor chip, each electrode is connected to the first surface of the tip portion of the predetermined lead via a conductive bonding material,
In the step (d),
When the second electronic component is a semiconductor chip having a plurality of electrodes on the first surface, the second surface of the semiconductor chip opposite to the first surface is the second surface of the first resin body. Fixed to one surface via an insulating bonding material, and each electrode and the lead portion are connected by a conductive wire;
When the second electronic component is a chip component having electrodes at both ends of the insulating sealing body, the electrodes of the chip component are connected to the lead portion via a conductive bonding material. A method of manufacturing a semiconductor device. 前記工程（ｂ）では前記枠の第１の面から前記タブの第１の面に至る厚さよりも薄い前記半導体チップを前記タブに固定し、前記ワイヤの高さを低くして前記半導体チップ及び前記ワイヤを前記第１の樹脂体内に埋没させることを特徴とする請求項２５に記載の半導体装置の製造方法。 In the step (b), the semiconductor chip thinner than the thickness from the first surface of the frame to the first surface of the tab is fixed to the tab, and the height of the wire is reduced to reduce the semiconductor chip and 26. The method of manufacturing a semiconductor device according to claim 25, wherein the wire is buried in the first resin body. 前記工程（ｃ）及び前記工程（ｅ）では、同じ材質の絶縁性樹脂を使用して、前記第１の樹脂体及び前記第２の樹脂体を形成することを特徴とする請求項２５に記載の半導体装置の製造方法。 The said 1st resin body and the said 2nd resin body are formed using the insulating resin of the same material in the said process (c) and the said process (e), It is characterized by the above-mentioned. Manufacturing method of the semiconductor device. 前記工程（ａ）では、前記リードの厚さが７５〜１００μｍになる前記リードフレームを準備し、
前記工程（ｃ）では、前記第１の樹脂体の厚さを２５０〜３００μｍに形成し、
前記工程（ｅ）では、前記第２の樹脂体の厚さを３００〜４００μｍに形成することを特徴とする請求項２５に記載の半導体装置の製造方法。 In the step (a), the lead frame having a thickness of 75 to 100 μm is prepared,
In the step (c), the first resin body is formed to a thickness of 250 to 300 μm,
26. The method of manufacturing a semiconductor device according to claim 25, wherein in the step (e), the thickness of the second resin body is formed to 300 to 400 [mu] m. （ａ）第１の面及びこの第１の面の反対面となる第２の面を有し、かつ前記第１の面に製品形成部をマトリックス状に複数配置した金属からなるリードフレームであり、前記製品形成部は、四角形枠からなる平坦な枠と、前記枠の内側から突出し先端部分を前記枠の内側に突出する複数のリードと、前記各リードの前記先端部分に囲まれる領域に位置するタブと、前記タブを支持する前記枠から延在する複数のタブ吊りリードとからなり、前記突出する各リードは途中から前記第１の面から前記第２の面に向かって階段状に一段低く折れ曲がる構造となり、前記タブ吊りリードは途中から前記第１の面から前記第２の面に向かって階段状に一段低く折れ曲がり一端部で前記タブを支持するリードフレームを準備する工程、
（ｂ）複数の電極を有する少なくとも一つの第１の電子部品を前記リードに固定する工程、
（ｃ）前記リードフレームの前記枠の第１の面から前記リードの先端部分の前記第２の面に至る厚さ部分を絶縁性の樹脂で被って第１の樹脂体を形成するとともに、前記第１の樹脂体の第１の面に前記枠及び枠に連なる前記リード部分を露出させ、前記第２の樹脂体の第２の面に前記リードの先端部分を露出させる工程、
（ｄ）前記各製品形成部において、複数の電極を有する少なくとも一つの第２の電子部品を前記リードに固定する工程、
（ｅ）前記リードフレームの前記第１の面に絶縁性の樹脂からなる第２の樹脂体を一定厚さ形成して前記各製品形成部の前記第２の電子部品を被う工程、
（ｆ）前記第１の樹脂体の前記第２の面に露出する前記リード表面に外部電極端子を形成する工程、
（ｇ）前記リードフレーム、前記第１の樹脂体及び前記第２の樹脂体を前記各製品形成部が分離されるように縦横に切断する工程、とを有し、
前記工程（ｂ）では、
前記第１の電子部品として少なくとも前記タブに固定される第１の面に複数の電極を有する半導体チップを準備し、前記半導体チップの前記第１の面の反対面となる第２の面を前記タブの前記第１の面に固定し、前記半導体チップの前記電極と所定の前記リードを導電性のワイヤによって接続し、
前記半導体チップ以外の前記第１の電子部品にあっては、前記各電極を導電性の接合材を介して所定の前記リードの先端部分の前記第１の面に接続させ、
前記工程（ｄ）では、前記第２の電子部品の前記各電極を導電性の接合材を介して前記第１の樹脂体の前記第１の面に露出する所定の前記リード部分に接続することを特徴とする半導体装置の製造方法。 (A) A lead frame made of metal having a first surface and a second surface opposite to the first surface, and a plurality of product forming portions arranged in a matrix on the first surface. The product forming portion is positioned in a region surrounded by a flat frame made of a quadrangular frame, a plurality of leads protruding from the inside of the frame and protruding a tip portion to the inside of the frame, and the tip portion of each lead And a plurality of tab suspension leads extending from the frame supporting the tab, and each protruding lead is stepped in a stepped manner from the first surface to the second surface in the middle. A step of bending the tab, and the tab suspension lead is bent stepwise from the first surface toward the second surface from the middle to prepare a lead frame that supports the tab at one end;
(B) fixing at least one first electronic component having a plurality of electrodes to the leads;
(C) forming a first resin body by covering a thickness portion from the first surface of the frame of the lead frame to the second surface of the leading end portion of the lead with an insulating resin; Exposing the frame and the lead portion connected to the frame to the first surface of the first resin body, and exposing the leading end portion of the lead to the second surface of the second resin body;
(D) a step of fixing at least one second electronic component having a plurality of electrodes to the leads in each of the product forming portions;
(E) forming a second resin body made of an insulating resin on the first surface of the lead frame to a certain thickness and covering the second electronic component of each product forming portion;
(F) forming an external electrode terminal on the lead surface exposed on the second surface of the first resin body;
(G) cutting the lead frame, the first resin body, and the second resin body vertically and horizontally so that the product forming portions are separated, and
In the step (b),
A semiconductor chip having a plurality of electrodes on a first surface fixed to at least the tab as the first electronic component is prepared, and a second surface opposite to the first surface of the semiconductor chip is defined as the first surface. Fixing to the first surface of the tab, connecting the electrode of the semiconductor chip and the predetermined lead by a conductive wire,
In the first electronic component other than the semiconductor chip, each electrode is connected to the first surface of the tip portion of the predetermined lead via a conductive bonding material,
In the step (d), each electrode of the second electronic component is connected to a predetermined lead portion exposed on the first surface of the first resin body through a conductive bonding material. A method of manufacturing a semiconductor device. 前記工程（ｂ）では前記枠の第１の面から前記タブの第１の面に至る厚さよりも薄い前記半導体チップを前記タブに固定し、前記ワイヤの高さを低くして前記半導体チップ及び前記ワイヤを前記第１の樹脂体内に埋没させることを特徴とする請求項２９に記載の半導体装置の製造方法。 In the step (b), the semiconductor chip thinner than the thickness from the first surface of the frame to the first surface of the tab is fixed to the tab, and the height of the wire is reduced to reduce the semiconductor chip and 30. The method of manufacturing a semiconductor device according to claim 29, wherein the wire is buried in the first resin body. 前記工程（ｃ）及び前記工程（ｅ）では、同じ材質の絶縁性樹脂を使用して、前記第１の樹脂体及び前記第２の樹脂体を形成することを特徴とする請求項２９に記載の半導体装置の製造方法。 The said 1st resin body and the said 2nd resin body are formed using the insulating resin of the same material in the said process (c) and the said process (e), It is characterized by the above-mentioned. Manufacturing method of the semiconductor device. 前記工程（ａ）では、前記リードの厚さが７５〜１００μｍになる前記リードフレームを準備し、
前記工程（ｃ）では、前記第１の樹脂体の厚さを２５０〜３００μｍに形成し、
前記工程（ｅ）では、前記第２の樹脂体の厚さを３００〜４００μｍに形成することを特徴とする請求項２９に記載の半導体装置の製造方法。 In the step (a), the lead frame having a thickness of 75 to 100 μm is prepared,
In the step (c), the first resin body is formed to a thickness of 250 to 300 μm,
30. The method of manufacturing a semiconductor device according to claim 29, wherein in the step (e), the thickness of the second resin body is formed to 300 to 400 [mu] m.
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JP2010073893A (en) * 2008-09-18 2010-04-02 Shinko Electric Ind Co Ltd Semiconductor device and production process thereof
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