JP2008085111A - Wiring board and manufacturing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board capable of suppressing warpage and swell that occur due to heat history even if the wiring board has a thin core substrate. <P>SOLUTION: The build-up wiring board comprises: a core substrate 24 having a first via 23 that is filled with a conductive paste 22 for making interlayer connection in via holes that are formed on an insulating layer 21; and a build-up layer 26 that is formed on at least one surface of the core substrate 24 and that is formed with a second via 25 for making interlayer connection. The core substrate 24 is constituted of a resin composite insulating material containing a core material made of an organic fiber or an inorganic fiber, and has a thickness of 200 μm or less. The build-up layer 26 has a thickness equal to or larger than a minimum thickness that assures interlayer insulation, and is constituted of a film-shaped resin insulating material. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a multilayer wiring board widely used in various electronic devices such as personal computers, mobile communication telephones, and video cameras, and a method for manufacturing the same.

  Recently, personal computers, digital cameras, mobile phones, etc. have become popular as mobile products, and there is a strong demand for miniaturization, thinness, lightness, high definition, multi-functionality, etc. There is a demand for thinner layers and smaller via diameters.

  A conventional method for manufacturing a multilayer printed wiring board will be described below. First, in a state where the resin composition layer of the adhesive film is directly covered on at least the pattern processed part on one side or both sides on the core substrate on which the circuit pattern is formed, a vacuum condition is used using a commercially available vacuum laminating machine. Then, heat and pressurize and laminate. When the protective film is present on the adhesive film, the protective film is removed, and then the resin composition layer is bonded under pressure and heat from the support base film side under vacuum conditions. By laminating under the condition that the resin flow during lamination is equal to or greater than the conductor thickness of the inner layer circuit, the inner layer circuit pattern is satisfactorily covered.

  Next, the resin composition is thermoset. Thereafter, drilling is performed with a laser and / or a drill. The hole can be formed in a predetermined position by a known and conventional method using a commercially available laser driller such as carbon dioxide, UV-YAG, excimer and / or a drill puncher. Since the adhesive film has a release layer on the support base film, the adhesive film can be easily peeled off after thermosetting of the thermosetting resin composition.

  Thereafter, the surface of the resin composition is roughened, and then a conductor layer is formed thereon by plating. After forming uneven anchors on the surface of the resin composition in this manner, a conductor layer is formed by plating such as electroless or electrolytic plating. Thereafter, a circuit is formed according to a known and commonly used subtractive method or semi-additive method.

For example, Patent Documents 1 and 2 are known as prior art document information related to the application of the present invention.
JP 2001-196743 A Japanese Patent No. 378549

  If the core substrate has thickness and rigidity, even if there is a difference in thermal expansion coefficient between the core substrate and the build-up layer, it is possible to suppress the occurrence of internal stress that causes the warp and undulation of the core substrate. When the core substrate is thin, especially when the thickness is 200 μm or less, the conventional manufacturing method, particularly in the semi-curing process of the build-up layer, causes the core substrate and the build-up layer to greatly warp. It has become difficult to maintain the flat shape of the substrate because the internal stress that causes undulation cannot be suppressed. Therefore, it has been difficult to form a buildup multilayer substrate in which a buildup layer is formed using a thin core substrate. The present invention has been made in view of the above problems, and maintains the flat shape of a substrate satisfactorily by suppressing internal stress generated when the buildup layer is semi-cured.

  In order to achieve the above object, the present invention provides a core substrate having a first via in which via holes are formed in an insulating layer and a conductive paste for interlayer connection is filled in these via holes, A build-up wiring board having a build-up layer formed on at least one surface and having a second via for interlayer connection, wherein the core substrate includes a core material made of organic fiber or inorganic fiber Wiring made of a composite insulating material and having a thickness of 200 μm or less, the build-up layer having a minimum thickness that can ensure interlayer insulation, and a film-like resin insulating material In the step of semi-curing the build-up layer of the substrate, a method of manufacturing a wiring board is used in which the build-up layer is cured while being heated under pressure. By adopting such a configuration, it is possible to suppress internal stress generated in the substrate and to obtain a wiring substrate in which warpage and undulation are suppressed.

  As described above, even when the core substrate is thin in the process of semi-curing the build-up layer, the present invention uses a manufacturing method in which warpage and undulation caused by insufficient rigidity of the core substrate are cured while being pressurized and heated. Warpage and undulation generated in the process of semi-curing the build-up layer can be suppressed, and a thin build-up wiring board with a core board thickness of 200 μm or less can be obtained.

(Embodiment 1)
Embodiment 1 of the present invention will be described below with reference to the drawings.

  1 and 2 are cross-sectional views of a wiring board according to Embodiment 1 of the present invention. As shown in FIGS. 1 and 2, in the wiring substrate of the present embodiment, via holes are formed in the insulating layer 21, and the first vias filled with the conductive paste 22 for interlayer connection are filled in these via holes. 23, and a build-up layer 26 formed on at least one surface of the core substrate 24 and having a second via 25 for interlayer connection. Furthermore, the core substrate 24 is made of a resin composite insulating material including a core material made of organic fibers or inorganic fibers, and has a thickness of 200 μm or less. The build-up layer 26 has a minimum thickness that can ensure interlayer insulation, that is, 20 μm or more, and is made of a film-like resin insulating material.

  In the present embodiment, the core substrate 24 is made of a resin composite insulating material including a core material. However, since the thickness is 200 μm or less, the warp and undulation generated by the heat history in the semi-curing process of the build-up layer is the core. It is difficult to suppress only by the rigidity of the substrate.

  In the present embodiment, the thermal expansion coefficient of the core substrate 24 is smaller than the thermal expansion coefficient of the buildup layer 26. Specifically, the thermal expansion coefficient of the core substrate 24 is 5 to 30 ppm / ° C. Therefore, it is difficult to suppress warpage and undulation caused by internal stress due to this only by the rigidity of the core substrate.

  Therefore, by using a method of semi-curing the build-up layer 26 while being heated under pressure as shown in FIG. 3 (e), the internal stress generated when the build-up layer is semi-cured is suppressed. The flat shape is maintained well.

  In the present embodiment, the shape of the second via 25 may be a conformal via as shown in FIG. 1 or a filled via as shown in FIG.

  As described above, the core substrate is a resin composite insulating material including a core material made of organic fibers or inorganic fibers, and the build-up layer has a thickness that is ensured to be more than the minimum thickness that can ensure interlayer insulation. Therefore, even when the core substrate is as thin as 200 μm or less, it is possible to obtain a wiring substrate capable of suppressing warpage and undulation.

  Hereinafter, a method of manufacturing a wiring board according to the present invention will be described with reference to the drawings.

  3 and 4 are process cross-sectional views showing a method for manufacturing a wiring board according to the present invention.

  First, a via hole 20 is formed in the insulating layer 21 (FIGS. 3 and 4 (a)), and the via hole 20 is filled with a conductive paste 22 to form a first via 23 (FIGS. 3 and 4 (b)). Next, the wiring pattern 27 is formed on the surface of the insulating layer 21 to form the core substrate 24 (FIGS. 3 and 4 (c)). The core substrate in the present embodiment is made of a resin composite insulating material including a core material made of organic fibers or inorganic fibers, and has a thickness of 200 μm or less.

  Thereafter, a buildup layer 26 made of a resin insulating material made of, for example, a film-like epoxy resin is laminated on at least one surface of the core substrate 24 by using a vacuum laminator and pressurizing and heating under vacuum conditions. (FIGS. 3 and 4 (d)). The thickness of the buildup layer 26 is required to be 20 μm or more, which is the minimum distance between conductors that ensures interlayer insulation, and is made of a film-like resin insulating material. Further, the thermal expansion coefficient of the core substrate 24 is smaller than that of the buildup layer 26, the thermal expansion coefficient of the core substrate is 5 to 30 ppm / ° C., and the thermal expansion coefficient of the buildup layer is 100 to 200 ppm. / ° C.

  Next, as a first curing step, the substrate 31 on which the build-up layer 26 is stacked is sandwiched between sheets 31 having a releasability made of fluororesin, and the sheet 31 is a rigid plate made of metal such as stainless steel. 28, the buildup layer 26 is semi-cured while being heated under pressure under conditions of a temperature of 90 to 170 ° C. and a pressure of 5.5 kg or less (FIGS. 3 and 4 (e)). The thermal expansion coefficient of the sheet 31 used in this step is a numerical value approximately equal to or higher than the thermal expansion coefficient of the core substrate 24 and smaller than the thermal expansion coefficient of the buildup layer 26, and is used in the present embodiment. The core substrate having a thermal expansion coefficient of 12 to 14 ppm / ° C. was used.

  In the present embodiment, by sandwiching the sheet 31, the difference in thermal expansion coefficient between the buildup layer 26 and the rigid plate 28 can be reduced, and as a result, the internal stress in the substrate can be reduced. . 3 and 4 (e), the pressure at the time of semi-curing is equal to or higher than the pressure capable of maintaining the flatness of the wiring board, and the roughened shape is uneven in the subsequent roughening steps. There is no pressure.

Here, reference will be made to “roughness unevenness”. This roughening treatment is a step performed after the laser via processing in the next step, and is performed on the surface of the buildup layer after semi-curing. There are two main purposes, which are to remove post-processing resin residues and carbides generated in the via after laser processing and to improve the adhesion between the plating film formed in the next process and the build-up layer. In particular, the roughening for improving the adhesion to the plating film causes a change in shape even under the roughening conditions, but the shape is likely to change depending on the laminating conditions and the semi-curing conditions of the build-up layer, particularly the pressure parameter. When the build-up layer used in the present embodiment is in a semi-cured state, the cured and uncured molecules are mixed at random, and the roughened shape is obtained by dissolving the uncured part in the roughening treatment step. Although it is formed, when pressure is applied simultaneously with heating in the laminating process or semi-curing process, resin molecules near the surface are crushed by the pressure, resulting in a change in the roughened shape. Therefore, the higher the pressure is, the more the resin molecules are crushed and the “roughness of the roughened shape” is likely to occur. If "roughness of the roughened shape" occurs, the adhesion to the plating film also becomes uneven, leading to variations in the conductor adhesion within the substrate surface, which may contribute to deterioration of the reliability of the substrate. Will be higher. By the way, if it is limited only to the formation of the rough shape, the lower the pressure, the more uniform and fine rough shape can be formed, and the most ideal rough shape can be formed without pressure. However, pressurization is indispensable in order to maintain the flat shape of the substrate as in the laminating process or the present invention, and it is necessary to apply a pressure that does not cause “unevenness of the roughened shape”. As a result of experimental verification, it has been found that in this embodiment, if the pressure is 5.5 kg / cm ² or less, “roughening of the roughened shape” does not occur.

  After the semi-curing process, the build-up layer 26 is formed with a second via 25 for interlayer connection with a laser such as carbon dioxide or UV (FIGS. 3 and 4 (f)), and the surface of the build-up layer 26 is formed. Then, the inner wall surface of the second via 25 is roughened (FIGS. 3 and 4 (g)). Thereafter, a metal layer 29 is formed on the surface of the build-up layer 26 by plating or the like (FIGS. 3 and 4 (h)), a wiring pattern 30 is further formed, and then a main curing is performed in a second curing step. Is completed (FIGS. 3, 4 (i)).

  In the present embodiment, the shape of the second via 25 may be formed by a conformal via as shown in FIG. 3 or a filled via as shown in FIG.

  As described above, according to the present embodiment, the build-up layer is cured while being heated and pressurized in the first curing step. Therefore, even when the core substrate is as thin as 200 μm or less, the warp caused by the thermal history is generated. It is possible to obtain a wiring board capable of suppressing waviness and undulation.

  Since the build-up multilayer printed wiring board according to the present invention can be formed with a thin total thickness, and the interlayer connection structure can obtain high interlayer connection reliability, higher reliability such as fine wiring patterns and semiconductor mounting can be obtained. It can be applied to applications related to mounting substrates such as semiconductor packages and small module parts that need to satisfy the standards.

Sectional drawing which shows the wiring board in embodiment of this invention Sectional drawing which shows the wiring board in embodiment of this invention Sectional drawing which shows the manufacturing method of the wiring board in embodiment of this invention Sectional drawing which shows the manufacturing method of the wiring board in embodiment of this invention

Explanation of symbols

20 Via hole 21 Insulating layer 22 Conductive paste 23 First via 24 Core substrate 25 Second via 26 Build-up layer 27, 30 Wiring pattern 28 Rigid plate 29 Metal layer 31 Sheet

Claims (8)

A core substrate having a first via formed in the insulating layer and filled with a conductive paste for interlayer connection in the via hole, and formed on at least one surface of the core substrate for interlayer connection A build-up wiring board having a build-up layer in which a second via is formed, wherein the core substrate is made of a resin composite insulating material including a core material made of organic fibers or inorganic fibers, and has a thickness of 200 μm or less. The build-up layer has a thickness of at least a minimum thickness that can ensure interlayer insulation, and is made of a film-like resin insulating material. The wiring board according to claim 1, wherein a thermal expansion coefficient of the core substrate is smaller than a thermal expansion coefficient of the buildup layer. Forming a via hole in the insulating layer; filling the via hole with a conductive paste to form a first via; forming a wiring pattern on the surface of the insulating layer to form a core substrate; A step of laminating a buildup layer on at least one surface of the core substrate, a step of semi-curing the buildup layer by a first curing step, a step of forming a second via in the buildup layer, and the buildup A step of roughening a layer surface and an inner wall surface of the second via, a step of forming a metal layer in the surface of the buildup layer and the second via, a step of patterning the metal layer, and the buildup layer A wiring board manufacturing method comprising: a main curing step according to a second curing step, wherein the first curing step cures the build-up layer while being pressurized and heated. Method of manufacturing the plate. The method for manufacturing a wiring board according to claim 3, wherein the first curing step is performed while being pressurized and heated through a sheet having releasability between the buildup layer and the rigid plate. The pressure in the first curing step is equal to or higher than a pressure capable of maintaining the flatness of the wiring board, and is suppressed to a pressure that does not cause unevenness in the roughened shape in the roughening step in the next step. Item 4. A method for manufacturing a wiring board according to Item 3. The method for manufacturing a wiring board according to claim 3, wherein the core board is formed by using a coefficient of thermal expansion smaller than that of the buildup layer. The method of manufacturing a wiring board according to claim 4, wherein the sheet having releasability has a thermal expansion coefficient equal to or greater than a thermal expansion coefficient of the core substrate and smaller than a thermal expansion coefficient of the buildup layer. The method for manufacturing a wiring board according to claim 4, wherein the sheet having releasability is made of a fluororesin.

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