JP2008078434A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device which forms an ohmic electrode contacting an SiC semiconductor layer and having low contact resistance. <P>SOLUTION: The method includes a step of forming a Ti layer contacting the SiC semiconductor layer; and a step of forming an Al layer on the Ti layer in a state where the temperatures of the SiC layer and the Ti layer are made higher than a first reference temperature (686°C) for causing reaction between Ti and Al to generate Al<SB>3</SB>Ti and lower than a second reference temperature (970°C) for causing reaction between the Al<SB>3</SB>Ti and SiC to generate Ti<SB>3</SB>SiC<SB>2</SB>. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a technique for forming an ohmic electrode having a low contact resistance with a SiC semiconductor layer on a SiC semiconductor layer.

  SiC semiconductors have many characteristics required for semiconductor devices that operate at high temperatures. Further, the SiC semiconductor has an excellent dielectric breakdown voltage. For this reason, in recent years, research and development of semiconductor devices using SiC semiconductor layers have been actively promoted. On the other hand, when a metal electrode in contact with the SiC semiconductor layer is formed, an energy barrier is generated at the interface. The height of the energy barrier is determined by the electron affinity and band gap energy width of the SiC semiconductor and the work function of the metal electrode material. Since the SiC semiconductor has a very wide band gap energy width, the energy barrier at the interface becomes high particularly when a metal electrode in contact with the p-type SiC semiconductor layer is formed. The higher the energy barrier at the interface between the SiC semiconductor layer and the metal electrode, the higher the contact resistance between them. Therefore, it is known that it is difficult to form an ohmic electrode having a low contact resistance with the SiC semiconductor layer in the SiC semiconductor layer.

In Non-Patent Document 1, a Ti film and an Al film are sequentially formed on the surface of the SiC semiconductor layer, or an alloy film of Ti and Al is formed, and as shown in FIG. A method of performing a heat treatment for about 2 minutes is described. By this method, a reaction layer of Ti and SiC (Ti ₃ SiC ₂ layer) is formed on the surface of the SiC semiconductor layer. This reaction layer makes ohmic contact with the SiC semiconductor layer. Therefore, an electrode with low contact resistance can be formed using the reaction layer.

Crofton (J.Crofton), 5 others, “Titanium and aluminum-titanium ohmic contacts to p-type SiC.”, Solid-State Electronics (UK), Elsevier Science Ltd., 1997, 41, p. 1725-1729

However, the reaction layer formed by the above-described manufacturing method includes various types of by-products because a plurality of types of metal films are formed on the surface of the SiC semiconductor layer and subjected to heat treatment at a high temperature of 1000 ° C. .
For example, when a Ti film and an Al film are sequentially formed on the surface of the SiC semiconductor layer and a heat treatment of about 1000 degrees is performed, the reaction layer does not become a uniform film made of only Ti ₃ SiC ₂ , and Al ₄ C ₃ And a film containing by-products such as Ti ₅ Si ₃ C _X and TiC.
When an electrode is formed using a film in which a by-product other than Ti ₃ SiC ₂ is present, contact resistance increases and an ohmic electrode with good characteristics cannot be formed.
Moreover, if the Ti ₃ SiC ₂ layer that realizes good contact resistance is also formed thick, the bulk resistance in the Ti ₃ SiC ₂ layer increases. For this reason, it is necessary to form the Ti ₃ SiC ₂ layer in contact with the SiC semiconductor layer as thinly and uniformly as possible.
The present invention has been devised to solve the above problems.

(Invention of Claim 1)
The present invention is used in a method for manufacturing a semiconductor device in which an ohmic electrode in contact with a SiC semiconductor layer is formed.
The method for manufacturing a semiconductor device of the present invention includes a first step of forming a Ti layer in contact with an SiC semiconductor layer, and a temperature at which the SiC semiconductor layer and the Ti layer are reacted with each other to produce Al ₃ Ti by reaction of Ti and Al. A second step of forming an Al layer on the Ti layer by raising the temperature to a temperature lower than a second reference temperature that is higher than the reference temperature and that the Al ₃ Ti and SiC react to produce Ti ₃ SiC ₂ Yes.
In the second step, as soon as Al is deposited on the Ti layer, Ti in the Ti layer reacts with Al to produce Al ₃ Ti in contact with the SiC semiconductor layer. In this case, the condensation heat E _C generated by Al is deposited on the Ti layer, by joining the heat of reaction E _R which is generated when the Ti and Al are reacted with Al 3 _Ti is generated The temperature at the interface between the SiC semiconductor layer and Al ₃ Ti rises above the second reference temperature. Thereby, SiC of the SiC semiconductor layer reacts with Al ₃ Ti to generate Ti ₃ SiC ₂ , thereby forming a Ti ₃ SiC ₂ layer in ohmic contact with the SiC semiconductor layer.

The inventors studied the relationship between the temperature of SiC, Ti, and Al and the reaction state between the substances. According to this, the temperature at which Ti in the Ti layer formed so as to be in contact with the SiC semiconductor layer and Al in the Al layer formed on the Ti layer react with each other and Al ₃ Ti starts to be generated (first reference temperature). Is about 686 ° C., which is higher than the melting temperature of Al (about 660 ° C.). Further, the temperature (second reference temperature) at which Ti ₃ SiC ₂ (reaction layer) starts to be generated by the reaction between the generated Al ₃ Ti and SiC of the SiC semiconductor layer is about 970 ° C.
If the substrate including the SiC semiconductor layer, the Ti layer, and the Al layer formed during this period is raised to a temperature at which a Ti ₃ SiC ₂ layer having a desired thickness can be formed as a result during the second step. Good.
When the substrate temperature is within the range between the first reference temperature and the second reference temperature, the condensation heat E _C alone does not increase the temperature above the second reference temperature, and the condensation heat E _C and the reaction heat E _R are not increased. Therefore, if the temperature at the interface between the SiC semiconductor layer and Al ₃ Ti is set to a temperature that rises to the second reference temperature or higher, the temperature at the interface between the SiC semiconductor layer and Al ₃ Ti will eventually become the second temperature. The temperature rises above the reference temperature, and a Ti ₃ SiC ₂ layer is formed. Since SiC in the SiC semiconductor layer can react only with the generated Al ₃ Ti, no by-product is generated. For this reason, an ohmic electrode having good characteristics can be formed.

When manufactured by this method, unreacted Ti does not exist at the interface between the SiC semiconductor layer and the electrode. Further, even if unreacted Ti exists, Ti alone and SiC do not react directly. (Ti, at the same time the _Al 3 Ti reacts with Al, that the temperature is increased to obtain a reaction heat _{E R} and condensing heat _{E C,} reacts with SiC.) _Ti 3 SiC ₂ formed at the interface The layer is uniform and has few by-products such as Al ₄ C ₃ , Ti ₅ Si ₃ C _X and TiC. When this reaction layer is used, an ohmic electrode with low contact resistance can be formed.

(Invention of Claim 2)
The thickness of the Ti ₃ SiC ₂ layer is preferably the thinnest thickness that can be uniformly formed in the entire electrode region within a range of ₂ nm to ₃₀ nm.
According to the method for manufacturing a semiconductor device of the present invention, an electrode having a low contact resistance can be formed by a Ti ₃ SiC ₂ layer having a thickness of ₂ nm to ₃₀ nm.

  According to the present invention, an ohmic electrode having a low contact resistance with respect to the SiC semiconductor layer can be formed.

The main features of the embodiments described below are listed.
(First feature)
The SiC semiconductor layer that forms the ohmic electrode is a p-type semiconductor layer.
(Second feature)
The first reference temperature is 686 ° C.
(Third feature)
The second reference temperature is 970 ° C.
(Fourth feature)
The temperature of the SiC semiconductor layer and the Ti layer, higher than the first reference _{temperature Al} 3 Ti is generated by Ti and Al reaction, the Part _Al 3 Ti and SiC are generated by _Ti 3 SiC ₂ reacts 2 A step of raising the temperature to 850 ° C. lower than the reference temperature and forming an Al layer on the Ti layer is provided.

Embodiments of a semiconductor device embodying the present invention and a manufacturing method thereof will be described with reference to FIGS. In this embodiment, the case where the semiconductor device of the present invention is a p-channel MOSFET formed using a SiC substrate will be described.
FIG. 1 is a cross-sectional view of a semiconductor device 1 according to the present embodiment. FIGS. 2 to 5 are diagrams illustrating a manufacturing process of an ohmic electrode (source electrode) included in the semiconductor device 1. FIG. 6 is a DSC (Differential Scanning Calorimetry) curve showing a situation where SiC, Ti, and Al react in response to temperature. FIG. 7 shows the temperature at the interface between the SiC semiconductor layer and the electrode being formed.

First, a schematic configuration of the semiconductor device 1 will be described with reference to a cross-sectional view of FIG.
The semiconductor device 1 includes a pair of p ⁺ type SiC semiconductor layers 20 a and 20 b at both ends on the surface side of the n type SiC semiconductor layer 10.
A reaction layer 31 (Ti ₃ SiC ₂ layer in the claims) extends from the left end of the surface of the p ⁺ -type SiC semiconductor layer 20a toward the center of the semiconductor device 1. The reaction layer 31 is made of Ti ₃ SiC ₂ having a thickness of 2 nm to 30 nm. As will be described in detail later, the reaction layer 31 does not contain byproducts such as Al ₄ C _3, Ti ₅ Si ₃ C _X, and TiC. The reaction layer 31 is in ohmic contact with the p ⁺ type SiC semiconductor layer 20a. Note that there is a region not covered by the reaction layer 31 on the center side of the semiconductor device 1 on the surface of the p ⁺ -type SiC semiconductor layer 20a.
A surface layer 32 is formed on the reaction layer 31. The surface layer 32 is made of Al. The reaction layer 31 and the surface layer 32 form a source electrode 30 that is an ohmic electrode.

Similarly, the reaction layer 41 extends from the right end of the surface of the p ⁺ -type SiC semiconductor layer 20b toward the center of the semiconductor device 1. The reaction layer 41 is made of Ti ₃ SiC ₂ having a thickness of 2 nm to 30 nm. The reaction layer 41 does not contain byproducts such as Al ₄ C _3, Ti ₅ Si ₃ C _X, and TiC. The reaction layer 41 is in ohmic contact with the p ⁺ type SiC semiconductor layer 20b. Note that there is a region not covered by the reaction layer 41 on the center side of the semiconductor device 1 on the surface of the p ⁺ -type SiC semiconductor layer 20b.
A surface layer 42 is formed on the reaction layer 41. The surface layer 42 is made of Al. The reaction layer 41 and the surface layer 42 form a drain electrode 40 that is an ohmic electrode.

The gate insulating film 60 extends from the surface of the p ⁺ type SiC semiconductor layer 20a not covered with the reaction layer 31 to the surface of the p ⁺ type SiC semiconductor layer 20b not covered with the reaction layer 41. It extends to the surface of the semiconductor layer 10.
A gate electrode 50 is formed on the gate insulating film 60.

The semiconductor device 1 configured as described above is turned on when a predetermined source-drain voltage is applied between the source electrode 30 and the drain electrode 40 and a predetermined gate voltage is applied to the gate electrode 50. . That is, a semiconductor region between the p ⁺ -type SiC semiconductor layer 20a and the p ⁺ -type SiC semiconductor layer 20b and an n-type surface region (a region facing the gate electrode 50 through the insulating film 60) A p-type channel through which carriers can move is formed. When carriers move between the source electrode 30 and the drain electrode 40 through this channel, a current flows between the source electrode 30 and the drain electrode 40, and the semiconductor device 1 is turned on. When the voltage applied to the gate electrode 50 becomes less than the gate voltage at which the semiconductor device 1 can be turned on, the channel disappears. Then, carriers cannot move between the source electrode 30 and the drain electrode 40, and the semiconductor device 1 is turned off.
Since the operation in which the semiconductor device 1 is turned on and the operation in which the semiconductor device 1 is turned off is a well-known matter, detailed description thereof is omitted.

Next, a part of the manufacturing process of the semiconductor device 1 will be described with reference to FIGS. Here, the main steps in forming the source electrode 30 will be described. As described above, the source electrode 30 is formed on the surface of the p ⁺ type SiC semiconductor layer 20a. As described in the prior art, it has been difficult to form an ohmic electrode with a low contact resistance in contact with the p ⁺ type SiC semiconductor layer. In the step of forming the source electrode 30 of this embodiment, various by-products other than the desired product are prevented from being generated. By-products cause the contact resistance of the resulting electrode to increase. Thus, the ohmic electrode source electrode 30 having a low contact resistance is formed.

First, an n-type SiC substrate is prepared (see FIG. 1).
Then, according to a normal p-channel MOSFET formation process, an oxidation process, a photolithography process, an etching process, an ion implantation process, and the like are sequentially performed on the substrate. Thereby, the insulating film 60, the gate electrode 50 made of polysilicon, and the p ⁺ -type SiC semiconductor layers 20a and 20b are formed on the substrate. Thereafter, an oxide film (not shown) that insulates the gate electrode 50 and the like is deposited using a CVD method (chemical vapor deposition method).
Then, a contact hole for forming the source electrode 30 is formed in the oxide film covering the surface of the p ⁺ type SiC semiconductor layer 20a by photolithography. Further, a contact hole for forming the drain electrode 40 is formed in the oxide film covering the surface of the p ⁺ type SiC semiconductor layer 20b by photolithography. Next, the source electrode 30 is formed on the surface of the p ⁺ type SiC semiconductor layer 20a in which the contact hole is formed. Further, the drain electrode 40 is formed on the surface of the p ⁺ type SiC semiconductor layer 20b in which the contact hole is formed.
Below, the process of forming the source electrode 30 on the surface of the p ⁺ type SiC semiconductor layer 20a will be described in detail. Although only the step of forming the source electrode 30 will be described below, the drain electrode 40 is actually formed simultaneously with the source electrode 30 on the surface of the p ⁺ -type SiC semiconductor layer 20b.

2 to 5 are enlarged views of the p ⁺ type SiC semiconductor layer 20a portion of the semiconductor device 1 shown in FIG.
First, a Ti film 34 (see FIG. 2) is deposited on a part of the surface of the p ⁺ type SiC semiconductor layer 20a where the source electrode 30 is to be formed (first step in the claims).
Next, the substrate including the p ⁺ type SiC semiconductor layer 20a and the Ti film 34 is heated to 850 ° C. In FIG. 7, the temperature of the substrate rises, and the interface between the p ⁺ -type SiC semiconductor layer 20a and the Ti film 34 reaches 850 ° C. at time t1. Details of the temperature of 850 ° C. will be described later. In a state where the Ti film 34 is merely deposited, even if the temperature is raised to 850 ° C., Ti in the Ti film 34 and SiC in the p ⁺ -type SiC semiconductor layer 20a do not react.

In a state where the temperature of the substrate is maintained at 850 ° C., an Al film 36 (refer to FIG. 3 together) is vapor-deposited on the Ti film 34 from time t1 (second process in the claims). Here, the Al film 36 seems to be liquid.
850 ° C. is higher than the first reference temperature (686 ° C.), which is the temperature at which Ti and Al start to react and Al ₃ Ti begins to be generated. Therefore, even during the deposition of the Al film 36 on the Ti film 34 at 850 ° C., the Ti of the Ti film 34 and the Al being deposited react to begin to form an Al ₃ Ti layer 39 ( Also refer to FIG.
This reaction generates heat of reaction. And reaction heat _{E R,} the condensation heat _{E C} of Al which is being deposited, the temperature of the interface 39a of the ^{p +} -type SiC semiconductor layer 20a and the _Al 3 Ti layer 39, as shown in FIG. 7, rises from 850 ° C. . Since the influence of the Al condensation heat E _{C on} the reaction behavior of SiC and Al ₃ Ti is small, only the heat of reaction will be described in the following description. As shown in FIG. 7, when the temperature of the interface 39a reaches more than 970 ° C. At time t2, ^{p +} -type SiC semiconductor layer 20a SiC and _Al 3 _Al 3 Ti reacts with the reaction layer of Ti layer 39 (Ti ₃ (SiC ₂ layer) 31 begins to be formed (see also FIG. 5). While the temperature of the interface 39a is 970 ° C. or higher (period S2 shown in FIG. 7), the formation of the reaction layer 31 proceeds.
When the reaction for forming the Al ₃ Ti layer 39 from Ti and Al of the Ti film 34 is completed (for example, when Ti of the Ti film 34 disappears due to the reaction), this reaction heat is not generated. Thereby, the temperature of the interface 39a between the p ⁺ -type SiC semiconductor layer 20a and the Al ₃ Ti layer 39 falls from 970 ° C. At time t3, the temperature of the interface 39a is less than 970 ° C., the reaction of _Al 3 Ti of the SiC of the ^{p +} -type SiC semiconductor layer 20a and the _Al 3 Ti layer 39 is completed. Actually, while the temperature of the interface 39a is 970 ° C. or more, it is a short period close to the moment, and the very thin reaction layer 31 can be formed on the interface 39a.
For example, the deposition of Al is stopped at time t4 (thus, Al is deposited during the period S1 from time t1 to time t4), and the heating of the substrate is stopped and cooled.

In the above description, for the sake of convenience of explanation, the progress of the chain reaction that proceeds almost simultaneously has been divided into FIG. 3, FIG. 4, and FIG.
FIG. 3 shows a state where an Al film 37 is being deposited on the Ti film 34. In FIG. 4, Ti of the Ti film 34 and Al deposited thereon react to form an Al ₃ Ti film 39, and during that time, Al deposition continues, and the Al film 37 becomes the Al ₃ Ti film. The state existing above 39 is shown. FIG. 5 shows a state in which Ti ₃ SiC ₂ is generated at the interface 39a, an unreacted Al ₃ Ti film 39 is present thereon, and an Al film 37 is present thereon.
However, since the above reactions proceed almost simultaneously, the states shown in FIGS. 3 to 5 do not necessarily exist. Actually, as shown in FIG. 3, when Al begins to be deposited at 850 ° C., the reaction of forming Al ₃ Ti shown in FIG. 4 starts almost simultaneously. At this time, the Al film 37 may or may not remain as shown in FIG. Further, when the reaction for generating Al ₃ Ti starts, the reaction for generating Ti ₃ SiC ₂ shown in FIG. 5 starts almost simultaneously. Note that the Al ₃ Ti film 39 and the Al film 37 may or may not remain as shown in FIG.
The Ti film 34 is formed with the thinnest film thickness that can be formed as a film having a uniform thickness on the p ⁺ type SiC semiconductor layer 20a. .

Then, as shown in FIG. 5, when an unreacted Al ₃ Ti film 39 or Al film 37 is present on the reaction layer 31, these are removed.
The substrate is left until it returns to at least the melting point of aluminum (about 660 ° C.) or lower.
Next, an Al surface layer 32 is formed on the reaction layer 31 to form the source electrode 30 (see also FIG. 1). As described above, the drain electrode 40 has the same configuration as the source electrode 30 and is formed simultaneously with the source electrode 30.

In the method of manufacturing the semiconductor device of this example, the step of depositing the Al film 37 on the Ti film 34 is performed in a state where the temperature of the substrate is raised to 850 ° C. The temperature of 850 ° C. will be described below.
As shown in FIG. 6, the inventors have actually obtained a DSC (Differential Scanning Calorimetry) curve showing a situation in which SiC, Ti and Al react in response to temperature.
According to this, Al melts at 660 ° C. Al is completely melted after the endotherm is finished at around 680 degrees.
The molten Al begins to react with Ti while generating heat at 686 ° C. (first reference temperature in the claims). When Al and Ti react, Al ₃ Ti is generated. Al ₃ Ti begins to react with SiC while generating heat at around 970 ° C. (second reference temperature in the claims). When Al ₃ Ti reacts with SiC, Ti ₃ SiC ₂ is generated.
Therefore, by the above-described process, while the temperature of the interface 39a is higher than 970 ° C., Al ₃ Ti and SiC react to generate Ti ₃ SiC ₂ .

In order to form an ohmic electrode having a low contact resistance to the SiC semiconductor layer, it is preferable that the Ti ₃ SiC ₂ layer does not contain byproducts such as Al ₄ C ₃ , Ti ₅ Si ₃ C _X, and TiC. . In the manufacturing method of the semiconductor device of the present embodiment, Ti ₃ SiC ₂ is heated in a state where the temperature of the interface 39a between the p ⁺ -type SiC semiconductor layer 20a and the Al ₃ Ti film 39 is 970 ° C. or higher due to the reaction heat of Ti and Al. It is generated only for a certain period. When the temperature of the interface 39a falls below 970 ° C., the reaction between SiC and Al ₃ Ti stops. Since the period from the start to the end of the reaction is 970 ° C., which is a short period close to the moment as described above, a very thin Ti ₃ SiC ₂ layer 31 can be formed. Further, there is no unreacted Ti at the interface 39a. Moreover, even if Ti simple substance exists, Ti simple substance and SiC do not react directly. (Ti, the temperature at the same time give a condensing heat _{E C} the heat of reaction _{E R} if the _Al 3 Ti reacts with Al that rises, reacts with SiC.) Thin _Ti 3 SiC ₂ layer formed on the interface It is uniform, _Al 4 _{C 3} and _Ti 5 _Si 3 _{C X} and by-products such as TiC is small.
Thereby, a thin and uniform reaction layer 31 of Ti ₃ SiC ₂ can be formed, and the ohmic electrode source electrode 30 having a low contact resistance can be formed using the reaction layer 31.

Further, in the step of forming the source electrode 30 of the present embodiment, since the reaction layer 31 (Ti ₃ SiC ₂ layer) can be formed for a short time, the thin reaction layer 31 of 2 nm to 30 nm is formed. Can do. The thinner the reaction layer, the lower the total resistance of the electrode part (the sum of the contact resistance and the bulk resistance of the electrode). Therefore, the ohmic electrode formed in this example exhibits good characteristics.

In this embodiment, as shown in FIG. 3, the temperature of the substrate is maintained at 850 ° C. in the step of depositing the Al film 37 on the Ti film 34. However, short, at this temperature, by depositing Al film 37 on the Ti film 34, Ti is obtained when the _Al 3 Ti reacts with Al at the same time condensing heat _{E C} the heat of reaction _{E R} As the temperature rises, the temperature of the interface 39a reaches 970 ° C. or more, and a thin reaction layer 31 (Ti ₃ SiC ₂ layer) of _{2 to 30} nm may be formed. This temperature is not limited to 850 ° C. Absent. Further, this temperature may not be maintained at a constant temperature within the period.

In this embodiment, the case where the semiconductor device of the present invention is applied to a p-channel MOSFET has been described. However, the semiconductor device is not limited to a p-channel FET, and the present invention is applied to various semiconductor devices. For example, the semiconductor device of the present invention can also be applied to an n-channel vertical power MOSFET shown in FIG.
The semiconductor device 2, which is an n-channel vertical power MOSFET, includes an n ⁻ type SiC semiconductor layer 72 on an n ⁺ type SiC semiconductor layer 70.
The semiconductor device 2 includes p-type SiC semiconductor layers 74 a and 74 b that form a pair at both ends on the surface side of the n ⁻ -type SiC semiconductor layer 72. N ⁺ -type source regions (SiC semiconductor layers) 76a and 76b are formed in partial regions on the surface side of the p-type SiC semiconductor layers 74a and 74b.
A reaction layer 78a extends from the left end of the surface of the p-type SiC semiconductor layer 74a to the n ⁺ -type SiC semiconductor layer 74a. The reaction layer 78a is made of Ti ₃ SiC ₂ . The reaction layer 78a does not contain byproducts such as Al ₄ C _3, Ti ₅ Si ₃ C _X, and TiC. Reaction layer 78a is in ohmic contact with p-type SiC semiconductor layer 74a. Note that there is a region not covered by the reaction layer 78a on the center side of the semiconductor device 2 of the p-type SiC semiconductor layer 74a and the n ⁺ -type source region 76a.
Similarly, the reaction layer 78b extends from the right end of the surface of the p-type SiC semiconductor layer 74b to the n ⁺ -type source region 76b.

A gate insulating film 80 is formed from the surface of the n ⁺ type source region 76a not covered with the reaction layer 78a to the surface of the n ⁺ type source region 76b not covered with the reaction layer 78b. A gate electrode 82 is formed so as to be surrounded by the gate insulating film 80.
A surface layer 84 made of Ni or Ni / Al is formed so as to cover the reaction layer 78a, the reaction layer 78b, and the gate insulating film 80. The reaction layers 78a and 78b and the surface layer 84 form a source electrode 85 which is an ohmic electrode.
An Ni drain electrode 86 is formed on the back surface of the n ⁺ -type SiC semiconductor layer 70.

The semiconductor device 2 configured as described above is turned on when a predetermined source-drain voltage is applied between the source electrode 85 and the drain electrode 86 and when a predetermined gate voltage is applied to the gate electrode 82. Become. That is, an n-type channel capable of moving carriers is formed in a region of the p-type SiC semiconductor layer 74a and the p-type SiC semiconductor layer 74b facing the gate electrode 82 with the insulating film 80 interposed therebetween. Through this channel, carriers move from the n ⁺ -type source region 76 a and the n ⁺ -type source region 76 b in contact with the source electrode 85 to the n ⁻ -type SiC semiconductor layer 72. Then, carriers move to the drain electrode 86 through the n ⁺ -type SiC semiconductor layer 70, whereby a current flows between the source electrode 85 and the drain electrode 86, and the semiconductor device 2 is turned on. When the voltage applied to the gate electrode 82 becomes lower than the gate voltage at which the semiconductor device 2 can be turned on, the channel disappears. Then, carriers cannot move between the source electrode 85 and the drain electrode 86, and the semiconductor device 2 is turned off.
Since the operation of turning on and off the semiconductor device 2 is a well-known matter, a detailed description thereof will be omitted.

The reaction layers 78 a and 78 b of the semiconductor device 2 described above are also formed by the same manufacturing method as the reaction layers 31 and 41 of the semiconductor device 1. Thereby, thin and uniform Ti ₃ SiC ₂ reaction layers 78a and 78b can be formed. Using the reaction layers 78a and 78b, an ohmic electrode source electrode 85 having a low contact resistance can be formed.

Specific examples of the present invention have been described in detail above, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.
In addition, the technical elements described in the present specification or drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology illustrated in the present specification or the drawings achieves a plurality of objects at the same time, and has technical utility by achieving one of the objects.

It is sectional drawing of the semiconductor device 1 which is p channel MOSFET. 1 shows a manufacturing process 1 of the source electrode 30 included in the semiconductor device 1. 2 shows a manufacturing process 2 of the source electrode 30 included in the semiconductor device 1. 3 shows manufacturing process 3 of the source electrode 30 included in the semiconductor device 1. 4 shows manufacturing process 4 of the source electrode 30 included in the semiconductor device 1. It is a DSC (differential scanning calorimetry) curve which shows the reaction characteristic by the heat processing of SiC, Ti, and Al. The temperature at the interface between the p ⁺ type SiC semiconductor layer 20a and the source electrode 30 being formed is shown. 1 is a cross-sectional view of a semiconductor device 2 which is an n-channel vertical power MOSFET.

Explanation of symbols

1, 2 Semiconductor device 10 n-type SiC semiconductor layer 20a, 20b p ⁺ -type SiC semiconductor layer 30, 85 Source electrode 31, 41, 78a, 78b Reaction layer 32, 42, 84 Surface layer 40, 86 Drain electrode 50, 82 Gate Electrodes 60, 80 Insulating film 70 n ⁺ type SiC semiconductor layer 72 n ⁻ type SiC semiconductor layers 74a and 74b p type SiC semiconductor layers 76a and 76b n ⁺ type source regions

Claims (2)

A first step of forming a Ti layer in contact with the SiC semiconductor layer;
The temperature of the SiC semiconductor layer and the Ti layer, Ti and Al is higher than the first reference temperature to generate react _Al 3 Ti, the _Al 3 Ti and SiC are generated by _Ti 3 SiC ₂ reacts A second step of raising the temperature to a temperature lower than the second reference temperature and forming an Al layer on the Ti layer;
In the second step, Ti in the Ti layer and Al in the Al layer react to generate Al ₃ Ti in contact with the SiC semiconductor layer, and the condensation heat accompanying the formation of the Al layer and the reaction accompanying the formation of the Al ₃ Ti layer When the heat is applied, the temperature at the interface between the SiC semiconductor layer and Al ₃ Ti rises above the second reference temperature, and SiC in the SiC semiconductor layer reacts with Al ₃ Ti to generate Ti ₃ SiC ₂ , A method of manufacturing a semiconductor device, comprising forming a Ti ₃ SiC ₂ layer in ohmic contact with the SiC semiconductor layer. The method of manufacturing a semiconductor device according to claim 1, wherein the thickness of the Ti ₃ SiC ₂ layer is ₂ nm to 30 nm.

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