JP2008072042A - Gan-based semiconductor element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a GaN-based semiconductor element for preventing a gate electrode from being cut easily even if a wafer is cracked. <P>SOLUTION: On a sapphire substrate 1, a GaN buffer layer 2, an undoped GaN layer 3, an n<SP>+</SP>-type GaN drain layer 4, an n<SP>-</SP>-type GaN layer 5, and a p-type GaN-based channel layer 6 are laminated. On the p-type GaN-based channel layer 6, an n-type GaN source layer 8 having two ridges, namely a ridge A and a ridge B, is formed. The longitudinal direction of the gate electrode 9 formed on an insulation film is formed along the m surface of the p-type GaN-based channel layer 6. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a GaN-based semiconductor element used for a semiconductor amplifying element such as a power transistor that can obtain a large current.

  MOS type FETs and HEMTs (High Electron Mobility Transistors) using GaN-based III-V group compound semiconductors such as GaN and AlGaN for the channel layer are more operating than MOS type FETs and HEMTs using Si, GaAs, etc. The device has been attracting attention as a device capable of high temperature operation and large current operation with a high withstand voltage and a small on-resistance.

For example, as shown in FIG. 9, the GaN-based semiconductor device includes a GaN buffer layer 52, an undoped GaN layer 53, an n ⁺ -type GaN drain layer 54, and an n ⁻ -type GaN layer 5 on a semi-insulating sapphire substrate 51. The p-type GaN channel layer 56 is laminated, and an n-type GaN source layer 57 having a striped ridge shape is formed on the p-type GaN channel layer 56. A source electrode 60 is formed over the entire surface of the ridge shape of the n-type GaN source layer 57 and a part of the surface of the p-type GaN channel layer 56.

On the other hand, the gate electrode 59 is formed on the insulating film 58 laminated on the surface of the p-type GaN channel layer 56, and the drain electrode 61 is formed on the exposed surface of the mesa-etched n ⁺ -type GaN drain layer 54.
JP 2004-260140 A

  However, the conventional GaN-based semiconductor device has the following problems. FIG. 6 shows the structure of the wurtzite single crystal, and the plane orientation and the like are shown. The crystal structure of sapphire is represented by a hexagonal crystal structure as shown in FIG. When laminating a GaN-based semiconductor layer on a sapphire substrate as shown in FIG. 9, the c-plane (0001) of the sapphire substrate is usually used, and the GaN-based semiconductor stacked on the (0001) -oriented sapphire substrate is It has a (0001) -oriented wurtzite crystal structure (the crystal structure in FIG. 6) and has a crystal polarity (growth in the c-axis direction) in which the Ga cation element is in the growth surface direction. Therefore, all the GaN-based semiconductor layers stacked on the c-plane (0001) of the sapphire substrate have the c-plane in the growth surface direction.

  By the way, as shown in FIG. 6, m-plane (10-10) which is a column surface of a single crystal is a basic surface constituting the structure of each single crystal, and when a crack occurs in the crystal, Cracks are likely to occur along the m-plane. Therefore, when a crack occurs in the wafer, the crack runs along the m-plane, and this crack may cut an electrode provided in the element.

  As shown in FIG. 9, the gate electrode 59 has a gate capacitance because it is formed on the insulating film 58. When the gate capacitance increases, an on-off switching voltage is applied to the gate electrode 59. However, it takes time to switch the element on and off, and the power consumption increases due to the increase in the gate capacitance. Therefore, the area of the gate electrode 59 is usually made as small as possible. Therefore, the gate electrode 59 is provided in a stripe shape with a narrow wiring width, and is weak against a cutting force that crosses the direction extending in the stripe shape in a substantially perpendicular direction.

  As described above, since the c-plane of the p-type GaN channel layer 56 is in the growth surface direction, the m-plane direction may be aligned substantially perpendicular to the direction of the gate electrode 59 extending in the stripe shape. In such a case, if a crack occurs in the p-type GaN channel layer 56, the crack runs along the m-plane, so that the short direction of the gate electrode 59 is easily cut, and current flows when cut. There was a problem of disappearing.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a GaN-based semiconductor element in which a gate electrode is hardly cut even when a crack occurs in a wafer.

  In order to achieve the above object, the invention according to claim 1 is a GaN-based semiconductor element comprising a channel layer made of a GaN-based semiconductor, and a source layer and a drain layer arranged with the channel layer interposed therebetween, In the GaN-based semiconductor device, the longitudinal direction of the gate electrode is formed along the m-plane of the channel layer.

  The invention according to claim 2 is the GaN-based semiconductor device according to claim 1, wherein the gate electrode has a bent portion.

  The invention according to claim 3 is the GaN-based semiconductor element according to claim 2, wherein the bent portion has a curved shape.

  According to the present invention, since the longitudinal direction of the gate electrode is formed along the m-plane of the channel layer, the longitudinal direction is strong even if cracks occur along the m-plane of the GaN-based semiconductor crystal. The cutting of the gate electrode hardly occurs and the gate electrode can be prevented from being cut.

  In addition, when the gate electrode is formed to have a bent shape, the bent portion has a curved shape so as not to form a corner, thereby preventing electric field concentration and short-circuiting. Can be prevented.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a cross-sectional structure of a GaN-based semiconductor device of the present invention, and FIG. 2 or FIG. 3 shows examples in which ridge portions A and B have different ridge shapes. FIG.

The GaN-based semiconductor element of the present invention uses a III-V group GaN-based semiconductor that is a hexagonal compound semiconductor, and the III-V group GaN-based semiconductor is a quaternary mixed crystal Al _x Ga _y In _z. N (x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1). Although FIG. 1 shows an example of an NPN structure, the present invention can also be applied to a PNP structure.

A GaN buffer layer 2, an undoped GaN layer 3, an n ⁺ -type GaN drain layer 4, an n ⁻ -type GaN layer 5, and a p-type GaN-based channel layer 6 are stacked on the sapphire substrate 1. An n-type GaN source layer 8 having a ridge shape is formed thereon. The n-type GaN source layer 8 has a ridge portion A, a ridge portion B, and two ridge portions. From the top surface to the side surface of the ridge portion A and ridge portion B, the p-type between the ridge portions A and B is further provided. A source electrode 10 is formed over the surface of the GaN-based channel layer 6. A selective growth mask 7 made of an insulating material is formed so as to sandwich the ridge portions A and B, and a gate electrode 9 is formed on the selective growth mask 7.

  As described above, the c-plane (0001) of the sapphire substrate 1 is normally used for the growth of the GaN-based semiconductor crystal, and the GaN-based semiconductor stacked on the (0001) -oriented sapphire substrate has a (0001) -oriented orientation. All the GaN-based semiconductor layers having a wurtzite crystal structure (the crystal structure of FIG. 6) stacked on the c-plane (0001) of the sapphire substrate have the c-plane in the growth surface direction. Therefore, from the GaN buffer layer 2 to the p-type GaN-based channel layer 6, the stacking direction is the c-axis direction, and the growth surface is the c-plane.

In addition, a drain electrode 12 is formed in the exposed n ⁺ -type GaN drain layer 4 inside the groove formed by mesa etching, and a p-type GaN-based channel layer is formed so that leakage does not occur due to the drain electrode 12. An insulating film 11 is provided from 6 to part of the side surfaces of the n ⁻ -type GaN layer 5 and the n ⁺ -type GaN drain layer 4. As will be described later, the n-type GaN source layer 8 is formed by selective growth, and the selective growth mask 7 used at that time is used as an insulating film for the gate electrode 9.

For the selective growth mask 7, a transparent insulator such as SiO ₂ , Si ₃ N ₄ , ZrO ₂ , Al ₂ O ₃ or the like is used. As the p-type GaN-based channel layer 6, a p-type GaN layer, or a p-type GaN layer stacked on a p-type AlGaN layer is used. Si is used for the n-type dopant, and Mg is used for the p-type dopant.

The n ⁺ -type GaN drain layer 4 is doped with impurity Si so that the carrier concentration becomes 1 × 10 ¹⁸ cm ⁻³ , for example, in order to make an ohmic contact with the drain electrode 12, and the n ⁻ -type GaN layer Reference numeral 5 denotes an intermediate layer provided to lower the energy barrier at the junction interface between the n-type layer and the p-type layer to facilitate current flow, and is doped with impurity Si so as to be 1 × 10 ¹⁷ cm ^−3. Has been. The p-type GaN-based channel layer 6 needs to have a high carrier concentration so that the device is not turned on when no voltage is applied to the gate electrode. For example, the carrier concentration is 4 × 10 ¹⁶ to 1 × 10 ^18. Impurity Mg is doped so as to be cm ⁻³ .

  A multilayer metal film made of TaSi / Au or the like is used for the source electrode 10 and the drain electrode 12, and a multilayer metal film made of Ni / Au or the like is used for the gate electrode.

  By the way, since the growth substrate such as a sapphire substrate and GaN have different lattice constants, the GaN-based semiconductor layer grown on the growth substrate has dislocations (lattice defects) extending vertically from the substrate. Yes. As a method for reducing such dislocations, selective lateral growth (ELO: Epitaxial Lateral Overgrowth) is well known. In the present invention, the selective growth is used.

  By covering the p-type GaN channel layer 6 with a selective growth mask 7 such as a dielectric mask, growth first occurs from the opening of the selective growth mask 7 (selective growth), and then on the selective growth mask 7. In addition, the growth of the growth layer causes crystal growth in the lateral direction.

  Therefore, the selective growth mask 7 requires an opening for crystal growth, and the shape of the n-type GaN source layer 8 formed by selective growth differs depending on the shape of the mask. Examples of patterns of this selective growth mask are shown in FIGS. 4 and 5, the shaded area represents a selective growth mask.

  In FIG. 4, the central mask portion 7b is patterned in a stripe shape, and stripe-shaped openings 7a are provided in parallel on both sides thereof. When crystal growth is performed from the opening 7a, the formed epitaxial layer has a shape having two striped ridges.

  FIG. 2 shows a stacked shape from the selective growth mask 7 to the source electrode 10 when the selective growth mask of FIG. 4 is used. M in the figure indicates a region where the central mask portion 7b is removed from the selective growth mask. The ridge portion A and the ridge portion B formed across the region M extend in a stripe shape in parallel, and the gate electrode 9 is also formed in a stripe shape.

  In this case, since the thinnest region of the gate electrode 9 becomes weak in strength, the direction that is easily cut is the direction L1 that is the short direction of the gate electrode 9, and the direction that is most difficult to cut is the direction of the gate electrode 9. It is the direction of L2 that is the longitudinal direction. Therefore, in the case of FIG. 2, the longitudinal direction of the gate electrode 9 is formed along the m-plane of the crystal of the p-type GaN-based channel layer 6 (for example, the m1 direction in FIG. 2 is parallel to the L2 direction), and the gate electrode 9 can be prevented from being cut by cracks. There are other m-plane directions, but as can be seen from FIG. 6, the directions of the m-planes cross each other while maintaining an angle of 120 degrees. Does not match and becomes difficult to cut.

  On the other hand, FIG. 5 shows a pattern in which openings 7a are provided concentrically around a hexagonal central mask portion 7b. Therefore, the opening 7a is also hexagonal. When crystal growth is performed from the opening 7a, the formed epitaxial layer has a shape having a ridge portion connected in a hexagonal shape. FIG. 3 shows this state. M in the figure indicates a region of the selective growth mask 7 from which the central mask portion 7b has been removed. The ridge portion A and the ridge portion B formed with the region M in between are continuous in a ring shape, and the gate electrode 9 has a hexagonal shape.

  The portion where the strength of the gate electrode is the weakest is the direction where the pattern width is the narrowest, and is the direction of L3 which is the short direction of the gate electrode 9. On the other hand, the strongest part is the direction of L4 which is the longitudinal direction of the gate electrode 9. Therefore, in the case of FIG. 5, the longitudinal direction of the gate electrode 9 is formed along the m-plane direction of the crystal of the p-type GaN-based channel layer 6 (for example, the m1 direction in FIG. It is possible to prevent the gate electrode 9 from being cut by a crack. There are other m-plane directions, but as can be seen from FIG. 6, the directions of the m-planes intersect at an angle of 120 degrees, so the directions of the other m-planes are L3 directions. Does not match and becomes difficult to cut.

Next, a method for manufacturing the GaN-based semiconductor device shown in FIGS. As a manufacturing method, an MOCVD method (metal organic chemical vapor deposition method) is mainly used. First, the sapphire substrate 1 is transferred into the MOCVD apparatus, and the GaN buffer layer 2 is grown on the sapphire substrate 1 at a low temperature of 600 to 700 ° C. Thereafter, the substrate temperature is raised to 1000 ° C. or higher, and the undoped GaN layer 3, n ⁺ -type GaN drain layer 4, n ⁻ -type GaN layer 5, and p-type GaN-based channel layer 6 are epitaxially grown in this order on the GaN buffer layer 2. The p-type GaN-based channel layer 6 may be a p-type GaN layer or a multilayer structure in which a p-type GaN layer is stacked on a p-type AlGaN layer.

For example, when a GaN layer is formed, trimethylgallium (TMGa), which is a Ga atom source gas, and ammonia (NH ₃ ), which is a nitrogen atom source gas, are used together with hydrogen or nitrogen as a carrier gas. In the case of n-type GaN, silane (SiH ₄ ) or the like as an n-type dopant gas, and in the case of p-type GaN, CP ₂ Mg (cyclopentadiethyl magnesium) or the like as a p-type dopant gas is used. Add to the reaction gas. When fabricating the AlGaN layer, TMGa, added trimethylaluminum (TMA) in NH _3.

  In this way, by supplying the reaction gas corresponding to the components of each semiconductor layer, the dopant gas for making the n-type and p-type, the crystal is grown in order by changing to the optimum growth temperature, thereby having a predetermined composition. A semiconductor layer of a predetermined conductivity type was formed to a required thickness. The doping concentration of impurities was controlled by the flow rate of each source gas.

  Next, the laminated wafer is taken out from the MOCVD apparatus, a selective growth mask is laminated on the p-type GaN channel layer 6 by CVD, plasma CVD, sputtering, or the like, and a resist is formed in a predetermined shape on the selective growth mask. After patterning, the entire shape of the selective growth mask is formed by etching, and selectively removed by etching to form an opening, and then the resist is removed. At this time, the resist shape is patterned so that the longitudinal direction of the opening of the selective growth mask, for example, the opening 7 a in FIGS. 4 and 5 is parallel to the m-plane of the p-type GaN-based channel layer 6.

  In FIGS. 1, 2, and 3, the opening of the selective growth mask 7 substantially coincides with the region where the n-type GaN source layer 8 is formed, and the region M from which the selective growth mask has been removed is the central mask portion. Centering here, it is a pattern in which openings are provided in stripes in FIG. 2 and concentric angles in FIG. When crystal growth is performed from the opening, the formed epitaxial layer has a shape having a ridge portion.

  Next, crystal growth is started again in the MOCVD apparatus, and the n-type GaN source layer 8 is formed by selective growth in which crystal growth is performed from the opening of the selective growth mask 7. The n-type GaN source layer 8 has a structure having a ridge shape on the left and right sides of the ridge portion A and the ridge portion B. More specifically, the shapes shown in FIGS. 2 and 3 are formed according to the pattern shape of the selective growth mask.

  Thereafter, the selective growth mask present in the central depression sandwiched between the ridges A and B is removed by wet etching using a hydrofluoric acid (HF) solution or the like. A region M shown in FIGS. 2 and 3 shows the region where peeling and removal are performed at this time.

  Next, the source electrode 10 is formed over the surface of the p-type GaN-based channel layer 6 from which the left and right ridge portions in the n-type GaN source layer 8 and the selective growth mask have been removed by vapor deposition, sputtering, or the like. A gate electrode 9 is formed on the remaining selective growth mask 7 by vapor deposition, sputtering, or the like.

  The source electrode 10 is formed across the inner side surface of the ridge portion formed by the n-type GaN source layer 8, a part of the top surface of the ridge portion, and the region where the selective growth mask is removed. In the case of the configuration of FIG. 2, the source electrode 10, the n-type GaN source layer 8, the gate electrode 9, the selective growth mask 7 and the like are formed in a stripe shape as viewed from above. The source electrode 10, the n-type GaN source layer 8, the gate electrode 9, the selective growth mask 7 and the like are formed concentrically when viewed from above.

Next, by performing mesa etching to form a groove portion from the p-type GaN-based channel layer 6 toward ^{the n +} -type GaN drain layer 4, to expose the ^{n +} -type GaN drain layer 4, an insulating film 11 such as SiO ₂ Laminated in a groove formed by mesa etching by CVD, plasma CVD, sputtering, etc., leaving a part of the exposed surface of the n ⁺ -type GaN drain layer 4 and a part of the side surface, covered with a resist, etched, and insulating film 11 is removed (portion not covered with the resist), and the drain electrode 12 is formed by vapor deposition, sputtering, or the like in the region where the insulating film 11 is removed. In this way, the GaN-based semiconductor device shown in FIG. 1 is completed.

  In the above embodiment, a GaN-based semiconductor device using selective growth has been described. However, it is obvious that the present invention can also be applied to the conventional GaN-based semiconductor device structure shown in FIG. The longitudinal direction of the gate electrode may be formed along the m-plane.

  Next, another embodiment will be described in the case where the gate electrode 9 is formed in a ring shape and has a bent portion as shown in FIG. In FIG. 3, hexagonal gate electrodes are formed, and the bent portions correspond to the portions where the electrodes are bent, and there are six places. In FIG. 3, the six bent portions are all formed by corners, and when a voltage is applied to the gate electrode 9, an electric field concentrates on the corners. Therefore, the channel passes beyond the selective growth mask 7 which is an insulating film. A short circuit with the layer 6 is likely to occur.

  Therefore, in order to solve this problem, the bent portion of the gate electrode 9 has a curved shape constituted by, for example, an arc shape as shown in FIG. Reference numeral 9 a denotes a curved portion at the bent portion of the gate electrode 9. The curved portion 9a is formed inside all the six bent portions of the gate electrode 9 and is rounded, so that concentration of the electric field can be prevented and a short circuit can be prevented.

  On the other hand, FIG. 8 shows an example in which the outer side of the bent portion of the gate electrode 9 is rounded. The gate electrode 9 is formed in a hexagonal shape as a whole, but the curved portion 9b is formed outside the bent portion of the gate electrode 9, and the curved portion 9b is formed in all six bent portions. . Thus, even if it comprises so that the outer side of a bending part may become a curve shape, concentration of an electric field can be prevented and a short circuit can be prevented.

In the above example of the gate electrode, the hexagonal shape has been described. However, the polygonal shape other than the hexagonal shape or the shape having an angle with at least one bent portion even if it is not formed in a ring shape may be used. As shown in FIGS. 7 and 8, the bent portion has a curved shape and is rounded to prevent electric field concentration.

It is a figure which shows the cross-section of the GaN-type semiconductor element of this invention. It is the figure which looked at the GaN-type semiconductor element of FIG. 1 from the upper surface. It is a figure which shows the other shape which looked at the GaN-type semiconductor element of FIG. 1 from the upper surface. It is a figure which shows the example of a pattern of the mask for selective growth. It is a figure which shows the example of a pattern of the mask for selective growth. It is a figure which shows the structure of a wurtzite type single crystal. It is a figure which shows an example of the gate electrode which has a curve shape in a bending part. It is a figure which shows an example of the gate electrode which has a curve shape in a bending part. It is a figure which shows the cross-section of the conventional GaN-type semiconductor element.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Sapphire substrate 2 GaN buffer layer 3 Undoped GaN layer 4 n ⁺ type GaN drain layer 5 n ⁻ type GaN layer 6 p type GaN channel layer 7 mask for selective growth 8 n type GaN source layer 9 gate electrode 10 source electrode 11 insulation film

Claims (3)

A GaN-based semiconductor element comprising a channel layer made of a GaN-based semiconductor, and a source layer and a drain layer arranged with the channel layer interposed therebetween,
A GaN-based semiconductor device, wherein the longitudinal direction of the gate electrode is formed along the m-plane of the channel layer.   The GaN-based semiconductor device according to claim 1, wherein the gate electrode has a bent portion. The GaN-based semiconductor device according to claim 2, wherein the bent portion has a curved shape.

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