JP2004327766A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the controllability of the characteristics a field effect transistor, consisting of a group III nitride semiconductor. <P>SOLUTION: An AlGaN layer 102 is laminated on an InGaN (mixed crystal ratio of 0%-100%) layer 101, and a gate electrode 103 and an ohmic electrode 104 are formed on the AlGaN layer 102. The longitudinal direction of the gate electrode 105 is any one of [11-20] direction or direction [2-1-10] or [-12-10] direction. With this configuration, since the amount of piezo-potentials generated from stress near the gate electrode becomes constant, the characteristics of the field effect transistor can be made uniform. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device used for a high-frequency communication device represented by a mobile phone.
[0002]
[Prior art]
2. Description of the Related Art In recent years, GaAs-based field-effect transistors or heterojunction bipolar transistors have been used in mobile communication devices typified by mobile phones, and have reached a solid position. However, the development of high performance with new materials is also being vigorously promoted. Among them, nitride III-V compound represented by GaN semiconductor i.e. general formula of _{Al x Ga 1-x-y} In y N (0 ≦ x ≦ 1,0 ≦ y ≦ 1) Group III nitride semiconductors can achieve a sheet carrier concentration ten times higher than GaAs-based semiconductors and have a high dielectric breakdown voltage, and thus have attracted much attention as next-generation compound semiconductor materials.
[0003]
Of particular interest in group III nitride semiconductor devices is a MODFET (Modulation Doped Field Effect Transistor) using an AlGaN / GaN heterojunction. The biggest difference from the GaAs-based MODFET is that the sheet carrier concentration can be realized as much as 10 times that of the GaAs-based MODFET without doping the AlGaN layer serving as the Schottky layer with impurities. The mechanism of carrier generation is that the AlGaN / GaN stress causes polarization of AlGaN by the piezo effect, and as a result, two-dimensional electrons are accumulated at the AlGaN / GaN interface.
[0004]
Therefore, stress is a very important parameter, and the stress between AlGaN / GaN and the induced sheet carrier concentration have been energetically studied. For example, in Non-Patent Document 1, the sheet carrier concentration of a two-dimensional electron gas is quantitatively calculated from stress. FIG. 9 shows an embodiment of a conventional AlGaN / GaN MODFET. This drawing shows a perspective view from above and a cross-sectional view of the MODFET. 101 is an InGaN layer, 102 is an AlGaN layer, and a two-dimensional electron gas accumulates between InGaN / AlGaN. 103 is a gate electrode and 104 is an ohmic electrode.
[0005]
[Non-patent document 1]
O. Ambacher et. al. Journal of Applied Physics, Vol 85, No. 5; (1999) p. 3222-p. 3233.
[0006]
[Problems to be solved by the invention]
Considering the mechanism of carrier accumulation in a nitride-based field-effect transistor, stress around the gate electrode is very important. Nevertheless, in the prior art, only the stress between InGaN / AlGaN has been studied, and no attention has been paid to the stress generated around the gate electrode and the ohmic electrode. For this reason, there has been a problem that an error has occurred in the prediction of the characteristics of the MODFET, and further, the characteristics vary.
[0007]
In view of the above problems, it is an object of the present invention to provide a structure capable of accurately controlling the threshold characteristics of a field-effect transistor in consideration of the stress of a gate electrode and an ohmic electrode.
[0008]
The present inventors have clarified for the first time the superiority regarding the orientation of the gate electrode discussed in the present invention in the nitride-based field-effect transistor. This led to the present invention.
[0009]
[Means for Solving the Problems]
In order to solve the above problems, a semiconductor device according to the present invention is a field effect transistor comprising a group III nitride semiconductor layer formed on a substrate, wherein a gate electrode and an ohmic electrode are formed. The longitudinal direction of the electrode is formed in a specific direction.
[0010]
With this configuration, since the longitudinal direction of the gate electrode is formed in a specific direction, it is possible to control the generation of piezo charges due to the stress of the gate electrode.
[0011]
In the semiconductor device of the present invention, it is preferable that the specific direction is any one of a [11-20] direction, a [2-1-10] direction, and a [-12-10] direction. According to this preferred configuration, the temperature characteristics can be made insensitive because the generation of piezoelectric charges due to the stress of the gate electrode is small.
[0012]
Here, for example, "minus" of -2 in [11-20] means "bar". The same applies to the other directions.
[0013]
In the semiconductor device of the present invention, it is preferable that the specific direction is any one of a [01-10] direction, a [10-10] direction, and a [1-100] direction. According to this preferred configuration, the threshold voltage can be made sensitive to temperature because piezo charges are frequently generated due to the stress of the gate electrode.
[0014]
The semiconductor device of the present invention includes a plurality of field-effect transistors formed of a group III nitride semiconductor formed on a substrate and having a gate electrode and an ohmic electrode, wherein the longitudinal direction of the gate electrode is [ 11-20] direction, [2-1-10] direction or [-12-10] direction, and the longitudinal direction of the gate electrode is [01-10] direction, [10- And a field-effect transistor in either the [10] direction or the [1-100] direction.
[0015]
According to this configuration, a gate orientation in which piezo charges are frequently generated due to the stress of the gate electrode and a direction in which the piezo charges are small are mixed, so that a large degree of freedom can be given to circuit design by combining transistors having different temperature characteristics.
[0016]
The semiconductor device of the present invention includes first and second group III nitride semiconductor layers formed on a substrate, a gate electrode is formed on the first group III nitride semiconductor layer, and an ohmic electrode is formed on the first group III nitride semiconductor layer. A field effect transistor formed on a second group III nitride semiconductor layer, wherein a longitudinal direction of the gate electrode is formed in a specific direction.
[0017]
With this configuration, since the longitudinal direction of the gate electrode is formed in a specific direction, it is possible to control the temperature characteristics by controlling the generation of piezo charges due to the stress of the gate electrode, and to control the temperature characteristics of the second group III nitride semiconductor layer. The controllability can be further improved by the stress.
[0018]
In the semiconductor device of the present invention, it is preferable that the specific direction is any one of a [11-20] direction, a [2-1-10] direction, and a [-12-10] direction. According to this preferred configuration, the temperature characteristics can be made insensitive because the generation of piezoelectric charges due to the stress of the gate electrode is small.
[0019]
In the semiconductor device of the present invention, it is preferable that the specific direction is any one of a [01-10] direction, a [10-10] direction, and a [1-100] direction. According to this preferred configuration, the threshold voltage can be made sensitive to temperature because piezo charges are frequently generated due to the stress of the gate electrode.
[0020]
The semiconductor device of the present invention includes first and second group III nitride semiconductor layers formed on a substrate, a gate electrode is formed on the first group III nitride semiconductor layer, and an ohmic electrode is formed on the first group III nitride semiconductor layer. A plurality of field effect transistors formed on the second group III nitride semiconductor layer, wherein the longitudinal direction of the gate electrode is [11-20], [2-1-10], or [-12] -10] direction, and a field effect transistor wherein the longitudinal direction of the gate electrode is any one of [01-10], [10-10] and [1-100] directions. And a transistor.
[0021]
According to this configuration, a gate orientation in which piezo charges are frequently generated due to the stress of the gate electrode and a direction in which the piezo charges are small are mixed, so that a large degree of freedom can be given to circuit design by combining transistors having different temperature characteristics. Furthermore, the controllability of the piezo charge can be further improved by the stress of the second group III nitride semiconductor layer due to the stress of the second group III nitride semiconductor layer.
[0022]
BEST MODE FOR CARRYING OUT THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0023]
A longitudinal direction of a gate electrode of a field effect transistor in which an AlN layer, a GaN layer, and an AlGaN layer are sequentially formed on a SiC substrate is directed to a specific direction. FIG. 7 shows a graph obtained as a result of the inventor's first measurement of the relationship between the longitudinal direction of the gate electrode and the threshold voltage. It can be seen that the threshold voltage shows the gate azimuth dependency, and becomes the deepest threshold voltage in the [10-10] direction.
[0024]
FIG. 8 shows the substrate temperature dependence of the threshold voltage of the field effect transistor. It can be seen that the temperature coefficient also has a gate direction dependency. This makes it possible to uniform the threshold characteristics of the field-effect transistor by making the amount of the piezo charge generated around the gate electrode or the ohmic electrode constant.
[0025]
Also, the threshold voltage can be controlled by varying the stress around the gate electrode and the ohmic electrode.
[0026]
Although this experiment was conducted using 4H-SiC as a substrate, similar effects can be obtained with other substrates such as a 6H-SiC substrate and a sapphire substrate.
[0027]
Further, the combination of the group III nitride semiconductor layers constituting the field effect transistor is not limited to the InGaN layer / AlGaN layer, and similar effects can be obtained by other combinations.
[0028]
A semiconductor device having the above characteristics will be described in the following embodiments.
[0029]
In the following embodiments, a 4H-SiC substrate, a 6H-SiC substrate, a sapphire substrate, or the like can be used as the substrate.
[0030]
(1st Embodiment)
In the semiconductor device according to the first embodiment, InGaN (mixed crystal ratio: 0% to 100%) and AlGaN (mixed crystal ratio: 0% to 100%) are sequentially formed on a substrate, and a gate electrode and an ohmic electrode are formed. The field effect type semiconductor device is formed, wherein the longitudinal direction of the gate electrode is any one of [11-20] direction, [2-1-10] or [-12-10] direction. Further, since the generation of piezo charges due to the stress of the gate electrode is small, the temperature characteristics can be made insensitive.
[0031]
FIG. 1 specifically shows a top view and a cross-sectional structural view of this semiconductor device. In FIG. 1, reference numeral 101 denotes an InGaN layer (mixed crystal ratio: 0% to 100%) in which a two-dimensional electron gas travels. An AlGaN layer 102 functions as a Schottky layer. A gate electrode 103 is made of, for example, PdSi / Au. An ohmic electrode 104 is made of, for example, Ti / Al. Reference numeral 105 denotes a gate electrode whose longitudinal direction is either the [11-20] direction or the [2-1-10] or [-12-10] direction.
[0032]
When the gate electrode is located in this direction, the piezo charge immediately below the gate electrode is small, so that the temperature fluctuation of the threshold voltage is small, so that stable temperature characteristics can be realized.
[0033]
(Second embodiment)
In the semiconductor device according to the second embodiment, InGaN (mixed crystal ratio: 0% to 100%) and AlGaN (mixed crystal ratio: 0% to 100%) are sequentially formed on a substrate, and a gate electrode and an ohmic electrode are formed. A field-effect transistor formed, wherein the longitudinal direction of the gate electrode is either the [01-10] direction or the [10-10] or [1-100] direction. Since the piezo charge is frequently generated due to the stress, the threshold voltage can be made sensitive to temperature.
[0034]
FIG. 2 specifically shows a top view and a cross-sectional structural view of this semiconductor device. In FIG. 2, reference numeral 101 denotes an InGaN layer (mixed crystal ratio: 0% to 100%) in which a two-dimensional electron gas travels. An AlGaN layer 102 functions as a Schottky layer. A gate electrode 103 is made of, for example, PdSi / Au. An ohmic electrode 104 is made of, for example, Ti / Al. Reference numeral 105 denotes a gate electrode whose longitudinal direction is either the [01-10] direction or the [10-10] or [1-100] direction.
[0035]
When the gate electrode is in this direction, a large amount of piezo-electric charges immediately below the gate electrode causes a large temperature variation of the threshold voltage, and thus, a temperature-sensitive characteristic can be realized.
[0036]
(Third embodiment)
In the semiconductor device according to the third embodiment, InGaN (mixed crystal ratio: 0% to 100%) and AlGaN (mixed crystal ratio: 0% to 100%) are sequentially formed on a substrate, and a gate electrode and an ohmic electrode are formed. A field effect type semiconductor device formed, wherein a longitudinal direction of the gate electrode is any one of a [11-20] direction, a [2-1-10] or a [-12-10] direction. A semiconductor device comprising a mixture of a transistor and a field-effect transistor in which the longitudinal direction of the gate electrode is either the [01-10] direction or the [10-10] or [1-100] direction. Because the gate direction where the piezo charge is generated by the stress of the gate electrode is large and the direction where the piezo charge is small is mixed, the circuit is made by combining the transistors with different temperature characteristics. It has the effect of giving a large degree of freedom in total.
[0037]
FIG. 3 specifically shows a top view and a cross-sectional structure diagram of this semiconductor device. In FIG. 3, reference numeral 101 denotes an InGaN layer (mixed crystal ratio: 0% to 100%) in which a two-dimensional electron gas travels. An AlGaN layer 102 functions as a Schottky layer. A gate electrode 103 is made of, for example, PdSi / Au. An ohmic electrode 104 is made of, for example, Ti / Al. Reference numeral 105 denotes a gate electrode, a field-effect transistor whose longitudinal direction is any of the [11-20] direction, [2-1-10] or [-12-10] direction, and a longitudinal direction of the gate electrode. Field effect transistors in either the [01-10] direction or the [10-10] or [1-100] directions are mixed.
[0038]
When the gate electrode is in these directions, transistors having different characteristics can be mixed, so that a great degree of freedom is provided in circuit design. That is, it is possible to realize a circuit that positively utilizes this.
[0039]
(Fourth embodiment)
In the semiconductor device according to the fourth embodiment, InGaN (mixed crystal ratio: 0% to 100%) and first AlGaN (mixed crystal ratio: 0% to 100%) are sequentially formed on a substrate, and a gate electrode is formed. A field-effect semiconductor device formed on the first AlGaN, wherein a second AlGaN and an ohmic electrode are formed on a part of the first AlGaN, wherein a longitudinal direction of the gate electrode is A semiconductor device characterized in that the direction is either the [11-20] direction or the [2-1-10] or [-12-10] direction, and the generation of piezo charges due to stress on the gate electrode is small. It has the effect of making temperature characteristics insensitive. Further, the action of the second AlGaN can be further enhanced by the stress.
[0040]
FIG. 4 specifically shows a top view and a sectional structural view of this semiconductor device. In FIG. 4, reference numeral 401 denotes an InGaN layer (mixed crystal ratio: 0% to 100%) in which a two-dimensional electron gas travels. Reference numeral 402 denotes a first AlGaN layer, which functions as a Schottky layer. A gate electrode 403 is made of, for example, PdSi / Au. Reference numeral 406 denotes a second AlGaN layer formed on a part of the first AlGaN layer, on which an ohmic electrode 404 is formed. For example, Ti / Al is used for the ohmic electrode 404. Reference numeral 405 denotes a gate electrode whose longitudinal direction is either the [11-20] direction or the [2-1-10] or [-12-10] direction.
[0041]
When the gate electrode is located in this direction, the piezo charge immediately below the gate electrode is small, so that the temperature fluctuation of the threshold voltage is small, so that stable temperature characteristics can be realized. Further, the effect can be further enhanced by controlling the stress by the second AlGaN layer.
[0042]
(Fifth embodiment)
In the semiconductor device according to the fifth embodiment, InGaN (mixed crystal ratio 0% to 100%) and first AlGaN (mixed crystal ratio 0% to 100%) are sequentially formed on a substrate, and a gate electrode is formed. A field-effect semiconductor device formed on the first AlGaN, wherein a second AlGaN and an ohmic electrode are formed on a part of the first AlGaN, wherein a longitudinal direction of the gate electrode is A semiconductor device characterized by being in either the [01-10] direction or the [10-10] or [1-100] direction. Since a large amount of piezo charges are generated due to stress on the gate electrode, the threshold voltage is low. Has the effect of making it sensitive to temperature. Further, the action of the second AlGaN can be further enhanced by the stress.
[0043]
FIG. 5 specifically shows a top view and a cross-sectional structure diagram of this semiconductor device. In FIG. 5, reference numeral 401 denotes an InGaN layer (mixed crystal ratio: 0% to 100%) in which a two-dimensional electron gas travels. Reference numeral 402 denotes a first AlGaN layer, which functions as a Schottky layer. A gate electrode 403 is made of, for example, PdSi / Au. Reference numeral 406 denotes a second AlGaN layer formed on a part of the first AlGaN layer, on which an ohmic electrode 404 is formed. For example, Ti / Al is used for the ohmic electrode 404. Reference numeral 405 denotes a gate electrode whose longitudinal direction is either the [01-10] direction or the [10-10] or [1-100] direction.
[0044]
When the gate electrode is in this direction, a large amount of piezo-electric charges immediately below the gate electrode causes a large temperature variation of the threshold voltage, and thus, a temperature-sensitive characteristic can be realized. Further, the effect can be further enhanced by controlling the stress by the second AlGaN layer.
[0045]
(Sixth embodiment)
In the semiconductor device according to the sixth embodiment, InGaN (mixed crystal ratio 0% to 100%) and first AlGaN (mixed crystal ratio 0% to 100%) are sequentially formed on a substrate, and a gate electrode is formed. A field-effect semiconductor device formed on the first AlGaN, wherein a second AlGaN and an ohmic electrode are formed on a part of the first AlGaN, wherein a longitudinal direction of the gate electrode is A field-effect transistor that is either the [11-20] direction, the [2-1-10] or the [-12-10] direction, and the longitudinal direction of the gate electrode is the [01-10] direction or the [10- 10. A semiconductor device in which field-effect transistors in either the [10] or [1-100] direction are mixed, and a gate in which piezo charges are frequently generated due to stress on a gate electrode. Since the position and less orientation is that it mixed by combining transistors having different temperature characteristics, it has the effect of giving greater flexibility in circuit design. Further, the action of the second AlGaN can be further enhanced by the stress.
[0046]
FIG. 6 specifically shows a top view and a sectional structural view of this semiconductor device. In FIG. 6, reference numeral 401 denotes an InGaN layer (mixed crystal ratio: 0% to 100%) in which a two-dimensional electron gas travels. Reference numeral 402 denotes a first AlGaN layer, which functions as a Schottky layer. A gate electrode 403 is made of, for example, PdSi / Au. Reference numeral 406 denotes a second AlGaN layer formed on a part of the first AlGaN layer, on which an ohmic electrode 404 is formed. For example, Ti / Al is used for the ohmic electrode 404. Reference numeral 405 denotes a gate electrode, a field-effect transistor whose longitudinal direction is either the [11-20] direction, [2-1-10] or [01-10] direction, and a gate electrode whose longitudinal direction is [01]. Field effect transistors in either the [-10] direction or the [10-10] or [1-100] direction are mixed.
[0047]
When the gate electrode is in this direction, a transistor having a large threshold voltage temperature variation and a transistor having a small threshold voltage variation can be mixed. Therefore, a great degree of freedom is created in circuit design. That is, it is possible to realize a circuit that positively utilizes this. Further, the effect can be further enhanced by controlling the stress by the second AlGaN layer.
[0048]
In the above embodiment, the combination of the group III nitride semiconductor layers constituting the field-effect transistor is not limited to the InGaN layer / AlGaN layer, but may be Al _x Ga _1-xy In _y N (0 ≦ x ≦ 1, 0 The same effect can be obtained even with a combination of a plurality of AlGaInN layers in which the values of x and y are selected for ≦ y ≦ 1).
[0049]
Although the above embodiment has been described with reference to a field-effect transistor as an example, the present invention is not limited to a field-effect transistor, and the same applies to a semiconductor device using a field effect, that is, a field-effect semiconductor device. The effect is obtained.
[0050]
【The invention's effect】
As described above, according to the present invention, in the AlGaN / InGaN field-effect transistor, a transistor having uniform characteristics or a large or small temperature characteristic is realized by positively utilizing the piezo effect, and By mixing them, the degree of freedom in circuit design can be expanded.
[Brief description of the drawings]
FIG. 1 is a top view and a sectional view showing a first embodiment of the present invention. FIG. 2 is a top view and a sectional view showing a second embodiment of the present invention. FIG. 3 is a third embodiment of the present invention. FIG. 4 is a top view and a cross-sectional view showing a fourth embodiment of the present invention. FIG. 5 is a top view and a cross-sectional view showing a fifth embodiment of the present invention. FIG. 7 is a top view and a cross-sectional view showing a sixth embodiment of the invention. FIG. 7 is a diagram showing a gate electrode longitudinal direction of a threshold voltage. FIG. 8 is a diagram showing a gate electrode longitudinal direction dependence of a temperature characteristic of a threshold voltage. Top view and cross-sectional view showing a conventional example.
101 InGaN layer 102 AlGaN layer 103 Gate electrode 104 Ohmic electrode 105 Gate electrode 401 InGaN layer 402 First AlGaN layer 403 Gate electrode 404 Ohmic electrode 405 Gate electrode 406 Second AlGaN layer

Claims (8)

A field-effect transistor comprising a group III nitride semiconductor layer formed on a substrate, and having a gate electrode and an ohmic electrode formed thereon, wherein the longitudinal direction of the gate electrode is formed in a specific direction. Characteristic semiconductor device. 2. The semiconductor device according to claim 1, wherein the specific direction is one of a [11-20] direction, a [2-1-10] direction, and a [−12-10] direction. 2. The semiconductor device according to claim 1, wherein the specific direction is one of a [01-10] direction, a [10-10] direction, and a [1-100] direction. A plurality of field effect transistors formed of a group III nitride semiconductor formed on a substrate and having a gate electrode and an ohmic electrode formed thereon, wherein the longitudinal direction of the gate electrode is [11-20], A field-effect transistor having either a 2-1-10 direction or a [-12-10] direction, and a longitudinal direction of the gate electrode is a [01-10] direction, a [10-10] direction, or a [1-10] direction. 100] field-effect transistor. A gate electrode is formed on the first group III nitride semiconductor layer, and an ohmic electrode is formed on the second group III nitride semiconductor layer. A field effect transistor formed on a semiconductor layer, wherein a longitudinal direction of the gate electrode is formed in a specific direction. The semiconductor device according to claim 5, wherein the specific direction is any one of a [11-20] direction, a [2-1-10] direction, and a [-12-10] direction. 6. The semiconductor device according to claim 5, wherein the specific direction is one of a [01-10] direction, a [10-10] direction, and a [1-100] direction. A gate electrode is formed on the first group III nitride semiconductor layer, and an ohmic electrode is formed on the second group III nitride semiconductor layer. A plurality of field-effect transistors formed on the semiconductor layer, wherein the longitudinal direction of the gate electrode is any one of a [11-20] direction, a [2-1-10] direction, and a [-12-10] direction And that the longitudinal direction of the gate electrode is any one of [01-10], [10-10] and [1-100] directions. Characteristic semiconductor device.

Images